RegisterContextPOSIX_x86.h revision 257752
1//===-- RegisterContextPOSIX_x86.h ------------------------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10#ifndef liblldb_RegisterContextPOSIX_x86_H_ 11#define liblldb_RegisterContextPOSIX_x86_H_ 12 13#include "lldb/Core/Log.h" 14#include "RegisterContextPOSIX.h" 15#include "RegisterContext_x86.h" 16 17class ProcessMonitor; 18 19//--------------------------------------------------------------------------- 20// Internal codes for all i386 registers. 21//--------------------------------------------------------------------------- 22enum 23{ 24 k_first_gpr_i386, 25 gpr_eax_i386 = k_first_gpr_i386, 26 gpr_ebx_i386, 27 gpr_ecx_i386, 28 gpr_edx_i386, 29 gpr_edi_i386, 30 gpr_esi_i386, 31 gpr_ebp_i386, 32 gpr_esp_i386, 33 gpr_eip_i386, 34 gpr_eflags_i386, 35 gpr_cs_i386, 36 gpr_fs_i386, 37 gpr_gs_i386, 38 gpr_ss_i386, 39 gpr_ds_i386, 40 gpr_es_i386, 41 42 k_first_alias_i386, 43 gpr_ax_i386 = k_first_alias_i386, 44 gpr_bx_i386, 45 gpr_cx_i386, 46 gpr_dx_i386, 47 gpr_di_i386, 48 gpr_si_i386, 49 gpr_bp_i386, 50 gpr_sp_i386, 51 gpr_ah_i386, 52 gpr_bh_i386, 53 gpr_ch_i386, 54 gpr_dh_i386, 55 gpr_al_i386, 56 gpr_bl_i386, 57 gpr_cl_i386, 58 gpr_dl_i386, 59 k_last_alias_i386 = gpr_dl_i386, 60 61 k_last_gpr_i386 = k_last_alias_i386, 62 63 k_first_fpr_i386, 64 fpu_fctrl_i386 = k_first_fpr_i386, 65 fpu_fstat_i386, 66 fpu_ftag_i386, 67 fpu_fop_i386, 68 fpu_fiseg_i386, 69 fpu_fioff_i386, 70 fpu_foseg_i386, 71 fpu_fooff_i386, 72 fpu_mxcsr_i386, 73 fpu_mxcsrmask_i386, 74 fpu_st0_i386, 75 fpu_st1_i386, 76 fpu_st2_i386, 77 fpu_st3_i386, 78 fpu_st4_i386, 79 fpu_st5_i386, 80 fpu_st6_i386, 81 fpu_st7_i386, 82 fpu_mm0_i386, 83 fpu_mm1_i386, 84 fpu_mm2_i386, 85 fpu_mm3_i386, 86 fpu_mm4_i386, 87 fpu_mm5_i386, 88 fpu_mm6_i386, 89 fpu_mm7_i386, 90 fpu_xmm0_i386, 91 fpu_xmm1_i386, 92 fpu_xmm2_i386, 93 fpu_xmm3_i386, 94 fpu_xmm4_i386, 95 fpu_xmm5_i386, 96 fpu_xmm6_i386, 97 fpu_xmm7_i386, 98 k_last_fpr_i386 = fpu_xmm7_i386, 99 100 k_first_avx_i386, 101 fpu_ymm0_i386 = k_first_avx_i386, 102 fpu_ymm1_i386, 103 fpu_ymm2_i386, 104 fpu_ymm3_i386, 105 fpu_ymm4_i386, 106 fpu_ymm5_i386, 107 fpu_ymm6_i386, 108 fpu_ymm7_i386, 109 k_last_avx_i386 = fpu_ymm7_i386, 110 111 dr0_i386, 112 dr1_i386, 113 dr2_i386, 114 dr3_i386, 115 dr4_i386, 116 dr5_i386, 117 dr6_i386, 118 dr7_i386, 119 120 k_num_registers_i386, 121 k_num_gpr_registers_i386 = k_last_gpr_i386 - k_first_gpr_i386 + 1, 122 k_num_fpr_registers_i386 = k_last_fpr_i386 - k_first_fpr_i386 + 1, 123 k_num_avx_registers_i386 = k_last_avx_i386 - k_first_avx_i386 + 1 124}; 125 126//--------------------------------------------------------------------------- 127// Internal codes for all x86_64 registers. 128//--------------------------------------------------------------------------- 129enum 130{ 131 k_first_gpr_x86_64, 132 gpr_rax_x86_64 = k_first_gpr_x86_64, 133 gpr_rbx_x86_64, 134 gpr_rcx_x86_64, 135 gpr_rdx_x86_64, 136 gpr_rdi_x86_64, 137 gpr_rsi_x86_64, 138 gpr_rbp_x86_64, 139 gpr_rsp_x86_64, 140 gpr_r8_x86_64, 141 gpr_r9_x86_64, 142 gpr_r10_x86_64, 143 gpr_r11_x86_64, 144 gpr_r12_x86_64, 145 gpr_r13_x86_64, 146 gpr_r14_x86_64, 147 gpr_r15_x86_64, 148 gpr_rip_x86_64, 149 gpr_rflags_x86_64, 150 gpr_cs_x86_64, 151 gpr_fs_x86_64, 152 gpr_gs_x86_64, 153 gpr_ss_x86_64, 154 gpr_ds_x86_64, 155 gpr_es_x86_64, 156 157 k_first_alias_x86_64, 158 gpr_eax_x86_64 = k_first_alias_x86_64, 159 gpr_ebx_x86_64, 160 gpr_ecx_x86_64, 161 gpr_edx_x86_64, 162 gpr_edi_x86_64, 163 gpr_esi_x86_64, 164 gpr_ebp_x86_64, 165 gpr_esp_x86_64, 166 gpr_r8d_x86_64, // Low 32 bits of r8 167 gpr_r9d_x86_64, // Low 32 bits of r9 168 gpr_r10d_x86_64, // Low 32 bits of r10 169 gpr_r11d_x86_64, // Low 32 bits of r11 170 gpr_r12d_x86_64, // Low 32 bits of r12 171 gpr_r13d_x86_64, // Low 32 bits of r13 172 gpr_r14d_x86_64, // Low 32 bits of r14 173 gpr_r15d_x86_64, // Low 32 bits of r15 174 gpr_ax_x86_64, 175 gpr_bx_x86_64, 176 gpr_cx_x86_64, 177 gpr_dx_x86_64, 178 gpr_di_x86_64, 179 gpr_si_x86_64, 180 gpr_bp_x86_64, 181 gpr_sp_x86_64, 182 gpr_r8w_x86_64, // Low 16 bits of r8 183 gpr_r9w_x86_64, // Low 16 bits of r9 184 gpr_r10w_x86_64, // Low 16 bits of r10 185 gpr_r11w_x86_64, // Low 16 bits of r11 186 gpr_r12w_x86_64, // Low 16 bits of r12 187 gpr_r13w_x86_64, // Low 16 bits of r13 188 gpr_r14w_x86_64, // Low 16 bits of r14 189 gpr_r15w_x86_64, // Low 16 bits of r15 190 gpr_ah_x86_64, 191 gpr_bh_x86_64, 192 gpr_ch_x86_64, 193 gpr_dh_x86_64, 194 gpr_al_x86_64, 195 gpr_bl_x86_64, 196 gpr_cl_x86_64, 197 gpr_dl_x86_64, 198 gpr_dil_x86_64, 199 gpr_sil_x86_64, 200 gpr_bpl_x86_64, 201 gpr_spl_x86_64, 202 gpr_r8l_x86_64, // Low 8 bits of r8 203 gpr_r9l_x86_64, // Low 8 bits of r9 204 gpr_r10l_x86_64, // Low 8 bits of r10 205 gpr_r11l_x86_64, // Low 8 bits of r11 206 gpr_r12l_x86_64, // Low 8 bits of r12 207 gpr_r13l_x86_64, // Low 8 bits of r13 208 gpr_r14l_x86_64, // Low 8 bits of r14 209 gpr_r15l_x86_64, // Low 8 bits of r15 210 k_last_alias_x86_64 = gpr_r15l_x86_64, 211 212 k_last_gpr_x86_64 = k_last_alias_x86_64, 213 214 k_first_fpr_x86_64, 215 fpu_fctrl_x86_64 = k_first_fpr_x86_64, 216 fpu_fstat_x86_64, 217 fpu_ftag_x86_64, 218 fpu_fop_x86_64, 219 fpu_fiseg_x86_64, 220 fpu_fioff_x86_64, 221 fpu_foseg_x86_64, 222 fpu_fooff_x86_64, 223 fpu_mxcsr_x86_64, 224 fpu_mxcsrmask_x86_64, 225 fpu_st0_x86_64, 226 fpu_st1_x86_64, 227 fpu_st2_x86_64, 228 fpu_st3_x86_64, 229 fpu_st4_x86_64, 230 fpu_st5_x86_64, 231 fpu_st6_x86_64, 232 fpu_st7_x86_64, 233 fpu_mm0_x86_64, 234 fpu_mm1_x86_64, 235 fpu_mm2_x86_64, 236 fpu_mm3_x86_64, 237 fpu_mm4_x86_64, 238 fpu_mm5_x86_64, 239 fpu_mm6_x86_64, 240 fpu_mm7_x86_64, 241 fpu_xmm0_x86_64, 242 fpu_xmm1_x86_64, 243 fpu_xmm2_x86_64, 244 fpu_xmm3_x86_64, 245 fpu_xmm4_x86_64, 246 fpu_xmm5_x86_64, 247 fpu_xmm6_x86_64, 248 fpu_xmm7_x86_64, 249 fpu_xmm8_x86_64, 250 fpu_xmm9_x86_64, 251 fpu_xmm10_x86_64, 252 fpu_xmm11_x86_64, 253 fpu_xmm12_x86_64, 254 fpu_xmm13_x86_64, 255 fpu_xmm14_x86_64, 256 fpu_xmm15_x86_64, 257 k_last_fpr_x86_64 = fpu_xmm15_x86_64, 258 259 k_first_avx_x86_64, 260 fpu_ymm0_x86_64 = k_first_avx_x86_64, 261 fpu_ymm1_x86_64, 262 fpu_ymm2_x86_64, 263 fpu_ymm3_x86_64, 264 fpu_ymm4_x86_64, 265 fpu_ymm5_x86_64, 266 fpu_ymm6_x86_64, 267 fpu_ymm7_x86_64, 268 fpu_ymm8_x86_64, 269 fpu_ymm9_x86_64, 270 fpu_ymm10_x86_64, 271 fpu_ymm11_x86_64, 272 fpu_ymm12_x86_64, 273 fpu_ymm13_x86_64, 274 fpu_ymm14_x86_64, 275 fpu_ymm15_x86_64, 276 k_last_avx_x86_64 = fpu_ymm15_x86_64, 277 278 dr0_x86_64, 279 dr1_x86_64, 280 dr2_x86_64, 281 dr3_x86_64, 282 dr4_x86_64, 283 dr5_x86_64, 284 dr6_x86_64, 285 dr7_x86_64, 286 287 k_num_registers_x86_64, 288 k_num_gpr_registers_x86_64 = k_last_gpr_x86_64 - k_first_gpr_x86_64 + 1, 289 k_num_fpr_registers_x86_64 = k_last_fpr_x86_64 - k_first_fpr_x86_64 + 1, 290 k_num_avx_registers_x86_64 = k_last_avx_x86_64 - k_first_avx_x86_64 + 1 291}; 292 293class RegisterContextPOSIX_x86 294 : public lldb_private::RegisterContext 295{ 296public: 297 RegisterContextPOSIX_x86 (lldb_private::Thread &thread, 298 uint32_t concrete_frame_idx, 299 RegisterInfoInterface *register_info); 300 301 ~RegisterContextPOSIX_x86(); 302 303 void 304 Invalidate(); 305 306 void 307 InvalidateAllRegisters(); 308 309 size_t 310 GetRegisterCount(); 311 312 virtual size_t 313 GetGPRSize(); 314 315 virtual unsigned 316 GetRegisterSize(unsigned reg); 317 318 virtual unsigned 319 GetRegisterOffset(unsigned reg); 320 321 const lldb_private::RegisterInfo * 322 GetRegisterInfoAtIndex(size_t reg); 323 324 size_t 325 GetRegisterSetCount(); 326 327 const lldb_private::RegisterSet * 328 GetRegisterSet(size_t set); 329 330 const char * 331 GetRegisterName(unsigned reg); 332 333 uint32_t 334 ConvertRegisterKindToRegisterNumber(uint32_t kind, uint32_t num); 335 336 //--------------------------------------------------------------------------- 337 // Note: prefer kernel definitions over user-land 338 //--------------------------------------------------------------------------- 339 enum FPRType 340 { 341 eNotValid = 0, 342 eFSAVE, // TODO 343 eFXSAVE, 344 eSOFT, // TODO 345 eXSAVE 346 }; 347 348 static uint32_t g_contained_eax[]; 349 static uint32_t g_contained_ebx[]; 350 static uint32_t g_contained_ecx[]; 351 static uint32_t g_contained_edx[]; 352 static uint32_t g_contained_edi[]; 353 static uint32_t g_contained_esi[]; 354 static uint32_t g_contained_ebp[]; 355 static uint32_t g_contained_esp[]; 356 357 static uint32_t g_invalidate_eax[]; 358 static uint32_t g_invalidate_ebx[]; 359 static uint32_t g_invalidate_ecx[]; 360 static uint32_t g_invalidate_edx[]; 361 static uint32_t g_invalidate_edi[]; 362 static uint32_t g_invalidate_esi[]; 363 static uint32_t g_invalidate_ebp[]; 364 static uint32_t g_invalidate_esp[]; 365 366 static uint32_t g_contained_rax[]; 367 static uint32_t g_contained_rbx[]; 368 static uint32_t g_contained_rcx[]; 369 static uint32_t g_contained_rdx[]; 370 static uint32_t g_contained_rdi[]; 371 static uint32_t g_contained_rsi[]; 372 static uint32_t g_contained_rbp[]; 373 static uint32_t g_contained_rsp[]; 374 static uint32_t g_contained_r8[]; 375 static uint32_t g_contained_r9[]; 376 static uint32_t g_contained_r10[]; 377 static uint32_t g_contained_r11[]; 378 static uint32_t g_contained_r12[]; 379 static uint32_t g_contained_r13[]; 380 static uint32_t g_contained_r14[]; 381 static uint32_t g_contained_r15[]; 382 383 static uint32_t g_invalidate_rax[]; 384 static uint32_t g_invalidate_rbx[]; 385 static uint32_t g_invalidate_rcx[]; 386 static uint32_t g_invalidate_rdx[]; 387 static uint32_t g_invalidate_rdi[]; 388 static uint32_t g_invalidate_rsi[]; 389 static uint32_t g_invalidate_rbp[]; 390 static uint32_t g_invalidate_rsp[]; 391 static uint32_t g_invalidate_r8[]; 392 static uint32_t g_invalidate_r9[]; 393 static uint32_t g_invalidate_r10[]; 394 static uint32_t g_invalidate_r11[]; 395 static uint32_t g_invalidate_r12[]; 396 static uint32_t g_invalidate_r13[]; 397 static uint32_t g_invalidate_r14[]; 398 static uint32_t g_invalidate_r15[]; 399 400protected: 401 struct RegInfo 402 { 403 uint32_t num_registers; 404 uint32_t num_gpr_registers; 405 uint32_t num_fpr_registers; 406 uint32_t num_avx_registers; 407 408 uint32_t last_gpr; 409 uint32_t first_fpr; 410 uint32_t last_fpr; 411 412 uint32_t first_st; 413 uint32_t last_st; 414 uint32_t first_mm; 415 uint32_t last_mm; 416 uint32_t first_xmm; 417 uint32_t last_xmm; 418 uint32_t first_ymm; 419 uint32_t last_ymm; 420 421 uint32_t first_dr; 422 uint32_t gpr_flags; 423 }; 424 425 uint64_t m_gpr_x86_64[k_num_gpr_registers_x86_64]; // 64-bit general purpose registers. 426 RegInfo m_reg_info; 427 FPRType m_fpr_type; // determines the type of data stored by union FPR, if any. 428 FPR m_fpr; // floating-point registers including extended register sets. 429 IOVEC m_iovec; // wrapper for xsave. 430 YMM m_ymm_set; // copy of ymmh and xmm register halves. 431 std::unique_ptr<RegisterInfoInterface> m_register_info_ap; // Register Info Interface (FreeBSD or Linux) 432 433 // Determines if an extended register set is supported on the processor running the inferior process. 434 virtual bool 435 IsRegisterSetAvailable(size_t set_index); 436 437 virtual const lldb_private::RegisterInfo * 438 GetRegisterInfo(); 439 440 bool 441 IsGPR(unsigned reg); 442 443 bool 444 IsFPR(unsigned reg); 445 446 bool 447 IsAVX(unsigned reg); 448 449 lldb::ByteOrder GetByteOrder(); 450 451 bool CopyXSTATEtoYMM(uint32_t reg, lldb::ByteOrder byte_order); 452 bool CopyYMMtoXSTATE(uint32_t reg, lldb::ByteOrder byte_order); 453 bool IsFPR(unsigned reg, FPRType fpr_type); 454 FPRType GetFPRType(); 455 456 virtual bool ReadGPR() = 0; 457 virtual bool ReadFPR() = 0; 458 virtual bool WriteGPR() = 0; 459 virtual bool WriteFPR() = 0; 460}; 461 462#endif // #ifndef liblldb_RegisterContextPOSIX_x86_H_ 463