TargetInfo.cpp revision 263508
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CGCXXABI.h" 18#include "CodeGenFunction.h" 19#include "clang/AST/RecordLayout.h" 20#include "clang/CodeGen/CGFunctionInfo.h" 21#include "clang/Frontend/CodeGenOptions.h" 22#include "llvm/ADT/Triple.h" 23#include "llvm/IR/DataLayout.h" 24#include "llvm/IR/Type.h" 25#include "llvm/Support/raw_ostream.h" 26using namespace clang; 27using namespace CodeGen; 28 29static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 30 llvm::Value *Array, 31 llvm::Value *Value, 32 unsigned FirstIndex, 33 unsigned LastIndex) { 34 // Alternatively, we could emit this as a loop in the source. 35 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 36 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 37 Builder.CreateStore(Value, Cell); 38 } 39} 40 41static bool isAggregateTypeForABI(QualType T) { 42 return !CodeGenFunction::hasScalarEvaluationKind(T) || 43 T->isMemberFunctionPointerType(); 44} 45 46ABIInfo::~ABIInfo() {} 47 48static bool isRecordReturnIndirect(const RecordType *RT, 49 CGCXXABI &CXXABI) { 50 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 51 if (!RD) 52 return false; 53 return CXXABI.isReturnTypeIndirect(RD); 54} 55 56 57static bool isRecordReturnIndirect(QualType T, CGCXXABI &CXXABI) { 58 const RecordType *RT = T->getAs<RecordType>(); 59 if (!RT) 60 return false; 61 return isRecordReturnIndirect(RT, CXXABI); 62} 63 64static CGCXXABI::RecordArgABI getRecordArgABI(const RecordType *RT, 65 CGCXXABI &CXXABI) { 66 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 67 if (!RD) 68 return CGCXXABI::RAA_Default; 69 return CXXABI.getRecordArgABI(RD); 70} 71 72static CGCXXABI::RecordArgABI getRecordArgABI(QualType T, 73 CGCXXABI &CXXABI) { 74 const RecordType *RT = T->getAs<RecordType>(); 75 if (!RT) 76 return CGCXXABI::RAA_Default; 77 return getRecordArgABI(RT, CXXABI); 78} 79 80CGCXXABI &ABIInfo::getCXXABI() const { 81 return CGT.getCXXABI(); 82} 83 84ASTContext &ABIInfo::getContext() const { 85 return CGT.getContext(); 86} 87 88llvm::LLVMContext &ABIInfo::getVMContext() const { 89 return CGT.getLLVMContext(); 90} 91 92const llvm::DataLayout &ABIInfo::getDataLayout() const { 93 return CGT.getDataLayout(); 94} 95 96const TargetInfo &ABIInfo::getTarget() const { 97 return CGT.getTarget(); 98} 99 100void ABIArgInfo::dump() const { 101 raw_ostream &OS = llvm::errs(); 102 OS << "(ABIArgInfo Kind="; 103 switch (TheKind) { 104 case Direct: 105 OS << "Direct Type="; 106 if (llvm::Type *Ty = getCoerceToType()) 107 Ty->print(OS); 108 else 109 OS << "null"; 110 break; 111 case Extend: 112 OS << "Extend"; 113 break; 114 case Ignore: 115 OS << "Ignore"; 116 break; 117 case Indirect: 118 OS << "Indirect Align=" << getIndirectAlign() 119 << " ByVal=" << getIndirectByVal() 120 << " Realign=" << getIndirectRealign(); 121 break; 122 case Expand: 123 OS << "Expand"; 124 break; 125 } 126 OS << ")\n"; 127} 128 129TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 130 131// If someone can figure out a general rule for this, that would be great. 132// It's probably just doomed to be platform-dependent, though. 133unsigned TargetCodeGenInfo::getSizeOfUnwindException() const { 134 // Verified for: 135 // x86-64 FreeBSD, Linux, Darwin 136 // x86-32 FreeBSD, Linux, Darwin 137 // PowerPC Linux, Darwin 138 // ARM Darwin (*not* EABI) 139 // AArch64 Linux 140 return 32; 141} 142 143bool TargetCodeGenInfo::isNoProtoCallVariadic(const CallArgList &args, 144 const FunctionNoProtoType *fnType) const { 145 // The following conventions are known to require this to be false: 146 // x86_stdcall 147 // MIPS 148 // For everything else, we just prefer false unless we opt out. 149 return false; 150} 151 152void 153TargetCodeGenInfo::getDependentLibraryOption(llvm::StringRef Lib, 154 llvm::SmallString<24> &Opt) const { 155 // This assumes the user is passing a library name like "rt" instead of a 156 // filename like "librt.a/so", and that they don't care whether it's static or 157 // dynamic. 158 Opt = "-l"; 159 Opt += Lib; 160} 161 162static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 163 164/// isEmptyField - Return true iff a the field is "empty", that is it 165/// is an unnamed bit-field or an (array of) empty record(s). 166static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 167 bool AllowArrays) { 168 if (FD->isUnnamedBitfield()) 169 return true; 170 171 QualType FT = FD->getType(); 172 173 // Constant arrays of empty records count as empty, strip them off. 174 // Constant arrays of zero length always count as empty. 175 if (AllowArrays) 176 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 177 if (AT->getSize() == 0) 178 return true; 179 FT = AT->getElementType(); 180 } 181 182 const RecordType *RT = FT->getAs<RecordType>(); 183 if (!RT) 184 return false; 185 186 // C++ record fields are never empty, at least in the Itanium ABI. 187 // 188 // FIXME: We should use a predicate for whether this behavior is true in the 189 // current ABI. 190 if (isa<CXXRecordDecl>(RT->getDecl())) 191 return false; 192 193 return isEmptyRecord(Context, FT, AllowArrays); 194} 195 196/// isEmptyRecord - Return true iff a structure contains only empty 197/// fields. Note that a structure with a flexible array member is not 198/// considered empty. 199static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 200 const RecordType *RT = T->getAs<RecordType>(); 201 if (!RT) 202 return 0; 203 const RecordDecl *RD = RT->getDecl(); 204 if (RD->hasFlexibleArrayMember()) 205 return false; 206 207 // If this is a C++ record, check the bases first. 208 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 209 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 210 e = CXXRD->bases_end(); i != e; ++i) 211 if (!isEmptyRecord(Context, i->getType(), true)) 212 return false; 213 214 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 215 i != e; ++i) 216 if (!isEmptyField(Context, *i, AllowArrays)) 217 return false; 218 return true; 219} 220 221/// isSingleElementStruct - Determine if a structure is a "single 222/// element struct", i.e. it has exactly one non-empty field or 223/// exactly one field which is itself a single element 224/// struct. Structures with flexible array members are never 225/// considered single element structs. 226/// 227/// \return The field declaration for the single non-empty field, if 228/// it exists. 229static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 230 const RecordType *RT = T->getAsStructureType(); 231 if (!RT) 232 return 0; 233 234 const RecordDecl *RD = RT->getDecl(); 235 if (RD->hasFlexibleArrayMember()) 236 return 0; 237 238 const Type *Found = 0; 239 240 // If this is a C++ record, check the bases first. 241 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 242 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 243 e = CXXRD->bases_end(); i != e; ++i) { 244 // Ignore empty records. 245 if (isEmptyRecord(Context, i->getType(), true)) 246 continue; 247 248 // If we already found an element then this isn't a single-element struct. 249 if (Found) 250 return 0; 251 252 // If this is non-empty and not a single element struct, the composite 253 // cannot be a single element struct. 254 Found = isSingleElementStruct(i->getType(), Context); 255 if (!Found) 256 return 0; 257 } 258 } 259 260 // Check for single element. 261 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 262 i != e; ++i) { 263 const FieldDecl *FD = *i; 264 QualType FT = FD->getType(); 265 266 // Ignore empty fields. 267 if (isEmptyField(Context, FD, true)) 268 continue; 269 270 // If we already found an element then this isn't a single-element 271 // struct. 272 if (Found) 273 return 0; 274 275 // Treat single element arrays as the element. 276 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 277 if (AT->getSize().getZExtValue() != 1) 278 break; 279 FT = AT->getElementType(); 280 } 281 282 if (!isAggregateTypeForABI(FT)) { 283 Found = FT.getTypePtr(); 284 } else { 285 Found = isSingleElementStruct(FT, Context); 286 if (!Found) 287 return 0; 288 } 289 } 290 291 // We don't consider a struct a single-element struct if it has 292 // padding beyond the element type. 293 if (Found && Context.getTypeSize(Found) != Context.getTypeSize(T)) 294 return 0; 295 296 return Found; 297} 298 299static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 300 // Treat complex types as the element type. 301 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) 302 Ty = CTy->getElementType(); 303 304 // Check for a type which we know has a simple scalar argument-passing 305 // convention without any padding. (We're specifically looking for 32 306 // and 64-bit integer and integer-equivalents, float, and double.) 307 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 308 !Ty->isEnumeralType() && !Ty->isBlockPointerType()) 309 return false; 310 311 uint64_t Size = Context.getTypeSize(Ty); 312 return Size == 32 || Size == 64; 313} 314 315/// canExpandIndirectArgument - Test whether an argument type which is to be 316/// passed indirectly (on the stack) would have the equivalent layout if it was 317/// expanded into separate arguments. If so, we prefer to do the latter to avoid 318/// inhibiting optimizations. 319/// 320// FIXME: This predicate is missing many cases, currently it just follows 321// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 322// should probably make this smarter, or better yet make the LLVM backend 323// capable of handling it. 324static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 325 // We can only expand structure types. 326 const RecordType *RT = Ty->getAs<RecordType>(); 327 if (!RT) 328 return false; 329 330 // We can only expand (C) structures. 331 // 332 // FIXME: This needs to be generalized to handle classes as well. 333 const RecordDecl *RD = RT->getDecl(); 334 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 335 return false; 336 337 uint64_t Size = 0; 338 339 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 340 i != e; ++i) { 341 const FieldDecl *FD = *i; 342 343 if (!is32Or64BitBasicType(FD->getType(), Context)) 344 return false; 345 346 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 347 // how to expand them yet, and the predicate for telling if a bitfield still 348 // counts as "basic" is more complicated than what we were doing previously. 349 if (FD->isBitField()) 350 return false; 351 352 Size += Context.getTypeSize(FD->getType()); 353 } 354 355 // Make sure there are not any holes in the struct. 356 if (Size != Context.getTypeSize(Ty)) 357 return false; 358 359 return true; 360} 361 362namespace { 363/// DefaultABIInfo - The default implementation for ABI specific 364/// details. This implementation provides information which results in 365/// self-consistent and sensible LLVM IR generation, but does not 366/// conform to any particular ABI. 367class DefaultABIInfo : public ABIInfo { 368public: 369 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 370 371 ABIArgInfo classifyReturnType(QualType RetTy) const; 372 ABIArgInfo classifyArgumentType(QualType RetTy) const; 373 374 virtual void computeInfo(CGFunctionInfo &FI) const { 375 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 376 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 377 it != ie; ++it) 378 it->info = classifyArgumentType(it->type); 379 } 380 381 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 382 CodeGenFunction &CGF) const; 383}; 384 385class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 386public: 387 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 388 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 389}; 390 391llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 392 CodeGenFunction &CGF) const { 393 return 0; 394} 395 396ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 397 if (isAggregateTypeForABI(Ty)) { 398 // Records with non trivial destructors/constructors should not be passed 399 // by value. 400 if (isRecordReturnIndirect(Ty, getCXXABI())) 401 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 402 403 return ABIArgInfo::getIndirect(0); 404 } 405 406 // Treat an enum type as its underlying type. 407 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 408 Ty = EnumTy->getDecl()->getIntegerType(); 409 410 return (Ty->isPromotableIntegerType() ? 411 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 412} 413 414ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 415 if (RetTy->isVoidType()) 416 return ABIArgInfo::getIgnore(); 417 418 if (isAggregateTypeForABI(RetTy)) 419 return ABIArgInfo::getIndirect(0); 420 421 // Treat an enum type as its underlying type. 422 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 423 RetTy = EnumTy->getDecl()->getIntegerType(); 424 425 return (RetTy->isPromotableIntegerType() ? 426 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 427} 428 429//===----------------------------------------------------------------------===// 430// le32/PNaCl bitcode ABI Implementation 431// 432// This is a simplified version of the x86_32 ABI. Arguments and return values 433// are always passed on the stack. 434//===----------------------------------------------------------------------===// 435 436class PNaClABIInfo : public ABIInfo { 437 public: 438 PNaClABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 439 440 ABIArgInfo classifyReturnType(QualType RetTy) const; 441 ABIArgInfo classifyArgumentType(QualType RetTy) const; 442 443 virtual void computeInfo(CGFunctionInfo &FI) const; 444 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 445 CodeGenFunction &CGF) const; 446}; 447 448class PNaClTargetCodeGenInfo : public TargetCodeGenInfo { 449 public: 450 PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 451 : TargetCodeGenInfo(new PNaClABIInfo(CGT)) {} 452}; 453 454void PNaClABIInfo::computeInfo(CGFunctionInfo &FI) const { 455 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 456 457 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 458 it != ie; ++it) 459 it->info = classifyArgumentType(it->type); 460 } 461 462llvm::Value *PNaClABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 463 CodeGenFunction &CGF) const { 464 return 0; 465} 466 467/// \brief Classify argument of given type \p Ty. 468ABIArgInfo PNaClABIInfo::classifyArgumentType(QualType Ty) const { 469 if (isAggregateTypeForABI(Ty)) { 470 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) 471 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 472 return ABIArgInfo::getIndirect(0); 473 } else if (const EnumType *EnumTy = Ty->getAs<EnumType>()) { 474 // Treat an enum type as its underlying type. 475 Ty = EnumTy->getDecl()->getIntegerType(); 476 } else if (Ty->isFloatingType()) { 477 // Floating-point types don't go inreg. 478 return ABIArgInfo::getDirect(); 479 } 480 481 return (Ty->isPromotableIntegerType() ? 482 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 483} 484 485ABIArgInfo PNaClABIInfo::classifyReturnType(QualType RetTy) const { 486 if (RetTy->isVoidType()) 487 return ABIArgInfo::getIgnore(); 488 489 // In the PNaCl ABI we always return records/structures on the stack. 490 if (isAggregateTypeForABI(RetTy)) 491 return ABIArgInfo::getIndirect(0); 492 493 // Treat an enum type as its underlying type. 494 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 495 RetTy = EnumTy->getDecl()->getIntegerType(); 496 497 return (RetTy->isPromotableIntegerType() ? 498 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 499} 500 501/// IsX86_MMXType - Return true if this is an MMX type. 502bool IsX86_MMXType(llvm::Type *IRType) { 503 // Return true if the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>. 504 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && 505 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && 506 IRType->getScalarSizeInBits() != 64; 507} 508 509static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 510 StringRef Constraint, 511 llvm::Type* Ty) { 512 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) { 513 if (cast<llvm::VectorType>(Ty)->getBitWidth() != 64) { 514 // Invalid MMX constraint 515 return 0; 516 } 517 518 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext()); 519 } 520 521 // No operation needed 522 return Ty; 523} 524 525//===----------------------------------------------------------------------===// 526// X86-32 ABI Implementation 527//===----------------------------------------------------------------------===// 528 529/// X86_32ABIInfo - The X86-32 ABI information. 530class X86_32ABIInfo : public ABIInfo { 531 enum Class { 532 Integer, 533 Float 534 }; 535 536 static const unsigned MinABIStackAlignInBytes = 4; 537 538 bool IsDarwinVectorABI; 539 bool IsSmallStructInRegABI; 540 bool IsWin32StructABI; 541 unsigned DefaultNumRegisterParameters; 542 543 static bool isRegisterSize(unsigned Size) { 544 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 545 } 546 547 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context, 548 unsigned callingConvention); 549 550 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 551 /// such that the argument will be passed in memory. 552 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal, 553 unsigned &FreeRegs) const; 554 555 /// \brief Return the alignment to use for the given type on the stack. 556 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const; 557 558 Class classify(QualType Ty) const; 559 ABIArgInfo classifyReturnType(QualType RetTy, 560 unsigned callingConvention) const; 561 ABIArgInfo classifyArgumentType(QualType RetTy, unsigned &FreeRegs, 562 bool IsFastCall) const; 563 bool shouldUseInReg(QualType Ty, unsigned &FreeRegs, 564 bool IsFastCall, bool &NeedsPadding) const; 565 566public: 567 568 virtual void computeInfo(CGFunctionInfo &FI) const; 569 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 570 CodeGenFunction &CGF) const; 571 572 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool w, 573 unsigned r) 574 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p), 575 IsWin32StructABI(w), DefaultNumRegisterParameters(r) {} 576}; 577 578class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 579public: 580 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, 581 bool d, bool p, bool w, unsigned r) 582 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, w, r)) {} 583 584 static bool isStructReturnInRegABI( 585 const llvm::Triple &Triple, const CodeGenOptions &Opts); 586 587 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 588 CodeGen::CodeGenModule &CGM) const; 589 590 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 591 // Darwin uses different dwarf register numbers for EH. 592 if (CGM.getTarget().getTriple().isOSDarwin()) return 5; 593 return 4; 594 } 595 596 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 597 llvm::Value *Address) const; 598 599 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 600 StringRef Constraint, 601 llvm::Type* Ty) const { 602 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 603 } 604 605 llvm::Constant *getUBSanFunctionSignature(CodeGen::CodeGenModule &CGM) const { 606 unsigned Sig = (0xeb << 0) | // jmp rel8 607 (0x06 << 8) | // .+0x08 608 ('F' << 16) | 609 ('T' << 24); 610 return llvm::ConstantInt::get(CGM.Int32Ty, Sig); 611 } 612 613}; 614 615} 616 617/// shouldReturnTypeInRegister - Determine if the given type should be 618/// passed in a register (for the Darwin ABI). 619bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 620 ASTContext &Context, 621 unsigned callingConvention) { 622 uint64_t Size = Context.getTypeSize(Ty); 623 624 // Type must be register sized. 625 if (!isRegisterSize(Size)) 626 return false; 627 628 if (Ty->isVectorType()) { 629 // 64- and 128- bit vectors inside structures are not returned in 630 // registers. 631 if (Size == 64 || Size == 128) 632 return false; 633 634 return true; 635 } 636 637 // If this is a builtin, pointer, enum, complex type, member pointer, or 638 // member function pointer it is ok. 639 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 640 Ty->isAnyComplexType() || Ty->isEnumeralType() || 641 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 642 return true; 643 644 // Arrays are treated like records. 645 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 646 return shouldReturnTypeInRegister(AT->getElementType(), Context, 647 callingConvention); 648 649 // Otherwise, it must be a record type. 650 const RecordType *RT = Ty->getAs<RecordType>(); 651 if (!RT) return false; 652 653 // FIXME: Traverse bases here too. 654 655 // For thiscall conventions, structures will never be returned in 656 // a register. This is for compatibility with the MSVC ABI 657 if (callingConvention == llvm::CallingConv::X86_ThisCall && 658 RT->isStructureType()) { 659 return false; 660 } 661 662 // Structure types are passed in register if all fields would be 663 // passed in a register. 664 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 665 e = RT->getDecl()->field_end(); i != e; ++i) { 666 const FieldDecl *FD = *i; 667 668 // Empty fields are ignored. 669 if (isEmptyField(Context, FD, true)) 670 continue; 671 672 // Check fields recursively. 673 if (!shouldReturnTypeInRegister(FD->getType(), Context, 674 callingConvention)) 675 return false; 676 } 677 return true; 678} 679 680ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, 681 unsigned callingConvention) const { 682 if (RetTy->isVoidType()) 683 return ABIArgInfo::getIgnore(); 684 685 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 686 // On Darwin, some vectors are returned in registers. 687 if (IsDarwinVectorABI) { 688 uint64_t Size = getContext().getTypeSize(RetTy); 689 690 // 128-bit vectors are a special case; they are returned in 691 // registers and we need to make sure to pick a type the LLVM 692 // backend will like. 693 if (Size == 128) 694 return ABIArgInfo::getDirect(llvm::VectorType::get( 695 llvm::Type::getInt64Ty(getVMContext()), 2)); 696 697 // Always return in register if it fits in a general purpose 698 // register, or if it is 64 bits and has a single element. 699 if ((Size == 8 || Size == 16 || Size == 32) || 700 (Size == 64 && VT->getNumElements() == 1)) 701 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 702 Size)); 703 704 return ABIArgInfo::getIndirect(0); 705 } 706 707 return ABIArgInfo::getDirect(); 708 } 709 710 if (isAggregateTypeForABI(RetTy)) { 711 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 712 if (isRecordReturnIndirect(RT, getCXXABI())) 713 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 714 715 // Structures with flexible arrays are always indirect. 716 if (RT->getDecl()->hasFlexibleArrayMember()) 717 return ABIArgInfo::getIndirect(0); 718 } 719 720 // If specified, structs and unions are always indirect. 721 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 722 return ABIArgInfo::getIndirect(0); 723 724 // Small structures which are register sized are generally returned 725 // in a register. 726 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext(), 727 callingConvention)) { 728 uint64_t Size = getContext().getTypeSize(RetTy); 729 730 // As a special-case, if the struct is a "single-element" struct, and 731 // the field is of type "float" or "double", return it in a 732 // floating-point register. (MSVC does not apply this special case.) 733 // We apply a similar transformation for pointer types to improve the 734 // quality of the generated IR. 735 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) 736 if ((!IsWin32StructABI && SeltTy->isRealFloatingType()) 737 || SeltTy->hasPointerRepresentation()) 738 return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0))); 739 740 // FIXME: We should be able to narrow this integer in cases with dead 741 // padding. 742 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 743 } 744 745 return ABIArgInfo::getIndirect(0); 746 } 747 748 // Treat an enum type as its underlying type. 749 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 750 RetTy = EnumTy->getDecl()->getIntegerType(); 751 752 return (RetTy->isPromotableIntegerType() ? 753 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 754} 755 756static bool isSSEVectorType(ASTContext &Context, QualType Ty) { 757 return Ty->getAs<VectorType>() && Context.getTypeSize(Ty) == 128; 758} 759 760static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) { 761 const RecordType *RT = Ty->getAs<RecordType>(); 762 if (!RT) 763 return 0; 764 const RecordDecl *RD = RT->getDecl(); 765 766 // If this is a C++ record, check the bases first. 767 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 768 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 769 e = CXXRD->bases_end(); i != e; ++i) 770 if (!isRecordWithSSEVectorType(Context, i->getType())) 771 return false; 772 773 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 774 i != e; ++i) { 775 QualType FT = i->getType(); 776 777 if (isSSEVectorType(Context, FT)) 778 return true; 779 780 if (isRecordWithSSEVectorType(Context, FT)) 781 return true; 782 } 783 784 return false; 785} 786 787unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty, 788 unsigned Align) const { 789 // Otherwise, if the alignment is less than or equal to the minimum ABI 790 // alignment, just use the default; the backend will handle this. 791 if (Align <= MinABIStackAlignInBytes) 792 return 0; // Use default alignment. 793 794 // On non-Darwin, the stack type alignment is always 4. 795 if (!IsDarwinVectorABI) { 796 // Set explicit alignment, since we may need to realign the top. 797 return MinABIStackAlignInBytes; 798 } 799 800 // Otherwise, if the type contains an SSE vector type, the alignment is 16. 801 if (Align >= 16 && (isSSEVectorType(getContext(), Ty) || 802 isRecordWithSSEVectorType(getContext(), Ty))) 803 return 16; 804 805 return MinABIStackAlignInBytes; 806} 807 808ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal, 809 unsigned &FreeRegs) const { 810 if (!ByVal) { 811 if (FreeRegs) { 812 --FreeRegs; // Non byval indirects just use one pointer. 813 return ABIArgInfo::getIndirectInReg(0, false); 814 } 815 return ABIArgInfo::getIndirect(0, false); 816 } 817 818 // Compute the byval alignment. 819 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 820 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign); 821 if (StackAlign == 0) 822 return ABIArgInfo::getIndirect(4); 823 824 // If the stack alignment is less than the type alignment, realign the 825 // argument. 826 if (StackAlign < TypeAlign) 827 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, 828 /*Realign=*/true); 829 830 return ABIArgInfo::getIndirect(StackAlign); 831} 832 833X86_32ABIInfo::Class X86_32ABIInfo::classify(QualType Ty) const { 834 const Type *T = isSingleElementStruct(Ty, getContext()); 835 if (!T) 836 T = Ty.getTypePtr(); 837 838 if (const BuiltinType *BT = T->getAs<BuiltinType>()) { 839 BuiltinType::Kind K = BT->getKind(); 840 if (K == BuiltinType::Float || K == BuiltinType::Double) 841 return Float; 842 } 843 return Integer; 844} 845 846bool X86_32ABIInfo::shouldUseInReg(QualType Ty, unsigned &FreeRegs, 847 bool IsFastCall, bool &NeedsPadding) const { 848 NeedsPadding = false; 849 Class C = classify(Ty); 850 if (C == Float) 851 return false; 852 853 unsigned Size = getContext().getTypeSize(Ty); 854 unsigned SizeInRegs = (Size + 31) / 32; 855 856 if (SizeInRegs == 0) 857 return false; 858 859 if (SizeInRegs > FreeRegs) { 860 FreeRegs = 0; 861 return false; 862 } 863 864 FreeRegs -= SizeInRegs; 865 866 if (IsFastCall) { 867 if (Size > 32) 868 return false; 869 870 if (Ty->isIntegralOrEnumerationType()) 871 return true; 872 873 if (Ty->isPointerType()) 874 return true; 875 876 if (Ty->isReferenceType()) 877 return true; 878 879 if (FreeRegs) 880 NeedsPadding = true; 881 882 return false; 883 } 884 885 return true; 886} 887 888ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty, 889 unsigned &FreeRegs, 890 bool IsFastCall) const { 891 // FIXME: Set alignment on indirect arguments. 892 if (isAggregateTypeForABI(Ty)) { 893 if (const RecordType *RT = Ty->getAs<RecordType>()) { 894 if (IsWin32StructABI) 895 return getIndirectResult(Ty, true, FreeRegs); 896 897 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, getCXXABI())) 898 return getIndirectResult(Ty, RAA == CGCXXABI::RAA_DirectInMemory, FreeRegs); 899 900 // Structures with flexible arrays are always indirect. 901 if (RT->getDecl()->hasFlexibleArrayMember()) 902 return getIndirectResult(Ty, true, FreeRegs); 903 } 904 905 // Ignore empty structs/unions. 906 if (isEmptyRecord(getContext(), Ty, true)) 907 return ABIArgInfo::getIgnore(); 908 909 llvm::LLVMContext &LLVMContext = getVMContext(); 910 llvm::IntegerType *Int32 = llvm::Type::getInt32Ty(LLVMContext); 911 bool NeedsPadding; 912 if (shouldUseInReg(Ty, FreeRegs, IsFastCall, NeedsPadding)) { 913 unsigned SizeInRegs = (getContext().getTypeSize(Ty) + 31) / 32; 914 SmallVector<llvm::Type*, 3> Elements(SizeInRegs, Int32); 915 llvm::Type *Result = llvm::StructType::get(LLVMContext, Elements); 916 return ABIArgInfo::getDirectInReg(Result); 917 } 918 llvm::IntegerType *PaddingType = NeedsPadding ? Int32 : 0; 919 920 // Expand small (<= 128-bit) record types when we know that the stack layout 921 // of those arguments will match the struct. This is important because the 922 // LLVM backend isn't smart enough to remove byval, which inhibits many 923 // optimizations. 924 if (getContext().getTypeSize(Ty) <= 4*32 && 925 canExpandIndirectArgument(Ty, getContext())) 926 return ABIArgInfo::getExpandWithPadding(IsFastCall, PaddingType); 927 928 return getIndirectResult(Ty, true, FreeRegs); 929 } 930 931 if (const VectorType *VT = Ty->getAs<VectorType>()) { 932 // On Darwin, some vectors are passed in memory, we handle this by passing 933 // it as an i8/i16/i32/i64. 934 if (IsDarwinVectorABI) { 935 uint64_t Size = getContext().getTypeSize(Ty); 936 if ((Size == 8 || Size == 16 || Size == 32) || 937 (Size == 64 && VT->getNumElements() == 1)) 938 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 939 Size)); 940 } 941 942 if (IsX86_MMXType(CGT.ConvertType(Ty))) 943 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 64)); 944 945 return ABIArgInfo::getDirect(); 946 } 947 948 949 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 950 Ty = EnumTy->getDecl()->getIntegerType(); 951 952 bool NeedsPadding; 953 bool InReg = shouldUseInReg(Ty, FreeRegs, IsFastCall, NeedsPadding); 954 955 if (Ty->isPromotableIntegerType()) { 956 if (InReg) 957 return ABIArgInfo::getExtendInReg(); 958 return ABIArgInfo::getExtend(); 959 } 960 if (InReg) 961 return ABIArgInfo::getDirectInReg(); 962 return ABIArgInfo::getDirect(); 963} 964 965void X86_32ABIInfo::computeInfo(CGFunctionInfo &FI) const { 966 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 967 FI.getCallingConvention()); 968 969 unsigned CC = FI.getCallingConvention(); 970 bool IsFastCall = CC == llvm::CallingConv::X86_FastCall; 971 unsigned FreeRegs; 972 if (IsFastCall) 973 FreeRegs = 2; 974 else if (FI.getHasRegParm()) 975 FreeRegs = FI.getRegParm(); 976 else 977 FreeRegs = DefaultNumRegisterParameters; 978 979 // If the return value is indirect, then the hidden argument is consuming one 980 // integer register. 981 if (FI.getReturnInfo().isIndirect() && FreeRegs) { 982 --FreeRegs; 983 ABIArgInfo &Old = FI.getReturnInfo(); 984 Old = ABIArgInfo::getIndirectInReg(Old.getIndirectAlign(), 985 Old.getIndirectByVal(), 986 Old.getIndirectRealign()); 987 } 988 989 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 990 it != ie; ++it) 991 it->info = classifyArgumentType(it->type, FreeRegs, IsFastCall); 992} 993 994llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 995 CodeGenFunction &CGF) const { 996 llvm::Type *BPP = CGF.Int8PtrPtrTy; 997 998 CGBuilderTy &Builder = CGF.Builder; 999 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1000 "ap"); 1001 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1002 1003 // Compute if the address needs to be aligned 1004 unsigned Align = CGF.getContext().getTypeAlignInChars(Ty).getQuantity(); 1005 Align = getTypeStackAlignInBytes(Ty, Align); 1006 Align = std::max(Align, 4U); 1007 if (Align > 4) { 1008 // addr = (addr + align - 1) & -align; 1009 llvm::Value *Offset = 1010 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1); 1011 Addr = CGF.Builder.CreateGEP(Addr, Offset); 1012 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(Addr, 1013 CGF.Int32Ty); 1014 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -Align); 1015 Addr = CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1016 Addr->getType(), 1017 "ap.cur.aligned"); 1018 } 1019 1020 llvm::Type *PTy = 1021 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 1022 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1023 1024 uint64_t Offset = 1025 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, Align); 1026 llvm::Value *NextAddr = 1027 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 1028 "ap.next"); 1029 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1030 1031 return AddrTyped; 1032} 1033 1034void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 1035 llvm::GlobalValue *GV, 1036 CodeGen::CodeGenModule &CGM) const { 1037 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 1038 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 1039 // Get the LLVM function. 1040 llvm::Function *Fn = cast<llvm::Function>(GV); 1041 1042 // Now add the 'alignstack' attribute with a value of 16. 1043 llvm::AttrBuilder B; 1044 B.addStackAlignmentAttr(16); 1045 Fn->addAttributes(llvm::AttributeSet::FunctionIndex, 1046 llvm::AttributeSet::get(CGM.getLLVMContext(), 1047 llvm::AttributeSet::FunctionIndex, 1048 B)); 1049 } 1050 } 1051} 1052 1053bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 1054 CodeGen::CodeGenFunction &CGF, 1055 llvm::Value *Address) const { 1056 CodeGen::CGBuilderTy &Builder = CGF.Builder; 1057 1058 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 1059 1060 // 0-7 are the eight integer registers; the order is different 1061 // on Darwin (for EH), but the range is the same. 1062 // 8 is %eip. 1063 AssignToArrayRange(Builder, Address, Four8, 0, 8); 1064 1065 if (CGF.CGM.getTarget().getTriple().isOSDarwin()) { 1066 // 12-16 are st(0..4). Not sure why we stop at 4. 1067 // These have size 16, which is sizeof(long double) on 1068 // platforms with 8-byte alignment for that type. 1069 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16); 1070 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 1071 1072 } else { 1073 // 9 is %eflags, which doesn't get a size on Darwin for some 1074 // reason. 1075 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 1076 1077 // 11-16 are st(0..5). Not sure why we stop at 5. 1078 // These have size 12, which is sizeof(long double) on 1079 // platforms with 4-byte alignment for that type. 1080 llvm::Value *Twelve8 = llvm::ConstantInt::get(CGF.Int8Ty, 12); 1081 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 1082 } 1083 1084 return false; 1085} 1086 1087//===----------------------------------------------------------------------===// 1088// X86-64 ABI Implementation 1089//===----------------------------------------------------------------------===// 1090 1091 1092namespace { 1093/// X86_64ABIInfo - The X86_64 ABI information. 1094class X86_64ABIInfo : public ABIInfo { 1095 enum Class { 1096 Integer = 0, 1097 SSE, 1098 SSEUp, 1099 X87, 1100 X87Up, 1101 ComplexX87, 1102 NoClass, 1103 Memory 1104 }; 1105 1106 /// merge - Implement the X86_64 ABI merging algorithm. 1107 /// 1108 /// Merge an accumulating classification \arg Accum with a field 1109 /// classification \arg Field. 1110 /// 1111 /// \param Accum - The accumulating classification. This should 1112 /// always be either NoClass or the result of a previous merge 1113 /// call. In addition, this should never be Memory (the caller 1114 /// should just return Memory for the aggregate). 1115 static Class merge(Class Accum, Class Field); 1116 1117 /// postMerge - Implement the X86_64 ABI post merging algorithm. 1118 /// 1119 /// Post merger cleanup, reduces a malformed Hi and Lo pair to 1120 /// final MEMORY or SSE classes when necessary. 1121 /// 1122 /// \param AggregateSize - The size of the current aggregate in 1123 /// the classification process. 1124 /// 1125 /// \param Lo - The classification for the parts of the type 1126 /// residing in the low word of the containing object. 1127 /// 1128 /// \param Hi - The classification for the parts of the type 1129 /// residing in the higher words of the containing object. 1130 /// 1131 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const; 1132 1133 /// classify - Determine the x86_64 register classes in which the 1134 /// given type T should be passed. 1135 /// 1136 /// \param Lo - The classification for the parts of the type 1137 /// residing in the low word of the containing object. 1138 /// 1139 /// \param Hi - The classification for the parts of the type 1140 /// residing in the high word of the containing object. 1141 /// 1142 /// \param OffsetBase - The bit offset of this type in the 1143 /// containing object. Some parameters are classified different 1144 /// depending on whether they straddle an eightbyte boundary. 1145 /// 1146 /// \param isNamedArg - Whether the argument in question is a "named" 1147 /// argument, as used in AMD64-ABI 3.5.7. 1148 /// 1149 /// If a word is unused its result will be NoClass; if a type should 1150 /// be passed in Memory then at least the classification of \arg Lo 1151 /// will be Memory. 1152 /// 1153 /// The \arg Lo class will be NoClass iff the argument is ignored. 1154 /// 1155 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 1156 /// also be ComplexX87. 1157 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi, 1158 bool isNamedArg) const; 1159 1160 llvm::Type *GetByteVectorType(QualType Ty) const; 1161 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType, 1162 unsigned IROffset, QualType SourceTy, 1163 unsigned SourceOffset) const; 1164 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType, 1165 unsigned IROffset, QualType SourceTy, 1166 unsigned SourceOffset) const; 1167 1168 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 1169 /// such that the argument will be returned in memory. 1170 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 1171 1172 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 1173 /// such that the argument will be passed in memory. 1174 /// 1175 /// \param freeIntRegs - The number of free integer registers remaining 1176 /// available. 1177 ABIArgInfo getIndirectResult(QualType Ty, unsigned freeIntRegs) const; 1178 1179 ABIArgInfo classifyReturnType(QualType RetTy) const; 1180 1181 ABIArgInfo classifyArgumentType(QualType Ty, 1182 unsigned freeIntRegs, 1183 unsigned &neededInt, 1184 unsigned &neededSSE, 1185 bool isNamedArg) const; 1186 1187 bool IsIllegalVectorType(QualType Ty) const; 1188 1189 /// The 0.98 ABI revision clarified a lot of ambiguities, 1190 /// unfortunately in ways that were not always consistent with 1191 /// certain previous compilers. In particular, platforms which 1192 /// required strict binary compatibility with older versions of GCC 1193 /// may need to exempt themselves. 1194 bool honorsRevision0_98() const { 1195 return !getTarget().getTriple().isOSDarwin(); 1196 } 1197 1198 bool HasAVX; 1199 // Some ABIs (e.g. X32 ABI and Native Client OS) use 32 bit pointers on 1200 // 64-bit hardware. 1201 bool Has64BitPointers; 1202 1203public: 1204 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool hasavx) : 1205 ABIInfo(CGT), HasAVX(hasavx), 1206 Has64BitPointers(CGT.getDataLayout().getPointerSize(0) == 8) { 1207 } 1208 1209 bool isPassedUsingAVXType(QualType type) const { 1210 unsigned neededInt, neededSSE; 1211 // The freeIntRegs argument doesn't matter here. 1212 ABIArgInfo info = classifyArgumentType(type, 0, neededInt, neededSSE, 1213 /*isNamedArg*/true); 1214 if (info.isDirect()) { 1215 llvm::Type *ty = info.getCoerceToType(); 1216 if (llvm::VectorType *vectorTy = dyn_cast_or_null<llvm::VectorType>(ty)) 1217 return (vectorTy->getBitWidth() > 128); 1218 } 1219 return false; 1220 } 1221 1222 virtual void computeInfo(CGFunctionInfo &FI) const; 1223 1224 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1225 CodeGenFunction &CGF) const; 1226}; 1227 1228/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 1229class WinX86_64ABIInfo : public ABIInfo { 1230 1231 ABIArgInfo classify(QualType Ty, bool IsReturnType) const; 1232 1233public: 1234 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 1235 1236 virtual void computeInfo(CGFunctionInfo &FI) const; 1237 1238 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1239 CodeGenFunction &CGF) const; 1240}; 1241 1242class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1243public: 1244 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 1245 : TargetCodeGenInfo(new X86_64ABIInfo(CGT, HasAVX)) {} 1246 1247 const X86_64ABIInfo &getABIInfo() const { 1248 return static_cast<const X86_64ABIInfo&>(TargetCodeGenInfo::getABIInfo()); 1249 } 1250 1251 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 1252 return 7; 1253 } 1254 1255 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1256 llvm::Value *Address) const { 1257 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 1258 1259 // 0-15 are the 16 integer registers. 1260 // 16 is %rip. 1261 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16); 1262 return false; 1263 } 1264 1265 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 1266 StringRef Constraint, 1267 llvm::Type* Ty) const { 1268 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 1269 } 1270 1271 bool isNoProtoCallVariadic(const CallArgList &args, 1272 const FunctionNoProtoType *fnType) const { 1273 // The default CC on x86-64 sets %al to the number of SSA 1274 // registers used, and GCC sets this when calling an unprototyped 1275 // function, so we override the default behavior. However, don't do 1276 // that when AVX types are involved: the ABI explicitly states it is 1277 // undefined, and it doesn't work in practice because of how the ABI 1278 // defines varargs anyway. 1279 if (fnType->getCallConv() == CC_C) { 1280 bool HasAVXType = false; 1281 for (CallArgList::const_iterator 1282 it = args.begin(), ie = args.end(); it != ie; ++it) { 1283 if (getABIInfo().isPassedUsingAVXType(it->Ty)) { 1284 HasAVXType = true; 1285 break; 1286 } 1287 } 1288 1289 if (!HasAVXType) 1290 return true; 1291 } 1292 1293 return TargetCodeGenInfo::isNoProtoCallVariadic(args, fnType); 1294 } 1295 1296 llvm::Constant *getUBSanFunctionSignature(CodeGen::CodeGenModule &CGM) const { 1297 unsigned Sig = (0xeb << 0) | // jmp rel8 1298 (0x0a << 8) | // .+0x0c 1299 ('F' << 16) | 1300 ('T' << 24); 1301 return llvm::ConstantInt::get(CGM.Int32Ty, Sig); 1302 } 1303 1304}; 1305 1306static std::string qualifyWindowsLibrary(llvm::StringRef Lib) { 1307 // If the argument does not end in .lib, automatically add the suffix. This 1308 // matches the behavior of MSVC. 1309 std::string ArgStr = Lib; 1310 if (!Lib.endswith_lower(".lib")) 1311 ArgStr += ".lib"; 1312 return ArgStr; 1313} 1314 1315class WinX86_32TargetCodeGenInfo : public X86_32TargetCodeGenInfo { 1316public: 1317 WinX86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, 1318 bool d, bool p, bool w, unsigned RegParms) 1319 : X86_32TargetCodeGenInfo(CGT, d, p, w, RegParms) {} 1320 1321 void getDependentLibraryOption(llvm::StringRef Lib, 1322 llvm::SmallString<24> &Opt) const { 1323 Opt = "/DEFAULTLIB:"; 1324 Opt += qualifyWindowsLibrary(Lib); 1325 } 1326 1327 void getDetectMismatchOption(llvm::StringRef Name, 1328 llvm::StringRef Value, 1329 llvm::SmallString<32> &Opt) const { 1330 Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\""; 1331 } 1332}; 1333 1334class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1335public: 1336 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 1337 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {} 1338 1339 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 1340 return 7; 1341 } 1342 1343 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1344 llvm::Value *Address) const { 1345 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 1346 1347 // 0-15 are the 16 integer registers. 1348 // 16 is %rip. 1349 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16); 1350 return false; 1351 } 1352 1353 void getDependentLibraryOption(llvm::StringRef Lib, 1354 llvm::SmallString<24> &Opt) const { 1355 Opt = "/DEFAULTLIB:"; 1356 Opt += qualifyWindowsLibrary(Lib); 1357 } 1358 1359 void getDetectMismatchOption(llvm::StringRef Name, 1360 llvm::StringRef Value, 1361 llvm::SmallString<32> &Opt) const { 1362 Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\""; 1363 } 1364}; 1365 1366} 1367 1368void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo, 1369 Class &Hi) const { 1370 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1371 // 1372 // (a) If one of the classes is Memory, the whole argument is passed in 1373 // memory. 1374 // 1375 // (b) If X87UP is not preceded by X87, the whole argument is passed in 1376 // memory. 1377 // 1378 // (c) If the size of the aggregate exceeds two eightbytes and the first 1379 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole 1380 // argument is passed in memory. NOTE: This is necessary to keep the 1381 // ABI working for processors that don't support the __m256 type. 1382 // 1383 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE. 1384 // 1385 // Some of these are enforced by the merging logic. Others can arise 1386 // only with unions; for example: 1387 // union { _Complex double; unsigned; } 1388 // 1389 // Note that clauses (b) and (c) were added in 0.98. 1390 // 1391 if (Hi == Memory) 1392 Lo = Memory; 1393 if (Hi == X87Up && Lo != X87 && honorsRevision0_98()) 1394 Lo = Memory; 1395 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp)) 1396 Lo = Memory; 1397 if (Hi == SSEUp && Lo != SSE) 1398 Hi = SSE; 1399} 1400 1401X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 1402 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 1403 // classified recursively so that always two fields are 1404 // considered. The resulting class is calculated according to 1405 // the classes of the fields in the eightbyte: 1406 // 1407 // (a) If both classes are equal, this is the resulting class. 1408 // 1409 // (b) If one of the classes is NO_CLASS, the resulting class is 1410 // the other class. 1411 // 1412 // (c) If one of the classes is MEMORY, the result is the MEMORY 1413 // class. 1414 // 1415 // (d) If one of the classes is INTEGER, the result is the 1416 // INTEGER. 1417 // 1418 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 1419 // MEMORY is used as class. 1420 // 1421 // (f) Otherwise class SSE is used. 1422 1423 // Accum should never be memory (we should have returned) or 1424 // ComplexX87 (because this cannot be passed in a structure). 1425 assert((Accum != Memory && Accum != ComplexX87) && 1426 "Invalid accumulated classification during merge."); 1427 if (Accum == Field || Field == NoClass) 1428 return Accum; 1429 if (Field == Memory) 1430 return Memory; 1431 if (Accum == NoClass) 1432 return Field; 1433 if (Accum == Integer || Field == Integer) 1434 return Integer; 1435 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 1436 Accum == X87 || Accum == X87Up) 1437 return Memory; 1438 return SSE; 1439} 1440 1441void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 1442 Class &Lo, Class &Hi, bool isNamedArg) const { 1443 // FIXME: This code can be simplified by introducing a simple value class for 1444 // Class pairs with appropriate constructor methods for the various 1445 // situations. 1446 1447 // FIXME: Some of the split computations are wrong; unaligned vectors 1448 // shouldn't be passed in registers for example, so there is no chance they 1449 // can straddle an eightbyte. Verify & simplify. 1450 1451 Lo = Hi = NoClass; 1452 1453 Class &Current = OffsetBase < 64 ? Lo : Hi; 1454 Current = Memory; 1455 1456 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 1457 BuiltinType::Kind k = BT->getKind(); 1458 1459 if (k == BuiltinType::Void) { 1460 Current = NoClass; 1461 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 1462 Lo = Integer; 1463 Hi = Integer; 1464 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 1465 Current = Integer; 1466 } else if ((k == BuiltinType::Float || k == BuiltinType::Double) || 1467 (k == BuiltinType::LongDouble && 1468 getTarget().getTriple().isOSNaCl())) { 1469 Current = SSE; 1470 } else if (k == BuiltinType::LongDouble) { 1471 Lo = X87; 1472 Hi = X87Up; 1473 } 1474 // FIXME: _Decimal32 and _Decimal64 are SSE. 1475 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 1476 return; 1477 } 1478 1479 if (const EnumType *ET = Ty->getAs<EnumType>()) { 1480 // Classify the underlying integer type. 1481 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi, isNamedArg); 1482 return; 1483 } 1484 1485 if (Ty->hasPointerRepresentation()) { 1486 Current = Integer; 1487 return; 1488 } 1489 1490 if (Ty->isMemberPointerType()) { 1491 if (Ty->isMemberFunctionPointerType() && Has64BitPointers) 1492 Lo = Hi = Integer; 1493 else 1494 Current = Integer; 1495 return; 1496 } 1497 1498 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1499 uint64_t Size = getContext().getTypeSize(VT); 1500 if (Size == 32) { 1501 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1502 // float> as integer. 1503 Current = Integer; 1504 1505 // If this type crosses an eightbyte boundary, it should be 1506 // split. 1507 uint64_t EB_Real = (OffsetBase) / 64; 1508 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 1509 if (EB_Real != EB_Imag) 1510 Hi = Lo; 1511 } else if (Size == 64) { 1512 // gcc passes <1 x double> in memory. :( 1513 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 1514 return; 1515 1516 // gcc passes <1 x long long> as INTEGER. 1517 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 1518 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 1519 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 1520 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 1521 Current = Integer; 1522 else 1523 Current = SSE; 1524 1525 // If this type crosses an eightbyte boundary, it should be 1526 // split. 1527 if (OffsetBase && OffsetBase != 64) 1528 Hi = Lo; 1529 } else if (Size == 128 || (HasAVX && isNamedArg && Size == 256)) { 1530 // Arguments of 256-bits are split into four eightbyte chunks. The 1531 // least significant one belongs to class SSE and all the others to class 1532 // SSEUP. The original Lo and Hi design considers that types can't be 1533 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense. 1534 // This design isn't correct for 256-bits, but since there're no cases 1535 // where the upper parts would need to be inspected, avoid adding 1536 // complexity and just consider Hi to match the 64-256 part. 1537 // 1538 // Note that per 3.5.7 of AMD64-ABI, 256-bit args are only passed in 1539 // registers if they are "named", i.e. not part of the "..." of a 1540 // variadic function. 1541 Lo = SSE; 1542 Hi = SSEUp; 1543 } 1544 return; 1545 } 1546 1547 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 1548 QualType ET = getContext().getCanonicalType(CT->getElementType()); 1549 1550 uint64_t Size = getContext().getTypeSize(Ty); 1551 if (ET->isIntegralOrEnumerationType()) { 1552 if (Size <= 64) 1553 Current = Integer; 1554 else if (Size <= 128) 1555 Lo = Hi = Integer; 1556 } else if (ET == getContext().FloatTy) 1557 Current = SSE; 1558 else if (ET == getContext().DoubleTy || 1559 (ET == getContext().LongDoubleTy && 1560 getTarget().getTriple().isOSNaCl())) 1561 Lo = Hi = SSE; 1562 else if (ET == getContext().LongDoubleTy) 1563 Current = ComplexX87; 1564 1565 // If this complex type crosses an eightbyte boundary then it 1566 // should be split. 1567 uint64_t EB_Real = (OffsetBase) / 64; 1568 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 1569 if (Hi == NoClass && EB_Real != EB_Imag) 1570 Hi = Lo; 1571 1572 return; 1573 } 1574 1575 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 1576 // Arrays are treated like structures. 1577 1578 uint64_t Size = getContext().getTypeSize(Ty); 1579 1580 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1581 // than four eightbytes, ..., it has class MEMORY. 1582 if (Size > 256) 1583 return; 1584 1585 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1586 // fields, it has class MEMORY. 1587 // 1588 // Only need to check alignment of array base. 1589 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1590 return; 1591 1592 // Otherwise implement simplified merge. We could be smarter about 1593 // this, but it isn't worth it and would be harder to verify. 1594 Current = NoClass; 1595 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1596 uint64_t ArraySize = AT->getSize().getZExtValue(); 1597 1598 // The only case a 256-bit wide vector could be used is when the array 1599 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1600 // to work for sizes wider than 128, early check and fallback to memory. 1601 if (Size > 128 && EltSize != 256) 1602 return; 1603 1604 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1605 Class FieldLo, FieldHi; 1606 classify(AT->getElementType(), Offset, FieldLo, FieldHi, isNamedArg); 1607 Lo = merge(Lo, FieldLo); 1608 Hi = merge(Hi, FieldHi); 1609 if (Lo == Memory || Hi == Memory) 1610 break; 1611 } 1612 1613 postMerge(Size, Lo, Hi); 1614 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 1615 return; 1616 } 1617 1618 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1619 uint64_t Size = getContext().getTypeSize(Ty); 1620 1621 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1622 // than four eightbytes, ..., it has class MEMORY. 1623 if (Size > 256) 1624 return; 1625 1626 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1627 // copy constructor or a non-trivial destructor, it is passed by invisible 1628 // reference. 1629 if (getRecordArgABI(RT, getCXXABI())) 1630 return; 1631 1632 const RecordDecl *RD = RT->getDecl(); 1633 1634 // Assume variable sized types are passed in memory. 1635 if (RD->hasFlexibleArrayMember()) 1636 return; 1637 1638 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1639 1640 // Reset Lo class, this will be recomputed. 1641 Current = NoClass; 1642 1643 // If this is a C++ record, classify the bases first. 1644 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1645 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1646 e = CXXRD->bases_end(); i != e; ++i) { 1647 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1648 "Unexpected base class!"); 1649 const CXXRecordDecl *Base = 1650 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1651 1652 // Classify this field. 1653 // 1654 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1655 // single eightbyte, each is classified separately. Each eightbyte gets 1656 // initialized to class NO_CLASS. 1657 Class FieldLo, FieldHi; 1658 uint64_t Offset = 1659 OffsetBase + getContext().toBits(Layout.getBaseClassOffset(Base)); 1660 classify(i->getType(), Offset, FieldLo, FieldHi, isNamedArg); 1661 Lo = merge(Lo, FieldLo); 1662 Hi = merge(Hi, FieldHi); 1663 if (Lo == Memory || Hi == Memory) 1664 break; 1665 } 1666 } 1667 1668 // Classify the fields one at a time, merging the results. 1669 unsigned idx = 0; 1670 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1671 i != e; ++i, ++idx) { 1672 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1673 bool BitField = i->isBitField(); 1674 1675 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than 1676 // four eightbytes, or it contains unaligned fields, it has class MEMORY. 1677 // 1678 // The only case a 256-bit wide vector could be used is when the struct 1679 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1680 // to work for sizes wider than 128, early check and fallback to memory. 1681 // 1682 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) { 1683 Lo = Memory; 1684 return; 1685 } 1686 // Note, skip this test for bit-fields, see below. 1687 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1688 Lo = Memory; 1689 return; 1690 } 1691 1692 // Classify this field. 1693 // 1694 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1695 // exceeds a single eightbyte, each is classified 1696 // separately. Each eightbyte gets initialized to class 1697 // NO_CLASS. 1698 Class FieldLo, FieldHi; 1699 1700 // Bit-fields require special handling, they do not force the 1701 // structure to be passed in memory even if unaligned, and 1702 // therefore they can straddle an eightbyte. 1703 if (BitField) { 1704 // Ignore padding bit-fields. 1705 if (i->isUnnamedBitfield()) 1706 continue; 1707 1708 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1709 uint64_t Size = i->getBitWidthValue(getContext()); 1710 1711 uint64_t EB_Lo = Offset / 64; 1712 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1713 1714 if (EB_Lo) { 1715 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1716 FieldLo = NoClass; 1717 FieldHi = Integer; 1718 } else { 1719 FieldLo = Integer; 1720 FieldHi = EB_Hi ? Integer : NoClass; 1721 } 1722 } else 1723 classify(i->getType(), Offset, FieldLo, FieldHi, isNamedArg); 1724 Lo = merge(Lo, FieldLo); 1725 Hi = merge(Hi, FieldHi); 1726 if (Lo == Memory || Hi == Memory) 1727 break; 1728 } 1729 1730 postMerge(Size, Lo, Hi); 1731 } 1732} 1733 1734ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1735 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1736 // place naturally. 1737 if (!isAggregateTypeForABI(Ty)) { 1738 // Treat an enum type as its underlying type. 1739 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1740 Ty = EnumTy->getDecl()->getIntegerType(); 1741 1742 return (Ty->isPromotableIntegerType() ? 1743 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1744 } 1745 1746 return ABIArgInfo::getIndirect(0); 1747} 1748 1749bool X86_64ABIInfo::IsIllegalVectorType(QualType Ty) const { 1750 if (const VectorType *VecTy = Ty->getAs<VectorType>()) { 1751 uint64_t Size = getContext().getTypeSize(VecTy); 1752 unsigned LargestVector = HasAVX ? 256 : 128; 1753 if (Size <= 64 || Size > LargestVector) 1754 return true; 1755 } 1756 1757 return false; 1758} 1759 1760ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty, 1761 unsigned freeIntRegs) const { 1762 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1763 // place naturally. 1764 // 1765 // This assumption is optimistic, as there could be free registers available 1766 // when we need to pass this argument in memory, and LLVM could try to pass 1767 // the argument in the free register. This does not seem to happen currently, 1768 // but this code would be much safer if we could mark the argument with 1769 // 'onstack'. See PR12193. 1770 if (!isAggregateTypeForABI(Ty) && !IsIllegalVectorType(Ty)) { 1771 // Treat an enum type as its underlying type. 1772 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1773 Ty = EnumTy->getDecl()->getIntegerType(); 1774 1775 return (Ty->isPromotableIntegerType() ? 1776 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1777 } 1778 1779 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) 1780 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 1781 1782 // Compute the byval alignment. We specify the alignment of the byval in all 1783 // cases so that the mid-level optimizer knows the alignment of the byval. 1784 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U); 1785 1786 // Attempt to avoid passing indirect results using byval when possible. This 1787 // is important for good codegen. 1788 // 1789 // We do this by coercing the value into a scalar type which the backend can 1790 // handle naturally (i.e., without using byval). 1791 // 1792 // For simplicity, we currently only do this when we have exhausted all of the 1793 // free integer registers. Doing this when there are free integer registers 1794 // would require more care, as we would have to ensure that the coerced value 1795 // did not claim the unused register. That would require either reording the 1796 // arguments to the function (so that any subsequent inreg values came first), 1797 // or only doing this optimization when there were no following arguments that 1798 // might be inreg. 1799 // 1800 // We currently expect it to be rare (particularly in well written code) for 1801 // arguments to be passed on the stack when there are still free integer 1802 // registers available (this would typically imply large structs being passed 1803 // by value), so this seems like a fair tradeoff for now. 1804 // 1805 // We can revisit this if the backend grows support for 'onstack' parameter 1806 // attributes. See PR12193. 1807 if (freeIntRegs == 0) { 1808 uint64_t Size = getContext().getTypeSize(Ty); 1809 1810 // If this type fits in an eightbyte, coerce it into the matching integral 1811 // type, which will end up on the stack (with alignment 8). 1812 if (Align == 8 && Size <= 64) 1813 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 1814 Size)); 1815 } 1816 1817 return ABIArgInfo::getIndirect(Align); 1818} 1819 1820/// GetByteVectorType - The ABI specifies that a value should be passed in an 1821/// full vector XMM/YMM register. Pick an LLVM IR type that will be passed as a 1822/// vector register. 1823llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const { 1824 llvm::Type *IRType = CGT.ConvertType(Ty); 1825 1826 // Wrapper structs that just contain vectors are passed just like vectors, 1827 // strip them off if present. 1828 llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1829 while (STy && STy->getNumElements() == 1) { 1830 IRType = STy->getElementType(0); 1831 STy = dyn_cast<llvm::StructType>(IRType); 1832 } 1833 1834 // If the preferred type is a 16-byte vector, prefer to pass it. 1835 if (llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1836 llvm::Type *EltTy = VT->getElementType(); 1837 unsigned BitWidth = VT->getBitWidth(); 1838 if ((BitWidth >= 128 && BitWidth <= 256) && 1839 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1840 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1841 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1842 EltTy->isIntegerTy(128))) 1843 return VT; 1844 } 1845 1846 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1847} 1848 1849/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1850/// is known to either be off the end of the specified type or being in 1851/// alignment padding. The user type specified is known to be at most 128 bits 1852/// in size, and have passed through X86_64ABIInfo::classify with a successful 1853/// classification that put one of the two halves in the INTEGER class. 1854/// 1855/// It is conservatively correct to return false. 1856static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1857 unsigned EndBit, ASTContext &Context) { 1858 // If the bytes being queried are off the end of the type, there is no user 1859 // data hiding here. This handles analysis of builtins, vectors and other 1860 // types that don't contain interesting padding. 1861 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1862 if (TySize <= StartBit) 1863 return true; 1864 1865 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1866 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1867 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1868 1869 // Check each element to see if the element overlaps with the queried range. 1870 for (unsigned i = 0; i != NumElts; ++i) { 1871 // If the element is after the span we care about, then we're done.. 1872 unsigned EltOffset = i*EltSize; 1873 if (EltOffset >= EndBit) break; 1874 1875 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1876 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1877 EndBit-EltOffset, Context)) 1878 return false; 1879 } 1880 // If it overlaps no elements, then it is safe to process as padding. 1881 return true; 1882 } 1883 1884 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1885 const RecordDecl *RD = RT->getDecl(); 1886 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1887 1888 // If this is a C++ record, check the bases first. 1889 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1890 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1891 e = CXXRD->bases_end(); i != e; ++i) { 1892 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1893 "Unexpected base class!"); 1894 const CXXRecordDecl *Base = 1895 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1896 1897 // If the base is after the span we care about, ignore it. 1898 unsigned BaseOffset = Context.toBits(Layout.getBaseClassOffset(Base)); 1899 if (BaseOffset >= EndBit) continue; 1900 1901 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1902 if (!BitsContainNoUserData(i->getType(), BaseStart, 1903 EndBit-BaseOffset, Context)) 1904 return false; 1905 } 1906 } 1907 1908 // Verify that no field has data that overlaps the region of interest. Yes 1909 // this could be sped up a lot by being smarter about queried fields, 1910 // however we're only looking at structs up to 16 bytes, so we don't care 1911 // much. 1912 unsigned idx = 0; 1913 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1914 i != e; ++i, ++idx) { 1915 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1916 1917 // If we found a field after the region we care about, then we're done. 1918 if (FieldOffset >= EndBit) break; 1919 1920 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1921 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1922 Context)) 1923 return false; 1924 } 1925 1926 // If nothing in this record overlapped the area of interest, then we're 1927 // clean. 1928 return true; 1929 } 1930 1931 return false; 1932} 1933 1934/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1935/// float member at the specified offset. For example, {int,{float}} has a 1936/// float at offset 4. It is conservatively correct for this routine to return 1937/// false. 1938static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset, 1939 const llvm::DataLayout &TD) { 1940 // Base case if we find a float. 1941 if (IROffset == 0 && IRType->isFloatTy()) 1942 return true; 1943 1944 // If this is a struct, recurse into the field at the specified offset. 1945 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1946 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1947 unsigned Elt = SL->getElementContainingOffset(IROffset); 1948 IROffset -= SL->getElementOffset(Elt); 1949 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1950 } 1951 1952 // If this is an array, recurse into the field at the specified offset. 1953 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1954 llvm::Type *EltTy = ATy->getElementType(); 1955 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1956 IROffset -= IROffset/EltSize*EltSize; 1957 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1958 } 1959 1960 return false; 1961} 1962 1963 1964/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1965/// low 8 bytes of an XMM register, corresponding to the SSE class. 1966llvm::Type *X86_64ABIInfo:: 1967GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1968 QualType SourceTy, unsigned SourceOffset) const { 1969 // The only three choices we have are either double, <2 x float>, or float. We 1970 // pass as float if the last 4 bytes is just padding. This happens for 1971 // structs that contain 3 floats. 1972 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1973 SourceOffset*8+64, getContext())) 1974 return llvm::Type::getFloatTy(getVMContext()); 1975 1976 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1977 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1978 // case. 1979 if (ContainsFloatAtOffset(IRType, IROffset, getDataLayout()) && 1980 ContainsFloatAtOffset(IRType, IROffset+4, getDataLayout())) 1981 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1982 1983 return llvm::Type::getDoubleTy(getVMContext()); 1984} 1985 1986 1987/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1988/// an 8-byte GPR. This means that we either have a scalar or we are talking 1989/// about the high or low part of an up-to-16-byte struct. This routine picks 1990/// the best LLVM IR type to represent this, which may be i64 or may be anything 1991/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1992/// etc). 1993/// 1994/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1995/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1996/// the 8-byte value references. PrefType may be null. 1997/// 1998/// SourceTy is the source level type for the entire argument. SourceOffset is 1999/// an offset into this that we're processing (which is always either 0 or 8). 2000/// 2001llvm::Type *X86_64ABIInfo:: 2002GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset, 2003 QualType SourceTy, unsigned SourceOffset) const { 2004 // If we're dealing with an un-offset LLVM IR type, then it means that we're 2005 // returning an 8-byte unit starting with it. See if we can safely use it. 2006 if (IROffset == 0) { 2007 // Pointers and int64's always fill the 8-byte unit. 2008 if ((isa<llvm::PointerType>(IRType) && Has64BitPointers) || 2009 IRType->isIntegerTy(64)) 2010 return IRType; 2011 2012 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 2013 // goodness in the source type is just tail padding. This is allowed to 2014 // kick in for struct {double,int} on the int, but not on 2015 // struct{double,int,int} because we wouldn't return the second int. We 2016 // have to do this analysis on the source type because we can't depend on 2017 // unions being lowered a specific way etc. 2018 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 2019 IRType->isIntegerTy(32) || 2020 (isa<llvm::PointerType>(IRType) && !Has64BitPointers)) { 2021 unsigned BitWidth = isa<llvm::PointerType>(IRType) ? 32 : 2022 cast<llvm::IntegerType>(IRType)->getBitWidth(); 2023 2024 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 2025 SourceOffset*8+64, getContext())) 2026 return IRType; 2027 } 2028 } 2029 2030 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 2031 // If this is a struct, recurse into the field at the specified offset. 2032 const llvm::StructLayout *SL = getDataLayout().getStructLayout(STy); 2033 if (IROffset < SL->getSizeInBytes()) { 2034 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 2035 IROffset -= SL->getElementOffset(FieldIdx); 2036 2037 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 2038 SourceTy, SourceOffset); 2039 } 2040 } 2041 2042 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 2043 llvm::Type *EltTy = ATy->getElementType(); 2044 unsigned EltSize = getDataLayout().getTypeAllocSize(EltTy); 2045 unsigned EltOffset = IROffset/EltSize*EltSize; 2046 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 2047 SourceOffset); 2048 } 2049 2050 // Okay, we don't have any better idea of what to pass, so we pass this in an 2051 // integer register that isn't too big to fit the rest of the struct. 2052 unsigned TySizeInBytes = 2053 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 2054 2055 assert(TySizeInBytes != SourceOffset && "Empty field?"); 2056 2057 // It is always safe to classify this as an integer type up to i64 that 2058 // isn't larger than the structure. 2059 return llvm::IntegerType::get(getVMContext(), 2060 std::min(TySizeInBytes-SourceOffset, 8U)*8); 2061} 2062 2063 2064/// GetX86_64ByValArgumentPair - Given a high and low type that can ideally 2065/// be used as elements of a two register pair to pass or return, return a 2066/// first class aggregate to represent them. For example, if the low part of 2067/// a by-value argument should be passed as i32* and the high part as float, 2068/// return {i32*, float}. 2069static llvm::Type * 2070GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi, 2071 const llvm::DataLayout &TD) { 2072 // In order to correctly satisfy the ABI, we need to the high part to start 2073 // at offset 8. If the high and low parts we inferred are both 4-byte types 2074 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have 2075 // the second element at offset 8. Check for this: 2076 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo); 2077 unsigned HiAlign = TD.getABITypeAlignment(Hi); 2078 unsigned HiStart = llvm::DataLayout::RoundUpAlignment(LoSize, HiAlign); 2079 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!"); 2080 2081 // To handle this, we have to increase the size of the low part so that the 2082 // second element will start at an 8 byte offset. We can't increase the size 2083 // of the second element because it might make us access off the end of the 2084 // struct. 2085 if (HiStart != 8) { 2086 // There are only two sorts of types the ABI generation code can produce for 2087 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32. 2088 // Promote these to a larger type. 2089 if (Lo->isFloatTy()) 2090 Lo = llvm::Type::getDoubleTy(Lo->getContext()); 2091 else { 2092 assert(Lo->isIntegerTy() && "Invalid/unknown lo type"); 2093 Lo = llvm::Type::getInt64Ty(Lo->getContext()); 2094 } 2095 } 2096 2097 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, NULL); 2098 2099 2100 // Verify that the second element is at an 8-byte offset. 2101 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 && 2102 "Invalid x86-64 argument pair!"); 2103 return Result; 2104} 2105 2106ABIArgInfo X86_64ABIInfo:: 2107classifyReturnType(QualType RetTy) const { 2108 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 2109 // classification algorithm. 2110 X86_64ABIInfo::Class Lo, Hi; 2111 classify(RetTy, 0, Lo, Hi, /*isNamedArg*/ true); 2112 2113 // Check some invariants. 2114 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 2115 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 2116 2117 llvm::Type *ResType = 0; 2118 switch (Lo) { 2119 case NoClass: 2120 if (Hi == NoClass) 2121 return ABIArgInfo::getIgnore(); 2122 // If the low part is just padding, it takes no register, leave ResType 2123 // null. 2124 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 2125 "Unknown missing lo part"); 2126 break; 2127 2128 case SSEUp: 2129 case X87Up: 2130 llvm_unreachable("Invalid classification for lo word."); 2131 2132 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 2133 // hidden argument. 2134 case Memory: 2135 return getIndirectReturnResult(RetTy); 2136 2137 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 2138 // available register of the sequence %rax, %rdx is used. 2139 case Integer: 2140 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 2141 2142 // If we have a sign or zero extended integer, make sure to return Extend 2143 // so that the parameter gets the right LLVM IR attributes. 2144 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 2145 // Treat an enum type as its underlying type. 2146 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2147 RetTy = EnumTy->getDecl()->getIntegerType(); 2148 2149 if (RetTy->isIntegralOrEnumerationType() && 2150 RetTy->isPromotableIntegerType()) 2151 return ABIArgInfo::getExtend(); 2152 } 2153 break; 2154 2155 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 2156 // available SSE register of the sequence %xmm0, %xmm1 is used. 2157 case SSE: 2158 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 2159 break; 2160 2161 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 2162 // returned on the X87 stack in %st0 as 80-bit x87 number. 2163 case X87: 2164 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 2165 break; 2166 2167 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 2168 // part of the value is returned in %st0 and the imaginary part in 2169 // %st1. 2170 case ComplexX87: 2171 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 2172 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()), 2173 llvm::Type::getX86_FP80Ty(getVMContext()), 2174 NULL); 2175 break; 2176 } 2177 2178 llvm::Type *HighPart = 0; 2179 switch (Hi) { 2180 // Memory was handled previously and X87 should 2181 // never occur as a hi class. 2182 case Memory: 2183 case X87: 2184 llvm_unreachable("Invalid classification for hi word."); 2185 2186 case ComplexX87: // Previously handled. 2187 case NoClass: 2188 break; 2189 2190 case Integer: 2191 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2192 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2193 return ABIArgInfo::getDirect(HighPart, 8); 2194 break; 2195 case SSE: 2196 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2197 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2198 return ABIArgInfo::getDirect(HighPart, 8); 2199 break; 2200 2201 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 2202 // is passed in the next available eightbyte chunk if the last used 2203 // vector register. 2204 // 2205 // SSEUP should always be preceded by SSE, just widen. 2206 case SSEUp: 2207 assert(Lo == SSE && "Unexpected SSEUp classification."); 2208 ResType = GetByteVectorType(RetTy); 2209 break; 2210 2211 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 2212 // returned together with the previous X87 value in %st0. 2213 case X87Up: 2214 // If X87Up is preceded by X87, we don't need to do 2215 // anything. However, in some cases with unions it may not be 2216 // preceded by X87. In such situations we follow gcc and pass the 2217 // extra bits in an SSE reg. 2218 if (Lo != X87) { 2219 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2220 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2221 return ABIArgInfo::getDirect(HighPart, 8); 2222 } 2223 break; 2224 } 2225 2226 // If a high part was specified, merge it together with the low part. It is 2227 // known to pass in the high eightbyte of the result. We do this by forming a 2228 // first class struct aggregate with the high and low part: {low, high} 2229 if (HighPart) 2230 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout()); 2231 2232 return ABIArgInfo::getDirect(ResType); 2233} 2234 2235ABIArgInfo X86_64ABIInfo::classifyArgumentType( 2236 QualType Ty, unsigned freeIntRegs, unsigned &neededInt, unsigned &neededSSE, 2237 bool isNamedArg) 2238 const 2239{ 2240 X86_64ABIInfo::Class Lo, Hi; 2241 classify(Ty, 0, Lo, Hi, isNamedArg); 2242 2243 // Check some invariants. 2244 // FIXME: Enforce these by construction. 2245 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 2246 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 2247 2248 neededInt = 0; 2249 neededSSE = 0; 2250 llvm::Type *ResType = 0; 2251 switch (Lo) { 2252 case NoClass: 2253 if (Hi == NoClass) 2254 return ABIArgInfo::getIgnore(); 2255 // If the low part is just padding, it takes no register, leave ResType 2256 // null. 2257 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 2258 "Unknown missing lo part"); 2259 break; 2260 2261 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 2262 // on the stack. 2263 case Memory: 2264 2265 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 2266 // COMPLEX_X87, it is passed in memory. 2267 case X87: 2268 case ComplexX87: 2269 if (getRecordArgABI(Ty, getCXXABI()) == CGCXXABI::RAA_Indirect) 2270 ++neededInt; 2271 return getIndirectResult(Ty, freeIntRegs); 2272 2273 case SSEUp: 2274 case X87Up: 2275 llvm_unreachable("Invalid classification for lo word."); 2276 2277 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 2278 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 2279 // and %r9 is used. 2280 case Integer: 2281 ++neededInt; 2282 2283 // Pick an 8-byte type based on the preferred type. 2284 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0); 2285 2286 // If we have a sign or zero extended integer, make sure to return Extend 2287 // so that the parameter gets the right LLVM IR attributes. 2288 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 2289 // Treat an enum type as its underlying type. 2290 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2291 Ty = EnumTy->getDecl()->getIntegerType(); 2292 2293 if (Ty->isIntegralOrEnumerationType() && 2294 Ty->isPromotableIntegerType()) 2295 return ABIArgInfo::getExtend(); 2296 } 2297 2298 break; 2299 2300 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 2301 // available SSE register is used, the registers are taken in the 2302 // order from %xmm0 to %xmm7. 2303 case SSE: { 2304 llvm::Type *IRType = CGT.ConvertType(Ty); 2305 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0); 2306 ++neededSSE; 2307 break; 2308 } 2309 } 2310 2311 llvm::Type *HighPart = 0; 2312 switch (Hi) { 2313 // Memory was handled previously, ComplexX87 and X87 should 2314 // never occur as hi classes, and X87Up must be preceded by X87, 2315 // which is passed in memory. 2316 case Memory: 2317 case X87: 2318 case ComplexX87: 2319 llvm_unreachable("Invalid classification for hi word."); 2320 2321 case NoClass: break; 2322 2323 case Integer: 2324 ++neededInt; 2325 // Pick an 8-byte type based on the preferred type. 2326 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 2327 2328 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 2329 return ABIArgInfo::getDirect(HighPart, 8); 2330 break; 2331 2332 // X87Up generally doesn't occur here (long double is passed in 2333 // memory), except in situations involving unions. 2334 case X87Up: 2335 case SSE: 2336 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 2337 2338 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 2339 return ABIArgInfo::getDirect(HighPart, 8); 2340 2341 ++neededSSE; 2342 break; 2343 2344 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 2345 // eightbyte is passed in the upper half of the last used SSE 2346 // register. This only happens when 128-bit vectors are passed. 2347 case SSEUp: 2348 assert(Lo == SSE && "Unexpected SSEUp classification"); 2349 ResType = GetByteVectorType(Ty); 2350 break; 2351 } 2352 2353 // If a high part was specified, merge it together with the low part. It is 2354 // known to pass in the high eightbyte of the result. We do this by forming a 2355 // first class struct aggregate with the high and low part: {low, high} 2356 if (HighPart) 2357 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout()); 2358 2359 return ABIArgInfo::getDirect(ResType); 2360} 2361 2362void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2363 2364 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2365 2366 // Keep track of the number of assigned registers. 2367 unsigned freeIntRegs = 6, freeSSERegs = 8; 2368 2369 // If the return value is indirect, then the hidden argument is consuming one 2370 // integer register. 2371 if (FI.getReturnInfo().isIndirect()) 2372 --freeIntRegs; 2373 2374 bool isVariadic = FI.isVariadic(); 2375 unsigned numRequiredArgs = 0; 2376 if (isVariadic) 2377 numRequiredArgs = FI.getRequiredArgs().getNumRequiredArgs(); 2378 2379 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 2380 // get assigned (in left-to-right order) for passing as follows... 2381 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2382 it != ie; ++it) { 2383 bool isNamedArg = true; 2384 if (isVariadic) 2385 isNamedArg = (it - FI.arg_begin()) < 2386 static_cast<signed>(numRequiredArgs); 2387 2388 unsigned neededInt, neededSSE; 2389 it->info = classifyArgumentType(it->type, freeIntRegs, neededInt, 2390 neededSSE, isNamedArg); 2391 2392 // AMD64-ABI 3.2.3p3: If there are no registers available for any 2393 // eightbyte of an argument, the whole argument is passed on the 2394 // stack. If registers have already been assigned for some 2395 // eightbytes of such an argument, the assignments get reverted. 2396 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 2397 freeIntRegs -= neededInt; 2398 freeSSERegs -= neededSSE; 2399 } else { 2400 it->info = getIndirectResult(it->type, freeIntRegs); 2401 } 2402 } 2403} 2404 2405static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 2406 QualType Ty, 2407 CodeGenFunction &CGF) { 2408 llvm::Value *overflow_arg_area_p = 2409 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 2410 llvm::Value *overflow_arg_area = 2411 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 2412 2413 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 2414 // byte boundary if alignment needed by type exceeds 8 byte boundary. 2415 // It isn't stated explicitly in the standard, but in practice we use 2416 // alignment greater than 16 where necessary. 2417 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 2418 if (Align > 8) { 2419 // overflow_arg_area = (overflow_arg_area + align - 1) & -align; 2420 llvm::Value *Offset = 2421 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1); 2422 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 2423 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 2424 CGF.Int64Ty); 2425 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, -(uint64_t)Align); 2426 overflow_arg_area = 2427 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 2428 overflow_arg_area->getType(), 2429 "overflow_arg_area.align"); 2430 } 2431 2432 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 2433 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2434 llvm::Value *Res = 2435 CGF.Builder.CreateBitCast(overflow_arg_area, 2436 llvm::PointerType::getUnqual(LTy)); 2437 2438 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 2439 // l->overflow_arg_area + sizeof(type). 2440 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 2441 // an 8 byte boundary. 2442 2443 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 2444 llvm::Value *Offset = 2445 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 2446 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 2447 "overflow_arg_area.next"); 2448 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 2449 2450 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 2451 return Res; 2452} 2453 2454llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2455 CodeGenFunction &CGF) const { 2456 // Assume that va_list type is correct; should be pointer to LLVM type: 2457 // struct { 2458 // i32 gp_offset; 2459 // i32 fp_offset; 2460 // i8* overflow_arg_area; 2461 // i8* reg_save_area; 2462 // }; 2463 unsigned neededInt, neededSSE; 2464 2465 Ty = CGF.getContext().getCanonicalType(Ty); 2466 ABIArgInfo AI = classifyArgumentType(Ty, 0, neededInt, neededSSE, 2467 /*isNamedArg*/false); 2468 2469 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 2470 // in the registers. If not go to step 7. 2471 if (!neededInt && !neededSSE) 2472 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2473 2474 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 2475 // general purpose registers needed to pass type and num_fp to hold 2476 // the number of floating point registers needed. 2477 2478 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 2479 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 2480 // l->fp_offset > 304 - num_fp * 16 go to step 7. 2481 // 2482 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 2483 // register save space). 2484 2485 llvm::Value *InRegs = 0; 2486 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 2487 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 2488 if (neededInt) { 2489 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 2490 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 2491 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 2492 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 2493 } 2494 2495 if (neededSSE) { 2496 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 2497 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 2498 llvm::Value *FitsInFP = 2499 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 2500 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 2501 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 2502 } 2503 2504 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 2505 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 2506 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 2507 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 2508 2509 // Emit code to load the value if it was passed in registers. 2510 2511 CGF.EmitBlock(InRegBlock); 2512 2513 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 2514 // an offset of l->gp_offset and/or l->fp_offset. This may require 2515 // copying to a temporary location in case the parameter is passed 2516 // in different register classes or requires an alignment greater 2517 // than 8 for general purpose registers and 16 for XMM registers. 2518 // 2519 // FIXME: This really results in shameful code when we end up needing to 2520 // collect arguments from different places; often what should result in a 2521 // simple assembling of a structure from scattered addresses has many more 2522 // loads than necessary. Can we clean this up? 2523 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2524 llvm::Value *RegAddr = 2525 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 2526 "reg_save_area"); 2527 if (neededInt && neededSSE) { 2528 // FIXME: Cleanup. 2529 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 2530 llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 2531 llvm::Value *Tmp = CGF.CreateMemTemp(Ty); 2532 Tmp = CGF.Builder.CreateBitCast(Tmp, ST->getPointerTo()); 2533 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 2534 llvm::Type *TyLo = ST->getElementType(0); 2535 llvm::Type *TyHi = ST->getElementType(1); 2536 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 2537 "Unexpected ABI info for mixed regs"); 2538 llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 2539 llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 2540 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2541 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2542 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 2543 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 2544 llvm::Value *V = 2545 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 2546 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2547 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 2548 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2549 2550 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2551 llvm::PointerType::getUnqual(LTy)); 2552 } else if (neededInt) { 2553 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2554 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2555 llvm::PointerType::getUnqual(LTy)); 2556 2557 // Copy to a temporary if necessary to ensure the appropriate alignment. 2558 std::pair<CharUnits, CharUnits> SizeAlign = 2559 CGF.getContext().getTypeInfoInChars(Ty); 2560 uint64_t TySize = SizeAlign.first.getQuantity(); 2561 unsigned TyAlign = SizeAlign.second.getQuantity(); 2562 if (TyAlign > 8) { 2563 llvm::Value *Tmp = CGF.CreateMemTemp(Ty); 2564 CGF.Builder.CreateMemCpy(Tmp, RegAddr, TySize, 8, false); 2565 RegAddr = Tmp; 2566 } 2567 } else if (neededSSE == 1) { 2568 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2569 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2570 llvm::PointerType::getUnqual(LTy)); 2571 } else { 2572 assert(neededSSE == 2 && "Invalid number of needed registers!"); 2573 // SSE registers are spaced 16 bytes apart in the register save 2574 // area, we need to collect the two eightbytes together. 2575 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2576 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 2577 llvm::Type *DoubleTy = CGF.DoubleTy; 2578 llvm::Type *DblPtrTy = 2579 llvm::PointerType::getUnqual(DoubleTy); 2580 llvm::StructType *ST = llvm::StructType::get(DoubleTy, DoubleTy, NULL); 2581 llvm::Value *V, *Tmp = CGF.CreateMemTemp(Ty); 2582 Tmp = CGF.Builder.CreateBitCast(Tmp, ST->getPointerTo()); 2583 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 2584 DblPtrTy)); 2585 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2586 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 2587 DblPtrTy)); 2588 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2589 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2590 llvm::PointerType::getUnqual(LTy)); 2591 } 2592 2593 // AMD64-ABI 3.5.7p5: Step 5. Set: 2594 // l->gp_offset = l->gp_offset + num_gp * 8 2595 // l->fp_offset = l->fp_offset + num_fp * 16. 2596 if (neededInt) { 2597 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 2598 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 2599 gp_offset_p); 2600 } 2601 if (neededSSE) { 2602 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 2603 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 2604 fp_offset_p); 2605 } 2606 CGF.EmitBranch(ContBlock); 2607 2608 // Emit code to load the value if it was passed in memory. 2609 2610 CGF.EmitBlock(InMemBlock); 2611 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2612 2613 // Return the appropriate result. 2614 2615 CGF.EmitBlock(ContBlock); 2616 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2, 2617 "vaarg.addr"); 2618 ResAddr->addIncoming(RegAddr, InRegBlock); 2619 ResAddr->addIncoming(MemAddr, InMemBlock); 2620 return ResAddr; 2621} 2622 2623ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty, bool IsReturnType) const { 2624 2625 if (Ty->isVoidType()) 2626 return ABIArgInfo::getIgnore(); 2627 2628 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2629 Ty = EnumTy->getDecl()->getIntegerType(); 2630 2631 uint64_t Size = getContext().getTypeSize(Ty); 2632 2633 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2634 if (IsReturnType) { 2635 if (isRecordReturnIndirect(RT, getCXXABI())) 2636 return ABIArgInfo::getIndirect(0, false); 2637 } else { 2638 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, getCXXABI())) 2639 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 2640 } 2641 2642 if (RT->getDecl()->hasFlexibleArrayMember()) 2643 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2644 2645 // FIXME: mingw-w64-gcc emits 128-bit struct as i128 2646 if (Size == 128 && getTarget().getTriple().getOS() == llvm::Triple::MinGW32) 2647 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2648 Size)); 2649 2650 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is 2651 // not 1, 2, 4, or 8 bytes, must be passed by reference." 2652 if (Size <= 64 && 2653 (Size & (Size - 1)) == 0) 2654 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2655 Size)); 2656 2657 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2658 } 2659 2660 if (Ty->isPromotableIntegerType()) 2661 return ABIArgInfo::getExtend(); 2662 2663 return ABIArgInfo::getDirect(); 2664} 2665 2666void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2667 2668 QualType RetTy = FI.getReturnType(); 2669 FI.getReturnInfo() = classify(RetTy, true); 2670 2671 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2672 it != ie; ++it) 2673 it->info = classify(it->type, false); 2674} 2675 2676llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2677 CodeGenFunction &CGF) const { 2678 llvm::Type *BPP = CGF.Int8PtrPtrTy; 2679 2680 CGBuilderTy &Builder = CGF.Builder; 2681 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2682 "ap"); 2683 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2684 llvm::Type *PTy = 2685 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2686 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2687 2688 uint64_t Offset = 2689 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 2690 llvm::Value *NextAddr = 2691 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2692 "ap.next"); 2693 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2694 2695 return AddrTyped; 2696} 2697 2698namespace { 2699 2700class NaClX86_64ABIInfo : public ABIInfo { 2701 public: 2702 NaClX86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 2703 : ABIInfo(CGT), PInfo(CGT), NInfo(CGT, HasAVX) {} 2704 virtual void computeInfo(CGFunctionInfo &FI) const; 2705 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2706 CodeGenFunction &CGF) const; 2707 private: 2708 PNaClABIInfo PInfo; // Used for generating calls with pnaclcall callingconv. 2709 X86_64ABIInfo NInfo; // Used for everything else. 2710}; 2711 2712class NaClX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 2713 public: 2714 NaClX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 2715 : TargetCodeGenInfo(new NaClX86_64ABIInfo(CGT, HasAVX)) {} 2716}; 2717 2718} 2719 2720void NaClX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2721 if (FI.getASTCallingConvention() == CC_PnaclCall) 2722 PInfo.computeInfo(FI); 2723 else 2724 NInfo.computeInfo(FI); 2725} 2726 2727llvm::Value *NaClX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2728 CodeGenFunction &CGF) const { 2729 // Always use the native convention; calling pnacl-style varargs functions 2730 // is unuspported. 2731 return NInfo.EmitVAArg(VAListAddr, Ty, CGF); 2732} 2733 2734 2735// PowerPC-32 2736 2737namespace { 2738class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2739public: 2740 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2741 2742 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2743 // This is recovered from gcc output. 2744 return 1; // r1 is the dedicated stack pointer 2745 } 2746 2747 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2748 llvm::Value *Address) const; 2749}; 2750 2751} 2752 2753bool 2754PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2755 llvm::Value *Address) const { 2756 // This is calculated from the LLVM and GCC tables and verified 2757 // against gcc output. AFAIK all ABIs use the same encoding. 2758 2759 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2760 2761 llvm::IntegerType *i8 = CGF.Int8Ty; 2762 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2763 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2764 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2765 2766 // 0-31: r0-31, the 4-byte general-purpose registers 2767 AssignToArrayRange(Builder, Address, Four8, 0, 31); 2768 2769 // 32-63: fp0-31, the 8-byte floating-point registers 2770 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2771 2772 // 64-76 are various 4-byte special-purpose registers: 2773 // 64: mq 2774 // 65: lr 2775 // 66: ctr 2776 // 67: ap 2777 // 68-75 cr0-7 2778 // 76: xer 2779 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2780 2781 // 77-108: v0-31, the 16-byte vector registers 2782 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2783 2784 // 109: vrsave 2785 // 110: vscr 2786 // 111: spe_acc 2787 // 112: spefscr 2788 // 113: sfp 2789 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2790 2791 return false; 2792} 2793 2794// PowerPC-64 2795 2796namespace { 2797/// PPC64_SVR4_ABIInfo - The 64-bit PowerPC ELF (SVR4) ABI information. 2798class PPC64_SVR4_ABIInfo : public DefaultABIInfo { 2799 2800public: 2801 PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {} 2802 2803 bool isPromotableTypeForABI(QualType Ty) const; 2804 2805 ABIArgInfo classifyReturnType(QualType RetTy) const; 2806 ABIArgInfo classifyArgumentType(QualType Ty) const; 2807 2808 // TODO: We can add more logic to computeInfo to improve performance. 2809 // Example: For aggregate arguments that fit in a register, we could 2810 // use getDirectInReg (as is done below for structs containing a single 2811 // floating-point value) to avoid pushing them to memory on function 2812 // entry. This would require changing the logic in PPCISelLowering 2813 // when lowering the parameters in the caller and args in the callee. 2814 virtual void computeInfo(CGFunctionInfo &FI) const { 2815 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2816 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2817 it != ie; ++it) { 2818 // We rely on the default argument classification for the most part. 2819 // One exception: An aggregate containing a single floating-point 2820 // or vector item must be passed in a register if one is available. 2821 const Type *T = isSingleElementStruct(it->type, getContext()); 2822 if (T) { 2823 const BuiltinType *BT = T->getAs<BuiltinType>(); 2824 if (T->isVectorType() || (BT && BT->isFloatingPoint())) { 2825 QualType QT(T, 0); 2826 it->info = ABIArgInfo::getDirectInReg(CGT.ConvertType(QT)); 2827 continue; 2828 } 2829 } 2830 it->info = classifyArgumentType(it->type); 2831 } 2832 } 2833 2834 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, 2835 QualType Ty, 2836 CodeGenFunction &CGF) const; 2837}; 2838 2839class PPC64_SVR4_TargetCodeGenInfo : public TargetCodeGenInfo { 2840public: 2841 PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes &CGT) 2842 : TargetCodeGenInfo(new PPC64_SVR4_ABIInfo(CGT)) {} 2843 2844 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2845 // This is recovered from gcc output. 2846 return 1; // r1 is the dedicated stack pointer 2847 } 2848 2849 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2850 llvm::Value *Address) const; 2851}; 2852 2853class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2854public: 2855 PPC64TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2856 2857 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2858 // This is recovered from gcc output. 2859 return 1; // r1 is the dedicated stack pointer 2860 } 2861 2862 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2863 llvm::Value *Address) const; 2864}; 2865 2866} 2867 2868// Return true if the ABI requires Ty to be passed sign- or zero- 2869// extended to 64 bits. 2870bool 2871PPC64_SVR4_ABIInfo::isPromotableTypeForABI(QualType Ty) const { 2872 // Treat an enum type as its underlying type. 2873 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2874 Ty = EnumTy->getDecl()->getIntegerType(); 2875 2876 // Promotable integer types are required to be promoted by the ABI. 2877 if (Ty->isPromotableIntegerType()) 2878 return true; 2879 2880 // In addition to the usual promotable integer types, we also need to 2881 // extend all 32-bit types, since the ABI requires promotion to 64 bits. 2882 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2883 switch (BT->getKind()) { 2884 case BuiltinType::Int: 2885 case BuiltinType::UInt: 2886 return true; 2887 default: 2888 break; 2889 } 2890 2891 return false; 2892} 2893 2894ABIArgInfo 2895PPC64_SVR4_ABIInfo::classifyArgumentType(QualType Ty) const { 2896 if (Ty->isAnyComplexType()) 2897 return ABIArgInfo::getDirect(); 2898 2899 if (isAggregateTypeForABI(Ty)) { 2900 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) 2901 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 2902 2903 return ABIArgInfo::getIndirect(0); 2904 } 2905 2906 return (isPromotableTypeForABI(Ty) ? 2907 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2908} 2909 2910ABIArgInfo 2911PPC64_SVR4_ABIInfo::classifyReturnType(QualType RetTy) const { 2912 if (RetTy->isVoidType()) 2913 return ABIArgInfo::getIgnore(); 2914 2915 if (RetTy->isAnyComplexType()) 2916 return ABIArgInfo::getDirect(); 2917 2918 if (isAggregateTypeForABI(RetTy)) 2919 return ABIArgInfo::getIndirect(0); 2920 2921 return (isPromotableTypeForABI(RetTy) ? 2922 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2923} 2924 2925// Based on ARMABIInfo::EmitVAArg, adjusted for 64-bit machine. 2926llvm::Value *PPC64_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr, 2927 QualType Ty, 2928 CodeGenFunction &CGF) const { 2929 llvm::Type *BP = CGF.Int8PtrTy; 2930 llvm::Type *BPP = CGF.Int8PtrPtrTy; 2931 2932 CGBuilderTy &Builder = CGF.Builder; 2933 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 2934 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2935 2936 // Update the va_list pointer. The pointer should be bumped by the 2937 // size of the object. We can trust getTypeSize() except for a complex 2938 // type whose base type is smaller than a doubleword. For these, the 2939 // size of the object is 16 bytes; see below for further explanation. 2940 unsigned SizeInBytes = CGF.getContext().getTypeSize(Ty) / 8; 2941 QualType BaseTy; 2942 unsigned CplxBaseSize = 0; 2943 2944 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) { 2945 BaseTy = CTy->getElementType(); 2946 CplxBaseSize = CGF.getContext().getTypeSize(BaseTy) / 8; 2947 if (CplxBaseSize < 8) 2948 SizeInBytes = 16; 2949 } 2950 2951 unsigned Offset = llvm::RoundUpToAlignment(SizeInBytes, 8); 2952 llvm::Value *NextAddr = 2953 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int64Ty, Offset), 2954 "ap.next"); 2955 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2956 2957 // If we have a complex type and the base type is smaller than 8 bytes, 2958 // the ABI calls for the real and imaginary parts to be right-adjusted 2959 // in separate doublewords. However, Clang expects us to produce a 2960 // pointer to a structure with the two parts packed tightly. So generate 2961 // loads of the real and imaginary parts relative to the va_list pointer, 2962 // and store them to a temporary structure. 2963 if (CplxBaseSize && CplxBaseSize < 8) { 2964 llvm::Value *RealAddr = Builder.CreatePtrToInt(Addr, CGF.Int64Ty); 2965 llvm::Value *ImagAddr = RealAddr; 2966 RealAddr = Builder.CreateAdd(RealAddr, Builder.getInt64(8 - CplxBaseSize)); 2967 ImagAddr = Builder.CreateAdd(ImagAddr, Builder.getInt64(16 - CplxBaseSize)); 2968 llvm::Type *PBaseTy = llvm::PointerType::getUnqual(CGF.ConvertType(BaseTy)); 2969 RealAddr = Builder.CreateIntToPtr(RealAddr, PBaseTy); 2970 ImagAddr = Builder.CreateIntToPtr(ImagAddr, PBaseTy); 2971 llvm::Value *Real = Builder.CreateLoad(RealAddr, false, ".vareal"); 2972 llvm::Value *Imag = Builder.CreateLoad(ImagAddr, false, ".vaimag"); 2973 llvm::Value *Ptr = CGF.CreateTempAlloca(CGT.ConvertTypeForMem(Ty), 2974 "vacplx"); 2975 llvm::Value *RealPtr = Builder.CreateStructGEP(Ptr, 0, ".real"); 2976 llvm::Value *ImagPtr = Builder.CreateStructGEP(Ptr, 1, ".imag"); 2977 Builder.CreateStore(Real, RealPtr, false); 2978 Builder.CreateStore(Imag, ImagPtr, false); 2979 return Ptr; 2980 } 2981 2982 // If the argument is smaller than 8 bytes, it is right-adjusted in 2983 // its doubleword slot. Adjust the pointer to pick it up from the 2984 // correct offset. 2985 if (SizeInBytes < 8) { 2986 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int64Ty); 2987 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt64(8 - SizeInBytes)); 2988 Addr = Builder.CreateIntToPtr(AddrAsInt, BP); 2989 } 2990 2991 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2992 return Builder.CreateBitCast(Addr, PTy); 2993} 2994 2995static bool 2996PPC64_initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2997 llvm::Value *Address) { 2998 // This is calculated from the LLVM and GCC tables and verified 2999 // against gcc output. AFAIK all ABIs use the same encoding. 3000 3001 CodeGen::CGBuilderTy &Builder = CGF.Builder; 3002 3003 llvm::IntegerType *i8 = CGF.Int8Ty; 3004 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 3005 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 3006 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 3007 3008 // 0-31: r0-31, the 8-byte general-purpose registers 3009 AssignToArrayRange(Builder, Address, Eight8, 0, 31); 3010 3011 // 32-63: fp0-31, the 8-byte floating-point registers 3012 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 3013 3014 // 64-76 are various 4-byte special-purpose registers: 3015 // 64: mq 3016 // 65: lr 3017 // 66: ctr 3018 // 67: ap 3019 // 68-75 cr0-7 3020 // 76: xer 3021 AssignToArrayRange(Builder, Address, Four8, 64, 76); 3022 3023 // 77-108: v0-31, the 16-byte vector registers 3024 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 3025 3026 // 109: vrsave 3027 // 110: vscr 3028 // 111: spe_acc 3029 // 112: spefscr 3030 // 113: sfp 3031 AssignToArrayRange(Builder, Address, Four8, 109, 113); 3032 3033 return false; 3034} 3035 3036bool 3037PPC64_SVR4_TargetCodeGenInfo::initDwarfEHRegSizeTable( 3038 CodeGen::CodeGenFunction &CGF, 3039 llvm::Value *Address) const { 3040 3041 return PPC64_initDwarfEHRegSizeTable(CGF, Address); 3042} 3043 3044bool 3045PPC64TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3046 llvm::Value *Address) const { 3047 3048 return PPC64_initDwarfEHRegSizeTable(CGF, Address); 3049} 3050 3051//===----------------------------------------------------------------------===// 3052// ARM ABI Implementation 3053//===----------------------------------------------------------------------===// 3054 3055namespace { 3056 3057class ARMABIInfo : public ABIInfo { 3058public: 3059 enum ABIKind { 3060 APCS = 0, 3061 AAPCS = 1, 3062 AAPCS_VFP 3063 }; 3064 3065private: 3066 ABIKind Kind; 3067 3068public: 3069 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) { 3070 setRuntimeCC(); 3071 } 3072 3073 bool isEABI() const { 3074 StringRef Env = getTarget().getTriple().getEnvironmentName(); 3075 return (Env == "gnueabi" || Env == "eabi" || 3076 Env == "android" || Env == "androideabi"); 3077 } 3078 3079 ABIKind getABIKind() const { return Kind; } 3080 3081private: 3082 ABIArgInfo classifyReturnType(QualType RetTy) const; 3083 ABIArgInfo classifyArgumentType(QualType RetTy, int *VFPRegs, 3084 unsigned &AllocatedVFP, 3085 bool &IsHA) const; 3086 bool isIllegalVectorType(QualType Ty) const; 3087 3088 virtual void computeInfo(CGFunctionInfo &FI) const; 3089 3090 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3091 CodeGenFunction &CGF) const; 3092 3093 llvm::CallingConv::ID getLLVMDefaultCC() const; 3094 llvm::CallingConv::ID getABIDefaultCC() const; 3095 void setRuntimeCC(); 3096}; 3097 3098class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 3099public: 3100 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 3101 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 3102 3103 const ARMABIInfo &getABIInfo() const { 3104 return static_cast<const ARMABIInfo&>(TargetCodeGenInfo::getABIInfo()); 3105 } 3106 3107 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 3108 return 13; 3109 } 3110 3111 StringRef getARCRetainAutoreleasedReturnValueMarker() const { 3112 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue"; 3113 } 3114 3115 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3116 llvm::Value *Address) const { 3117 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 3118 3119 // 0-15 are the 16 integer registers. 3120 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 15); 3121 return false; 3122 } 3123 3124 unsigned getSizeOfUnwindException() const { 3125 if (getABIInfo().isEABI()) return 88; 3126 return TargetCodeGenInfo::getSizeOfUnwindException(); 3127 } 3128 3129 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 3130 CodeGen::CodeGenModule &CGM) const { 3131 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 3132 if (!FD) 3133 return; 3134 3135 const ARMInterruptAttr *Attr = FD->getAttr<ARMInterruptAttr>(); 3136 if (!Attr) 3137 return; 3138 3139 const char *Kind; 3140 switch (Attr->getInterrupt()) { 3141 case ARMInterruptAttr::Generic: Kind = ""; break; 3142 case ARMInterruptAttr::IRQ: Kind = "IRQ"; break; 3143 case ARMInterruptAttr::FIQ: Kind = "FIQ"; break; 3144 case ARMInterruptAttr::SWI: Kind = "SWI"; break; 3145 case ARMInterruptAttr::ABORT: Kind = "ABORT"; break; 3146 case ARMInterruptAttr::UNDEF: Kind = "UNDEF"; break; 3147 } 3148 3149 llvm::Function *Fn = cast<llvm::Function>(GV); 3150 3151 Fn->addFnAttr("interrupt", Kind); 3152 3153 if (cast<ARMABIInfo>(getABIInfo()).getABIKind() == ARMABIInfo::APCS) 3154 return; 3155 3156 // AAPCS guarantees that sp will be 8-byte aligned on any public interface, 3157 // however this is not necessarily true on taking any interrupt. Instruct 3158 // the backend to perform a realignment as part of the function prologue. 3159 llvm::AttrBuilder B; 3160 B.addStackAlignmentAttr(8); 3161 Fn->addAttributes(llvm::AttributeSet::FunctionIndex, 3162 llvm::AttributeSet::get(CGM.getLLVMContext(), 3163 llvm::AttributeSet::FunctionIndex, 3164 B)); 3165 } 3166 3167}; 3168 3169} 3170 3171void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 3172 // To correctly handle Homogeneous Aggregate, we need to keep track of the 3173 // VFP registers allocated so far. 3174 // C.1.vfp If the argument is a VFP CPRC and there are sufficient consecutive 3175 // VFP registers of the appropriate type unallocated then the argument is 3176 // allocated to the lowest-numbered sequence of such registers. 3177 // C.2.vfp If the argument is a VFP CPRC then any VFP registers that are 3178 // unallocated are marked as unavailable. 3179 unsigned AllocatedVFP = 0; 3180 int VFPRegs[16] = { 0 }; 3181 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3182 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3183 it != ie; ++it) { 3184 unsigned PreAllocation = AllocatedVFP; 3185 bool IsHA = false; 3186 // 6.1.2.3 There is one VFP co-processor register class using registers 3187 // s0-s15 (d0-d7) for passing arguments. 3188 const unsigned NumVFPs = 16; 3189 it->info = classifyArgumentType(it->type, VFPRegs, AllocatedVFP, IsHA); 3190 // If we do not have enough VFP registers for the HA, any VFP registers 3191 // that are unallocated are marked as unavailable. To achieve this, we add 3192 // padding of (NumVFPs - PreAllocation) floats. 3193 if (IsHA && AllocatedVFP > NumVFPs && PreAllocation < NumVFPs) { 3194 llvm::Type *PaddingTy = llvm::ArrayType::get( 3195 llvm::Type::getFloatTy(getVMContext()), NumVFPs - PreAllocation); 3196 it->info = ABIArgInfo::getExpandWithPadding(false, PaddingTy); 3197 } 3198 } 3199 3200 // Always honor user-specified calling convention. 3201 if (FI.getCallingConvention() != llvm::CallingConv::C) 3202 return; 3203 3204 llvm::CallingConv::ID cc = getRuntimeCC(); 3205 if (cc != llvm::CallingConv::C) 3206 FI.setEffectiveCallingConvention(cc); 3207} 3208 3209/// Return the default calling convention that LLVM will use. 3210llvm::CallingConv::ID ARMABIInfo::getLLVMDefaultCC() const { 3211 // The default calling convention that LLVM will infer. 3212 if (getTarget().getTriple().getEnvironmentName()=="gnueabihf") 3213 return llvm::CallingConv::ARM_AAPCS_VFP; 3214 else if (isEABI()) 3215 return llvm::CallingConv::ARM_AAPCS; 3216 else 3217 return llvm::CallingConv::ARM_APCS; 3218} 3219 3220/// Return the calling convention that our ABI would like us to use 3221/// as the C calling convention. 3222llvm::CallingConv::ID ARMABIInfo::getABIDefaultCC() const { 3223 switch (getABIKind()) { 3224 case APCS: return llvm::CallingConv::ARM_APCS; 3225 case AAPCS: return llvm::CallingConv::ARM_AAPCS; 3226 case AAPCS_VFP: return llvm::CallingConv::ARM_AAPCS_VFP; 3227 } 3228 llvm_unreachable("bad ABI kind"); 3229} 3230 3231void ARMABIInfo::setRuntimeCC() { 3232 assert(getRuntimeCC() == llvm::CallingConv::C); 3233 3234 // Don't muddy up the IR with a ton of explicit annotations if 3235 // they'd just match what LLVM will infer from the triple. 3236 llvm::CallingConv::ID abiCC = getABIDefaultCC(); 3237 if (abiCC != getLLVMDefaultCC()) 3238 RuntimeCC = abiCC; 3239} 3240 3241/// isHomogeneousAggregate - Return true if a type is an AAPCS-VFP homogeneous 3242/// aggregate. If HAMembers is non-null, the number of base elements 3243/// contained in the type is returned through it; this is used for the 3244/// recursive calls that check aggregate component types. 3245static bool isHomogeneousAggregate(QualType Ty, const Type *&Base, 3246 ASTContext &Context, 3247 uint64_t *HAMembers = 0) { 3248 uint64_t Members = 0; 3249 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 3250 if (!isHomogeneousAggregate(AT->getElementType(), Base, Context, &Members)) 3251 return false; 3252 Members *= AT->getSize().getZExtValue(); 3253 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 3254 const RecordDecl *RD = RT->getDecl(); 3255 if (RD->hasFlexibleArrayMember()) 3256 return false; 3257 3258 Members = 0; 3259 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 3260 i != e; ++i) { 3261 const FieldDecl *FD = *i; 3262 uint64_t FldMembers; 3263 if (!isHomogeneousAggregate(FD->getType(), Base, Context, &FldMembers)) 3264 return false; 3265 3266 Members = (RD->isUnion() ? 3267 std::max(Members, FldMembers) : Members + FldMembers); 3268 } 3269 } else { 3270 Members = 1; 3271 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 3272 Members = 2; 3273 Ty = CT->getElementType(); 3274 } 3275 3276 // Homogeneous aggregates for AAPCS-VFP must have base types of float, 3277 // double, or 64-bit or 128-bit vectors. 3278 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 3279 if (BT->getKind() != BuiltinType::Float && 3280 BT->getKind() != BuiltinType::Double && 3281 BT->getKind() != BuiltinType::LongDouble) 3282 return false; 3283 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 3284 unsigned VecSize = Context.getTypeSize(VT); 3285 if (VecSize != 64 && VecSize != 128) 3286 return false; 3287 } else { 3288 return false; 3289 } 3290 3291 // The base type must be the same for all members. Vector types of the 3292 // same total size are treated as being equivalent here. 3293 const Type *TyPtr = Ty.getTypePtr(); 3294 if (!Base) 3295 Base = TyPtr; 3296 if (Base != TyPtr && 3297 (!Base->isVectorType() || !TyPtr->isVectorType() || 3298 Context.getTypeSize(Base) != Context.getTypeSize(TyPtr))) 3299 return false; 3300 } 3301 3302 // Homogeneous Aggregates can have at most 4 members of the base type. 3303 if (HAMembers) 3304 *HAMembers = Members; 3305 3306 return (Members > 0 && Members <= 4); 3307} 3308 3309/// markAllocatedVFPs - update VFPRegs according to the alignment and 3310/// number of VFP registers (unit is S register) requested. 3311static void markAllocatedVFPs(int *VFPRegs, unsigned &AllocatedVFP, 3312 unsigned Alignment, 3313 unsigned NumRequired) { 3314 // Early Exit. 3315 if (AllocatedVFP >= 16) 3316 return; 3317 // C.1.vfp If the argument is a VFP CPRC and there are sufficient consecutive 3318 // VFP registers of the appropriate type unallocated then the argument is 3319 // allocated to the lowest-numbered sequence of such registers. 3320 for (unsigned I = 0; I < 16; I += Alignment) { 3321 bool FoundSlot = true; 3322 for (unsigned J = I, JEnd = I + NumRequired; J < JEnd; J++) 3323 if (J >= 16 || VFPRegs[J]) { 3324 FoundSlot = false; 3325 break; 3326 } 3327 if (FoundSlot) { 3328 for (unsigned J = I, JEnd = I + NumRequired; J < JEnd; J++) 3329 VFPRegs[J] = 1; 3330 AllocatedVFP += NumRequired; 3331 return; 3332 } 3333 } 3334 // C.2.vfp If the argument is a VFP CPRC then any VFP registers that are 3335 // unallocated are marked as unavailable. 3336 for (unsigned I = 0; I < 16; I++) 3337 VFPRegs[I] = 1; 3338 AllocatedVFP = 17; // We do not have enough VFP registers. 3339} 3340 3341ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, int *VFPRegs, 3342 unsigned &AllocatedVFP, 3343 bool &IsHA) const { 3344 // We update number of allocated VFPs according to 3345 // 6.1.2.1 The following argument types are VFP CPRCs: 3346 // A single-precision floating-point type (including promoted 3347 // half-precision types); A double-precision floating-point type; 3348 // A 64-bit or 128-bit containerized vector type; Homogeneous Aggregate 3349 // with a Base Type of a single- or double-precision floating-point type, 3350 // 64-bit containerized vectors or 128-bit containerized vectors with one 3351 // to four Elements. 3352 3353 // Handle illegal vector types here. 3354 if (isIllegalVectorType(Ty)) { 3355 uint64_t Size = getContext().getTypeSize(Ty); 3356 if (Size <= 32) { 3357 llvm::Type *ResType = 3358 llvm::Type::getInt32Ty(getVMContext()); 3359 return ABIArgInfo::getDirect(ResType); 3360 } 3361 if (Size == 64) { 3362 llvm::Type *ResType = llvm::VectorType::get( 3363 llvm::Type::getInt32Ty(getVMContext()), 2); 3364 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, 2); 3365 return ABIArgInfo::getDirect(ResType); 3366 } 3367 if (Size == 128) { 3368 llvm::Type *ResType = llvm::VectorType::get( 3369 llvm::Type::getInt32Ty(getVMContext()), 4); 3370 markAllocatedVFPs(VFPRegs, AllocatedVFP, 4, 4); 3371 return ABIArgInfo::getDirect(ResType); 3372 } 3373 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3374 } 3375 // Update VFPRegs for legal vector types. 3376 if (const VectorType *VT = Ty->getAs<VectorType>()) { 3377 uint64_t Size = getContext().getTypeSize(VT); 3378 // Size of a legal vector should be power of 2 and above 64. 3379 markAllocatedVFPs(VFPRegs, AllocatedVFP, Size >= 128 ? 4 : 2, Size / 32); 3380 } 3381 // Update VFPRegs for floating point types. 3382 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 3383 if (BT->getKind() == BuiltinType::Half || 3384 BT->getKind() == BuiltinType::Float) 3385 markAllocatedVFPs(VFPRegs, AllocatedVFP, 1, 1); 3386 if (BT->getKind() == BuiltinType::Double || 3387 BT->getKind() == BuiltinType::LongDouble) 3388 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, 2); 3389 } 3390 3391 if (!isAggregateTypeForABI(Ty)) { 3392 // Treat an enum type as its underlying type. 3393 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3394 Ty = EnumTy->getDecl()->getIntegerType(); 3395 3396 return (Ty->isPromotableIntegerType() ? 3397 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3398 } 3399 3400 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) 3401 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 3402 3403 // Ignore empty records. 3404 if (isEmptyRecord(getContext(), Ty, true)) 3405 return ABIArgInfo::getIgnore(); 3406 3407 if (getABIKind() == ARMABIInfo::AAPCS_VFP) { 3408 // Homogeneous Aggregates need to be expanded when we can fit the aggregate 3409 // into VFP registers. 3410 const Type *Base = 0; 3411 uint64_t Members = 0; 3412 if (isHomogeneousAggregate(Ty, Base, getContext(), &Members)) { 3413 assert(Base && "Base class should be set for homogeneous aggregate"); 3414 // Base can be a floating-point or a vector. 3415 if (Base->isVectorType()) { 3416 // ElementSize is in number of floats. 3417 unsigned ElementSize = getContext().getTypeSize(Base) == 64 ? 2 : 4; 3418 markAllocatedVFPs(VFPRegs, AllocatedVFP, ElementSize, 3419 Members * ElementSize); 3420 } else if (Base->isSpecificBuiltinType(BuiltinType::Float)) 3421 markAllocatedVFPs(VFPRegs, AllocatedVFP, 1, Members); 3422 else { 3423 assert(Base->isSpecificBuiltinType(BuiltinType::Double) || 3424 Base->isSpecificBuiltinType(BuiltinType::LongDouble)); 3425 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, Members * 2); 3426 } 3427 IsHA = true; 3428 return ABIArgInfo::getExpand(); 3429 } 3430 } 3431 3432 // Support byval for ARM. 3433 // The ABI alignment for APCS is 4-byte and for AAPCS at least 4-byte and at 3434 // most 8-byte. We realign the indirect argument if type alignment is bigger 3435 // than ABI alignment. 3436 uint64_t ABIAlign = 4; 3437 uint64_t TyAlign = getContext().getTypeAlign(Ty) / 8; 3438 if (getABIKind() == ARMABIInfo::AAPCS_VFP || 3439 getABIKind() == ARMABIInfo::AAPCS) 3440 ABIAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8); 3441 if (getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(64)) { 3442 return ABIArgInfo::getIndirect(0, /*ByVal=*/true, 3443 /*Realign=*/TyAlign > ABIAlign); 3444 } 3445 3446 // Otherwise, pass by coercing to a structure of the appropriate size. 3447 llvm::Type* ElemTy; 3448 unsigned SizeRegs; 3449 // FIXME: Try to match the types of the arguments more accurately where 3450 // we can. 3451 if (getContext().getTypeAlign(Ty) <= 32) { 3452 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 3453 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 3454 } else { 3455 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 3456 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 3457 } 3458 3459 llvm::Type *STy = 3460 llvm::StructType::get(llvm::ArrayType::get(ElemTy, SizeRegs), NULL); 3461 return ABIArgInfo::getDirect(STy); 3462} 3463 3464static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 3465 llvm::LLVMContext &VMContext) { 3466 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 3467 // is called integer-like if its size is less than or equal to one word, and 3468 // the offset of each of its addressable sub-fields is zero. 3469 3470 uint64_t Size = Context.getTypeSize(Ty); 3471 3472 // Check that the type fits in a word. 3473 if (Size > 32) 3474 return false; 3475 3476 // FIXME: Handle vector types! 3477 if (Ty->isVectorType()) 3478 return false; 3479 3480 // Float types are never treated as "integer like". 3481 if (Ty->isRealFloatingType()) 3482 return false; 3483 3484 // If this is a builtin or pointer type then it is ok. 3485 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 3486 return true; 3487 3488 // Small complex integer types are "integer like". 3489 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 3490 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 3491 3492 // Single element and zero sized arrays should be allowed, by the definition 3493 // above, but they are not. 3494 3495 // Otherwise, it must be a record type. 3496 const RecordType *RT = Ty->getAs<RecordType>(); 3497 if (!RT) return false; 3498 3499 // Ignore records with flexible arrays. 3500 const RecordDecl *RD = RT->getDecl(); 3501 if (RD->hasFlexibleArrayMember()) 3502 return false; 3503 3504 // Check that all sub-fields are at offset 0, and are themselves "integer 3505 // like". 3506 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 3507 3508 bool HadField = false; 3509 unsigned idx = 0; 3510 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 3511 i != e; ++i, ++idx) { 3512 const FieldDecl *FD = *i; 3513 3514 // Bit-fields are not addressable, we only need to verify they are "integer 3515 // like". We still have to disallow a subsequent non-bitfield, for example: 3516 // struct { int : 0; int x } 3517 // is non-integer like according to gcc. 3518 if (FD->isBitField()) { 3519 if (!RD->isUnion()) 3520 HadField = true; 3521 3522 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 3523 return false; 3524 3525 continue; 3526 } 3527 3528 // Check if this field is at offset 0. 3529 if (Layout.getFieldOffset(idx) != 0) 3530 return false; 3531 3532 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 3533 return false; 3534 3535 // Only allow at most one field in a structure. This doesn't match the 3536 // wording above, but follows gcc in situations with a field following an 3537 // empty structure. 3538 if (!RD->isUnion()) { 3539 if (HadField) 3540 return false; 3541 3542 HadField = true; 3543 } 3544 } 3545 3546 return true; 3547} 3548 3549ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 3550 if (RetTy->isVoidType()) 3551 return ABIArgInfo::getIgnore(); 3552 3553 // Large vector types should be returned via memory. 3554 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) 3555 return ABIArgInfo::getIndirect(0); 3556 3557 if (!isAggregateTypeForABI(RetTy)) { 3558 // Treat an enum type as its underlying type. 3559 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 3560 RetTy = EnumTy->getDecl()->getIntegerType(); 3561 3562 return (RetTy->isPromotableIntegerType() ? 3563 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3564 } 3565 3566 // Structures with either a non-trivial destructor or a non-trivial 3567 // copy constructor are always indirect. 3568 if (isRecordReturnIndirect(RetTy, getCXXABI())) 3569 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3570 3571 // Are we following APCS? 3572 if (getABIKind() == APCS) { 3573 if (isEmptyRecord(getContext(), RetTy, false)) 3574 return ABIArgInfo::getIgnore(); 3575 3576 // Complex types are all returned as packed integers. 3577 // 3578 // FIXME: Consider using 2 x vector types if the back end handles them 3579 // correctly. 3580 if (RetTy->isAnyComplexType()) 3581 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 3582 getContext().getTypeSize(RetTy))); 3583 3584 // Integer like structures are returned in r0. 3585 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 3586 // Return in the smallest viable integer type. 3587 uint64_t Size = getContext().getTypeSize(RetTy); 3588 if (Size <= 8) 3589 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3590 if (Size <= 16) 3591 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3592 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3593 } 3594 3595 // Otherwise return in memory. 3596 return ABIArgInfo::getIndirect(0); 3597 } 3598 3599 // Otherwise this is an AAPCS variant. 3600 3601 if (isEmptyRecord(getContext(), RetTy, true)) 3602 return ABIArgInfo::getIgnore(); 3603 3604 // Check for homogeneous aggregates with AAPCS-VFP. 3605 if (getABIKind() == AAPCS_VFP) { 3606 const Type *Base = 0; 3607 if (isHomogeneousAggregate(RetTy, Base, getContext())) { 3608 assert(Base && "Base class should be set for homogeneous aggregate"); 3609 // Homogeneous Aggregates are returned directly. 3610 return ABIArgInfo::getDirect(); 3611 } 3612 } 3613 3614 // Aggregates <= 4 bytes are returned in r0; other aggregates 3615 // are returned indirectly. 3616 uint64_t Size = getContext().getTypeSize(RetTy); 3617 if (Size <= 32) { 3618 // Return in the smallest viable integer type. 3619 if (Size <= 8) 3620 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3621 if (Size <= 16) 3622 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3623 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3624 } 3625 3626 return ABIArgInfo::getIndirect(0); 3627} 3628 3629/// isIllegalVector - check whether Ty is an illegal vector type. 3630bool ARMABIInfo::isIllegalVectorType(QualType Ty) const { 3631 if (const VectorType *VT = Ty->getAs<VectorType>()) { 3632 // Check whether VT is legal. 3633 unsigned NumElements = VT->getNumElements(); 3634 uint64_t Size = getContext().getTypeSize(VT); 3635 // NumElements should be power of 2. 3636 if ((NumElements & (NumElements - 1)) != 0) 3637 return true; 3638 // Size should be greater than 32 bits. 3639 return Size <= 32; 3640 } 3641 return false; 3642} 3643 3644llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3645 CodeGenFunction &CGF) const { 3646 llvm::Type *BP = CGF.Int8PtrTy; 3647 llvm::Type *BPP = CGF.Int8PtrPtrTy; 3648 3649 CGBuilderTy &Builder = CGF.Builder; 3650 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 3651 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3652 3653 if (isEmptyRecord(getContext(), Ty, true)) { 3654 // These are ignored for parameter passing purposes. 3655 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3656 return Builder.CreateBitCast(Addr, PTy); 3657 } 3658 3659 uint64_t Size = CGF.getContext().getTypeSize(Ty) / 8; 3660 uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8; 3661 bool IsIndirect = false; 3662 3663 // The ABI alignment for 64-bit or 128-bit vectors is 8 for AAPCS and 4 for 3664 // APCS. For AAPCS, the ABI alignment is at least 4-byte and at most 8-byte. 3665 if (getABIKind() == ARMABIInfo::AAPCS_VFP || 3666 getABIKind() == ARMABIInfo::AAPCS) 3667 TyAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8); 3668 else 3669 TyAlign = 4; 3670 // Use indirect if size of the illegal vector is bigger than 16 bytes. 3671 if (isIllegalVectorType(Ty) && Size > 16) { 3672 IsIndirect = true; 3673 Size = 4; 3674 TyAlign = 4; 3675 } 3676 3677 // Handle address alignment for ABI alignment > 4 bytes. 3678 if (TyAlign > 4) { 3679 assert((TyAlign & (TyAlign - 1)) == 0 && 3680 "Alignment is not power of 2!"); 3681 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 3682 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1)); 3683 AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1))); 3684 Addr = Builder.CreateIntToPtr(AddrAsInt, BP, "ap.align"); 3685 } 3686 3687 uint64_t Offset = 3688 llvm::RoundUpToAlignment(Size, 4); 3689 llvm::Value *NextAddr = 3690 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 3691 "ap.next"); 3692 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3693 3694 if (IsIndirect) 3695 Addr = Builder.CreateLoad(Builder.CreateBitCast(Addr, BPP)); 3696 else if (TyAlign < CGF.getContext().getTypeAlign(Ty) / 8) { 3697 // We can't directly cast ap.cur to pointer to a vector type, since ap.cur 3698 // may not be correctly aligned for the vector type. We create an aligned 3699 // temporary space and copy the content over from ap.cur to the temporary 3700 // space. This is necessary if the natural alignment of the type is greater 3701 // than the ABI alignment. 3702 llvm::Type *I8PtrTy = Builder.getInt8PtrTy(); 3703 CharUnits CharSize = getContext().getTypeSizeInChars(Ty); 3704 llvm::Value *AlignedTemp = CGF.CreateTempAlloca(CGF.ConvertType(Ty), 3705 "var.align"); 3706 llvm::Value *Dst = Builder.CreateBitCast(AlignedTemp, I8PtrTy); 3707 llvm::Value *Src = Builder.CreateBitCast(Addr, I8PtrTy); 3708 Builder.CreateMemCpy(Dst, Src, 3709 llvm::ConstantInt::get(CGF.IntPtrTy, CharSize.getQuantity()), 3710 TyAlign, false); 3711 Addr = AlignedTemp; //The content is in aligned location. 3712 } 3713 llvm::Type *PTy = 3714 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3715 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 3716 3717 return AddrTyped; 3718} 3719 3720namespace { 3721 3722class NaClARMABIInfo : public ABIInfo { 3723 public: 3724 NaClARMABIInfo(CodeGen::CodeGenTypes &CGT, ARMABIInfo::ABIKind Kind) 3725 : ABIInfo(CGT), PInfo(CGT), NInfo(CGT, Kind) {} 3726 virtual void computeInfo(CGFunctionInfo &FI) const; 3727 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3728 CodeGenFunction &CGF) const; 3729 private: 3730 PNaClABIInfo PInfo; // Used for generating calls with pnaclcall callingconv. 3731 ARMABIInfo NInfo; // Used for everything else. 3732}; 3733 3734class NaClARMTargetCodeGenInfo : public TargetCodeGenInfo { 3735 public: 3736 NaClARMTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, ARMABIInfo::ABIKind Kind) 3737 : TargetCodeGenInfo(new NaClARMABIInfo(CGT, Kind)) {} 3738}; 3739 3740} 3741 3742void NaClARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 3743 if (FI.getASTCallingConvention() == CC_PnaclCall) 3744 PInfo.computeInfo(FI); 3745 else 3746 static_cast<const ABIInfo&>(NInfo).computeInfo(FI); 3747} 3748 3749llvm::Value *NaClARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3750 CodeGenFunction &CGF) const { 3751 // Always use the native convention; calling pnacl-style varargs functions 3752 // is unsupported. 3753 return static_cast<const ABIInfo&>(NInfo).EmitVAArg(VAListAddr, Ty, CGF); 3754} 3755 3756//===----------------------------------------------------------------------===// 3757// AArch64 ABI Implementation 3758//===----------------------------------------------------------------------===// 3759 3760namespace { 3761 3762class AArch64ABIInfo : public ABIInfo { 3763public: 3764 AArch64ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 3765 3766private: 3767 // The AArch64 PCS is explicit about return types and argument types being 3768 // handled identically, so we don't need to draw a distinction between 3769 // Argument and Return classification. 3770 ABIArgInfo classifyGenericType(QualType Ty, int &FreeIntRegs, 3771 int &FreeVFPRegs) const; 3772 3773 ABIArgInfo tryUseRegs(QualType Ty, int &FreeRegs, int RegsNeeded, bool IsInt, 3774 llvm::Type *DirectTy = 0) const; 3775 3776 virtual void computeInfo(CGFunctionInfo &FI) const; 3777 3778 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3779 CodeGenFunction &CGF) const; 3780}; 3781 3782class AArch64TargetCodeGenInfo : public TargetCodeGenInfo { 3783public: 3784 AArch64TargetCodeGenInfo(CodeGenTypes &CGT) 3785 :TargetCodeGenInfo(new AArch64ABIInfo(CGT)) {} 3786 3787 const AArch64ABIInfo &getABIInfo() const { 3788 return static_cast<const AArch64ABIInfo&>(TargetCodeGenInfo::getABIInfo()); 3789 } 3790 3791 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 3792 return 31; 3793 } 3794 3795 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3796 llvm::Value *Address) const { 3797 // 0-31 are x0-x30 and sp: 8 bytes each 3798 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 3799 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 31); 3800 3801 // 64-95 are v0-v31: 16 bytes each 3802 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16); 3803 AssignToArrayRange(CGF.Builder, Address, Sixteen8, 64, 95); 3804 3805 return false; 3806 } 3807 3808}; 3809 3810} 3811 3812void AArch64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 3813 int FreeIntRegs = 8, FreeVFPRegs = 8; 3814 3815 FI.getReturnInfo() = classifyGenericType(FI.getReturnType(), 3816 FreeIntRegs, FreeVFPRegs); 3817 3818 FreeIntRegs = FreeVFPRegs = 8; 3819 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3820 it != ie; ++it) { 3821 it->info = classifyGenericType(it->type, FreeIntRegs, FreeVFPRegs); 3822 3823 } 3824} 3825 3826ABIArgInfo 3827AArch64ABIInfo::tryUseRegs(QualType Ty, int &FreeRegs, int RegsNeeded, 3828 bool IsInt, llvm::Type *DirectTy) const { 3829 if (FreeRegs >= RegsNeeded) { 3830 FreeRegs -= RegsNeeded; 3831 return ABIArgInfo::getDirect(DirectTy); 3832 } 3833 3834 llvm::Type *Padding = 0; 3835 3836 // We need padding so that later arguments don't get filled in anyway. That 3837 // wouldn't happen if only ByVal arguments followed in the same category, but 3838 // a large structure will simply seem to be a pointer as far as LLVM is 3839 // concerned. 3840 if (FreeRegs > 0) { 3841 if (IsInt) 3842 Padding = llvm::Type::getInt64Ty(getVMContext()); 3843 else 3844 Padding = llvm::Type::getFloatTy(getVMContext()); 3845 3846 // Either [N x i64] or [N x float]. 3847 Padding = llvm::ArrayType::get(Padding, FreeRegs); 3848 FreeRegs = 0; 3849 } 3850 3851 return ABIArgInfo::getIndirect(getContext().getTypeAlign(Ty) / 8, 3852 /*IsByVal=*/ true, /*Realign=*/ false, 3853 Padding); 3854} 3855 3856 3857ABIArgInfo AArch64ABIInfo::classifyGenericType(QualType Ty, 3858 int &FreeIntRegs, 3859 int &FreeVFPRegs) const { 3860 // Can only occurs for return, but harmless otherwise. 3861 if (Ty->isVoidType()) 3862 return ABIArgInfo::getIgnore(); 3863 3864 // Large vector types should be returned via memory. There's no such concept 3865 // in the ABI, but they'd be over 16 bytes anyway so no matter how they're 3866 // classified they'd go into memory (see B.3). 3867 if (Ty->isVectorType() && getContext().getTypeSize(Ty) > 128) { 3868 if (FreeIntRegs > 0) 3869 --FreeIntRegs; 3870 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3871 } 3872 3873 // All non-aggregate LLVM types have a concrete ABI representation so they can 3874 // be passed directly. After this block we're guaranteed to be in a 3875 // complicated case. 3876 if (!isAggregateTypeForABI(Ty)) { 3877 // Treat an enum type as its underlying type. 3878 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3879 Ty = EnumTy->getDecl()->getIntegerType(); 3880 3881 if (Ty->isFloatingType() || Ty->isVectorType()) 3882 return tryUseRegs(Ty, FreeVFPRegs, /*RegsNeeded=*/ 1, /*IsInt=*/ false); 3883 3884 assert(getContext().getTypeSize(Ty) <= 128 && 3885 "unexpectedly large scalar type"); 3886 3887 int RegsNeeded = getContext().getTypeSize(Ty) > 64 ? 2 : 1; 3888 3889 // If the type may need padding registers to ensure "alignment", we must be 3890 // careful when this is accounted for. Increasing the effective size covers 3891 // all cases. 3892 if (getContext().getTypeAlign(Ty) == 128) 3893 RegsNeeded += FreeIntRegs % 2 != 0; 3894 3895 return tryUseRegs(Ty, FreeIntRegs, RegsNeeded, /*IsInt=*/ true); 3896 } 3897 3898 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) { 3899 if (FreeIntRegs > 0 && RAA == CGCXXABI::RAA_Indirect) 3900 --FreeIntRegs; 3901 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 3902 } 3903 3904 if (isEmptyRecord(getContext(), Ty, true)) { 3905 if (!getContext().getLangOpts().CPlusPlus) { 3906 // Empty structs outside C++ mode are a GNU extension, so no ABI can 3907 // possibly tell us what to do. It turns out (I believe) that GCC ignores 3908 // the object for parameter-passsing purposes. 3909 return ABIArgInfo::getIgnore(); 3910 } 3911 3912 // The combination of C++98 9p5 (sizeof(struct) != 0) and the pseudocode 3913 // description of va_arg in the PCS require that an empty struct does 3914 // actually occupy space for parameter-passing. I'm hoping for a 3915 // clarification giving an explicit paragraph to point to in future. 3916 return tryUseRegs(Ty, FreeIntRegs, /*RegsNeeded=*/ 1, /*IsInt=*/ true, 3917 llvm::Type::getInt8Ty(getVMContext())); 3918 } 3919 3920 // Homogeneous vector aggregates get passed in registers or on the stack. 3921 const Type *Base = 0; 3922 uint64_t NumMembers = 0; 3923 if (isHomogeneousAggregate(Ty, Base, getContext(), &NumMembers)) { 3924 assert(Base && "Base class should be set for homogeneous aggregate"); 3925 // Homogeneous aggregates are passed and returned directly. 3926 return tryUseRegs(Ty, FreeVFPRegs, /*RegsNeeded=*/ NumMembers, 3927 /*IsInt=*/ false); 3928 } 3929 3930 uint64_t Size = getContext().getTypeSize(Ty); 3931 if (Size <= 128) { 3932 // Small structs can use the same direct type whether they're in registers 3933 // or on the stack. 3934 llvm::Type *BaseTy; 3935 unsigned NumBases; 3936 int SizeInRegs = (Size + 63) / 64; 3937 3938 if (getContext().getTypeAlign(Ty) == 128) { 3939 BaseTy = llvm::Type::getIntNTy(getVMContext(), 128); 3940 NumBases = 1; 3941 3942 // If the type may need padding registers to ensure "alignment", we must 3943 // be careful when this is accounted for. Increasing the effective size 3944 // covers all cases. 3945 SizeInRegs += FreeIntRegs % 2 != 0; 3946 } else { 3947 BaseTy = llvm::Type::getInt64Ty(getVMContext()); 3948 NumBases = SizeInRegs; 3949 } 3950 llvm::Type *DirectTy = llvm::ArrayType::get(BaseTy, NumBases); 3951 3952 return tryUseRegs(Ty, FreeIntRegs, /*RegsNeeded=*/ SizeInRegs, 3953 /*IsInt=*/ true, DirectTy); 3954 } 3955 3956 // If the aggregate is > 16 bytes, it's passed and returned indirectly. In 3957 // LLVM terms the return uses an "sret" pointer, but that's handled elsewhere. 3958 --FreeIntRegs; 3959 return ABIArgInfo::getIndirect(0, /* byVal = */ false); 3960} 3961 3962llvm::Value *AArch64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3963 CodeGenFunction &CGF) const { 3964 // The AArch64 va_list type and handling is specified in the Procedure Call 3965 // Standard, section B.4: 3966 // 3967 // struct { 3968 // void *__stack; 3969 // void *__gr_top; 3970 // void *__vr_top; 3971 // int __gr_offs; 3972 // int __vr_offs; 3973 // }; 3974 3975 assert(!CGF.CGM.getDataLayout().isBigEndian() 3976 && "va_arg not implemented for big-endian AArch64"); 3977 3978 int FreeIntRegs = 8, FreeVFPRegs = 8; 3979 Ty = CGF.getContext().getCanonicalType(Ty); 3980 ABIArgInfo AI = classifyGenericType(Ty, FreeIntRegs, FreeVFPRegs); 3981 3982 llvm::BasicBlock *MaybeRegBlock = CGF.createBasicBlock("vaarg.maybe_reg"); 3983 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 3984 llvm::BasicBlock *OnStackBlock = CGF.createBasicBlock("vaarg.on_stack"); 3985 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 3986 3987 llvm::Value *reg_offs_p = 0, *reg_offs = 0; 3988 int reg_top_index; 3989 int RegSize; 3990 if (FreeIntRegs < 8) { 3991 assert(FreeVFPRegs == 8 && "Arguments never split between int & VFP regs"); 3992 // 3 is the field number of __gr_offs 3993 reg_offs_p = CGF.Builder.CreateStructGEP(VAListAddr, 3, "gr_offs_p"); 3994 reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "gr_offs"); 3995 reg_top_index = 1; // field number for __gr_top 3996 RegSize = 8 * (8 - FreeIntRegs); 3997 } else { 3998 assert(FreeVFPRegs < 8 && "Argument must go in VFP or int regs"); 3999 // 4 is the field number of __vr_offs. 4000 reg_offs_p = CGF.Builder.CreateStructGEP(VAListAddr, 4, "vr_offs_p"); 4001 reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "vr_offs"); 4002 reg_top_index = 2; // field number for __vr_top 4003 RegSize = 16 * (8 - FreeVFPRegs); 4004 } 4005 4006 //======================================= 4007 // Find out where argument was passed 4008 //======================================= 4009 4010 // If reg_offs >= 0 we're already using the stack for this type of 4011 // argument. We don't want to keep updating reg_offs (in case it overflows, 4012 // though anyone passing 2GB of arguments, each at most 16 bytes, deserves 4013 // whatever they get). 4014 llvm::Value *UsingStack = 0; 4015 UsingStack = CGF.Builder.CreateICmpSGE(reg_offs, 4016 llvm::ConstantInt::get(CGF.Int32Ty, 0)); 4017 4018 CGF.Builder.CreateCondBr(UsingStack, OnStackBlock, MaybeRegBlock); 4019 4020 // Otherwise, at least some kind of argument could go in these registers, the 4021 // quesiton is whether this particular type is too big. 4022 CGF.EmitBlock(MaybeRegBlock); 4023 4024 // Integer arguments may need to correct register alignment (for example a 4025 // "struct { __int128 a; };" gets passed in x_2N, x_{2N+1}). In this case we 4026 // align __gr_offs to calculate the potential address. 4027 if (FreeIntRegs < 8 && AI.isDirect() && getContext().getTypeAlign(Ty) > 64) { 4028 int Align = getContext().getTypeAlign(Ty) / 8; 4029 4030 reg_offs = CGF.Builder.CreateAdd(reg_offs, 4031 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1), 4032 "align_regoffs"); 4033 reg_offs = CGF.Builder.CreateAnd(reg_offs, 4034 llvm::ConstantInt::get(CGF.Int32Ty, -Align), 4035 "aligned_regoffs"); 4036 } 4037 4038 // Update the gr_offs/vr_offs pointer for next call to va_arg on this va_list. 4039 llvm::Value *NewOffset = 0; 4040 NewOffset = CGF.Builder.CreateAdd(reg_offs, 4041 llvm::ConstantInt::get(CGF.Int32Ty, RegSize), 4042 "new_reg_offs"); 4043 CGF.Builder.CreateStore(NewOffset, reg_offs_p); 4044 4045 // Now we're in a position to decide whether this argument really was in 4046 // registers or not. 4047 llvm::Value *InRegs = 0; 4048 InRegs = CGF.Builder.CreateICmpSLE(NewOffset, 4049 llvm::ConstantInt::get(CGF.Int32Ty, 0), 4050 "inreg"); 4051 4052 CGF.Builder.CreateCondBr(InRegs, InRegBlock, OnStackBlock); 4053 4054 //======================================= 4055 // Argument was in registers 4056 //======================================= 4057 4058 // Now we emit the code for if the argument was originally passed in 4059 // registers. First start the appropriate block: 4060 CGF.EmitBlock(InRegBlock); 4061 4062 llvm::Value *reg_top_p = 0, *reg_top = 0; 4063 reg_top_p = CGF.Builder.CreateStructGEP(VAListAddr, reg_top_index, "reg_top_p"); 4064 reg_top = CGF.Builder.CreateLoad(reg_top_p, "reg_top"); 4065 llvm::Value *BaseAddr = CGF.Builder.CreateGEP(reg_top, reg_offs); 4066 llvm::Value *RegAddr = 0; 4067 llvm::Type *MemTy = llvm::PointerType::getUnqual(CGF.ConvertTypeForMem(Ty)); 4068 4069 if (!AI.isDirect()) { 4070 // If it's been passed indirectly (actually a struct), whatever we find from 4071 // stored registers or on the stack will actually be a struct **. 4072 MemTy = llvm::PointerType::getUnqual(MemTy); 4073 } 4074 4075 const Type *Base = 0; 4076 uint64_t NumMembers; 4077 if (isHomogeneousAggregate(Ty, Base, getContext(), &NumMembers) 4078 && NumMembers > 1) { 4079 // Homogeneous aggregates passed in registers will have their elements split 4080 // and stored 16-bytes apart regardless of size (they're notionally in qN, 4081 // qN+1, ...). We reload and store into a temporary local variable 4082 // contiguously. 4083 assert(AI.isDirect() && "Homogeneous aggregates should be passed directly"); 4084 llvm::Type *BaseTy = CGF.ConvertType(QualType(Base, 0)); 4085 llvm::Type *HFATy = llvm::ArrayType::get(BaseTy, NumMembers); 4086 llvm::Value *Tmp = CGF.CreateTempAlloca(HFATy); 4087 4088 for (unsigned i = 0; i < NumMembers; ++i) { 4089 llvm::Value *BaseOffset = llvm::ConstantInt::get(CGF.Int32Ty, 16 * i); 4090 llvm::Value *LoadAddr = CGF.Builder.CreateGEP(BaseAddr, BaseOffset); 4091 LoadAddr = CGF.Builder.CreateBitCast(LoadAddr, 4092 llvm::PointerType::getUnqual(BaseTy)); 4093 llvm::Value *StoreAddr = CGF.Builder.CreateStructGEP(Tmp, i); 4094 4095 llvm::Value *Elem = CGF.Builder.CreateLoad(LoadAddr); 4096 CGF.Builder.CreateStore(Elem, StoreAddr); 4097 } 4098 4099 RegAddr = CGF.Builder.CreateBitCast(Tmp, MemTy); 4100 } else { 4101 // Otherwise the object is contiguous in memory 4102 RegAddr = CGF.Builder.CreateBitCast(BaseAddr, MemTy); 4103 } 4104 4105 CGF.EmitBranch(ContBlock); 4106 4107 //======================================= 4108 // Argument was on the stack 4109 //======================================= 4110 CGF.EmitBlock(OnStackBlock); 4111 4112 llvm::Value *stack_p = 0, *OnStackAddr = 0; 4113 stack_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "stack_p"); 4114 OnStackAddr = CGF.Builder.CreateLoad(stack_p, "stack"); 4115 4116 // Again, stack arguments may need realigmnent. In this case both integer and 4117 // floating-point ones might be affected. 4118 if (AI.isDirect() && getContext().getTypeAlign(Ty) > 64) { 4119 int Align = getContext().getTypeAlign(Ty) / 8; 4120 4121 OnStackAddr = CGF.Builder.CreatePtrToInt(OnStackAddr, CGF.Int64Ty); 4122 4123 OnStackAddr = CGF.Builder.CreateAdd(OnStackAddr, 4124 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1), 4125 "align_stack"); 4126 OnStackAddr = CGF.Builder.CreateAnd(OnStackAddr, 4127 llvm::ConstantInt::get(CGF.Int64Ty, -Align), 4128 "align_stack"); 4129 4130 OnStackAddr = CGF.Builder.CreateIntToPtr(OnStackAddr, CGF.Int8PtrTy); 4131 } 4132 4133 uint64_t StackSize; 4134 if (AI.isDirect()) 4135 StackSize = getContext().getTypeSize(Ty) / 8; 4136 else 4137 StackSize = 8; 4138 4139 // All stack slots are 8 bytes 4140 StackSize = llvm::RoundUpToAlignment(StackSize, 8); 4141 4142 llvm::Value *StackSizeC = llvm::ConstantInt::get(CGF.Int32Ty, StackSize); 4143 llvm::Value *NewStack = CGF.Builder.CreateGEP(OnStackAddr, StackSizeC, 4144 "new_stack"); 4145 4146 // Write the new value of __stack for the next call to va_arg 4147 CGF.Builder.CreateStore(NewStack, stack_p); 4148 4149 OnStackAddr = CGF.Builder.CreateBitCast(OnStackAddr, MemTy); 4150 4151 CGF.EmitBranch(ContBlock); 4152 4153 //======================================= 4154 // Tidy up 4155 //======================================= 4156 CGF.EmitBlock(ContBlock); 4157 4158 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(MemTy, 2, "vaarg.addr"); 4159 ResAddr->addIncoming(RegAddr, InRegBlock); 4160 ResAddr->addIncoming(OnStackAddr, OnStackBlock); 4161 4162 if (AI.isDirect()) 4163 return ResAddr; 4164 4165 return CGF.Builder.CreateLoad(ResAddr, "vaarg.addr"); 4166} 4167 4168//===----------------------------------------------------------------------===// 4169// NVPTX ABI Implementation 4170//===----------------------------------------------------------------------===// 4171 4172namespace { 4173 4174class NVPTXABIInfo : public ABIInfo { 4175public: 4176 NVPTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 4177 4178 ABIArgInfo classifyReturnType(QualType RetTy) const; 4179 ABIArgInfo classifyArgumentType(QualType Ty) const; 4180 4181 virtual void computeInfo(CGFunctionInfo &FI) const; 4182 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4183 CodeGenFunction &CFG) const; 4184}; 4185 4186class NVPTXTargetCodeGenInfo : public TargetCodeGenInfo { 4187public: 4188 NVPTXTargetCodeGenInfo(CodeGenTypes &CGT) 4189 : TargetCodeGenInfo(new NVPTXABIInfo(CGT)) {} 4190 4191 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4192 CodeGen::CodeGenModule &M) const; 4193private: 4194 static void addKernelMetadata(llvm::Function *F); 4195}; 4196 4197ABIArgInfo NVPTXABIInfo::classifyReturnType(QualType RetTy) const { 4198 if (RetTy->isVoidType()) 4199 return ABIArgInfo::getIgnore(); 4200 4201 // note: this is different from default ABI 4202 if (!RetTy->isScalarType()) 4203 return ABIArgInfo::getDirect(); 4204 4205 // Treat an enum type as its underlying type. 4206 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 4207 RetTy = EnumTy->getDecl()->getIntegerType(); 4208 4209 return (RetTy->isPromotableIntegerType() ? 4210 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4211} 4212 4213ABIArgInfo NVPTXABIInfo::classifyArgumentType(QualType Ty) const { 4214 // Treat an enum type as its underlying type. 4215 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 4216 Ty = EnumTy->getDecl()->getIntegerType(); 4217 4218 return (Ty->isPromotableIntegerType() ? 4219 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4220} 4221 4222void NVPTXABIInfo::computeInfo(CGFunctionInfo &FI) const { 4223 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 4224 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4225 it != ie; ++it) 4226 it->info = classifyArgumentType(it->type); 4227 4228 // Always honor user-specified calling convention. 4229 if (FI.getCallingConvention() != llvm::CallingConv::C) 4230 return; 4231 4232 FI.setEffectiveCallingConvention(getRuntimeCC()); 4233} 4234 4235llvm::Value *NVPTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4236 CodeGenFunction &CFG) const { 4237 llvm_unreachable("NVPTX does not support varargs"); 4238} 4239 4240void NVPTXTargetCodeGenInfo:: 4241SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4242 CodeGen::CodeGenModule &M) const{ 4243 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4244 if (!FD) return; 4245 4246 llvm::Function *F = cast<llvm::Function>(GV); 4247 4248 // Perform special handling in OpenCL mode 4249 if (M.getLangOpts().OpenCL) { 4250 // Use OpenCL function attributes to check for kernel functions 4251 // By default, all functions are device functions 4252 if (FD->hasAttr<OpenCLKernelAttr>()) { 4253 // OpenCL __kernel functions get kernel metadata 4254 addKernelMetadata(F); 4255 // And kernel functions are not subject to inlining 4256 F->addFnAttr(llvm::Attribute::NoInline); 4257 } 4258 } 4259 4260 // Perform special handling in CUDA mode. 4261 if (M.getLangOpts().CUDA) { 4262 // CUDA __global__ functions get a kernel metadata entry. Since 4263 // __global__ functions cannot be called from the device, we do not 4264 // need to set the noinline attribute. 4265 if (FD->getAttr<CUDAGlobalAttr>()) 4266 addKernelMetadata(F); 4267 } 4268} 4269 4270void NVPTXTargetCodeGenInfo::addKernelMetadata(llvm::Function *F) { 4271 llvm::Module *M = F->getParent(); 4272 llvm::LLVMContext &Ctx = M->getContext(); 4273 4274 // Get "nvvm.annotations" metadata node 4275 llvm::NamedMDNode *MD = M->getOrInsertNamedMetadata("nvvm.annotations"); 4276 4277 // Create !{<func-ref>, metadata !"kernel", i32 1} node 4278 llvm::SmallVector<llvm::Value *, 3> MDVals; 4279 MDVals.push_back(F); 4280 MDVals.push_back(llvm::MDString::get(Ctx, "kernel")); 4281 MDVals.push_back(llvm::ConstantInt::get(llvm::Type::getInt32Ty(Ctx), 1)); 4282 4283 // Append metadata to nvvm.annotations 4284 MD->addOperand(llvm::MDNode::get(Ctx, MDVals)); 4285} 4286 4287} 4288 4289//===----------------------------------------------------------------------===// 4290// SystemZ ABI Implementation 4291//===----------------------------------------------------------------------===// 4292 4293namespace { 4294 4295class SystemZABIInfo : public ABIInfo { 4296public: 4297 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 4298 4299 bool isPromotableIntegerType(QualType Ty) const; 4300 bool isCompoundType(QualType Ty) const; 4301 bool isFPArgumentType(QualType Ty) const; 4302 4303 ABIArgInfo classifyReturnType(QualType RetTy) const; 4304 ABIArgInfo classifyArgumentType(QualType ArgTy) const; 4305 4306 virtual void computeInfo(CGFunctionInfo &FI) const { 4307 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 4308 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4309 it != ie; ++it) 4310 it->info = classifyArgumentType(it->type); 4311 } 4312 4313 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4314 CodeGenFunction &CGF) const; 4315}; 4316 4317class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 4318public: 4319 SystemZTargetCodeGenInfo(CodeGenTypes &CGT) 4320 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {} 4321}; 4322 4323} 4324 4325bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 4326 // Treat an enum type as its underlying type. 4327 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 4328 Ty = EnumTy->getDecl()->getIntegerType(); 4329 4330 // Promotable integer types are required to be promoted by the ABI. 4331 if (Ty->isPromotableIntegerType()) 4332 return true; 4333 4334 // 32-bit values must also be promoted. 4335 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 4336 switch (BT->getKind()) { 4337 case BuiltinType::Int: 4338 case BuiltinType::UInt: 4339 return true; 4340 default: 4341 return false; 4342 } 4343 return false; 4344} 4345 4346bool SystemZABIInfo::isCompoundType(QualType Ty) const { 4347 return Ty->isAnyComplexType() || isAggregateTypeForABI(Ty); 4348} 4349 4350bool SystemZABIInfo::isFPArgumentType(QualType Ty) const { 4351 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 4352 switch (BT->getKind()) { 4353 case BuiltinType::Float: 4354 case BuiltinType::Double: 4355 return true; 4356 default: 4357 return false; 4358 } 4359 4360 if (const RecordType *RT = Ty->getAsStructureType()) { 4361 const RecordDecl *RD = RT->getDecl(); 4362 bool Found = false; 4363 4364 // If this is a C++ record, check the bases first. 4365 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 4366 for (CXXRecordDecl::base_class_const_iterator I = CXXRD->bases_begin(), 4367 E = CXXRD->bases_end(); I != E; ++I) { 4368 QualType Base = I->getType(); 4369 4370 // Empty bases don't affect things either way. 4371 if (isEmptyRecord(getContext(), Base, true)) 4372 continue; 4373 4374 if (Found) 4375 return false; 4376 Found = isFPArgumentType(Base); 4377 if (!Found) 4378 return false; 4379 } 4380 4381 // Check the fields. 4382 for (RecordDecl::field_iterator I = RD->field_begin(), 4383 E = RD->field_end(); I != E; ++I) { 4384 const FieldDecl *FD = *I; 4385 4386 // Empty bitfields don't affect things either way. 4387 // Unlike isSingleElementStruct(), empty structure and array fields 4388 // do count. So do anonymous bitfields that aren't zero-sized. 4389 if (FD->isBitField() && FD->getBitWidthValue(getContext()) == 0) 4390 return true; 4391 4392 // Unlike isSingleElementStruct(), arrays do not count. 4393 // Nested isFPArgumentType structures still do though. 4394 if (Found) 4395 return false; 4396 Found = isFPArgumentType(FD->getType()); 4397 if (!Found) 4398 return false; 4399 } 4400 4401 // Unlike isSingleElementStruct(), trailing padding is allowed. 4402 // An 8-byte aligned struct s { float f; } is passed as a double. 4403 return Found; 4404 } 4405 4406 return false; 4407} 4408 4409llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4410 CodeGenFunction &CGF) const { 4411 // Assume that va_list type is correct; should be pointer to LLVM type: 4412 // struct { 4413 // i64 __gpr; 4414 // i64 __fpr; 4415 // i8 *__overflow_arg_area; 4416 // i8 *__reg_save_area; 4417 // }; 4418 4419 // Every argument occupies 8 bytes and is passed by preference in either 4420 // GPRs or FPRs. 4421 Ty = CGF.getContext().getCanonicalType(Ty); 4422 ABIArgInfo AI = classifyArgumentType(Ty); 4423 bool InFPRs = isFPArgumentType(Ty); 4424 4425 llvm::Type *APTy = llvm::PointerType::getUnqual(CGF.ConvertTypeForMem(Ty)); 4426 bool IsIndirect = AI.isIndirect(); 4427 unsigned UnpaddedBitSize; 4428 if (IsIndirect) { 4429 APTy = llvm::PointerType::getUnqual(APTy); 4430 UnpaddedBitSize = 64; 4431 } else 4432 UnpaddedBitSize = getContext().getTypeSize(Ty); 4433 unsigned PaddedBitSize = 64; 4434 assert((UnpaddedBitSize <= PaddedBitSize) && "Invalid argument size."); 4435 4436 unsigned PaddedSize = PaddedBitSize / 8; 4437 unsigned Padding = (PaddedBitSize - UnpaddedBitSize) / 8; 4438 4439 unsigned MaxRegs, RegCountField, RegSaveIndex, RegPadding; 4440 if (InFPRs) { 4441 MaxRegs = 4; // Maximum of 4 FPR arguments 4442 RegCountField = 1; // __fpr 4443 RegSaveIndex = 16; // save offset for f0 4444 RegPadding = 0; // floats are passed in the high bits of an FPR 4445 } else { 4446 MaxRegs = 5; // Maximum of 5 GPR arguments 4447 RegCountField = 0; // __gpr 4448 RegSaveIndex = 2; // save offset for r2 4449 RegPadding = Padding; // values are passed in the low bits of a GPR 4450 } 4451 4452 llvm::Value *RegCountPtr = 4453 CGF.Builder.CreateStructGEP(VAListAddr, RegCountField, "reg_count_ptr"); 4454 llvm::Value *RegCount = CGF.Builder.CreateLoad(RegCountPtr, "reg_count"); 4455 llvm::Type *IndexTy = RegCount->getType(); 4456 llvm::Value *MaxRegsV = llvm::ConstantInt::get(IndexTy, MaxRegs); 4457 llvm::Value *InRegs = CGF.Builder.CreateICmpULT(RegCount, MaxRegsV, 4458 "fits_in_regs"); 4459 4460 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 4461 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 4462 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 4463 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 4464 4465 // Emit code to load the value if it was passed in registers. 4466 CGF.EmitBlock(InRegBlock); 4467 4468 // Work out the address of an argument register. 4469 llvm::Value *PaddedSizeV = llvm::ConstantInt::get(IndexTy, PaddedSize); 4470 llvm::Value *ScaledRegCount = 4471 CGF.Builder.CreateMul(RegCount, PaddedSizeV, "scaled_reg_count"); 4472 llvm::Value *RegBase = 4473 llvm::ConstantInt::get(IndexTy, RegSaveIndex * PaddedSize + RegPadding); 4474 llvm::Value *RegOffset = 4475 CGF.Builder.CreateAdd(ScaledRegCount, RegBase, "reg_offset"); 4476 llvm::Value *RegSaveAreaPtr = 4477 CGF.Builder.CreateStructGEP(VAListAddr, 3, "reg_save_area_ptr"); 4478 llvm::Value *RegSaveArea = 4479 CGF.Builder.CreateLoad(RegSaveAreaPtr, "reg_save_area"); 4480 llvm::Value *RawRegAddr = 4481 CGF.Builder.CreateGEP(RegSaveArea, RegOffset, "raw_reg_addr"); 4482 llvm::Value *RegAddr = 4483 CGF.Builder.CreateBitCast(RawRegAddr, APTy, "reg_addr"); 4484 4485 // Update the register count 4486 llvm::Value *One = llvm::ConstantInt::get(IndexTy, 1); 4487 llvm::Value *NewRegCount = 4488 CGF.Builder.CreateAdd(RegCount, One, "reg_count"); 4489 CGF.Builder.CreateStore(NewRegCount, RegCountPtr); 4490 CGF.EmitBranch(ContBlock); 4491 4492 // Emit code to load the value if it was passed in memory. 4493 CGF.EmitBlock(InMemBlock); 4494 4495 // Work out the address of a stack argument. 4496 llvm::Value *OverflowArgAreaPtr = 4497 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_ptr"); 4498 llvm::Value *OverflowArgArea = 4499 CGF.Builder.CreateLoad(OverflowArgAreaPtr, "overflow_arg_area"); 4500 llvm::Value *PaddingV = llvm::ConstantInt::get(IndexTy, Padding); 4501 llvm::Value *RawMemAddr = 4502 CGF.Builder.CreateGEP(OverflowArgArea, PaddingV, "raw_mem_addr"); 4503 llvm::Value *MemAddr = 4504 CGF.Builder.CreateBitCast(RawMemAddr, APTy, "mem_addr"); 4505 4506 // Update overflow_arg_area_ptr pointer 4507 llvm::Value *NewOverflowArgArea = 4508 CGF.Builder.CreateGEP(OverflowArgArea, PaddedSizeV, "overflow_arg_area"); 4509 CGF.Builder.CreateStore(NewOverflowArgArea, OverflowArgAreaPtr); 4510 CGF.EmitBranch(ContBlock); 4511 4512 // Return the appropriate result. 4513 CGF.EmitBlock(ContBlock); 4514 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(APTy, 2, "va_arg.addr"); 4515 ResAddr->addIncoming(RegAddr, InRegBlock); 4516 ResAddr->addIncoming(MemAddr, InMemBlock); 4517 4518 if (IsIndirect) 4519 return CGF.Builder.CreateLoad(ResAddr, "indirect_arg"); 4520 4521 return ResAddr; 4522} 4523 4524bool X86_32TargetCodeGenInfo::isStructReturnInRegABI( 4525 const llvm::Triple &Triple, const CodeGenOptions &Opts) { 4526 assert(Triple.getArch() == llvm::Triple::x86); 4527 4528 switch (Opts.getStructReturnConvention()) { 4529 case CodeGenOptions::SRCK_Default: 4530 break; 4531 case CodeGenOptions::SRCK_OnStack: // -fpcc-struct-return 4532 return false; 4533 case CodeGenOptions::SRCK_InRegs: // -freg-struct-return 4534 return true; 4535 } 4536 4537 if (Triple.isOSDarwin()) 4538 return true; 4539 4540 switch (Triple.getOS()) { 4541 case llvm::Triple::Cygwin: 4542 case llvm::Triple::MinGW32: 4543 case llvm::Triple::AuroraUX: 4544 case llvm::Triple::DragonFly: 4545 case llvm::Triple::FreeBSD: 4546 case llvm::Triple::OpenBSD: 4547 case llvm::Triple::Bitrig: 4548 case llvm::Triple::Win32: 4549 return true; 4550 default: 4551 return false; 4552 } 4553} 4554 4555ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const { 4556 if (RetTy->isVoidType()) 4557 return ABIArgInfo::getIgnore(); 4558 if (isCompoundType(RetTy) || getContext().getTypeSize(RetTy) > 64) 4559 return ABIArgInfo::getIndirect(0); 4560 return (isPromotableIntegerType(RetTy) ? 4561 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4562} 4563 4564ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const { 4565 // Handle the generic C++ ABI. 4566 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) 4567 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 4568 4569 // Integers and enums are extended to full register width. 4570 if (isPromotableIntegerType(Ty)) 4571 return ABIArgInfo::getExtend(); 4572 4573 // Values that are not 1, 2, 4 or 8 bytes in size are passed indirectly. 4574 uint64_t Size = getContext().getTypeSize(Ty); 4575 if (Size != 8 && Size != 16 && Size != 32 && Size != 64) 4576 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 4577 4578 // Handle small structures. 4579 if (const RecordType *RT = Ty->getAs<RecordType>()) { 4580 // Structures with flexible arrays have variable length, so really 4581 // fail the size test above. 4582 const RecordDecl *RD = RT->getDecl(); 4583 if (RD->hasFlexibleArrayMember()) 4584 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 4585 4586 // The structure is passed as an unextended integer, a float, or a double. 4587 llvm::Type *PassTy; 4588 if (isFPArgumentType(Ty)) { 4589 assert(Size == 32 || Size == 64); 4590 if (Size == 32) 4591 PassTy = llvm::Type::getFloatTy(getVMContext()); 4592 else 4593 PassTy = llvm::Type::getDoubleTy(getVMContext()); 4594 } else 4595 PassTy = llvm::IntegerType::get(getVMContext(), Size); 4596 return ABIArgInfo::getDirect(PassTy); 4597 } 4598 4599 // Non-structure compounds are passed indirectly. 4600 if (isCompoundType(Ty)) 4601 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 4602 4603 return ABIArgInfo::getDirect(0); 4604} 4605 4606//===----------------------------------------------------------------------===// 4607// MSP430 ABI Implementation 4608//===----------------------------------------------------------------------===// 4609 4610namespace { 4611 4612class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 4613public: 4614 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 4615 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 4616 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4617 CodeGen::CodeGenModule &M) const; 4618}; 4619 4620} 4621 4622void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 4623 llvm::GlobalValue *GV, 4624 CodeGen::CodeGenModule &M) const { 4625 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 4626 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 4627 // Handle 'interrupt' attribute: 4628 llvm::Function *F = cast<llvm::Function>(GV); 4629 4630 // Step 1: Set ISR calling convention. 4631 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 4632 4633 // Step 2: Add attributes goodness. 4634 F->addFnAttr(llvm::Attribute::NoInline); 4635 4636 // Step 3: Emit ISR vector alias. 4637 unsigned Num = attr->getNumber() / 2; 4638 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 4639 "__isr_" + Twine(Num), 4640 GV, &M.getModule()); 4641 } 4642 } 4643} 4644 4645//===----------------------------------------------------------------------===// 4646// MIPS ABI Implementation. This works for both little-endian and 4647// big-endian variants. 4648//===----------------------------------------------------------------------===// 4649 4650namespace { 4651class MipsABIInfo : public ABIInfo { 4652 bool IsO32; 4653 unsigned MinABIStackAlignInBytes, StackAlignInBytes; 4654 void CoerceToIntArgs(uint64_t TySize, 4655 SmallVectorImpl<llvm::Type *> &ArgList) const; 4656 llvm::Type* HandleAggregates(QualType Ty, uint64_t TySize) const; 4657 llvm::Type* returnAggregateInRegs(QualType RetTy, uint64_t Size) const; 4658 llvm::Type* getPaddingType(uint64_t Align, uint64_t Offset) const; 4659public: 4660 MipsABIInfo(CodeGenTypes &CGT, bool _IsO32) : 4661 ABIInfo(CGT), IsO32(_IsO32), MinABIStackAlignInBytes(IsO32 ? 4 : 8), 4662 StackAlignInBytes(IsO32 ? 8 : 16) {} 4663 4664 ABIArgInfo classifyReturnType(QualType RetTy) const; 4665 ABIArgInfo classifyArgumentType(QualType RetTy, uint64_t &Offset) const; 4666 virtual void computeInfo(CGFunctionInfo &FI) const; 4667 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4668 CodeGenFunction &CGF) const; 4669}; 4670 4671class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 4672 unsigned SizeOfUnwindException; 4673public: 4674 MIPSTargetCodeGenInfo(CodeGenTypes &CGT, bool IsO32) 4675 : TargetCodeGenInfo(new MipsABIInfo(CGT, IsO32)), 4676 SizeOfUnwindException(IsO32 ? 24 : 32) {} 4677 4678 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 4679 return 29; 4680 } 4681 4682 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4683 CodeGen::CodeGenModule &CGM) const { 4684 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4685 if (!FD) return; 4686 llvm::Function *Fn = cast<llvm::Function>(GV); 4687 if (FD->hasAttr<Mips16Attr>()) { 4688 Fn->addFnAttr("mips16"); 4689 } 4690 else if (FD->hasAttr<NoMips16Attr>()) { 4691 Fn->addFnAttr("nomips16"); 4692 } 4693 } 4694 4695 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 4696 llvm::Value *Address) const; 4697 4698 unsigned getSizeOfUnwindException() const { 4699 return SizeOfUnwindException; 4700 } 4701}; 4702} 4703 4704void MipsABIInfo::CoerceToIntArgs(uint64_t TySize, 4705 SmallVectorImpl<llvm::Type *> &ArgList) const { 4706 llvm::IntegerType *IntTy = 4707 llvm::IntegerType::get(getVMContext(), MinABIStackAlignInBytes * 8); 4708 4709 // Add (TySize / MinABIStackAlignInBytes) args of IntTy. 4710 for (unsigned N = TySize / (MinABIStackAlignInBytes * 8); N; --N) 4711 ArgList.push_back(IntTy); 4712 4713 // If necessary, add one more integer type to ArgList. 4714 unsigned R = TySize % (MinABIStackAlignInBytes * 8); 4715 4716 if (R) 4717 ArgList.push_back(llvm::IntegerType::get(getVMContext(), R)); 4718} 4719 4720// In N32/64, an aligned double precision floating point field is passed in 4721// a register. 4722llvm::Type* MipsABIInfo::HandleAggregates(QualType Ty, uint64_t TySize) const { 4723 SmallVector<llvm::Type*, 8> ArgList, IntArgList; 4724 4725 if (IsO32) { 4726 CoerceToIntArgs(TySize, ArgList); 4727 return llvm::StructType::get(getVMContext(), ArgList); 4728 } 4729 4730 if (Ty->isComplexType()) 4731 return CGT.ConvertType(Ty); 4732 4733 const RecordType *RT = Ty->getAs<RecordType>(); 4734 4735 // Unions/vectors are passed in integer registers. 4736 if (!RT || !RT->isStructureOrClassType()) { 4737 CoerceToIntArgs(TySize, ArgList); 4738 return llvm::StructType::get(getVMContext(), ArgList); 4739 } 4740 4741 const RecordDecl *RD = RT->getDecl(); 4742 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 4743 assert(!(TySize % 8) && "Size of structure must be multiple of 8."); 4744 4745 uint64_t LastOffset = 0; 4746 unsigned idx = 0; 4747 llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64); 4748 4749 // Iterate over fields in the struct/class and check if there are any aligned 4750 // double fields. 4751 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 4752 i != e; ++i, ++idx) { 4753 const QualType Ty = i->getType(); 4754 const BuiltinType *BT = Ty->getAs<BuiltinType>(); 4755 4756 if (!BT || BT->getKind() != BuiltinType::Double) 4757 continue; 4758 4759 uint64_t Offset = Layout.getFieldOffset(idx); 4760 if (Offset % 64) // Ignore doubles that are not aligned. 4761 continue; 4762 4763 // Add ((Offset - LastOffset) / 64) args of type i64. 4764 for (unsigned j = (Offset - LastOffset) / 64; j > 0; --j) 4765 ArgList.push_back(I64); 4766 4767 // Add double type. 4768 ArgList.push_back(llvm::Type::getDoubleTy(getVMContext())); 4769 LastOffset = Offset + 64; 4770 } 4771 4772 CoerceToIntArgs(TySize - LastOffset, IntArgList); 4773 ArgList.append(IntArgList.begin(), IntArgList.end()); 4774 4775 return llvm::StructType::get(getVMContext(), ArgList); 4776} 4777 4778llvm::Type *MipsABIInfo::getPaddingType(uint64_t OrigOffset, 4779 uint64_t Offset) const { 4780 if (OrigOffset + MinABIStackAlignInBytes > Offset) 4781 return 0; 4782 4783 return llvm::IntegerType::get(getVMContext(), (Offset - OrigOffset) * 8); 4784} 4785 4786ABIArgInfo 4787MipsABIInfo::classifyArgumentType(QualType Ty, uint64_t &Offset) const { 4788 uint64_t OrigOffset = Offset; 4789 uint64_t TySize = getContext().getTypeSize(Ty); 4790 uint64_t Align = getContext().getTypeAlign(Ty) / 8; 4791 4792 Align = std::min(std::max(Align, (uint64_t)MinABIStackAlignInBytes), 4793 (uint64_t)StackAlignInBytes); 4794 unsigned CurrOffset = llvm::RoundUpToAlignment(Offset, Align); 4795 Offset = CurrOffset + llvm::RoundUpToAlignment(TySize, Align * 8) / 8; 4796 4797 if (isAggregateTypeForABI(Ty) || Ty->isVectorType()) { 4798 // Ignore empty aggregates. 4799 if (TySize == 0) 4800 return ABIArgInfo::getIgnore(); 4801 4802 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) { 4803 Offset = OrigOffset + MinABIStackAlignInBytes; 4804 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 4805 } 4806 4807 // If we have reached here, aggregates are passed directly by coercing to 4808 // another structure type. Padding is inserted if the offset of the 4809 // aggregate is unaligned. 4810 return ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0, 4811 getPaddingType(OrigOffset, CurrOffset)); 4812 } 4813 4814 // Treat an enum type as its underlying type. 4815 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 4816 Ty = EnumTy->getDecl()->getIntegerType(); 4817 4818 if (Ty->isPromotableIntegerType()) 4819 return ABIArgInfo::getExtend(); 4820 4821 return ABIArgInfo::getDirect( 4822 0, 0, IsO32 ? 0 : getPaddingType(OrigOffset, CurrOffset)); 4823} 4824 4825llvm::Type* 4826MipsABIInfo::returnAggregateInRegs(QualType RetTy, uint64_t Size) const { 4827 const RecordType *RT = RetTy->getAs<RecordType>(); 4828 SmallVector<llvm::Type*, 8> RTList; 4829 4830 if (RT && RT->isStructureOrClassType()) { 4831 const RecordDecl *RD = RT->getDecl(); 4832 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 4833 unsigned FieldCnt = Layout.getFieldCount(); 4834 4835 // N32/64 returns struct/classes in floating point registers if the 4836 // following conditions are met: 4837 // 1. The size of the struct/class is no larger than 128-bit. 4838 // 2. The struct/class has one or two fields all of which are floating 4839 // point types. 4840 // 3. The offset of the first field is zero (this follows what gcc does). 4841 // 4842 // Any other composite results are returned in integer registers. 4843 // 4844 if (FieldCnt && (FieldCnt <= 2) && !Layout.getFieldOffset(0)) { 4845 RecordDecl::field_iterator b = RD->field_begin(), e = RD->field_end(); 4846 for (; b != e; ++b) { 4847 const BuiltinType *BT = b->getType()->getAs<BuiltinType>(); 4848 4849 if (!BT || !BT->isFloatingPoint()) 4850 break; 4851 4852 RTList.push_back(CGT.ConvertType(b->getType())); 4853 } 4854 4855 if (b == e) 4856 return llvm::StructType::get(getVMContext(), RTList, 4857 RD->hasAttr<PackedAttr>()); 4858 4859 RTList.clear(); 4860 } 4861 } 4862 4863 CoerceToIntArgs(Size, RTList); 4864 return llvm::StructType::get(getVMContext(), RTList); 4865} 4866 4867ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const { 4868 uint64_t Size = getContext().getTypeSize(RetTy); 4869 4870 if (RetTy->isVoidType() || Size == 0) 4871 return ABIArgInfo::getIgnore(); 4872 4873 if (isAggregateTypeForABI(RetTy) || RetTy->isVectorType()) { 4874 if (isRecordReturnIndirect(RetTy, getCXXABI())) 4875 return ABIArgInfo::getIndirect(0); 4876 4877 if (Size <= 128) { 4878 if (RetTy->isAnyComplexType()) 4879 return ABIArgInfo::getDirect(); 4880 4881 // O32 returns integer vectors in registers. 4882 if (IsO32 && RetTy->isVectorType() && !RetTy->hasFloatingRepresentation()) 4883 return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); 4884 4885 if (!IsO32) 4886 return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); 4887 } 4888 4889 return ABIArgInfo::getIndirect(0); 4890 } 4891 4892 // Treat an enum type as its underlying type. 4893 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 4894 RetTy = EnumTy->getDecl()->getIntegerType(); 4895 4896 return (RetTy->isPromotableIntegerType() ? 4897 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4898} 4899 4900void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const { 4901 ABIArgInfo &RetInfo = FI.getReturnInfo(); 4902 RetInfo = classifyReturnType(FI.getReturnType()); 4903 4904 // Check if a pointer to an aggregate is passed as a hidden argument. 4905 uint64_t Offset = RetInfo.isIndirect() ? MinABIStackAlignInBytes : 0; 4906 4907 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4908 it != ie; ++it) 4909 it->info = classifyArgumentType(it->type, Offset); 4910} 4911 4912llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4913 CodeGenFunction &CGF) const { 4914 llvm::Type *BP = CGF.Int8PtrTy; 4915 llvm::Type *BPP = CGF.Int8PtrPtrTy; 4916 4917 CGBuilderTy &Builder = CGF.Builder; 4918 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 4919 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 4920 int64_t TypeAlign = getContext().getTypeAlign(Ty) / 8; 4921 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 4922 llvm::Value *AddrTyped; 4923 unsigned PtrWidth = getTarget().getPointerWidth(0); 4924 llvm::IntegerType *IntTy = (PtrWidth == 32) ? CGF.Int32Ty : CGF.Int64Ty; 4925 4926 if (TypeAlign > MinABIStackAlignInBytes) { 4927 llvm::Value *AddrAsInt = CGF.Builder.CreatePtrToInt(Addr, IntTy); 4928 llvm::Value *Inc = llvm::ConstantInt::get(IntTy, TypeAlign - 1); 4929 llvm::Value *Mask = llvm::ConstantInt::get(IntTy, -TypeAlign); 4930 llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt, Inc); 4931 llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask); 4932 AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy); 4933 } 4934 else 4935 AddrTyped = Builder.CreateBitCast(Addr, PTy); 4936 4937 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP); 4938 TypeAlign = std::max((unsigned)TypeAlign, MinABIStackAlignInBytes); 4939 uint64_t Offset = 4940 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, TypeAlign); 4941 llvm::Value *NextAddr = 4942 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(IntTy, Offset), 4943 "ap.next"); 4944 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 4945 4946 return AddrTyped; 4947} 4948 4949bool 4950MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 4951 llvm::Value *Address) const { 4952 // This information comes from gcc's implementation, which seems to 4953 // as canonical as it gets. 4954 4955 // Everything on MIPS is 4 bytes. Double-precision FP registers 4956 // are aliased to pairs of single-precision FP registers. 4957 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 4958 4959 // 0-31 are the general purpose registers, $0 - $31. 4960 // 32-63 are the floating-point registers, $f0 - $f31. 4961 // 64 and 65 are the multiply/divide registers, $hi and $lo. 4962 // 66 is the (notional, I think) register for signal-handler return. 4963 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 65); 4964 4965 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 4966 // They are one bit wide and ignored here. 4967 4968 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 4969 // (coprocessor 1 is the FP unit) 4970 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 4971 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 4972 // 176-181 are the DSP accumulator registers. 4973 AssignToArrayRange(CGF.Builder, Address, Four8, 80, 181); 4974 return false; 4975} 4976 4977//===----------------------------------------------------------------------===// 4978// TCE ABI Implementation (see http://tce.cs.tut.fi). Uses mostly the defaults. 4979// Currently subclassed only to implement custom OpenCL C function attribute 4980// handling. 4981//===----------------------------------------------------------------------===// 4982 4983namespace { 4984 4985class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo { 4986public: 4987 TCETargetCodeGenInfo(CodeGenTypes &CGT) 4988 : DefaultTargetCodeGenInfo(CGT) {} 4989 4990 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4991 CodeGen::CodeGenModule &M) const; 4992}; 4993 4994void TCETargetCodeGenInfo::SetTargetAttributes(const Decl *D, 4995 llvm::GlobalValue *GV, 4996 CodeGen::CodeGenModule &M) const { 4997 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4998 if (!FD) return; 4999 5000 llvm::Function *F = cast<llvm::Function>(GV); 5001 5002 if (M.getLangOpts().OpenCL) { 5003 if (FD->hasAttr<OpenCLKernelAttr>()) { 5004 // OpenCL C Kernel functions are not subject to inlining 5005 F->addFnAttr(llvm::Attribute::NoInline); 5006 5007 if (FD->hasAttr<ReqdWorkGroupSizeAttr>()) { 5008 5009 // Convert the reqd_work_group_size() attributes to metadata. 5010 llvm::LLVMContext &Context = F->getContext(); 5011 llvm::NamedMDNode *OpenCLMetadata = 5012 M.getModule().getOrInsertNamedMetadata("opencl.kernel_wg_size_info"); 5013 5014 SmallVector<llvm::Value*, 5> Operands; 5015 Operands.push_back(F); 5016 5017 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 5018 llvm::APInt(32, 5019 FD->getAttr<ReqdWorkGroupSizeAttr>()->getXDim()))); 5020 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 5021 llvm::APInt(32, 5022 FD->getAttr<ReqdWorkGroupSizeAttr>()->getYDim()))); 5023 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 5024 llvm::APInt(32, 5025 FD->getAttr<ReqdWorkGroupSizeAttr>()->getZDim()))); 5026 5027 // Add a boolean constant operand for "required" (true) or "hint" (false) 5028 // for implementing the work_group_size_hint attr later. Currently 5029 // always true as the hint is not yet implemented. 5030 Operands.push_back(llvm::ConstantInt::getTrue(Context)); 5031 OpenCLMetadata->addOperand(llvm::MDNode::get(Context, Operands)); 5032 } 5033 } 5034 } 5035} 5036 5037} 5038 5039//===----------------------------------------------------------------------===// 5040// Hexagon ABI Implementation 5041//===----------------------------------------------------------------------===// 5042 5043namespace { 5044 5045class HexagonABIInfo : public ABIInfo { 5046 5047 5048public: 5049 HexagonABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 5050 5051private: 5052 5053 ABIArgInfo classifyReturnType(QualType RetTy) const; 5054 ABIArgInfo classifyArgumentType(QualType RetTy) const; 5055 5056 virtual void computeInfo(CGFunctionInfo &FI) const; 5057 5058 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5059 CodeGenFunction &CGF) const; 5060}; 5061 5062class HexagonTargetCodeGenInfo : public TargetCodeGenInfo { 5063public: 5064 HexagonTargetCodeGenInfo(CodeGenTypes &CGT) 5065 :TargetCodeGenInfo(new HexagonABIInfo(CGT)) {} 5066 5067 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 5068 return 29; 5069 } 5070}; 5071 5072} 5073 5074void HexagonABIInfo::computeInfo(CGFunctionInfo &FI) const { 5075 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 5076 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 5077 it != ie; ++it) 5078 it->info = classifyArgumentType(it->type); 5079} 5080 5081ABIArgInfo HexagonABIInfo::classifyArgumentType(QualType Ty) const { 5082 if (!isAggregateTypeForABI(Ty)) { 5083 // Treat an enum type as its underlying type. 5084 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 5085 Ty = EnumTy->getDecl()->getIntegerType(); 5086 5087 return (Ty->isPromotableIntegerType() ? 5088 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 5089 } 5090 5091 // Ignore empty records. 5092 if (isEmptyRecord(getContext(), Ty, true)) 5093 return ABIArgInfo::getIgnore(); 5094 5095 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) 5096 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 5097 5098 uint64_t Size = getContext().getTypeSize(Ty); 5099 if (Size > 64) 5100 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 5101 // Pass in the smallest viable integer type. 5102 else if (Size > 32) 5103 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 5104 else if (Size > 16) 5105 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 5106 else if (Size > 8) 5107 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 5108 else 5109 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 5110} 5111 5112ABIArgInfo HexagonABIInfo::classifyReturnType(QualType RetTy) const { 5113 if (RetTy->isVoidType()) 5114 return ABIArgInfo::getIgnore(); 5115 5116 // Large vector types should be returned via memory. 5117 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 64) 5118 return ABIArgInfo::getIndirect(0); 5119 5120 if (!isAggregateTypeForABI(RetTy)) { 5121 // Treat an enum type as its underlying type. 5122 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 5123 RetTy = EnumTy->getDecl()->getIntegerType(); 5124 5125 return (RetTy->isPromotableIntegerType() ? 5126 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 5127 } 5128 5129 // Structures with either a non-trivial destructor or a non-trivial 5130 // copy constructor are always indirect. 5131 if (isRecordReturnIndirect(RetTy, getCXXABI())) 5132 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 5133 5134 if (isEmptyRecord(getContext(), RetTy, true)) 5135 return ABIArgInfo::getIgnore(); 5136 5137 // Aggregates <= 8 bytes are returned in r0; other aggregates 5138 // are returned indirectly. 5139 uint64_t Size = getContext().getTypeSize(RetTy); 5140 if (Size <= 64) { 5141 // Return in the smallest viable integer type. 5142 if (Size <= 8) 5143 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 5144 if (Size <= 16) 5145 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 5146 if (Size <= 32) 5147 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 5148 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 5149 } 5150 5151 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 5152} 5153 5154llvm::Value *HexagonABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5155 CodeGenFunction &CGF) const { 5156 // FIXME: Need to handle alignment 5157 llvm::Type *BPP = CGF.Int8PtrPtrTy; 5158 5159 CGBuilderTy &Builder = CGF.Builder; 5160 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 5161 "ap"); 5162 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 5163 llvm::Type *PTy = 5164 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 5165 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 5166 5167 uint64_t Offset = 5168 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 5169 llvm::Value *NextAddr = 5170 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 5171 "ap.next"); 5172 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 5173 5174 return AddrTyped; 5175} 5176 5177 5178//===----------------------------------------------------------------------===// 5179// SPARC v9 ABI Implementation. 5180// Based on the SPARC Compliance Definition version 2.4.1. 5181// 5182// Function arguments a mapped to a nominal "parameter array" and promoted to 5183// registers depending on their type. Each argument occupies 8 or 16 bytes in 5184// the array, structs larger than 16 bytes are passed indirectly. 5185// 5186// One case requires special care: 5187// 5188// struct mixed { 5189// int i; 5190// float f; 5191// }; 5192// 5193// When a struct mixed is passed by value, it only occupies 8 bytes in the 5194// parameter array, but the int is passed in an integer register, and the float 5195// is passed in a floating point register. This is represented as two arguments 5196// with the LLVM IR inreg attribute: 5197// 5198// declare void f(i32 inreg %i, float inreg %f) 5199// 5200// The code generator will only allocate 4 bytes from the parameter array for 5201// the inreg arguments. All other arguments are allocated a multiple of 8 5202// bytes. 5203// 5204namespace { 5205class SparcV9ABIInfo : public ABIInfo { 5206public: 5207 SparcV9ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 5208 5209private: 5210 ABIArgInfo classifyType(QualType RetTy, unsigned SizeLimit) const; 5211 virtual void computeInfo(CGFunctionInfo &FI) const; 5212 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5213 CodeGenFunction &CGF) const; 5214 5215 // Coercion type builder for structs passed in registers. The coercion type 5216 // serves two purposes: 5217 // 5218 // 1. Pad structs to a multiple of 64 bits, so they are passed 'left-aligned' 5219 // in registers. 5220 // 2. Expose aligned floating point elements as first-level elements, so the 5221 // code generator knows to pass them in floating point registers. 5222 // 5223 // We also compute the InReg flag which indicates that the struct contains 5224 // aligned 32-bit floats. 5225 // 5226 struct CoerceBuilder { 5227 llvm::LLVMContext &Context; 5228 const llvm::DataLayout &DL; 5229 SmallVector<llvm::Type*, 8> Elems; 5230 uint64_t Size; 5231 bool InReg; 5232 5233 CoerceBuilder(llvm::LLVMContext &c, const llvm::DataLayout &dl) 5234 : Context(c), DL(dl), Size(0), InReg(false) {} 5235 5236 // Pad Elems with integers until Size is ToSize. 5237 void pad(uint64_t ToSize) { 5238 assert(ToSize >= Size && "Cannot remove elements"); 5239 if (ToSize == Size) 5240 return; 5241 5242 // Finish the current 64-bit word. 5243 uint64_t Aligned = llvm::RoundUpToAlignment(Size, 64); 5244 if (Aligned > Size && Aligned <= ToSize) { 5245 Elems.push_back(llvm::IntegerType::get(Context, Aligned - Size)); 5246 Size = Aligned; 5247 } 5248 5249 // Add whole 64-bit words. 5250 while (Size + 64 <= ToSize) { 5251 Elems.push_back(llvm::Type::getInt64Ty(Context)); 5252 Size += 64; 5253 } 5254 5255 // Final in-word padding. 5256 if (Size < ToSize) { 5257 Elems.push_back(llvm::IntegerType::get(Context, ToSize - Size)); 5258 Size = ToSize; 5259 } 5260 } 5261 5262 // Add a floating point element at Offset. 5263 void addFloat(uint64_t Offset, llvm::Type *Ty, unsigned Bits) { 5264 // Unaligned floats are treated as integers. 5265 if (Offset % Bits) 5266 return; 5267 // The InReg flag is only required if there are any floats < 64 bits. 5268 if (Bits < 64) 5269 InReg = true; 5270 pad(Offset); 5271 Elems.push_back(Ty); 5272 Size = Offset + Bits; 5273 } 5274 5275 // Add a struct type to the coercion type, starting at Offset (in bits). 5276 void addStruct(uint64_t Offset, llvm::StructType *StrTy) { 5277 const llvm::StructLayout *Layout = DL.getStructLayout(StrTy); 5278 for (unsigned i = 0, e = StrTy->getNumElements(); i != e; ++i) { 5279 llvm::Type *ElemTy = StrTy->getElementType(i); 5280 uint64_t ElemOffset = Offset + Layout->getElementOffsetInBits(i); 5281 switch (ElemTy->getTypeID()) { 5282 case llvm::Type::StructTyID: 5283 addStruct(ElemOffset, cast<llvm::StructType>(ElemTy)); 5284 break; 5285 case llvm::Type::FloatTyID: 5286 addFloat(ElemOffset, ElemTy, 32); 5287 break; 5288 case llvm::Type::DoubleTyID: 5289 addFloat(ElemOffset, ElemTy, 64); 5290 break; 5291 case llvm::Type::FP128TyID: 5292 addFloat(ElemOffset, ElemTy, 128); 5293 break; 5294 case llvm::Type::PointerTyID: 5295 if (ElemOffset % 64 == 0) { 5296 pad(ElemOffset); 5297 Elems.push_back(ElemTy); 5298 Size += 64; 5299 } 5300 break; 5301 default: 5302 break; 5303 } 5304 } 5305 } 5306 5307 // Check if Ty is a usable substitute for the coercion type. 5308 bool isUsableType(llvm::StructType *Ty) const { 5309 if (Ty->getNumElements() != Elems.size()) 5310 return false; 5311 for (unsigned i = 0, e = Elems.size(); i != e; ++i) 5312 if (Elems[i] != Ty->getElementType(i)) 5313 return false; 5314 return true; 5315 } 5316 5317 // Get the coercion type as a literal struct type. 5318 llvm::Type *getType() const { 5319 if (Elems.size() == 1) 5320 return Elems.front(); 5321 else 5322 return llvm::StructType::get(Context, Elems); 5323 } 5324 }; 5325}; 5326} // end anonymous namespace 5327 5328ABIArgInfo 5329SparcV9ABIInfo::classifyType(QualType Ty, unsigned SizeLimit) const { 5330 if (Ty->isVoidType()) 5331 return ABIArgInfo::getIgnore(); 5332 5333 uint64_t Size = getContext().getTypeSize(Ty); 5334 5335 // Anything too big to fit in registers is passed with an explicit indirect 5336 // pointer / sret pointer. 5337 if (Size > SizeLimit) 5338 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 5339 5340 // Treat an enum type as its underlying type. 5341 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 5342 Ty = EnumTy->getDecl()->getIntegerType(); 5343 5344 // Integer types smaller than a register are extended. 5345 if (Size < 64 && Ty->isIntegerType()) 5346 return ABIArgInfo::getExtend(); 5347 5348 // Other non-aggregates go in registers. 5349 if (!isAggregateTypeForABI(Ty)) 5350 return ABIArgInfo::getDirect(); 5351 5352 // This is a small aggregate type that should be passed in registers. 5353 // Build a coercion type from the LLVM struct type. 5354 llvm::StructType *StrTy = dyn_cast<llvm::StructType>(CGT.ConvertType(Ty)); 5355 if (!StrTy) 5356 return ABIArgInfo::getDirect(); 5357 5358 CoerceBuilder CB(getVMContext(), getDataLayout()); 5359 CB.addStruct(0, StrTy); 5360 CB.pad(llvm::RoundUpToAlignment(CB.DL.getTypeSizeInBits(StrTy), 64)); 5361 5362 // Try to use the original type for coercion. 5363 llvm::Type *CoerceTy = CB.isUsableType(StrTy) ? StrTy : CB.getType(); 5364 5365 if (CB.InReg) 5366 return ABIArgInfo::getDirectInReg(CoerceTy); 5367 else 5368 return ABIArgInfo::getDirect(CoerceTy); 5369} 5370 5371llvm::Value *SparcV9ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5372 CodeGenFunction &CGF) const { 5373 ABIArgInfo AI = classifyType(Ty, 16 * 8); 5374 llvm::Type *ArgTy = CGT.ConvertType(Ty); 5375 if (AI.canHaveCoerceToType() && !AI.getCoerceToType()) 5376 AI.setCoerceToType(ArgTy); 5377 5378 llvm::Type *BPP = CGF.Int8PtrPtrTy; 5379 CGBuilderTy &Builder = CGF.Builder; 5380 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 5381 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 5382 llvm::Type *ArgPtrTy = llvm::PointerType::getUnqual(ArgTy); 5383 llvm::Value *ArgAddr; 5384 unsigned Stride; 5385 5386 switch (AI.getKind()) { 5387 case ABIArgInfo::Expand: 5388 llvm_unreachable("Unsupported ABI kind for va_arg"); 5389 5390 case ABIArgInfo::Extend: 5391 Stride = 8; 5392 ArgAddr = Builder 5393 .CreateConstGEP1_32(Addr, 8 - getDataLayout().getTypeAllocSize(ArgTy), 5394 "extend"); 5395 break; 5396 5397 case ABIArgInfo::Direct: 5398 Stride = getDataLayout().getTypeAllocSize(AI.getCoerceToType()); 5399 ArgAddr = Addr; 5400 break; 5401 5402 case ABIArgInfo::Indirect: 5403 Stride = 8; 5404 ArgAddr = Builder.CreateBitCast(Addr, 5405 llvm::PointerType::getUnqual(ArgPtrTy), 5406 "indirect"); 5407 ArgAddr = Builder.CreateLoad(ArgAddr, "indirect.arg"); 5408 break; 5409 5410 case ABIArgInfo::Ignore: 5411 return llvm::UndefValue::get(ArgPtrTy); 5412 } 5413 5414 // Update VAList. 5415 Addr = Builder.CreateConstGEP1_32(Addr, Stride, "ap.next"); 5416 Builder.CreateStore(Addr, VAListAddrAsBPP); 5417 5418 return Builder.CreatePointerCast(ArgAddr, ArgPtrTy, "arg.addr"); 5419} 5420 5421void SparcV9ABIInfo::computeInfo(CGFunctionInfo &FI) const { 5422 FI.getReturnInfo() = classifyType(FI.getReturnType(), 32 * 8); 5423 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 5424 it != ie; ++it) 5425 it->info = classifyType(it->type, 16 * 8); 5426} 5427 5428namespace { 5429class SparcV9TargetCodeGenInfo : public TargetCodeGenInfo { 5430public: 5431 SparcV9TargetCodeGenInfo(CodeGenTypes &CGT) 5432 : TargetCodeGenInfo(new SparcV9ABIInfo(CGT)) {} 5433}; 5434} // end anonymous namespace 5435 5436 5437//===----------------------------------------------------------------------===// 5438// Xcore ABI Implementation 5439//===----------------------------------------------------------------------===// 5440namespace { 5441class XCoreABIInfo : public DefaultABIInfo { 5442public: 5443 XCoreABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {} 5444 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5445 CodeGenFunction &CGF) const; 5446}; 5447 5448class XcoreTargetCodeGenInfo : public TargetCodeGenInfo { 5449public: 5450 XcoreTargetCodeGenInfo(CodeGenTypes &CGT) 5451 :TargetCodeGenInfo(new XCoreABIInfo(CGT)) {} 5452}; 5453} // End anonymous namespace. 5454 5455llvm::Value *XCoreABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5456 CodeGenFunction &CGF) const { 5457 CGBuilderTy &Builder = CGF.Builder; 5458 5459 // Get the VAList. 5460 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, 5461 CGF.Int8PtrPtrTy); 5462 llvm::Value *AP = Builder.CreateLoad(VAListAddrAsBPP); 5463 5464 // Handle the argument. 5465 ABIArgInfo AI = classifyArgumentType(Ty); 5466 llvm::Type *ArgTy = CGT.ConvertType(Ty); 5467 if (AI.canHaveCoerceToType() && !AI.getCoerceToType()) 5468 AI.setCoerceToType(ArgTy); 5469 llvm::Type *ArgPtrTy = llvm::PointerType::getUnqual(ArgTy); 5470 llvm::Value *Val; 5471 uint64_t ArgSize = 0; 5472 switch (AI.getKind()) { 5473 case ABIArgInfo::Expand: 5474 llvm_unreachable("Unsupported ABI kind for va_arg"); 5475 case ABIArgInfo::Ignore: 5476 Val = llvm::UndefValue::get(ArgPtrTy); 5477 ArgSize = 0; 5478 break; 5479 case ABIArgInfo::Extend: 5480 case ABIArgInfo::Direct: 5481 Val = Builder.CreatePointerCast(AP, ArgPtrTy); 5482 ArgSize = getDataLayout().getTypeAllocSize(AI.getCoerceToType()); 5483 if (ArgSize < 4) 5484 ArgSize = 4; 5485 break; 5486 case ABIArgInfo::Indirect: 5487 llvm::Value *ArgAddr; 5488 ArgAddr = Builder.CreateBitCast(AP, llvm::PointerType::getUnqual(ArgPtrTy)); 5489 ArgAddr = Builder.CreateLoad(ArgAddr); 5490 Val = Builder.CreatePointerCast(ArgAddr, ArgPtrTy); 5491 ArgSize = 4; 5492 break; 5493 } 5494 5495 // Increment the VAList. 5496 if (ArgSize) { 5497 llvm::Value *APN = Builder.CreateConstGEP1_32(AP, ArgSize); 5498 Builder.CreateStore(APN, VAListAddrAsBPP); 5499 } 5500 return Val; 5501} 5502 5503//===----------------------------------------------------------------------===// 5504// Driver code 5505//===----------------------------------------------------------------------===// 5506 5507const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 5508 if (TheTargetCodeGenInfo) 5509 return *TheTargetCodeGenInfo; 5510 5511 const llvm::Triple &Triple = getTarget().getTriple(); 5512 switch (Triple.getArch()) { 5513 default: 5514 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 5515 5516 case llvm::Triple::le32: 5517 return *(TheTargetCodeGenInfo = new PNaClTargetCodeGenInfo(Types)); 5518 case llvm::Triple::mips: 5519 case llvm::Triple::mipsel: 5520 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, true)); 5521 5522 case llvm::Triple::mips64: 5523 case llvm::Triple::mips64el: 5524 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, false)); 5525 5526 case llvm::Triple::aarch64: 5527 return *(TheTargetCodeGenInfo = new AArch64TargetCodeGenInfo(Types)); 5528 5529 case llvm::Triple::arm: 5530 case llvm::Triple::thumb: 5531 { 5532 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS; 5533 if (strcmp(getTarget().getABI(), "apcs-gnu") == 0) 5534 Kind = ARMABIInfo::APCS; 5535 else if (CodeGenOpts.FloatABI == "hard" || 5536 (CodeGenOpts.FloatABI != "soft" && 5537 Triple.getEnvironment() == llvm::Triple::GNUEABIHF)) 5538 Kind = ARMABIInfo::AAPCS_VFP; 5539 5540 switch (Triple.getOS()) { 5541 case llvm::Triple::NaCl: 5542 return *(TheTargetCodeGenInfo = 5543 new NaClARMTargetCodeGenInfo(Types, Kind)); 5544 default: 5545 return *(TheTargetCodeGenInfo = 5546 new ARMTargetCodeGenInfo(Types, Kind)); 5547 } 5548 } 5549 5550 case llvm::Triple::ppc: 5551 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 5552 case llvm::Triple::ppc64: 5553 if (Triple.isOSBinFormatELF()) 5554 return *(TheTargetCodeGenInfo = new PPC64_SVR4_TargetCodeGenInfo(Types)); 5555 else 5556 return *(TheTargetCodeGenInfo = new PPC64TargetCodeGenInfo(Types)); 5557 case llvm::Triple::ppc64le: 5558 assert(Triple.isOSBinFormatELF() && "PPC64 LE non-ELF not supported!"); 5559 return *(TheTargetCodeGenInfo = new PPC64_SVR4_TargetCodeGenInfo(Types)); 5560 5561 case llvm::Triple::nvptx: 5562 case llvm::Triple::nvptx64: 5563 return *(TheTargetCodeGenInfo = new NVPTXTargetCodeGenInfo(Types)); 5564 5565 case llvm::Triple::msp430: 5566 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 5567 5568 case llvm::Triple::systemz: 5569 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types)); 5570 5571 case llvm::Triple::tce: 5572 return *(TheTargetCodeGenInfo = new TCETargetCodeGenInfo(Types)); 5573 5574 case llvm::Triple::x86: { 5575 bool IsDarwinVectorABI = Triple.isOSDarwin(); 5576 bool IsSmallStructInRegABI = 5577 X86_32TargetCodeGenInfo::isStructReturnInRegABI(Triple, CodeGenOpts); 5578 bool IsWin32FloatStructABI = (Triple.getOS() == llvm::Triple::Win32); 5579 5580 if (Triple.getOS() == llvm::Triple::Win32) { 5581 return *(TheTargetCodeGenInfo = 5582 new WinX86_32TargetCodeGenInfo(Types, 5583 IsDarwinVectorABI, IsSmallStructInRegABI, 5584 IsWin32FloatStructABI, 5585 CodeGenOpts.NumRegisterParameters)); 5586 } else { 5587 return *(TheTargetCodeGenInfo = 5588 new X86_32TargetCodeGenInfo(Types, 5589 IsDarwinVectorABI, IsSmallStructInRegABI, 5590 IsWin32FloatStructABI, 5591 CodeGenOpts.NumRegisterParameters)); 5592 } 5593 } 5594 5595 case llvm::Triple::x86_64: { 5596 bool HasAVX = strcmp(getTarget().getABI(), "avx") == 0; 5597 5598 switch (Triple.getOS()) { 5599 case llvm::Triple::Win32: 5600 case llvm::Triple::MinGW32: 5601 case llvm::Triple::Cygwin: 5602 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 5603 case llvm::Triple::NaCl: 5604 return *(TheTargetCodeGenInfo = new NaClX86_64TargetCodeGenInfo(Types, 5605 HasAVX)); 5606 default: 5607 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types, 5608 HasAVX)); 5609 } 5610 } 5611 case llvm::Triple::hexagon: 5612 return *(TheTargetCodeGenInfo = new HexagonTargetCodeGenInfo(Types)); 5613 case llvm::Triple::sparcv9: 5614 return *(TheTargetCodeGenInfo = new SparcV9TargetCodeGenInfo(Types)); 5615 case llvm::Triple::xcore: 5616 return *(TheTargetCodeGenInfo = new XcoreTargetCodeGenInfo(Types)); 5617 5618 } 5619} 5620