X86RegisterInfo.h revision 199481
1193323Sed//===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===// 2193323Sed// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7193323Sed// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10193323Sed// This file contains the X86 implementation of the TargetRegisterInfo class. 11193323Sed// 12193323Sed//===----------------------------------------------------------------------===// 13193323Sed 14193323Sed#ifndef X86REGISTERINFO_H 15193323Sed#define X86REGISTERINFO_H 16193323Sed 17193323Sed#include "llvm/Target/TargetRegisterInfo.h" 18193323Sed#include "X86GenRegisterInfo.h.inc" 19193323Sed 20193323Sednamespace llvm { 21193323Sed class Type; 22193323Sed class TargetInstrInfo; 23193323Sed class X86TargetMachine; 24193323Sed 25193323Sed/// N86 namespace - Native X86 register numbers 26193323Sed/// 27193323Sednamespace N86 { 28193323Sed enum { 29193323Sed EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7 30193323Sed }; 31193323Sed} 32193323Sed 33193323Sednamespace X86 { 34193323Sed /// SubregIndex - The index of various sized subregister classes. Note that 35193323Sed /// these indices must be kept in sync with the class indices in the 36193323Sed /// X86RegisterInfo.td file. 37193323Sed enum SubregIndex { 38193323Sed SUBREG_8BIT = 1, SUBREG_8BIT_HI = 2, SUBREG_16BIT = 3, SUBREG_32BIT = 4 39193323Sed }; 40193323Sed} 41193323Sed 42193323Sed/// DWARFFlavour - Flavour of dwarf regnumbers 43193323Sed/// 44193323Sednamespace DWARFFlavour { 45193323Sed enum { 46193323Sed X86_64 = 0, X86_32_DarwinEH = 1, X86_32_Generic = 2 47193323Sed }; 48193323Sed} 49193323Sed 50193323Sedclass X86RegisterInfo : public X86GenRegisterInfo { 51193323Sedpublic: 52193323Sed X86TargetMachine &TM; 53193323Sed const TargetInstrInfo &TII; 54193323Sed 55193323Sedprivate: 56193323Sed /// Is64Bit - Is the target 64-bits. 57193323Sed /// 58193323Sed bool Is64Bit; 59193323Sed 60193323Sed /// IsWin64 - Is the target on of win64 flavours 61193323Sed /// 62193323Sed bool IsWin64; 63193323Sed 64193323Sed /// SlotSize - Stack slot size in bytes. 65193323Sed /// 66193323Sed unsigned SlotSize; 67193323Sed 68193323Sed /// StackAlign - Default stack alignment. 69193323Sed /// 70193323Sed unsigned StackAlign; 71193323Sed 72193323Sed /// StackPtr - X86 physical register used as stack ptr. 73193323Sed /// 74193323Sed unsigned StackPtr; 75193323Sed 76193323Sed /// FramePtr - X86 physical register used as frame ptr. 77193323Sed /// 78193323Sed unsigned FramePtr; 79193323Sed 80193323Sedpublic: 81193323Sed X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii); 82193323Sed 83193323Sed /// getX86RegNum - Returns the native X86 register number for the given LLVM 84193323Sed /// register identifier. 85193323Sed static unsigned getX86RegNum(unsigned RegNo); 86193323Sed 87193323Sed unsigned getStackAlignment() const { return StackAlign; } 88193323Sed 89193323Sed /// getDwarfRegNum - allows modification of X86GenRegisterInfo::getDwarfRegNum 90193323Sed /// (created by TableGen) for target dependencies. 91193323Sed int getDwarfRegNum(unsigned RegNum, bool isEH) const; 92193323Sed 93193323Sed /// Code Generation virtual methods... 94193323Sed /// 95193323Sed 96198090Srdivacky /// getMatchingSuperRegClass - Return a subclass of the specified register 97198090Srdivacky /// class A so that each register in it has a sub-register of the 98198090Srdivacky /// specified sub-register index which is in the specified register class B. 99198090Srdivacky virtual const TargetRegisterClass * 100198090Srdivacky getMatchingSuperRegClass(const TargetRegisterClass *A, 101198090Srdivacky const TargetRegisterClass *B, unsigned Idx) const; 102198090Srdivacky 103193323Sed /// getPointerRegClass - Returns a TargetRegisterClass used for pointer 104193323Sed /// values. 105198090Srdivacky const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const; 106193323Sed 107193323Sed /// getCrossCopyRegClass - Returns a legal register class to copy a register 108193323Sed /// in the specified class to or from. Returns NULL if it is possible to copy 109193323Sed /// between a two registers of the specified class. 110193323Sed const TargetRegisterClass * 111193323Sed getCrossCopyRegClass(const TargetRegisterClass *RC) const; 112193323Sed 113193323Sed /// getCalleeSavedRegs - Return a null-terminated list of all of the 114193323Sed /// callee-save registers on this target. 115193323Sed const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const; 116193323Sed 117193323Sed /// getCalleeSavedRegClasses - Return a null-terminated list of the preferred 118193323Sed /// register classes to spill each callee-saved register with. The order and 119193323Sed /// length of this list match the getCalleeSavedRegs() list. 120193323Sed const TargetRegisterClass* const* 121193323Sed getCalleeSavedRegClasses(const MachineFunction *MF = 0) const; 122193323Sed 123193323Sed /// getReservedRegs - Returns a bitset indexed by physical register number 124193323Sed /// indicating if a register is a special register that has particular uses and 125193323Sed /// should be considered unavailable at all times, e.g. SP, RA. This is used by 126193323Sed /// register scavenger to determine what registers are free. 127193323Sed BitVector getReservedRegs(const MachineFunction &MF) const; 128193323Sed 129193323Sed bool hasFP(const MachineFunction &MF) const; 130193323Sed 131193323Sed bool needsStackRealignment(const MachineFunction &MF) const; 132193323Sed 133193323Sed bool hasReservedCallFrame(MachineFunction &MF) const; 134193323Sed 135198090Srdivacky bool hasReservedSpillSlot(MachineFunction &MF, unsigned Reg, 136198090Srdivacky int &FrameIdx) const; 137198090Srdivacky 138193323Sed void eliminateCallFramePseudoInstr(MachineFunction &MF, 139193323Sed MachineBasicBlock &MBB, 140193323Sed MachineBasicBlock::iterator MI) const; 141193323Sed 142198090Srdivacky unsigned eliminateFrameIndex(MachineBasicBlock::iterator MI, 143198090Srdivacky int SPAdj, int *Value = NULL, 144198090Srdivacky RegScavenger *RS = NULL) const; 145193323Sed 146193323Sed void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, 147193323Sed RegScavenger *RS = NULL) const; 148193323Sed 149198090Srdivacky void emitCalleeSavedFrameMoves(MachineFunction &MF, unsigned LabelId, 150198090Srdivacky unsigned FramePtr) const; 151193323Sed void emitPrologue(MachineFunction &MF) const; 152193323Sed void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; 153193323Sed 154193323Sed // Debug information queries. 155193323Sed unsigned getRARegister() const; 156199481Srdivacky unsigned getFrameRegister(const MachineFunction &MF) const; 157193323Sed int getFrameIndexOffset(MachineFunction &MF, int FI) const; 158193323Sed void getInitialFrameState(std::vector<MachineMove> &Moves) const; 159193323Sed 160193323Sed // Exception handling queries. 161193323Sed unsigned getEHExceptionRegister() const; 162193323Sed unsigned getEHHandlerRegister() const; 163193323Sed}; 164193323Sed 165193323Sed// getX86SubSuperRegister - X86 utility function. It returns the sub or super 166193323Sed// register of a specific X86 register. 167198090Srdivacky// e.g. getX86SubSuperRegister(X86::EAX, EVT::i16) return X86:AX 168198090Srdivackyunsigned getX86SubSuperRegister(unsigned, EVT, bool High=false); 169193323Sed 170193323Sed} // End llvm namespace 171193323Sed 172193323Sed#endif 173