1249259Sdim//===-- AMDGPUAsmBackend.cpp - AMDGPU Assembler Backend -------------------===// 2249259Sdim// 3249259Sdim// The LLVM Compiler Infrastructure 4249259Sdim// 5249259Sdim// This file is distributed under the University of Illinois Open Source 6249259Sdim// License. See LICENSE.TXT for details. 7249259Sdim// 8249259Sdim/// \file 9249259Sdim//===----------------------------------------------------------------------===// 10249259Sdim 11249259Sdim#include "MCTargetDesc/AMDGPUMCTargetDesc.h" 12249259Sdim#include "llvm/ADT/StringRef.h" 13249259Sdim#include "llvm/MC/MCAsmBackend.h" 14249259Sdim#include "llvm/MC/MCAssembler.h" 15249259Sdim#include "llvm/MC/MCObjectWriter.h" 16249259Sdim#include "llvm/MC/MCValue.h" 17249259Sdim#include "llvm/Support/TargetRegistry.h" 18249259Sdim 19249259Sdimusing namespace llvm; 20249259Sdim 21249259Sdimnamespace { 22249259Sdim 23249259Sdimclass AMDGPUMCObjectWriter : public MCObjectWriter { 24249259Sdimpublic: 25249259Sdim AMDGPUMCObjectWriter(raw_ostream &OS) : MCObjectWriter(OS, true) { } 26249259Sdim virtual void ExecutePostLayoutBinding(MCAssembler &Asm, 27249259Sdim const MCAsmLayout &Layout) { 28249259Sdim //XXX: Implement if necessary. 29249259Sdim } 30249259Sdim virtual void RecordRelocation(const MCAssembler &Asm, 31249259Sdim const MCAsmLayout &Layout, 32249259Sdim const MCFragment *Fragment, 33249259Sdim const MCFixup &Fixup, 34249259Sdim MCValue Target, uint64_t &FixedValue) { 35249259Sdim assert(!"Not implemented"); 36249259Sdim } 37249259Sdim 38249259Sdim virtual void WriteObject(MCAssembler &Asm, const MCAsmLayout &Layout); 39249259Sdim 40249259Sdim}; 41249259Sdim 42249259Sdimclass AMDGPUAsmBackend : public MCAsmBackend { 43249259Sdimpublic: 44249259Sdim AMDGPUAsmBackend(const Target &T) 45249259Sdim : MCAsmBackend() {} 46249259Sdim 47249259Sdim virtual unsigned getNumFixupKinds() const { return 0; }; 48249259Sdim virtual void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, 49249259Sdim uint64_t Value) const; 50249259Sdim virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, 51249259Sdim const MCRelaxableFragment *DF, 52249259Sdim const MCAsmLayout &Layout) const { 53249259Sdim return false; 54249259Sdim } 55249259Sdim virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const { 56249259Sdim assert(!"Not implemented"); 57249259Sdim } 58249259Sdim virtual bool mayNeedRelaxation(const MCInst &Inst) const { return false; } 59249259Sdim virtual bool writeNopData(uint64_t Count, MCObjectWriter *OW) const { 60249259Sdim return true; 61249259Sdim } 62249259Sdim}; 63249259Sdim 64249259Sdim} //End anonymous namespace 65249259Sdim 66249259Sdimvoid AMDGPUMCObjectWriter::WriteObject(MCAssembler &Asm, 67249259Sdim const MCAsmLayout &Layout) { 68249259Sdim for (MCAssembler::iterator I = Asm.begin(), E = Asm.end(); I != E; ++I) { 69249259Sdim Asm.writeSectionData(I, Layout); 70249259Sdim } 71249259Sdim} 72249259Sdim 73249259Sdimvoid AMDGPUAsmBackend::applyFixup(const MCFixup &Fixup, char *Data, 74249259Sdim unsigned DataSize, uint64_t Value) const { 75249259Sdim 76249259Sdim uint16_t *Dst = (uint16_t*)(Data + Fixup.getOffset()); 77249259Sdim assert(Fixup.getKind() == FK_PCRel_4); 78249259Sdim *Dst = (Value - 4) / 4; 79249259Sdim} 80251662Sdim 81251662Sdim//===----------------------------------------------------------------------===// 82251662Sdim// ELFAMDGPUAsmBackend class 83251662Sdim//===----------------------------------------------------------------------===// 84251662Sdim 85263508Sdimnamespace { 86263508Sdim 87251662Sdimclass ELFAMDGPUAsmBackend : public AMDGPUAsmBackend { 88251662Sdimpublic: 89251662Sdim ELFAMDGPUAsmBackend(const Target &T) : AMDGPUAsmBackend(T) { } 90251662Sdim 91251662Sdim MCObjectWriter *createObjectWriter(raw_ostream &OS) const { 92251662Sdim return createAMDGPUELFObjectWriter(OS); 93251662Sdim } 94251662Sdim}; 95251662Sdim 96263508Sdim} // end anonymous namespace 97263508Sdim 98263508SdimMCAsmBackend *llvm::createAMDGPUAsmBackend(const Target &T, 99263508Sdim const MCRegisterInfo &MRI, 100263508Sdim StringRef TT, 101251662Sdim StringRef CPU) { 102251662Sdim return new ELFAMDGPUAsmBackend(T); 103251662Sdim} 104