1193323Sed//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===// 2193323Sed// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7193323Sed// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10193323Sed// Top-level implementation for the PowerPC target. 11193323Sed// 12193323Sed//===----------------------------------------------------------------------===// 13193323Sed 14234353Sdim#include "PPCTargetMachine.h" 15193323Sed#include "PPC.h" 16249423Sdim#include "llvm/CodeGen/Passes.h" 17249423Sdim#include "llvm/MC/MCStreamer.h" 18193323Sed#include "llvm/PassManager.h" 19239462Sdim#include "llvm/Support/CommandLine.h" 20198090Srdivacky#include "llvm/Support/FormattedStream.h" 21226633Sdim#include "llvm/Support/TargetRegistry.h" 22249423Sdim#include "llvm/Target/TargetOptions.h" 23193323Sedusing namespace llvm; 24193323Sed 25239462Sdimstatic cl:: 26239462Sdimopt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden, 27239462Sdim cl::desc("Disable CTR loops for PPC")); 28239462Sdim 29198090Srdivackyextern "C" void LLVMInitializePowerPCTarget() { 30198090Srdivacky // Register the targets 31234353Sdim RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target); 32198090Srdivacky RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target); 33263508Sdim RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget); 34193323Sed} 35193323Sed 36266715Sdim/// Return the datalayout string of a subtarget. 37266715Sdimstatic std::string getDataLayoutString(const PPCSubtarget &ST) { 38266715Sdim const Triple &T = ST.getTargetTriple(); 39266715Sdim 40266715Sdim // PPC is big endian 41266715Sdim std::string Ret = "E"; 42266715Sdim 43266715Sdim // PPC64 has 64 bit pointers, PPC32 has 32 bit pointers. 44266715Sdim if (ST.isPPC64()) 45266715Sdim Ret += "-p:64:64"; 46266715Sdim else 47266715Sdim Ret += "-p:32:32"; 48266715Sdim 49266715Sdim // Note, the alignment values for f64 and i64 on ppc64 in Darwin 50266715Sdim // documentation are wrong; these are correct (i.e. "what gcc does"). 51266715Sdim if (ST.isPPC64() || ST.isSVR4ABI()) 52266715Sdim Ret += "-f64:64:64-i64:64:64"; 53266715Sdim else 54266715Sdim Ret += "-f64:32:64"; 55266715Sdim 56266715Sdim // Set support for 128 floats depending on the ABI. 57266715Sdim if (!ST.isPPC64() && ST.isSVR4ABI()) 58266715Sdim Ret += "-f128:64:128"; 59266715Sdim 60266715Sdim // Some ABIs support 128 bit vectors. 61266715Sdim if (ST.isPPC64() && ST.isSVR4ABI()) 62266715Sdim Ret += "-v128:128:128"; 63266715Sdim 64266715Sdim // PPC64 has 32 and 64 bit register, PPC32 has only 32 bit ones. 65266715Sdim if (ST.isPPC64()) 66266715Sdim Ret += "-n32:64"; 67266715Sdim else 68266715Sdim Ret += "-n32"; 69266715Sdim 70266715Sdim return Ret; 71266715Sdim} 72266715Sdim 73226633SdimPPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, 74226633Sdim StringRef CPU, StringRef FS, 75234353Sdim const TargetOptions &Options, 76226633Sdim Reloc::Model RM, CodeModel::Model CM, 77234353Sdim CodeGenOpt::Level OL, 78226633Sdim bool is64Bit) 79234353Sdim : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 80224145Sdim Subtarget(TT, CPU, FS, is64Bit), 81266715Sdim DL(getDataLayoutString(Subtarget)), InstrInfo(*this), 82218893Sdim FrameLowering(Subtarget), JITInfo(*this, is64Bit), 83208599Srdivacky TLInfo(*this), TSInfo(*this), 84249423Sdim InstrItins(Subtarget.getInstrItineraryData()) { 85234353Sdim 86234353Sdim // The binutils for the BG/P are too old for CFI. 87234353Sdim if (Subtarget.isBGP()) 88234353Sdim setMCUseCFI(false); 89263508Sdim initAsmInfo(); 90193323Sed} 91193323Sed 92234353Sdimvoid PPC32TargetMachine::anchor() { } 93193323Sed 94234353SdimPPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT, 95226633Sdim StringRef CPU, StringRef FS, 96234353Sdim const TargetOptions &Options, 97234353Sdim Reloc::Model RM, CodeModel::Model CM, 98234353Sdim CodeGenOpt::Level OL) 99234353Sdim : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { 100193323Sed} 101193323Sed 102234353Sdimvoid PPC64TargetMachine::anchor() { } 103193323Sed 104234353SdimPPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT, 105226633Sdim StringRef CPU, StringRef FS, 106234353Sdim const TargetOptions &Options, 107234353Sdim Reloc::Model RM, CodeModel::Model CM, 108234353Sdim CodeGenOpt::Level OL) 109234353Sdim : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { 110193323Sed} 111193323Sed 112193323Sed 113193323Sed//===----------------------------------------------------------------------===// 114193323Sed// Pass Pipeline Configuration 115193323Sed//===----------------------------------------------------------------------===// 116193323Sed 117234353Sdimnamespace { 118234353Sdim/// PPC Code Generator Pass Configuration Options. 119234353Sdimclass PPCPassConfig : public TargetPassConfig { 120234353Sdimpublic: 121234353Sdim PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM) 122234353Sdim : TargetPassConfig(TM, PM) {} 123234353Sdim 124234353Sdim PPCTargetMachine &getPPCTargetMachine() const { 125234353Sdim return getTM<PPCTargetMachine>(); 126234353Sdim } 127234353Sdim 128251662Sdim const PPCSubtarget &getPPCSubtarget() const { 129251662Sdim return *getPPCTargetMachine().getSubtargetImpl(); 130251662Sdim } 131251662Sdim 132263508Sdim virtual bool addPreISel(); 133251662Sdim virtual bool addILPOpts(); 134234353Sdim virtual bool addInstSelector(); 135251662Sdim virtual bool addPreSched2(); 136234353Sdim virtual bool addPreEmitPass(); 137234353Sdim}; 138234353Sdim} // namespace 139234353Sdim 140234353SdimTargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) { 141239462Sdim return new PPCPassConfig(this, PM); 142239462Sdim} 143234353Sdim 144263508Sdimbool PPCPassConfig::addPreISel() { 145239462Sdim if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None) 146263508Sdim addPass(createPPCCTRLoops(getPPCTargetMachine())); 147234353Sdim 148239462Sdim return false; 149234353Sdim} 150234353Sdim 151251662Sdimbool PPCPassConfig::addILPOpts() { 152251662Sdim if (getPPCSubtarget().hasISEL()) { 153251662Sdim addPass(&EarlyIfConverterID); 154251662Sdim return true; 155251662Sdim } 156251662Sdim 157251662Sdim return false; 158251662Sdim} 159251662Sdim 160234353Sdimbool PPCPassConfig::addInstSelector() { 161193323Sed // Install an instruction selector. 162239462Sdim addPass(createPPCISelDag(getPPCTargetMachine())); 163263508Sdim 164263508Sdim#ifndef NDEBUG 165263508Sdim if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None) 166263508Sdim addPass(createPPCCTRLoopsVerify()); 167263508Sdim#endif 168263508Sdim 169193323Sed return false; 170193323Sed} 171193323Sed 172251662Sdimbool PPCPassConfig::addPreSched2() { 173251662Sdim if (getOptLevel() != CodeGenOpt::None) 174251662Sdim addPass(&IfConverterID); 175251662Sdim 176251662Sdim return true; 177251662Sdim} 178251662Sdim 179234353Sdimbool PPCPassConfig::addPreEmitPass() { 180251662Sdim if (getOptLevel() != CodeGenOpt::None) 181251662Sdim addPass(createPPCEarlyReturnPass()); 182193323Sed // Must run branch selection immediately preceding the asm printer. 183239462Sdim addPass(createPPCBranchSelectionPass()); 184193323Sed return false; 185193323Sed} 186193323Sed 187198090Srdivackybool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, 188198090Srdivacky JITCodeEmitter &JCE) { 189193323Sed // Inform the subtarget that we are in JIT mode. FIXME: does this break macho 190193323Sed // writing? 191193323Sed Subtarget.SetJITMode(); 192234353Sdim 193193323Sed // Machine code emitter pass for PowerPC. 194198090Srdivacky PM.add(createPPCJITCodeEmitterPass(*this, JCE)); 195193323Sed 196193323Sed return false; 197193323Sed} 198249423Sdim 199249423Sdimvoid PPCTargetMachine::addAnalysisPasses(PassManagerBase &PM) { 200249423Sdim // Add first the target-independent BasicTTI pass, then our PPC pass. This 201249423Sdim // allows the PPC pass to delegate to the target independent layer when 202249423Sdim // appropriate. 203263508Sdim PM.add(createBasicTargetTransformInfoPass(this)); 204249423Sdim PM.add(createPPCTargetTransformInfoPass(this)); 205249423Sdim} 206249423Sdim 207