1234353Sdim//===-- PPCInstr64Bit.td - The PowerPC 64-bit Support ------*- tablegen -*-===// 2234353Sdim// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7234353Sdim// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10193323Sed// This file describes the PowerPC 64-bit instructions. These patterns are used 11193323Sed// both when in ppc64 mode and when in "use 64-bit extensions in 32-bit" mode. 12193323Sed// 13193323Sed//===----------------------------------------------------------------------===// 14193323Sed 15193323Sed//===----------------------------------------------------------------------===// 16193323Sed// 64-bit operands. 17193323Sed// 18193323Seddef s16imm64 : Operand<i64> { 19193323Sed let PrintMethod = "printS16ImmOperand"; 20263508Sdim let EncoderMethod = "getImm16Encoding"; 21251662Sdim let ParserMatchClass = PPCS16ImmAsmOperand; 22193323Sed} 23193323Seddef u16imm64 : Operand<i64> { 24193323Sed let PrintMethod = "printU16ImmOperand"; 25263508Sdim let EncoderMethod = "getImm16Encoding"; 26251662Sdim let ParserMatchClass = PPCU16ImmAsmOperand; 27193323Sed} 28263508Sdimdef s17imm64 : Operand<i64> { 29263508Sdim // This operand type is used for addis/lis to allow the assembler parser 30263508Sdim // to accept immediates in the range -65536..65535 for compatibility with 31263508Sdim // the GNU assembler. The operand is treated as 16-bit otherwise. 32263508Sdim let PrintMethod = "printS16ImmOperand"; 33263508Sdim let EncoderMethod = "getImm16Encoding"; 34263508Sdim let ParserMatchClass = PPCS17ImmAsmOperand; 35193323Sed} 36243830Sdimdef tocentry : Operand<iPTR> { 37249423Sdim let MIOperandInfo = (ops i64imm:$imm); 38243830Sdim} 39263508Sdimdef PPCTLSRegOperand : AsmOperandClass { 40263508Sdim let Name = "TLSReg"; let PredicateMethod = "isTLSReg"; 41263508Sdim let RenderMethod = "addTLSRegOperands"; 42263508Sdim} 43249423Sdimdef tlsreg : Operand<i64> { 44249423Sdim let EncoderMethod = "getTLSRegEncoding"; 45263508Sdim let ParserMatchClass = PPCTLSRegOperand; 46249423Sdim} 47249423Sdimdef tlsgd : Operand<i64> {} 48263508Sdimdef tlscall : Operand<i64> { 49263508Sdim let PrintMethod = "printTLSCall"; 50263508Sdim let MIOperandInfo = (ops calltarget:$func, tlsgd:$sym); 51263508Sdim let EncoderMethod = "getTLSCallEncoding"; 52263508Sdim} 53193323Sed 54193323Sed//===----------------------------------------------------------------------===// 55193323Sed// 64-bit transformation functions. 56193323Sed// 57193323Sed 58193323Seddef SHL64 : SDNodeXForm<imm, [{ 59193323Sed // Transformation function: 63 - imm 60193323Sed return getI32Imm(63 - N->getZExtValue()); 61193323Sed}]>; 62193323Sed 63193323Seddef SRL64 : SDNodeXForm<imm, [{ 64193323Sed // Transformation function: 64 - imm 65193323Sed return N->getZExtValue() ? getI32Imm(64 - N->getZExtValue()) : getI32Imm(0); 66193323Sed}]>; 67193323Sed 68193323Seddef HI32_48 : SDNodeXForm<imm, [{ 69193323Sed // Transformation function: shift the immediate value down into the low bits. 70193323Sed return getI32Imm((unsigned short)(N->getZExtValue() >> 32)); 71193323Sed}]>; 72193323Sed 73193323Seddef HI48_64 : SDNodeXForm<imm, [{ 74193323Sed // Transformation function: shift the immediate value down into the low bits. 75193323Sed return getI32Imm((unsigned short)(N->getZExtValue() >> 48)); 76193323Sed}]>; 77193323Sed 78193323Sed 79193323Sed//===----------------------------------------------------------------------===// 80193323Sed// Calls. 81193323Sed// 82193323Sed 83251662Sdimlet Interpretation64Bit = 1 in { 84249423Sdimlet isTerminator = 1, isBarrier = 1, PPC970_Unit = 7 in { 85251662Sdim let isBranch = 1, isIndirectBranch = 1, Uses = [CTR8] in { 86249423Sdim def BCTR8 : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", BrB, []>, 87249423Sdim Requires<[In64BitMode]>; 88251662Sdim 89251662Sdim let isCodeGenOnly = 1 in 90251662Sdim def BCCTR8 : XLForm_2_br<19, 528, 0, (outs), (ins pred:$cond), 91263508Sdim "b${cond:cc}ctr${cond:pm} ${cond:reg}", BrB, []>, 92251662Sdim Requires<[In64BitMode]>; 93251662Sdim } 94249423Sdim} 95249423Sdim 96193323Sedlet Defs = [LR8] in 97243830Sdim def MovePCtoLR8 : Pseudo<(outs), (ins), "#MovePCtoLR8", []>, 98193323Sed PPC970_Unit_BRU; 99193323Sed 100249423Sdimlet isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7 in { 101249423Sdim let Defs = [CTR8], Uses = [CTR8] in { 102249423Sdim def BDZ8 : BForm_1<16, 18, 0, 0, (outs), (ins condbrtarget:$dst), 103249423Sdim "bdz $dst">; 104249423Sdim def BDNZ8 : BForm_1<16, 16, 0, 0, (outs), (ins condbrtarget:$dst), 105249423Sdim "bdnz $dst">; 106193323Sed } 107251662Sdim 108251662Sdim let isReturn = 1, Defs = [CTR8], Uses = [CTR8, LR8, RM] in { 109251662Sdim def BDZLR8 : XLForm_2_ext<19, 16, 18, 0, 0, (outs), (ins), 110251662Sdim "bdzlr", BrB, []>; 111251662Sdim def BDNZLR8 : XLForm_2_ext<19, 16, 16, 0, 0, (outs), (ins), 112251662Sdim "bdnzlr", BrB, []>; 113251662Sdim } 114193323Sed} 115193323Sed 116251662Sdim 117251662Sdim 118234353Sdimlet isCall = 1, PPC970_Unit = 7, Defs = [LR8] in { 119193323Sed // Convenient aliases for call instructions 120193323Sed let Uses = [RM] in { 121249423Sdim def BL8 : IForm<18, 0, 1, (outs), (ins calltarget:$func), 122249423Sdim "bl $func", BrB, []>; // See Pat patterns below. 123234353Sdim 124263508Sdim def BL8_TLS : IForm<18, 0, 1, (outs), (ins tlscall:$func), 125263508Sdim "bl $func", BrB, []>; 126263508Sdim 127263508Sdim def BLA8 : IForm<18, 1, 1, (outs), (ins abscalltarget:$func), 128249423Sdim "bla $func", BrB, [(PPCcall (i64 imm:$func))]>; 129249423Sdim } 130249423Sdim let Uses = [RM], isCodeGenOnly = 1 in { 131249423Sdim def BL8_NOP : IForm_and_DForm_4_zero<18, 0, 1, 24, 132239462Sdim (outs), (ins calltarget:$func), 133234353Sdim "bl $func\n\tnop", BrB, []>; 134234353Sdim 135263508Sdim def BL8_NOP_TLS : IForm_and_DForm_4_zero<18, 0, 1, 24, 136263508Sdim (outs), (ins tlscall:$func), 137263508Sdim "bl $func\n\tnop", BrB, []>; 138234353Sdim 139249423Sdim def BLA8_NOP : IForm_and_DForm_4_zero<18, 1, 1, 24, 140263508Sdim (outs), (ins abscalltarget:$func), 141234353Sdim "bla $func\n\tnop", BrB, 142249423Sdim [(PPCcall_nop (i64 imm:$func))]>; 143193323Sed } 144249423Sdim let Uses = [CTR8, RM] in { 145249423Sdim def BCTRL8 : XLForm_2_ext<19, 528, 20, 0, 1, (outs), (ins), 146249423Sdim "bctrl", BrB, [(PPCbctrl)]>, 147249423Sdim Requires<[In64BitMode]>; 148251662Sdim 149251662Sdim let isCodeGenOnly = 1 in 150251662Sdim def BCCTRL8 : XLForm_2_br<19, 528, 1, (outs), (ins pred:$cond), 151263508Sdim "b${cond:cc}ctrl${cond:pm} ${cond:reg}", BrB, []>, 152251662Sdim Requires<[In64BitMode]>; 153193323Sed } 154193323Sed} 155251662Sdim} // Interpretation64Bit 156193323Sed 157193323Sed// Calls 158249423Sdimdef : Pat<(PPCcall (i64 tglobaladdr:$dst)), 159249423Sdim (BL8 tglobaladdr:$dst)>; 160249423Sdimdef : Pat<(PPCcall_nop (i64 tglobaladdr:$dst)), 161249423Sdim (BL8_NOP tglobaladdr:$dst)>; 162193323Sed 163249423Sdimdef : Pat<(PPCcall (i64 texternalsym:$dst)), 164249423Sdim (BL8 texternalsym:$dst)>; 165249423Sdimdef : Pat<(PPCcall_nop (i64 texternalsym:$dst)), 166249423Sdim (BL8_NOP texternalsym:$dst)>; 167234353Sdim 168193323Sed// Atomic operations 169198892Srdivackylet usesCustomInserter = 1 in { 170221345Sdim let Defs = [CR0] in { 171193323Sed def ATOMIC_LOAD_ADD_I64 : Pseudo< 172251662Sdim (outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_ADD_I64", 173249423Sdim [(set i64:$dst, (atomic_load_add_64 xoaddr:$ptr, i64:$incr))]>; 174193323Sed def ATOMIC_LOAD_SUB_I64 : Pseudo< 175251662Sdim (outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_SUB_I64", 176249423Sdim [(set i64:$dst, (atomic_load_sub_64 xoaddr:$ptr, i64:$incr))]>; 177193323Sed def ATOMIC_LOAD_OR_I64 : Pseudo< 178251662Sdim (outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_OR_I64", 179249423Sdim [(set i64:$dst, (atomic_load_or_64 xoaddr:$ptr, i64:$incr))]>; 180193323Sed def ATOMIC_LOAD_XOR_I64 : Pseudo< 181251662Sdim (outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_XOR_I64", 182249423Sdim [(set i64:$dst, (atomic_load_xor_64 xoaddr:$ptr, i64:$incr))]>; 183193323Sed def ATOMIC_LOAD_AND_I64 : Pseudo< 184251662Sdim (outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_AND_i64", 185249423Sdim [(set i64:$dst, (atomic_load_and_64 xoaddr:$ptr, i64:$incr))]>; 186193323Sed def ATOMIC_LOAD_NAND_I64 : Pseudo< 187251662Sdim (outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_NAND_I64", 188249423Sdim [(set i64:$dst, (atomic_load_nand_64 xoaddr:$ptr, i64:$incr))]>; 189193323Sed 190193323Sed def ATOMIC_CMP_SWAP_I64 : Pseudo< 191251662Sdim (outs g8rc:$dst), (ins memrr:$ptr, g8rc:$old, g8rc:$new), "#ATOMIC_CMP_SWAP_I64", 192249423Sdim [(set i64:$dst, (atomic_cmp_swap_64 xoaddr:$ptr, i64:$old, i64:$new))]>; 193193323Sed 194193323Sed def ATOMIC_SWAP_I64 : Pseudo< 195251662Sdim (outs g8rc:$dst), (ins memrr:$ptr, g8rc:$new), "#ATOMIC_SWAP_I64", 196249423Sdim [(set i64:$dst, (atomic_swap_64 xoaddr:$ptr, i64:$new))]>; 197193323Sed } 198193323Sed} 199193323Sed 200193323Sed// Instructions to support atomic operations 201251662Sdimdef LDARX : XForm_1<31, 84, (outs g8rc:$rD), (ins memrr:$ptr), 202193323Sed "ldarx $rD, $ptr", LdStLDARX, 203249423Sdim [(set i64:$rD, (PPClarx xoaddr:$ptr))]>; 204193323Sed 205193323Sedlet Defs = [CR0] in 206251662Sdimdef STDCX : XForm_1<31, 214, (outs), (ins g8rc:$rS, memrr:$dst), 207193323Sed "stdcx. $rS, $dst", LdStSTDCX, 208249423Sdim [(PPCstcx i64:$rS, xoaddr:$dst)]>, 209193323Sed isDOT; 210193323Sed 211251662Sdimlet Interpretation64Bit = 1 in { 212193323Sedlet isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 213193323Seddef TCRETURNdi8 :Pseudo< (outs), 214239462Sdim (ins calltarget:$dst, i32imm:$offset), 215193323Sed "#TC_RETURNd8 $dst $offset", 216193323Sed []>; 217193323Sed 218193323Sedlet isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 219263508Sdimdef TCRETURNai8 :Pseudo<(outs), (ins abscalltarget:$func, i32imm:$offset), 220193323Sed "#TC_RETURNa8 $func $offset", 221193323Sed [(PPCtc_return (i64 imm:$func), imm:$offset)]>; 222193323Sed 223193323Sedlet isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 224239462Sdimdef TCRETURNri8 : Pseudo<(outs), (ins CTRRC8:$dst, i32imm:$offset), 225193323Sed "#TC_RETURNr8 $dst $offset", 226193323Sed []>; 227193323Sed 228249423Sdimlet isCodeGenOnly = 1 in { 229193323Sed 230193323Sedlet isTerminator = 1, isBarrier = 1, PPC970_Unit = 7, isBranch = 1, 231249423Sdim isIndirectBranch = 1, isCall = 1, isReturn = 1, Uses = [CTR8, RM] in 232249423Sdimdef TAILBCTR8 : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", BrB, []>, 233249423Sdim Requires<[In64BitMode]>; 234193323Sed 235193323Sed 236193323Sedlet isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7, 237193323Sed isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in 238193323Seddef TAILB8 : IForm<18, 0, 0, (outs), (ins calltarget:$dst), 239193323Sed "b $dst", BrB, 240193323Sed []>; 241193323Sed 242193323Sed 243193323Sedlet isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7, 244193323Sed isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in 245263508Sdimdef TAILBA8 : IForm<18, 0, 0, (outs), (ins abscalltarget:$dst), 246193323Sed "ba $dst", BrB, 247193323Sed []>; 248193323Sed 249249423Sdim} 250251662Sdim} // Interpretation64Bit 251249423Sdim 252193323Seddef : Pat<(PPCtc_return (i64 tglobaladdr:$dst), imm:$imm), 253193323Sed (TCRETURNdi8 tglobaladdr:$dst, imm:$imm)>; 254193323Sed 255193323Seddef : Pat<(PPCtc_return (i64 texternalsym:$dst), imm:$imm), 256193323Sed (TCRETURNdi8 texternalsym:$dst, imm:$imm)>; 257193323Sed 258193323Seddef : Pat<(PPCtc_return CTRRC8:$dst, imm:$imm), 259193323Sed (TCRETURNri8 CTRRC8:$dst, imm:$imm)>; 260193323Sed 261239462Sdim 262249423Sdim// 64-bit CR instructions 263251662Sdimlet Interpretation64Bit = 1 in { 264251662Sdimlet neverHasSideEffects = 1 in { 265263508Sdimdef MTOCRF8: XFXForm_5a<31, 144, (outs crbitm:$FXM), (ins g8rc:$ST), 266263508Sdim "mtocrf $FXM, $ST", BrMCRX>, 267263508Sdim PPC970_DGroup_First, PPC970_Unit_CRU; 268263508Sdim 269263508Sdimdef MTCRF8 : XFXForm_5<31, 144, (outs), (ins i32imm:$FXM, g8rc:$rS), 270234353Sdim "mtcrf $FXM, $rS", BrMCRX>, 271234353Sdim PPC970_MicroCode, PPC970_Unit_CRU; 272193323Sed 273263508Sdimlet hasExtraSrcRegAllocReq = 1 in // to enable post-ra anti-dep breaking. 274263508Sdimdef MFOCRF8: XFXForm_5a<31, 19, (outs g8rc:$rT), (ins crbitm:$FXM), 275263508Sdim "mfocrf $rT, $FXM", SprMFCR>, 276263508Sdim PPC970_DGroup_First, PPC970_Unit_CRU; 277251662Sdim 278251662Sdimdef MFCR8 : XFXForm_3<31, 19, (outs g8rc:$rT), (ins), 279234353Sdim "mfcr $rT", SprMFCR>, 280234353Sdim PPC970_MicroCode, PPC970_Unit_CRU; 281263508Sdim} // neverHasSideEffects = 1 282234353Sdim 283249423Sdimlet hasSideEffects = 1, isBarrier = 1, usesCustomInserter = 1 in { 284263508Sdim let Defs = [CTR8] in 285251662Sdim def EH_SjLj_SetJmp64 : Pseudo<(outs gprc:$dst), (ins memr:$buf), 286249423Sdim "#EH_SJLJ_SETJMP64", 287249423Sdim [(set i32:$dst, (PPCeh_sjlj_setjmp addr:$buf))]>, 288249423Sdim Requires<[In64BitMode]>; 289249423Sdim let isTerminator = 1 in 290249423Sdim def EH_SjLj_LongJmp64 : Pseudo<(outs), (ins memr:$buf), 291249423Sdim "#EH_SJLJ_LONGJMP64", 292249423Sdim [(PPCeh_sjlj_longjmp addr:$buf)]>, 293249423Sdim Requires<[In64BitMode]>; 294249423Sdim} 295249423Sdim 296193323Sed//===----------------------------------------------------------------------===// 297193323Sed// 64-bit SPR manipulation instrs. 298193323Sed 299193323Sedlet Uses = [CTR8] in { 300251662Sdimdef MFCTR8 : XFXForm_1_ext<31, 339, 9, (outs g8rc:$rT), (ins), 301193323Sed "mfctr $rT", SprMFSPR>, 302193323Sed PPC970_DGroup_First, PPC970_Unit_FXU; 303193323Sed} 304249423Sdimlet Pattern = [(PPCmtctr i64:$rS)], Defs = [CTR8] in { 305251662Sdimdef MTCTR8 : XFXForm_7_ext<31, 467, 9, (outs), (ins g8rc:$rS), 306193323Sed "mtctr $rS", SprMTSPR>, 307193323Sed PPC970_DGroup_First, PPC970_Unit_FXU; 308193323Sed} 309263508Sdimlet hasSideEffects = 1, isCodeGenOnly = 1, Defs = [CTR8] in { 310263508Sdimlet Pattern = [(int_ppc_mtctr i64:$rS)] in 311263508Sdimdef MTCTR8loop : XFXForm_7_ext<31, 467, 9, (outs), (ins g8rc:$rS), 312263508Sdim "mtctr $rS", SprMTSPR>, 313263508Sdim PPC970_DGroup_First, PPC970_Unit_FXU; 314263508Sdim} 315193323Sed 316263508Sdimlet isCodeGenOnly = 1, Pattern = [(set i64:$rT, readcyclecounter)] in 317251662Sdimdef MFTB8 : XFXForm_1_ext<31, 339, 268, (outs g8rc:$rT), (ins), 318239462Sdim "mfspr $rT, 268", SprMFTB>, 319239462Sdim PPC970_DGroup_First, PPC970_Unit_FXU; 320239462Sdim// Note that encoding mftb using mfspr is now the preferred form, 321239462Sdim// and has been since at least ISA v2.03. The mftb instruction has 322239462Sdim// now been phased out. Using mfspr, however, is known not to work on 323239462Sdim// the POWER3. 324239462Sdim 325193323Sedlet Defs = [X1], Uses = [X1] in 326251662Sdimdef DYNALLOC8 : Pseudo<(outs g8rc:$result), (ins g8rc:$negsize, memri:$fpsi),"#DYNALLOC8", 327249423Sdim [(set i64:$result, 328249423Sdim (PPCdynalloc i64:$negsize, iaddr:$fpsi))]>; 329193323Sed 330193323Sedlet Defs = [LR8] in { 331251662Sdimdef MTLR8 : XFXForm_7_ext<31, 467, 8, (outs), (ins g8rc:$rS), 332193323Sed "mtlr $rS", SprMTSPR>, 333193323Sed PPC970_DGroup_First, PPC970_Unit_FXU; 334193323Sed} 335193323Sedlet Uses = [LR8] in { 336251662Sdimdef MFLR8 : XFXForm_1_ext<31, 339, 8, (outs g8rc:$rT), (ins), 337193323Sed "mflr $rT", SprMFSPR>, 338193323Sed PPC970_DGroup_First, PPC970_Unit_FXU; 339193323Sed} 340251662Sdim} // Interpretation64Bit 341193323Sed 342193323Sed//===----------------------------------------------------------------------===// 343193323Sed// Fixed point instructions. 344193323Sed// 345193323Sed 346193323Sedlet PPC970_Unit = 1 in { // FXU Operations. 347251662Sdimlet Interpretation64Bit = 1 in { 348251662Sdimlet neverHasSideEffects = 1 in { 349193323Sed 350243830Sdimlet isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in { 351263508Sdimdef LI8 : DForm_2_r0<14, (outs g8rc:$rD), (ins s16imm64:$imm), 352239462Sdim "li $rD, $imm", IntSimple, 353263508Sdim [(set i64:$rD, imm64SExt16:$imm)]>; 354263508Sdimdef LIS8 : DForm_2_r0<15, (outs g8rc:$rD), (ins s17imm64:$imm), 355239462Sdim "lis $rD, $imm", IntSimple, 356249423Sdim [(set i64:$rD, imm16ShiftedSExt:$imm)]>; 357243830Sdim} 358193323Sed 359193323Sed// Logical ops. 360251662Sdimdefm NAND8: XForm_6r<31, 476, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB), 361251662Sdim "nand", "$rA, $rS, $rB", IntSimple, 362251662Sdim [(set i64:$rA, (not (and i64:$rS, i64:$rB)))]>; 363251662Sdimdefm AND8 : XForm_6r<31, 28, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB), 364251662Sdim "and", "$rA, $rS, $rB", IntSimple, 365251662Sdim [(set i64:$rA, (and i64:$rS, i64:$rB))]>; 366251662Sdimdefm ANDC8: XForm_6r<31, 60, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB), 367251662Sdim "andc", "$rA, $rS, $rB", IntSimple, 368251662Sdim [(set i64:$rA, (and i64:$rS, (not i64:$rB)))]>; 369251662Sdimdefm OR8 : XForm_6r<31, 444, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB), 370251662Sdim "or", "$rA, $rS, $rB", IntSimple, 371251662Sdim [(set i64:$rA, (or i64:$rS, i64:$rB))]>; 372251662Sdimdefm NOR8 : XForm_6r<31, 124, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB), 373251662Sdim "nor", "$rA, $rS, $rB", IntSimple, 374251662Sdim [(set i64:$rA, (not (or i64:$rS, i64:$rB)))]>; 375251662Sdimdefm ORC8 : XForm_6r<31, 412, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB), 376251662Sdim "orc", "$rA, $rS, $rB", IntSimple, 377251662Sdim [(set i64:$rA, (or i64:$rS, (not i64:$rB)))]>; 378251662Sdimdefm EQV8 : XForm_6r<31, 284, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB), 379251662Sdim "eqv", "$rA, $rS, $rB", IntSimple, 380251662Sdim [(set i64:$rA, (not (xor i64:$rS, i64:$rB)))]>; 381251662Sdimdefm XOR8 : XForm_6r<31, 316, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB), 382251662Sdim "xor", "$rA, $rS, $rB", IntSimple, 383251662Sdim [(set i64:$rA, (xor i64:$rS, i64:$rB))]>; 384193323Sed 385193323Sed// Logical ops with immediate. 386251662Sdimlet Defs = [CR0] in { 387251662Sdimdef ANDIo8 : DForm_4<28, (outs g8rc:$dst), (ins g8rc:$src1, u16imm:$src2), 388193323Sed "andi. $dst, $src1, $src2", IntGeneral, 389249423Sdim [(set i64:$dst, (and i64:$src1, immZExt16:$src2))]>, 390193323Sed isDOT; 391251662Sdimdef ANDISo8 : DForm_4<29, (outs g8rc:$dst), (ins g8rc:$src1, u16imm:$src2), 392193323Sed "andis. $dst, $src1, $src2", IntGeneral, 393249423Sdim [(set i64:$dst, (and i64:$src1, imm16ShiftedZExt:$src2))]>, 394193323Sed isDOT; 395251662Sdim} 396251662Sdimdef ORI8 : DForm_4<24, (outs g8rc:$dst), (ins g8rc:$src1, u16imm:$src2), 397239462Sdim "ori $dst, $src1, $src2", IntSimple, 398249423Sdim [(set i64:$dst, (or i64:$src1, immZExt16:$src2))]>; 399251662Sdimdef ORIS8 : DForm_4<25, (outs g8rc:$dst), (ins g8rc:$src1, u16imm:$src2), 400239462Sdim "oris $dst, $src1, $src2", IntSimple, 401249423Sdim [(set i64:$dst, (or i64:$src1, imm16ShiftedZExt:$src2))]>; 402251662Sdimdef XORI8 : DForm_4<26, (outs g8rc:$dst), (ins g8rc:$src1, u16imm:$src2), 403239462Sdim "xori $dst, $src1, $src2", IntSimple, 404249423Sdim [(set i64:$dst, (xor i64:$src1, immZExt16:$src2))]>; 405251662Sdimdef XORIS8 : DForm_4<27, (outs g8rc:$dst), (ins g8rc:$src1, u16imm:$src2), 406239462Sdim "xoris $dst, $src1, $src2", IntSimple, 407249423Sdim [(set i64:$dst, (xor i64:$src1, imm16ShiftedZExt:$src2))]>; 408193323Sed 409251662Sdimdefm ADD8 : XOForm_1r<31, 266, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), 410251662Sdim "add", "$rT, $rA, $rB", IntSimple, 411251662Sdim [(set i64:$rT, (add i64:$rA, i64:$rB))]>; 412249423Sdim// ADD8 has a special form: reg = ADD8(reg, sym@tls) for use by the 413249423Sdim// initial-exec thread-local storage model. 414251662Sdimdef ADD8TLS : XOForm_1<31, 266, 0, (outs g8rc:$rT), (ins g8rc:$rA, tlsreg:$rB), 415263508Sdim "add $rT, $rA, $rB", IntSimple, 416249423Sdim [(set i64:$rT, (add i64:$rA, tglobaltlsaddr:$rB))]>; 417193323Sed 418251662Sdimdefm ADDC8 : XOForm_1rc<31, 10, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), 419251662Sdim "addc", "$rT, $rA, $rB", IntGeneral, 420251662Sdim [(set i64:$rT, (addc i64:$rA, i64:$rB))]>, 421251662Sdim PPC970_DGroup_Cracked; 422251662Sdimlet Defs = [CARRY] in 423251662Sdimdef ADDIC8 : DForm_2<12, (outs g8rc:$rD), (ins g8rc:$rA, s16imm64:$imm), 424198090Srdivacky "addic $rD, $rA, $imm", IntGeneral, 425263508Sdim [(set i64:$rD, (addc i64:$rA, imm64SExt16:$imm))]>; 426263508Sdimdef ADDI8 : DForm_2<14, (outs g8rc:$rD), (ins g8rc_nox0:$rA, s16imm64:$imm), 427239462Sdim "addi $rD, $rA, $imm", IntSimple, 428263508Sdim [(set i64:$rD, (add i64:$rA, imm64SExt16:$imm))]>; 429263508Sdimdef ADDIS8 : DForm_2<15, (outs g8rc:$rD), (ins g8rc_nox0:$rA, s17imm64:$imm), 430239462Sdim "addis $rD, $rA, $imm", IntSimple, 431249423Sdim [(set i64:$rD, (add i64:$rA, imm16ShiftedSExt:$imm))]>; 432193323Sed 433198090Srdivackylet Defs = [CARRY] in { 434251662Sdimdef SUBFIC8: DForm_2< 8, (outs g8rc:$rD), (ins g8rc:$rA, s16imm64:$imm), 435193323Sed "subfic $rD, $rA, $imm", IntGeneral, 436263508Sdim [(set i64:$rD, (subc imm64SExt16:$imm, i64:$rA))]>; 437251662Sdimdefm SUBFC8 : XOForm_1r<31, 8, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), 438251662Sdim "subfc", "$rT, $rA, $rB", IntGeneral, 439251662Sdim [(set i64:$rT, (subc i64:$rB, i64:$rA))]>, 440251662Sdim PPC970_DGroup_Cracked; 441198090Srdivacky} 442251662Sdimdefm SUBF8 : XOForm_1r<31, 40, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), 443251662Sdim "subf", "$rT, $rA, $rB", IntGeneral, 444251662Sdim [(set i64:$rT, (sub i64:$rB, i64:$rA))]>; 445251662Sdimdefm NEG8 : XOForm_3r<31, 104, 0, (outs g8rc:$rT), (ins g8rc:$rA), 446251662Sdim "neg", "$rT, $rA", IntSimple, 447251662Sdim [(set i64:$rT, (ineg i64:$rA))]>; 448251662Sdimlet Uses = [CARRY] in { 449251662Sdimdefm ADDE8 : XOForm_1rc<31, 138, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), 450251662Sdim "adde", "$rT, $rA, $rB", IntGeneral, 451251662Sdim [(set i64:$rT, (adde i64:$rA, i64:$rB))]>; 452251662Sdimdefm ADDME8 : XOForm_3rc<31, 234, 0, (outs g8rc:$rT), (ins g8rc:$rA), 453251662Sdim "addme", "$rT, $rA", IntGeneral, 454251662Sdim [(set i64:$rT, (adde i64:$rA, -1))]>; 455251662Sdimdefm ADDZE8 : XOForm_3rc<31, 202, 0, (outs g8rc:$rT), (ins g8rc:$rA), 456251662Sdim "addze", "$rT, $rA", IntGeneral, 457251662Sdim [(set i64:$rT, (adde i64:$rA, 0))]>; 458251662Sdimdefm SUBFE8 : XOForm_1rc<31, 136, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), 459251662Sdim "subfe", "$rT, $rA, $rB", IntGeneral, 460251662Sdim [(set i64:$rT, (sube i64:$rB, i64:$rA))]>; 461251662Sdimdefm SUBFME8 : XOForm_3rc<31, 232, 0, (outs g8rc:$rT), (ins g8rc:$rA), 462251662Sdim "subfme", "$rT, $rA", IntGeneral, 463251662Sdim [(set i64:$rT, (sube -1, i64:$rA))]>; 464251662Sdimdefm SUBFZE8 : XOForm_3rc<31, 200, 0, (outs g8rc:$rT), (ins g8rc:$rA), 465251662Sdim "subfze", "$rT, $rA", IntGeneral, 466251662Sdim [(set i64:$rT, (sube 0, i64:$rA))]>; 467198090Srdivacky} 468193323Sed 469193323Sed 470251662Sdimdefm MULHD : XOForm_1r<31, 73, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), 471251662Sdim "mulhd", "$rT, $rA, $rB", IntMulHW, 472251662Sdim [(set i64:$rT, (mulhs i64:$rA, i64:$rB))]>; 473251662Sdimdefm MULHDU : XOForm_1r<31, 9, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), 474251662Sdim "mulhdu", "$rT, $rA, $rB", IntMulHWU, 475251662Sdim [(set i64:$rT, (mulhu i64:$rA, i64:$rB))]>; 476251662Sdim} 477251662Sdim} // Interpretation64Bit 478193323Sed 479251662Sdimlet isCompare = 1, neverHasSideEffects = 1 in { 480251662Sdim def CMPD : XForm_16_ext<31, 0, (outs crrc:$crD), (ins g8rc:$rA, g8rc:$rB), 481251662Sdim "cmpd $crD, $rA, $rB", IntCompare>, isPPC64; 482251662Sdim def CMPLD : XForm_16_ext<31, 32, (outs crrc:$crD), (ins g8rc:$rA, g8rc:$rB), 483251662Sdim "cmpld $crD, $rA, $rB", IntCompare>, isPPC64; 484251662Sdim def CMPDI : DForm_5_ext<11, (outs crrc:$crD), (ins g8rc:$rA, s16imm:$imm), 485251662Sdim "cmpdi $crD, $rA, $imm", IntCompare>, isPPC64; 486251662Sdim def CMPLDI : DForm_6_ext<10, (outs crrc:$dst), (ins g8rc:$src1, u16imm:$src2), 487251662Sdim "cmpldi $dst, $src1, $src2", IntCompare>, isPPC64; 488198090Srdivacky} 489193323Sed 490251662Sdimlet neverHasSideEffects = 1 in { 491251662Sdimdefm SLD : XForm_6r<31, 27, (outs g8rc:$rA), (ins g8rc:$rS, gprc:$rB), 492251662Sdim "sld", "$rA, $rS, $rB", IntRotateD, 493251662Sdim [(set i64:$rA, (PPCshl i64:$rS, i32:$rB))]>, isPPC64; 494251662Sdimdefm SRD : XForm_6r<31, 539, (outs g8rc:$rA), (ins g8rc:$rS, gprc:$rB), 495251662Sdim "srd", "$rA, $rS, $rB", IntRotateD, 496251662Sdim [(set i64:$rA, (PPCsrl i64:$rS, i32:$rB))]>, isPPC64; 497251662Sdimdefm SRAD : XForm_6rc<31, 794, (outs g8rc:$rA), (ins g8rc:$rS, gprc:$rB), 498251662Sdim "srad", "$rA, $rS, $rB", IntRotateD, 499251662Sdim [(set i64:$rA, (PPCsra i64:$rS, i32:$rB))]>, isPPC64; 500193323Sed 501251662Sdimlet Interpretation64Bit = 1 in { 502251662Sdimdefm EXTSB8 : XForm_11r<31, 954, (outs g8rc:$rA), (ins g8rc:$rS), 503251662Sdim "extsb", "$rA, $rS", IntSimple, 504251662Sdim [(set i64:$rA, (sext_inreg i64:$rS, i8))]>; 505251662Sdimdefm EXTSH8 : XForm_11r<31, 922, (outs g8rc:$rA), (ins g8rc:$rS), 506251662Sdim "extsh", "$rA, $rS", IntSimple, 507251662Sdim [(set i64:$rA, (sext_inreg i64:$rS, i16))]>; 508251662Sdim} // Interpretation64Bit 509193323Sed 510263508Sdim// For fast-isel: 511263508Sdimlet isCodeGenOnly = 1 in { 512263508Sdimdef EXTSB8_32_64 : XForm_11<31, 954, (outs g8rc:$rA), (ins gprc:$rS), 513263508Sdim "extsb $rA, $rS", IntSimple, []>, isPPC64; 514263508Sdimdef EXTSH8_32_64 : XForm_11<31, 922, (outs g8rc:$rA), (ins gprc:$rS), 515263508Sdim "extsh $rA, $rS", IntSimple, []>, isPPC64; 516263508Sdim} // isCodeGenOnly for fast-isel 517263508Sdim 518251662Sdimdefm EXTSW : XForm_11r<31, 986, (outs g8rc:$rA), (ins g8rc:$rS), 519251662Sdim "extsw", "$rA, $rS", IntSimple, 520251662Sdim [(set i64:$rA, (sext_inreg i64:$rS, i32))]>, isPPC64; 521251662Sdimlet Interpretation64Bit = 1 in 522251662Sdimdefm EXTSW_32_64 : XForm_11r<31, 986, (outs g8rc:$rA), (ins gprc:$rS), 523251662Sdim "extsw", "$rA, $rS", IntSimple, 524251662Sdim [(set i64:$rA, (sext i32:$rS))]>, isPPC64; 525251662Sdim 526251662Sdimdefm SRADI : XSForm_1rc<31, 413, (outs g8rc:$rA), (ins g8rc:$rS, u6imm:$SH), 527251662Sdim "sradi", "$rA, $rS, $SH", IntRotateDI, 528251662Sdim [(set i64:$rA, (sra i64:$rS, (i32 imm:$SH)))]>, isPPC64; 529251662Sdimdefm CNTLZD : XForm_11r<31, 58, (outs g8rc:$rA), (ins g8rc:$rS), 530251662Sdim "cntlzd", "$rA, $rS", IntGeneral, 531251662Sdim [(set i64:$rA, (ctlz i64:$rS))]>; 532263508Sdimdef POPCNTD : XForm_11<31, 506, (outs g8rc:$rA), (ins g8rc:$rS), 533263508Sdim "popcntd $rA, $rS", IntGeneral, 534263508Sdim [(set i64:$rA, (ctpop i64:$rS))]>; 535251662Sdim 536249423Sdim// popcntw also does a population count on the high 32 bits (storing the 537249423Sdim// results in the high 32-bits of the output). We'll ignore that here (which is 538249423Sdim// safe because we never separately use the high part of the 64-bit registers). 539263508Sdimdef POPCNTW : XForm_11<31, 378, (outs gprc:$rA), (ins gprc:$rS), 540263508Sdim "popcntw $rA, $rS", IntGeneral, 541263508Sdim [(set i32:$rA, (ctpop i32:$rS))]>; 542249423Sdim 543251662Sdimdefm DIVD : XOForm_1r<31, 489, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), 544251662Sdim "divd", "$rT, $rA, $rB", IntDivD, 545251662Sdim [(set i64:$rT, (sdiv i64:$rA, i64:$rB))]>, isPPC64, 546251662Sdim PPC970_DGroup_First, PPC970_DGroup_Cracked; 547251662Sdimdefm DIVDU : XOForm_1r<31, 457, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), 548251662Sdim "divdu", "$rT, $rA, $rB", IntDivD, 549251662Sdim [(set i64:$rT, (udiv i64:$rA, i64:$rB))]>, isPPC64, 550251662Sdim PPC970_DGroup_First, PPC970_DGroup_Cracked; 551251662Sdimdefm MULLD : XOForm_1r<31, 233, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), 552251662Sdim "mulld", "$rT, $rA, $rB", IntMulHD, 553251662Sdim [(set i64:$rT, (mul i64:$rA, i64:$rB))]>, isPPC64; 554263508Sdimdef MULLI8 : DForm_2<7, (outs g8rc:$rD), (ins g8rc:$rA, s16imm64:$imm), 555263508Sdim "mulli $rD, $rA, $imm", IntMulLI, 556263508Sdim [(set i64:$rD, (mul i64:$rA, imm64SExt16:$imm))]>; 557251662Sdim} 558193323Sed 559251662Sdimlet neverHasSideEffects = 1 in { 560193323Sedlet isCommutable = 1 in { 561251662Sdimdefm RLDIMI : MDForm_1r<30, 3, (outs g8rc:$rA), 562251662Sdim (ins g8rc:$rSi, g8rc:$rS, u6imm:$SH, u6imm:$MBE), 563251662Sdim "rldimi", "$rA, $rS, $SH, $MBE", IntRotateDI, 564251662Sdim []>, isPPC64, RegConstraint<"$rSi = $rA">, 565251662Sdim NoEncode<"$rSi">; 566193323Sed} 567193323Sed 568193323Sed// Rotate instructions. 569251662Sdimdefm RLDCL : MDSForm_1r<30, 8, 570251662Sdim (outs g8rc:$rA), (ins g8rc:$rS, gprc:$rB, u6imm:$MBE), 571251662Sdim "rldcl", "$rA, $rS, $rB, $MBE", IntRotateD, 572251662Sdim []>, isPPC64; 573263508Sdimdefm RLDCR : MDSForm_1r<30, 9, 574263508Sdim (outs g8rc:$rA), (ins g8rc:$rS, gprc:$rB, u6imm:$MBE), 575263508Sdim "rldcr", "$rA, $rS, $rB, $MBE", IntRotateD, 576263508Sdim []>, isPPC64; 577251662Sdimdefm RLDICL : MDForm_1r<30, 0, 578251662Sdim (outs g8rc:$rA), (ins g8rc:$rS, u6imm:$SH, u6imm:$MBE), 579251662Sdim "rldicl", "$rA, $rS, $SH, $MBE", IntRotateDI, 580251662Sdim []>, isPPC64; 581263508Sdim// For fast-isel: 582263508Sdimlet isCodeGenOnly = 1 in 583263508Sdimdef RLDICL_32_64 : MDForm_1<30, 0, 584263508Sdim (outs g8rc:$rA), 585263508Sdim (ins gprc:$rS, u6imm:$SH, u6imm:$MBE), 586263508Sdim "rldicl $rA, $rS, $SH, $MBE", IntRotateDI, 587263508Sdim []>, isPPC64; 588263508Sdim// End fast-isel. 589251662Sdimdefm RLDICR : MDForm_1r<30, 1, 590251662Sdim (outs g8rc:$rA), (ins g8rc:$rS, u6imm:$SH, u6imm:$MBE), 591251662Sdim "rldicr", "$rA, $rS, $SH, $MBE", IntRotateDI, 592251662Sdim []>, isPPC64; 593263508Sdimdefm RLDIC : MDForm_1r<30, 2, 594263508Sdim (outs g8rc:$rA), (ins g8rc:$rS, u6imm:$SH, u6imm:$MBE), 595263508Sdim "rldic", "$rA, $rS, $SH, $MBE", IntRotateDI, 596263508Sdim []>, isPPC64; 597234353Sdim 598251662Sdimlet Interpretation64Bit = 1 in { 599251662Sdimdefm RLWINM8 : MForm_2r<21, (outs g8rc:$rA), 600251662Sdim (ins g8rc:$rS, u5imm:$SH, u5imm:$MB, u5imm:$ME), 601251662Sdim "rlwinm", "$rA, $rS, $SH, $MB, $ME", IntGeneral, 602251662Sdim []>; 603234353Sdim 604251662Sdimlet isSelect = 1 in 605243830Sdimdef ISEL8 : AForm_4<31, 15, 606251662Sdim (outs g8rc:$rT), (ins g8rc_nox0:$rA, g8rc:$rB, crbitrc:$cond), 607239462Sdim "isel $rT, $rA, $rB, $cond", IntGeneral, 608239462Sdim []>; 609251662Sdim} // Interpretation64Bit 610251662Sdim} // neverHasSideEffects = 1 611193323Sed} // End FXU Operations. 612193323Sed 613193323Sed 614193323Sed//===----------------------------------------------------------------------===// 615193323Sed// Load/Store instructions. 616193323Sed// 617193323Sed 618193323Sed 619193323Sed// Sign extending loads. 620193323Sedlet canFoldAsLoad = 1, PPC970_Unit = 2 in { 621251662Sdimlet Interpretation64Bit = 1 in 622251662Sdimdef LHA8: DForm_1<42, (outs g8rc:$rD), (ins memri:$src), 623193323Sed "lha $rD, $src", LdStLHA, 624249423Sdim [(set i64:$rD, (sextloadi16 iaddr:$src))]>, 625193323Sed PPC970_DGroup_Cracked; 626251662Sdimdef LWA : DSForm_1<58, 2, (outs g8rc:$rD), (ins memrix:$src), 627193323Sed "lwa $rD, $src", LdStLWA, 628249423Sdim [(set i64:$rD, 629249423Sdim (aligned4sextloadi32 ixaddr:$src))]>, isPPC64, 630193323Sed PPC970_DGroup_Cracked; 631251662Sdimlet Interpretation64Bit = 1 in 632251662Sdimdef LHAX8: XForm_1<31, 343, (outs g8rc:$rD), (ins memrr:$src), 633193323Sed "lhax $rD, $src", LdStLHA, 634249423Sdim [(set i64:$rD, (sextloadi16 xaddr:$src))]>, 635193323Sed PPC970_DGroup_Cracked; 636251662Sdimdef LWAX : XForm_1<31, 341, (outs g8rc:$rD), (ins memrr:$src), 637193323Sed "lwax $rD, $src", LdStLHA, 638249423Sdim [(set i64:$rD, (sextloadi32 xaddr:$src))]>, isPPC64, 639193323Sed PPC970_DGroup_Cracked; 640263508Sdim// For fast-isel: 641263508Sdimlet isCodeGenOnly = 1, mayLoad = 1 in { 642263508Sdimdef LWA_32 : DSForm_1<58, 2, (outs gprc:$rD), (ins memrix:$src), 643263508Sdim "lwa $rD, $src", LdStLWA, []>, isPPC64, 644263508Sdim PPC970_DGroup_Cracked; 645263508Sdimdef LWAX_32 : XForm_1<31, 341, (outs gprc:$rD), (ins memrr:$src), 646263508Sdim "lwax $rD, $src", LdStLHA, []>, isPPC64, 647263508Sdim PPC970_DGroup_Cracked; 648263508Sdim} // end fast-isel isCodeGenOnly 649193323Sed 650193323Sed// Update forms. 651251662Sdimlet mayLoad = 1, neverHasSideEffects = 1 in { 652251662Sdimlet Interpretation64Bit = 1 in 653251662Sdimdef LHAU8 : DForm_1<43, (outs g8rc:$rD, ptr_rc_nor0:$ea_result), 654249423Sdim (ins memri:$addr), 655249423Sdim "lhau $rD, $addr", LdStLHAU, 656249423Sdim []>, RegConstraint<"$addr.reg = $ea_result">, 657193323Sed NoEncode<"$ea_result">; 658193323Sed// NO LWAU! 659193323Sed 660251662Sdimlet Interpretation64Bit = 1 in 661251662Sdimdef LHAUX8 : XForm_1<31, 375, (outs g8rc:$rD, ptr_rc_nor0:$ea_result), 662239462Sdim (ins memrr:$addr), 663243830Sdim "lhaux $rD, $addr", LdStLHAU, 664249423Sdim []>, RegConstraint<"$addr.ptrreg = $ea_result">, 665239462Sdim NoEncode<"$ea_result">; 666251662Sdimdef LWAUX : XForm_1<31, 373, (outs g8rc:$rD, ptr_rc_nor0:$ea_result), 667239462Sdim (ins memrr:$addr), 668243830Sdim "lwaux $rD, $addr", LdStLHAU, 669249423Sdim []>, RegConstraint<"$addr.ptrreg = $ea_result">, 670239462Sdim NoEncode<"$ea_result">, isPPC64; 671193323Sed} 672249423Sdim} 673193323Sed 674251662Sdimlet Interpretation64Bit = 1 in { 675193323Sed// Zero extending loads. 676193323Sedlet canFoldAsLoad = 1, PPC970_Unit = 2 in { 677251662Sdimdef LBZ8 : DForm_1<34, (outs g8rc:$rD), (ins memri:$src), 678234353Sdim "lbz $rD, $src", LdStLoad, 679249423Sdim [(set i64:$rD, (zextloadi8 iaddr:$src))]>; 680251662Sdimdef LHZ8 : DForm_1<40, (outs g8rc:$rD), (ins memri:$src), 681234353Sdim "lhz $rD, $src", LdStLoad, 682249423Sdim [(set i64:$rD, (zextloadi16 iaddr:$src))]>; 683251662Sdimdef LWZ8 : DForm_1<32, (outs g8rc:$rD), (ins memri:$src), 684234353Sdim "lwz $rD, $src", LdStLoad, 685249423Sdim [(set i64:$rD, (zextloadi32 iaddr:$src))]>, isPPC64; 686193323Sed 687251662Sdimdef LBZX8 : XForm_1<31, 87, (outs g8rc:$rD), (ins memrr:$src), 688234353Sdim "lbzx $rD, $src", LdStLoad, 689249423Sdim [(set i64:$rD, (zextloadi8 xaddr:$src))]>; 690251662Sdimdef LHZX8 : XForm_1<31, 279, (outs g8rc:$rD), (ins memrr:$src), 691234353Sdim "lhzx $rD, $src", LdStLoad, 692249423Sdim [(set i64:$rD, (zextloadi16 xaddr:$src))]>; 693251662Sdimdef LWZX8 : XForm_1<31, 23, (outs g8rc:$rD), (ins memrr:$src), 694234353Sdim "lwzx $rD, $src", LdStLoad, 695249423Sdim [(set i64:$rD, (zextloadi32 xaddr:$src))]>; 696193323Sed 697193323Sed 698193323Sed// Update forms. 699251662Sdimlet mayLoad = 1, neverHasSideEffects = 1 in { 700251662Sdimdef LBZU8 : DForm_1<35, (outs g8rc:$rD, ptr_rc_nor0:$ea_result), (ins memri:$addr), 701243830Sdim "lbzu $rD, $addr", LdStLoadUpd, 702193323Sed []>, RegConstraint<"$addr.reg = $ea_result">, 703193323Sed NoEncode<"$ea_result">; 704251662Sdimdef LHZU8 : DForm_1<41, (outs g8rc:$rD, ptr_rc_nor0:$ea_result), (ins memri:$addr), 705243830Sdim "lhzu $rD, $addr", LdStLoadUpd, 706193323Sed []>, RegConstraint<"$addr.reg = $ea_result">, 707193323Sed NoEncode<"$ea_result">; 708251662Sdimdef LWZU8 : DForm_1<33, (outs g8rc:$rD, ptr_rc_nor0:$ea_result), (ins memri:$addr), 709243830Sdim "lwzu $rD, $addr", LdStLoadUpd, 710193323Sed []>, RegConstraint<"$addr.reg = $ea_result">, 711193323Sed NoEncode<"$ea_result">; 712239462Sdim 713251662Sdimdef LBZUX8 : XForm_1<31, 119, (outs g8rc:$rD, ptr_rc_nor0:$ea_result), 714239462Sdim (ins memrr:$addr), 715243830Sdim "lbzux $rD, $addr", LdStLoadUpd, 716249423Sdim []>, RegConstraint<"$addr.ptrreg = $ea_result">, 717239462Sdim NoEncode<"$ea_result">; 718251662Sdimdef LHZUX8 : XForm_1<31, 311, (outs g8rc:$rD, ptr_rc_nor0:$ea_result), 719239462Sdim (ins memrr:$addr), 720243830Sdim "lhzux $rD, $addr", LdStLoadUpd, 721249423Sdim []>, RegConstraint<"$addr.ptrreg = $ea_result">, 722239462Sdim NoEncode<"$ea_result">; 723251662Sdimdef LWZUX8 : XForm_1<31, 55, (outs g8rc:$rD, ptr_rc_nor0:$ea_result), 724239462Sdim (ins memrr:$addr), 725243830Sdim "lwzux $rD, $addr", LdStLoadUpd, 726249423Sdim []>, RegConstraint<"$addr.ptrreg = $ea_result">, 727239462Sdim NoEncode<"$ea_result">; 728193323Sed} 729193323Sed} 730251662Sdim} // Interpretation64Bit 731193323Sed 732193323Sed 733193323Sed// Full 8-byte loads. 734193323Sedlet canFoldAsLoad = 1, PPC970_Unit = 2 in { 735251662Sdimdef LD : DSForm_1<58, 0, (outs g8rc:$rD), (ins memrix:$src), 736193323Sed "ld $rD, $src", LdStLD, 737249423Sdim [(set i64:$rD, (aligned4load ixaddr:$src))]>, isPPC64; 738249423Sdim// The following three definitions are selected for small code model only. 739249423Sdim// Otherwise, we need to create two instructions to form a 32-bit offset, 740249423Sdim// so we have a custom matcher for TOC_ENTRY in PPCDAGToDAGIsel::Select(). 741251662Sdimdef LDtoc: Pseudo<(outs g8rc:$rD), (ins tocentry:$disp, g8rc:$reg), 742243830Sdim "#LDtoc", 743249423Sdim [(set i64:$rD, 744249423Sdim (PPCtoc_entry tglobaladdr:$disp, i64:$reg))]>, isPPC64; 745251662Sdimdef LDtocJTI: Pseudo<(outs g8rc:$rD), (ins tocentry:$disp, g8rc:$reg), 746243830Sdim "#LDtocJTI", 747249423Sdim [(set i64:$rD, 748249423Sdim (PPCtoc_entry tjumptable:$disp, i64:$reg))]>, isPPC64; 749251662Sdimdef LDtocCPT: Pseudo<(outs g8rc:$rD), (ins tocentry:$disp, g8rc:$reg), 750243830Sdim "#LDtocCPT", 751249423Sdim [(set i64:$rD, 752249423Sdim (PPCtoc_entry tconstpool:$disp, i64:$reg))]>, isPPC64; 753234353Sdim 754249423Sdimlet hasSideEffects = 1, isCodeGenOnly = 1 in { 755243830Sdimlet RST = 2, DS = 2 in 756251662Sdimdef LDinto_toc: DSForm_1a<58, 0, (outs), (ins g8rc:$reg), 757201360Srdivacky "ld 2, 8($reg)", LdStLD, 758249423Sdim [(PPCload_toc i64:$reg)]>, isPPC64; 759218893Sdim 760243830Sdimlet RST = 2, DS = 10, RA = 1 in 761243830Sdimdef LDtoc_restore : DSForm_1a<58, 0, (outs), (ins), 762201360Srdivacky "ld 2, 40(1)", LdStLD, 763218893Sdim [(PPCtoc_restore)]>, isPPC64; 764234353Sdim} 765251662Sdimdef LDX : XForm_1<31, 21, (outs g8rc:$rD), (ins memrr:$src), 766193323Sed "ldx $rD, $src", LdStLD, 767249423Sdim [(set i64:$rD, (load xaddr:$src))]>, isPPC64; 768251662Sdimdef LDBRX : XForm_1<31, 532, (outs g8rc:$rD), (ins memrr:$src), 769249423Sdim "ldbrx $rD, $src", LdStLoad, 770249423Sdim [(set i64:$rD, (PPClbrx xoaddr:$src, i64))]>, isPPC64; 771249423Sdim 772251662Sdimlet mayLoad = 1, neverHasSideEffects = 1 in { 773251662Sdimdef LDU : DSForm_1<58, 1, (outs g8rc:$rD, ptr_rc_nor0:$ea_result), (ins memrix:$addr), 774243830Sdim "ldu $rD, $addr", LdStLDU, 775193323Sed []>, RegConstraint<"$addr.reg = $ea_result">, isPPC64, 776193323Sed NoEncode<"$ea_result">; 777193323Sed 778251662Sdimdef LDUX : XForm_1<31, 53, (outs g8rc:$rD, ptr_rc_nor0:$ea_result), 779239462Sdim (ins memrr:$addr), 780243830Sdim "ldux $rD, $addr", LdStLDU, 781249423Sdim []>, RegConstraint<"$addr.ptrreg = $ea_result">, 782239462Sdim NoEncode<"$ea_result">, isPPC64; 783193323Sed} 784251662Sdim} 785193323Sed 786201360Srdivackydef : Pat<(PPCload ixaddr:$src), 787201360Srdivacky (LD ixaddr:$src)>; 788201360Srdivackydef : Pat<(PPCload xaddr:$src), 789201360Srdivacky (LDX xaddr:$src)>; 790201360Srdivacky 791249423Sdim// Support for medium and large code model. 792251662Sdimdef ADDIStocHA: Pseudo<(outs g8rc:$rD), (ins g8rc_nox0:$reg, tocentry:$disp), 793249423Sdim "#ADDIStocHA", 794249423Sdim [(set i64:$rD, 795249423Sdim (PPCaddisTocHA i64:$reg, tglobaladdr:$disp))]>, 796249423Sdim isPPC64; 797251662Sdimdef LDtocL: Pseudo<(outs g8rc:$rD), (ins tocentry:$disp, g8rc_nox0:$reg), 798249423Sdim "#LDtocL", 799249423Sdim [(set i64:$rD, 800249423Sdim (PPCldTocL tglobaladdr:$disp, i64:$reg))]>, isPPC64; 801251662Sdimdef ADDItocL: Pseudo<(outs g8rc:$rD), (ins g8rc_nox0:$reg, tocentry:$disp), 802249423Sdim "#ADDItocL", 803249423Sdim [(set i64:$rD, 804249423Sdim (PPCaddiTocL i64:$reg, tglobaladdr:$disp))]>, isPPC64; 805249423Sdim 806249423Sdim// Support for thread-local storage. 807263508Sdimdef ADDISgotTprelHA: Pseudo<(outs g8rc:$rD), (ins g8rc_nox0:$reg, s16imm64:$disp), 808249423Sdim "#ADDISgotTprelHA", 809249423Sdim [(set i64:$rD, 810249423Sdim (PPCaddisGotTprelHA i64:$reg, 811249423Sdim tglobaltlsaddr:$disp))]>, 812249423Sdim isPPC64; 813263508Sdimdef LDgotTprelL: Pseudo<(outs g8rc:$rD), (ins s16imm64:$disp, g8rc_nox0:$reg), 814249423Sdim "#LDgotTprelL", 815249423Sdim [(set i64:$rD, 816249423Sdim (PPCldGotTprelL tglobaltlsaddr:$disp, i64:$reg))]>, 817249423Sdim isPPC64; 818249423Sdimdef : Pat<(PPCaddTls i64:$in, tglobaltlsaddr:$g), 819249423Sdim (ADD8TLS $in, tglobaltlsaddr:$g)>; 820263508Sdimdef ADDIStlsgdHA: Pseudo<(outs g8rc:$rD), (ins g8rc_nox0:$reg, s16imm64:$disp), 821249423Sdim "#ADDIStlsgdHA", 822249423Sdim [(set i64:$rD, 823249423Sdim (PPCaddisTlsgdHA i64:$reg, tglobaltlsaddr:$disp))]>, 824249423Sdim isPPC64; 825263508Sdimdef ADDItlsgdL : Pseudo<(outs g8rc:$rD), (ins g8rc_nox0:$reg, s16imm64:$disp), 826249423Sdim "#ADDItlsgdL", 827249423Sdim [(set i64:$rD, 828249423Sdim (PPCaddiTlsgdL i64:$reg, tglobaltlsaddr:$disp))]>, 829249423Sdim isPPC64; 830251662Sdimdef GETtlsADDR : Pseudo<(outs g8rc:$rD), (ins g8rc:$reg, tlsgd:$sym), 831249423Sdim "#GETtlsADDR", 832249423Sdim [(set i64:$rD, 833249423Sdim (PPCgetTlsAddr i64:$reg, tglobaltlsaddr:$sym))]>, 834249423Sdim isPPC64; 835263508Sdimdef ADDIStlsldHA: Pseudo<(outs g8rc:$rD), (ins g8rc_nox0:$reg, s16imm64:$disp), 836249423Sdim "#ADDIStlsldHA", 837249423Sdim [(set i64:$rD, 838249423Sdim (PPCaddisTlsldHA i64:$reg, tglobaltlsaddr:$disp))]>, 839249423Sdim isPPC64; 840263508Sdimdef ADDItlsldL : Pseudo<(outs g8rc:$rD), (ins g8rc_nox0:$reg, s16imm64:$disp), 841249423Sdim "#ADDItlsldL", 842249423Sdim [(set i64:$rD, 843249423Sdim (PPCaddiTlsldL i64:$reg, tglobaltlsaddr:$disp))]>, 844249423Sdim isPPC64; 845251662Sdimdef GETtlsldADDR : Pseudo<(outs g8rc:$rD), (ins g8rc:$reg, tlsgd:$sym), 846249423Sdim "#GETtlsldADDR", 847249423Sdim [(set i64:$rD, 848249423Sdim (PPCgetTlsldAddr i64:$reg, tglobaltlsaddr:$sym))]>, 849249423Sdim isPPC64; 850263508Sdimdef ADDISdtprelHA: Pseudo<(outs g8rc:$rD), (ins g8rc_nox0:$reg, s16imm64:$disp), 851249423Sdim "#ADDISdtprelHA", 852249423Sdim [(set i64:$rD, 853249423Sdim (PPCaddisDtprelHA i64:$reg, 854249423Sdim tglobaltlsaddr:$disp))]>, 855249423Sdim isPPC64; 856263508Sdimdef ADDIdtprelL : Pseudo<(outs g8rc:$rD), (ins g8rc_nox0:$reg, s16imm64:$disp), 857249423Sdim "#ADDIdtprelL", 858249423Sdim [(set i64:$rD, 859249423Sdim (PPCaddiDtprelL i64:$reg, tglobaltlsaddr:$disp))]>, 860249423Sdim isPPC64; 861249423Sdim 862193323Sedlet PPC970_Unit = 2 in { 863251662Sdimlet Interpretation64Bit = 1 in { 864193323Sed// Truncating stores. 865251662Sdimdef STB8 : DForm_1<38, (outs), (ins g8rc:$rS, memri:$src), 866234353Sdim "stb $rS, $src", LdStStore, 867249423Sdim [(truncstorei8 i64:$rS, iaddr:$src)]>; 868251662Sdimdef STH8 : DForm_1<44, (outs), (ins g8rc:$rS, memri:$src), 869234353Sdim "sth $rS, $src", LdStStore, 870249423Sdim [(truncstorei16 i64:$rS, iaddr:$src)]>; 871251662Sdimdef STW8 : DForm_1<36, (outs), (ins g8rc:$rS, memri:$src), 872234353Sdim "stw $rS, $src", LdStStore, 873249423Sdim [(truncstorei32 i64:$rS, iaddr:$src)]>; 874251662Sdimdef STBX8 : XForm_8<31, 215, (outs), (ins g8rc:$rS, memrr:$dst), 875234353Sdim "stbx $rS, $dst", LdStStore, 876249423Sdim [(truncstorei8 i64:$rS, xaddr:$dst)]>, 877193323Sed PPC970_DGroup_Cracked; 878251662Sdimdef STHX8 : XForm_8<31, 407, (outs), (ins g8rc:$rS, memrr:$dst), 879234353Sdim "sthx $rS, $dst", LdStStore, 880249423Sdim [(truncstorei16 i64:$rS, xaddr:$dst)]>, 881193323Sed PPC970_DGroup_Cracked; 882251662Sdimdef STWX8 : XForm_8<31, 151, (outs), (ins g8rc:$rS, memrr:$dst), 883234353Sdim "stwx $rS, $dst", LdStStore, 884249423Sdim [(truncstorei32 i64:$rS, xaddr:$dst)]>, 885193323Sed PPC970_DGroup_Cracked; 886251662Sdim} // Interpretation64Bit 887251662Sdim 888193323Sed// Normal 8-byte stores. 889251662Sdimdef STD : DSForm_1<62, 0, (outs), (ins g8rc:$rS, memrix:$dst), 890193323Sed "std $rS, $dst", LdStSTD, 891249423Sdim [(aligned4store i64:$rS, ixaddr:$dst)]>, isPPC64; 892251662Sdimdef STDX : XForm_8<31, 149, (outs), (ins g8rc:$rS, memrr:$dst), 893193323Sed "stdx $rS, $dst", LdStSTD, 894249423Sdim [(store i64:$rS, xaddr:$dst)]>, isPPC64, 895193323Sed PPC970_DGroup_Cracked; 896251662Sdimdef STDBRX: XForm_8<31, 660, (outs), (ins g8rc:$rS, memrr:$dst), 897249423Sdim "stdbrx $rS, $dst", LdStStore, 898249423Sdim [(PPCstbrx i64:$rS, xoaddr:$dst, i64)]>, isPPC64, 899249423Sdim PPC970_DGroup_Cracked; 900193323Sed} 901193323Sed 902249423Sdim// Stores with Update (pre-inc). 903249423Sdimlet PPC970_Unit = 2, mayStore = 1 in { 904251662Sdimlet Interpretation64Bit = 1 in { 905251662Sdimdef STBU8 : DForm_1<39, (outs ptr_rc_nor0:$ea_res), (ins g8rc:$rS, memri:$dst), 906249423Sdim "stbu $rS, $dst", LdStStoreUpd, []>, 907249423Sdim RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">; 908251662Sdimdef STHU8 : DForm_1<45, (outs ptr_rc_nor0:$ea_res), (ins g8rc:$rS, memri:$dst), 909249423Sdim "sthu $rS, $dst", LdStStoreUpd, []>, 910249423Sdim RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">; 911251662Sdimdef STWU8 : DForm_1<37, (outs ptr_rc_nor0:$ea_res), (ins g8rc:$rS, memri:$dst), 912249423Sdim "stwu $rS, $dst", LdStStoreUpd, []>, 913249423Sdim RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">; 914251662Sdimdef STDU : DSForm_1<62, 1, (outs ptr_rc_nor0:$ea_res), (ins g8rc:$rS, memrix:$dst), 915249423Sdim "stdu $rS, $dst", LdStSTDU, []>, 916249423Sdim RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">, 917249423Sdim isPPC64; 918193323Sed 919251662Sdimdef STBUX8: XForm_8<31, 247, (outs ptr_rc_nor0:$ea_res), (ins g8rc:$rS, memrr:$dst), 920249423Sdim "stbux $rS, $dst", LdStStoreUpd, []>, 921249423Sdim RegConstraint<"$dst.ptrreg = $ea_res">, NoEncode<"$ea_res">, 922239462Sdim PPC970_DGroup_Cracked; 923251662Sdimdef STHUX8: XForm_8<31, 439, (outs ptr_rc_nor0:$ea_res), (ins g8rc:$rS, memrr:$dst), 924249423Sdim "sthux $rS, $dst", LdStStoreUpd, []>, 925249423Sdim RegConstraint<"$dst.ptrreg = $ea_res">, NoEncode<"$ea_res">, 926239462Sdim PPC970_DGroup_Cracked; 927251662Sdimdef STWUX8: XForm_8<31, 183, (outs ptr_rc_nor0:$ea_res), (ins g8rc:$rS, memrr:$dst), 928249423Sdim "stwux $rS, $dst", LdStStoreUpd, []>, 929249423Sdim RegConstraint<"$dst.ptrreg = $ea_res">, NoEncode<"$ea_res">, 930239462Sdim PPC970_DGroup_Cracked; 931251662Sdim} // Interpretation64Bit 932251662Sdim 933251662Sdimdef STDUX : XForm_8<31, 181, (outs ptr_rc_nor0:$ea_res), (ins g8rc:$rS, memrr:$dst), 934249423Sdim "stdux $rS, $dst", LdStSTDU, []>, 935249423Sdim RegConstraint<"$dst.ptrreg = $ea_res">, NoEncode<"$ea_res">, 936239462Sdim PPC970_DGroup_Cracked, isPPC64; 937193323Sed} 938193323Sed 939249423Sdim// Patterns to match the pre-inc stores. We can't put the patterns on 940249423Sdim// the instruction definitions directly as ISel wants the address base 941249423Sdim// and offset to be separate operands, not a single complex operand. 942249423Sdimdef : Pat<(pre_truncsti8 i64:$rS, iPTR:$ptrreg, iaddroff:$ptroff), 943249423Sdim (STBU8 $rS, iaddroff:$ptroff, $ptrreg)>; 944249423Sdimdef : Pat<(pre_truncsti16 i64:$rS, iPTR:$ptrreg, iaddroff:$ptroff), 945249423Sdim (STHU8 $rS, iaddroff:$ptroff, $ptrreg)>; 946249423Sdimdef : Pat<(pre_truncsti32 i64:$rS, iPTR:$ptrreg, iaddroff:$ptroff), 947249423Sdim (STWU8 $rS, iaddroff:$ptroff, $ptrreg)>; 948249423Sdimdef : Pat<(aligned4pre_store i64:$rS, iPTR:$ptrreg, iaddroff:$ptroff), 949249423Sdim (STDU $rS, iaddroff:$ptroff, $ptrreg)>; 950193323Sed 951249423Sdimdef : Pat<(pre_truncsti8 i64:$rS, iPTR:$ptrreg, iPTR:$ptroff), 952249423Sdim (STBUX8 $rS, $ptrreg, $ptroff)>; 953249423Sdimdef : Pat<(pre_truncsti16 i64:$rS, iPTR:$ptrreg, iPTR:$ptroff), 954249423Sdim (STHUX8 $rS, $ptrreg, $ptroff)>; 955249423Sdimdef : Pat<(pre_truncsti32 i64:$rS, iPTR:$ptrreg, iPTR:$ptroff), 956249423Sdim (STWUX8 $rS, $ptrreg, $ptroff)>; 957249423Sdimdef : Pat<(pre_store i64:$rS, iPTR:$ptrreg, iPTR:$ptroff), 958249423Sdim (STDUX $rS, $ptrreg, $ptroff)>; 959193323Sed 960249423Sdim 961193323Sed//===----------------------------------------------------------------------===// 962193323Sed// Floating point instructions. 963193323Sed// 964193323Sed 965193323Sed 966251662Sdimlet PPC970_Unit = 3, neverHasSideEffects = 1, 967251662Sdim Uses = [RM] in { // FPU Operations. 968251662Sdimdefm FCFID : XForm_26r<63, 846, (outs f8rc:$frD), (ins f8rc:$frB), 969251662Sdim "fcfid", "$frD, $frB", FPGeneral, 970251662Sdim [(set f64:$frD, (PPCfcfid f64:$frB))]>, isPPC64; 971263508Sdimdefm FCTID : XForm_26r<63, 814, (outs f8rc:$frD), (ins f8rc:$frB), 972263508Sdim "fctid", "$frD, $frB", FPGeneral, 973263508Sdim []>, isPPC64; 974251662Sdimdefm FCTIDZ : XForm_26r<63, 815, (outs f8rc:$frD), (ins f8rc:$frB), 975251662Sdim "fctidz", "$frD, $frB", FPGeneral, 976251662Sdim [(set f64:$frD, (PPCfctidz f64:$frB))]>, isPPC64; 977249423Sdim 978251662Sdimdefm FCFIDU : XForm_26r<63, 974, (outs f8rc:$frD), (ins f8rc:$frB), 979251662Sdim "fcfidu", "$frD, $frB", FPGeneral, 980251662Sdim [(set f64:$frD, (PPCfcfidu f64:$frB))]>, isPPC64; 981251662Sdimdefm FCFIDS : XForm_26r<59, 846, (outs f4rc:$frD), (ins f8rc:$frB), 982251662Sdim "fcfids", "$frD, $frB", FPGeneral, 983251662Sdim [(set f32:$frD, (PPCfcfids f64:$frB))]>, isPPC64; 984251662Sdimdefm FCFIDUS : XForm_26r<59, 974, (outs f4rc:$frD), (ins f8rc:$frB), 985251662Sdim "fcfidus", "$frD, $frB", FPGeneral, 986251662Sdim [(set f32:$frD, (PPCfcfidus f64:$frB))]>, isPPC64; 987251662Sdimdefm FCTIDUZ : XForm_26r<63, 943, (outs f8rc:$frD), (ins f8rc:$frB), 988251662Sdim "fctiduz", "$frD, $frB", FPGeneral, 989251662Sdim [(set f64:$frD, (PPCfctiduz f64:$frB))]>, isPPC64; 990251662Sdimdefm FCTIWUZ : XForm_26r<63, 143, (outs f8rc:$frD), (ins f8rc:$frB), 991251662Sdim "fctiwuz", "$frD, $frB", FPGeneral, 992251662Sdim [(set f64:$frD, (PPCfctiwuz f64:$frB))]>, isPPC64; 993193323Sed} 994193323Sed 995193323Sed 996193323Sed//===----------------------------------------------------------------------===// 997193323Sed// Instruction Patterns 998193323Sed// 999193323Sed 1000193323Sed// Extensions and truncates to/from 32-bit regs. 1001249423Sdimdef : Pat<(i64 (zext i32:$in)), 1002249423Sdim (RLDICL (INSERT_SUBREG (i64 (IMPLICIT_DEF)), $in, sub_32), 1003239462Sdim 0, 32)>; 1004249423Sdimdef : Pat<(i64 (anyext i32:$in)), 1005249423Sdim (INSERT_SUBREG (i64 (IMPLICIT_DEF)), $in, sub_32)>; 1006249423Sdimdef : Pat<(i32 (trunc i64:$in)), 1007249423Sdim (EXTRACT_SUBREG $in, sub_32)>; 1008193323Sed 1009193323Sed// Extending loads with i64 targets. 1010193323Seddef : Pat<(zextloadi1 iaddr:$src), 1011193323Sed (LBZ8 iaddr:$src)>; 1012193323Seddef : Pat<(zextloadi1 xaddr:$src), 1013193323Sed (LBZX8 xaddr:$src)>; 1014193323Seddef : Pat<(extloadi1 iaddr:$src), 1015193323Sed (LBZ8 iaddr:$src)>; 1016193323Seddef : Pat<(extloadi1 xaddr:$src), 1017193323Sed (LBZX8 xaddr:$src)>; 1018193323Seddef : Pat<(extloadi8 iaddr:$src), 1019193323Sed (LBZ8 iaddr:$src)>; 1020193323Seddef : Pat<(extloadi8 xaddr:$src), 1021193323Sed (LBZX8 xaddr:$src)>; 1022193323Seddef : Pat<(extloadi16 iaddr:$src), 1023193323Sed (LHZ8 iaddr:$src)>; 1024193323Seddef : Pat<(extloadi16 xaddr:$src), 1025193323Sed (LHZX8 xaddr:$src)>; 1026193323Seddef : Pat<(extloadi32 iaddr:$src), 1027193323Sed (LWZ8 iaddr:$src)>; 1028193323Seddef : Pat<(extloadi32 xaddr:$src), 1029193323Sed (LWZX8 xaddr:$src)>; 1030193323Sed 1031193323Sed// Standard shifts. These are represented separately from the real shifts above 1032193323Sed// so that we can distinguish between shifts that allow 6-bit and 7-bit shift 1033193323Sed// amounts. 1034249423Sdimdef : Pat<(sra i64:$rS, i32:$rB), 1035249423Sdim (SRAD $rS, $rB)>; 1036249423Sdimdef : Pat<(srl i64:$rS, i32:$rB), 1037249423Sdim (SRD $rS, $rB)>; 1038249423Sdimdef : Pat<(shl i64:$rS, i32:$rB), 1039249423Sdim (SLD $rS, $rB)>; 1040193323Sed 1041193323Sed// SHL/SRL 1042249423Sdimdef : Pat<(shl i64:$in, (i32 imm:$imm)), 1043249423Sdim (RLDICR $in, imm:$imm, (SHL64 imm:$imm))>; 1044249423Sdimdef : Pat<(srl i64:$in, (i32 imm:$imm)), 1045249423Sdim (RLDICL $in, (SRL64 imm:$imm), imm:$imm)>; 1046193323Sed 1047193323Sed// ROTL 1048249423Sdimdef : Pat<(rotl i64:$in, i32:$sh), 1049249423Sdim (RLDCL $in, $sh, 0)>; 1050249423Sdimdef : Pat<(rotl i64:$in, (i32 imm:$imm)), 1051249423Sdim (RLDICL $in, imm:$imm, 0)>; 1052193323Sed 1053193323Sed// Hi and Lo for Darwin Global Addresses. 1054193323Seddef : Pat<(PPChi tglobaladdr:$in, 0), (LIS8 tglobaladdr:$in)>; 1055193323Seddef : Pat<(PPClo tglobaladdr:$in, 0), (LI8 tglobaladdr:$in)>; 1056193323Seddef : Pat<(PPChi tconstpool:$in , 0), (LIS8 tconstpool:$in)>; 1057193323Seddef : Pat<(PPClo tconstpool:$in , 0), (LI8 tconstpool:$in)>; 1058193323Seddef : Pat<(PPChi tjumptable:$in , 0), (LIS8 tjumptable:$in)>; 1059193323Seddef : Pat<(PPClo tjumptable:$in , 0), (LI8 tjumptable:$in)>; 1060198953Srdivackydef : Pat<(PPChi tblockaddress:$in, 0), (LIS8 tblockaddress:$in)>; 1061198953Srdivackydef : Pat<(PPClo tblockaddress:$in, 0), (LI8 tblockaddress:$in)>; 1062249423Sdimdef : Pat<(PPChi tglobaltlsaddr:$g, i64:$in), 1063249423Sdim (ADDIS8 $in, tglobaltlsaddr:$g)>; 1064249423Sdimdef : Pat<(PPClo tglobaltlsaddr:$g, i64:$in), 1065249423Sdim (ADDI8 $in, tglobaltlsaddr:$g)>; 1066249423Sdimdef : Pat<(add i64:$in, (PPChi tglobaladdr:$g, 0)), 1067249423Sdim (ADDIS8 $in, tglobaladdr:$g)>; 1068249423Sdimdef : Pat<(add i64:$in, (PPChi tconstpool:$g, 0)), 1069249423Sdim (ADDIS8 $in, tconstpool:$g)>; 1070249423Sdimdef : Pat<(add i64:$in, (PPChi tjumptable:$g, 0)), 1071249423Sdim (ADDIS8 $in, tjumptable:$g)>; 1072249423Sdimdef : Pat<(add i64:$in, (PPChi tblockaddress:$g, 0)), 1073249423Sdim (ADDIS8 $in, tblockaddress:$g)>; 1074249423Sdim 1075249423Sdim// Patterns to match r+r indexed loads and stores for 1076249423Sdim// addresses without at least 4-byte alignment. 1077249423Sdimdef : Pat<(i64 (unaligned4sextloadi32 xoaddr:$src)), 1078249423Sdim (LWAX xoaddr:$src)>; 1079249423Sdimdef : Pat<(i64 (unaligned4load xoaddr:$src)), 1080249423Sdim (LDX xoaddr:$src)>; 1081249423Sdimdef : Pat<(unaligned4store i64:$rS, xoaddr:$dst), 1082249423Sdim (STDX $rS, xoaddr:$dst)>; 1083249423Sdim 1084