PPCCodeEmitter.cpp revision 193323 
1//===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11// JIT-compile bitcode to native PowerPC.
12//
13//===----------------------------------------------------------------------===//
14
15#include "PPCTargetMachine.h"
16#include "PPCRelocations.h"
17#include "PPC.h"
18#include "llvm/Module.h"
19#include "llvm/PassManager.h"
20#include "llvm/CodeGen/MachineCodeEmitter.h"
21#include "llvm/CodeGen/JITCodeEmitter.h"
22#include "llvm/CodeGen/MachineFunctionPass.h"
23#include "llvm/CodeGen/MachineInstrBuilder.h"
24#include "llvm/CodeGen/MachineModuleInfo.h"
25#include "llvm/CodeGen/Passes.h"
26#include "llvm/Support/Debug.h"
27#include "llvm/Support/Compiler.h"
28#include "llvm/Target/TargetOptions.h"
29using namespace llvm;
30
31namespace {
32  class PPCCodeEmitter {
33    TargetMachine &TM;
34    MachineCodeEmitter &MCE;
35  public:
36    PPCCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce):
37        TM(tm), MCE(mce) {}
38
39    /// getBinaryCodeForInstr - This function, generated by the
40    /// CodeEmitterGenerator using TableGen, produces the binary encoding for
41    /// machine instructions.
42
43    unsigned getBinaryCodeForInstr(const MachineInstr &MI);
44
45    /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
46
47    unsigned getMachineOpValue(const MachineInstr &MI,
48                               const MachineOperand &MO);
49
50    /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
51    /// its address in the function into this pointer.
52
53    void *MovePCtoLROffset;
54  };
55
56  template <class CodeEmitter>
57  class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
58      public PPCCodeEmitter
59  {
60    TargetMachine &TM;
61    CodeEmitter &MCE;
62
63    void getAnalysisUsage(AnalysisUsage &AU) const {
64      AU.addRequired<MachineModuleInfo>();
65      MachineFunctionPass::getAnalysisUsage(AU);
66    }
67
68  public:
69    static char ID;
70    Emitter(TargetMachine &tm, CodeEmitter &mce)
71      : MachineFunctionPass(&ID), PPCCodeEmitter(tm, mce), TM(tm), MCE(mce) {}
72
73    const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
74
75    /// runOnMachineFunction - emits the given MachineFunction to memory
76    ///
77    bool runOnMachineFunction(MachineFunction &MF);
78
79    /// emitBasicBlock - emits the given MachineBasicBlock to memory
80    ///
81    void emitBasicBlock(MachineBasicBlock &MBB);
82
83    /// getValueBit - return the particular bit of Val
84    ///
85    unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
86  };
87
88  template <class CodeEmitter>
89    char Emitter<CodeEmitter>::ID = 0;
90}
91
92/// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
93/// to the specified MCE object.
94FunctionPass *llvm::createPPCCodeEmitterPass(PPCTargetMachine &TM,
95                                             MachineCodeEmitter &MCE) {
96  return new Emitter<MachineCodeEmitter>(TM, MCE);
97}
98
99FunctionPass *llvm::createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
100                                                JITCodeEmitter &JCE) {
101  return new Emitter<JITCodeEmitter>(TM, JCE);
102}
103
104template <class CodeEmitter>
105bool Emitter<CodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
106  assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
107          MF.getTarget().getRelocationModel() != Reloc::Static) &&
108         "JIT relocation model must be set to static or default!");
109
110  MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>());
111  do {
112    MovePCtoLROffset = 0;
113    MCE.startFunction(MF);
114    for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
115      emitBasicBlock(*BB);
116  } while (MCE.finishFunction(MF));
117
118  return false;
119}
120
121template <class CodeEmitter>
122void Emitter<CodeEmitter>::emitBasicBlock(MachineBasicBlock &MBB) {
123  MCE.StartMachineBasicBlock(&MBB);
124
125  for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
126    const MachineInstr &MI = *I;
127    switch (MI.getOpcode()) {
128    default:
129      MCE.emitWordBE(getBinaryCodeForInstr(MI));
130      break;
131    case TargetInstrInfo::DBG_LABEL:
132    case TargetInstrInfo::EH_LABEL:
133      MCE.emitLabel(MI.getOperand(0).getImm());
134      break;
135    case TargetInstrInfo::IMPLICIT_DEF:
136      break; // pseudo opcode, no side effects
137    case PPC::MovePCtoLR:
138    case PPC::MovePCtoLR8:
139      assert(TM.getRelocationModel() == Reloc::PIC_);
140      MovePCtoLROffset = (void*)MCE.getCurrentPCValue();
141      MCE.emitWordBE(0x48000005);   // bl 1
142      break;
143    }
144  }
145}
146
147unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI,
148                                           const MachineOperand &MO) {
149
150  unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
151                   // or things that get fixed up later by the JIT.
152  if (MO.isReg()) {
153    rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg());
154
155    // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
156    // register, not the register number directly.
157    if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
158        (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) {
159      rv = 0x80 >> rv;
160    }
161  } else if (MO.isImm()) {
162    rv = MO.getImm();
163  } else if (MO.isGlobal() || MO.isSymbol() ||
164             MO.isCPI() || MO.isJTI()) {
165    unsigned Reloc = 0;
166    if (MI.getOpcode() == PPC::BL_Macho || MI.getOpcode() == PPC::BL8_Macho ||
167        MI.getOpcode() == PPC::BL_ELF || MI.getOpcode() == PPC::BL8_ELF ||
168        MI.getOpcode() == PPC::TAILB || MI.getOpcode() == PPC::TAILB8)
169      Reloc = PPC::reloc_pcrel_bx;
170    else {
171      if (TM.getRelocationModel() == Reloc::PIC_) {
172        assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
173      }
174      switch (MI.getOpcode()) {
175      default: MI.dump(); assert(0 && "Unknown instruction for relocation!");
176      case PPC::LIS:
177      case PPC::LIS8:
178      case PPC::ADDIS:
179      case PPC::ADDIS8:
180        Reloc = PPC::reloc_absolute_high;       // Pointer to symbol
181        break;
182      case PPC::LI:
183      case PPC::LI8:
184      case PPC::LA:
185      // Loads.
186      case PPC::LBZ:
187      case PPC::LBZ8:
188      case PPC::LHA:
189      case PPC::LHA8:
190      case PPC::LHZ:
191      case PPC::LHZ8:
192      case PPC::LWZ:
193      case PPC::LWZ8:
194      case PPC::LFS:
195      case PPC::LFD:
196
197      // Stores.
198      case PPC::STB:
199      case PPC::STB8:
200      case PPC::STH:
201      case PPC::STH8:
202      case PPC::STW:
203      case PPC::STW8:
204      case PPC::STFS:
205      case PPC::STFD:
206        Reloc = PPC::reloc_absolute_low;
207        break;
208
209      case PPC::LWA:
210      case PPC::LD:
211      case PPC::STD:
212      case PPC::STD_32:
213        Reloc = PPC::reloc_absolute_low_ix;
214        break;
215      }
216    }
217
218    MachineRelocation R;
219    if (MO.isGlobal()) {
220      R = MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
221                                   MO.getGlobal(), 0,
222                                   isa<Function>(MO.getGlobal()));
223    } else if (MO.isSymbol()) {
224      R = MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
225                                       Reloc, MO.getSymbolName(), 0);
226    } else if (MO.isCPI()) {
227      R = MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
228                                          Reloc, MO.getIndex(), 0);
229    } else {
230      assert(MO.isJTI());
231      R = MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
232                                          Reloc, MO.getIndex(), 0);
233    }
234
235    // If in PIC mode, we need to encode the negated address of the
236    // 'movepctolr' into the unrelocated field.  After relocation, we'll have
237    // &gv-&movepctolr-4 in the imm field.  Once &movepctolr is added to the imm
238    // field, we get &gv.  This doesn't happen for branch relocations, which are
239    // always implicitly pc relative.
240    if (TM.getRelocationModel() == Reloc::PIC_ && Reloc != PPC::reloc_pcrel_bx){
241      assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
242      R.setConstantVal(-(intptr_t)MovePCtoLROffset - 4);
243    }
244    MCE.addRelocation(R);
245
246  } else if (MO.isMBB()) {
247    unsigned Reloc = 0;
248    unsigned Opcode = MI.getOpcode();
249    if (Opcode == PPC::B || Opcode == PPC::BL_Macho ||
250        Opcode == PPC::BLA_Macho || Opcode == PPC::BL_ELF ||
251        Opcode == PPC::BLA_ELF)
252      Reloc = PPC::reloc_pcrel_bx;
253    else // BCC instruction
254      Reloc = PPC::reloc_pcrel_bcx;
255    MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
256                                               Reloc, MO.getMBB()));
257  } else {
258    cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
259    abort();
260  }
261
262  return rv;
263}
264
265#include "PPCGenCodeEmitter.inc"
266
267