NVPTX.h revision 251662
1239310Sdim//===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===// 2239310Sdim// 3239310Sdim// The LLVM Compiler Infrastructure 4239310Sdim// 5239310Sdim// This file is distributed under the University of Illinois Open Source 6239310Sdim// License. See LICENSE.TXT for details. 7239310Sdim// 8239310Sdim//===----------------------------------------------------------------------===// 9239310Sdim// 10239310Sdim// This file contains the entry points for global functions defined in 11239310Sdim// the LLVM NVPTX back-end. 12239310Sdim// 13239310Sdim//===----------------------------------------------------------------------===// 14239310Sdim 15239310Sdim#ifndef LLVM_TARGET_NVPTX_H 16239310Sdim#define LLVM_TARGET_NVPTX_H 17239310Sdim 18249423Sdim#include "MCTargetDesc/NVPTXBaseInfo.h" 19251662Sdim#include "llvm/ADT/StringMap.h" 20249423Sdim#include "llvm/IR/Module.h" 21249423Sdim#include "llvm/IR/Value.h" 22239310Sdim#include "llvm/Support/ErrorHandling.h" 23239310Sdim#include "llvm/Target/TargetMachine.h" 24239310Sdim#include <cassert> 25239310Sdim#include <iosfwd> 26239310Sdim 27239310Sdimnamespace llvm { 28239310Sdimclass NVPTXTargetMachine; 29239310Sdimclass FunctionPass; 30239310Sdimclass formatted_raw_ostream; 31239310Sdim 32239310Sdimnamespace NVPTXCC { 33239310Sdimenum CondCodes { 34239310Sdim EQ, 35239310Sdim NE, 36239310Sdim LT, 37239310Sdim LE, 38239310Sdim GT, 39239310Sdim GE 40239310Sdim}; 41239310Sdim} 42239310Sdim 43239310Sdiminline static const char *NVPTXCondCodeToString(NVPTXCC::CondCodes CC) { 44239310Sdim switch (CC) { 45249423Sdim case NVPTXCC::NE: 46249423Sdim return "ne"; 47249423Sdim case NVPTXCC::EQ: 48249423Sdim return "eq"; 49249423Sdim case NVPTXCC::LT: 50249423Sdim return "lt"; 51249423Sdim case NVPTXCC::LE: 52249423Sdim return "le"; 53249423Sdim case NVPTXCC::GT: 54249423Sdim return "gt"; 55249423Sdim case NVPTXCC::GE: 56249423Sdim return "ge"; 57239310Sdim } 58239310Sdim llvm_unreachable("Unknown condition code"); 59239310Sdim} 60239310Sdim 61249423SdimFunctionPass * 62249423SdimcreateNVPTXISelDag(NVPTXTargetMachine &TM, llvm::CodeGenOpt::Level OptLevel); 63239310SdimFunctionPass *createLowerStructArgsPass(NVPTXTargetMachine &); 64239310SdimFunctionPass *createNVPTXReMatPass(NVPTXTargetMachine &); 65239310SdimFunctionPass *createNVPTXReMatBlockPass(NVPTXTargetMachine &); 66251662SdimModulePass *createGenericToNVVMPass(); 67251662SdimModulePass *createNVVMReflectPass(); 68251662SdimModulePass *createNVVMReflectPass(const StringMap<int>& Mapping); 69239310Sdim 70239310Sdimbool isImageOrSamplerVal(const Value *, const Module *); 71239310Sdim 72239310Sdimextern Target TheNVPTXTarget32; 73239310Sdimextern Target TheNVPTXTarget64; 74239310Sdim 75249423Sdimnamespace NVPTX { 76239310Sdimenum DrvInterface { 77239310Sdim NVCL, 78239310Sdim CUDA, 79239310Sdim TEST 80239310Sdim}; 81239310Sdim 82239310Sdim// A field inside TSFlags needs a shift and a mask. The usage is 83239310Sdim// always as follows : 84239310Sdim// ((TSFlags & fieldMask) >> fieldShift) 85239310Sdim// The enum keeps the mask, the shift, and all valid values of the 86239310Sdim// field in one place. 87239310Sdimenum VecInstType { 88239310Sdim VecInstTypeShift = 0, 89239310Sdim VecInstTypeMask = 0xF, 90239310Sdim 91239310Sdim VecNOP = 0, 92239310Sdim VecLoad = 1, 93239310Sdim VecStore = 2, 94239310Sdim VecBuild = 3, 95239310Sdim VecShuffle = 4, 96239310Sdim VecExtract = 5, 97239310Sdim VecInsert = 6, 98239310Sdim VecDest = 7, 99239310Sdim VecOther = 15 100239310Sdim}; 101239310Sdim 102239310Sdimenum SimpleMove { 103239310Sdim SimpleMoveMask = 0x10, 104239310Sdim SimpleMoveShift = 4 105239310Sdim}; 106239310Sdimenum LoadStore { 107239310Sdim isLoadMask = 0x20, 108239310Sdim isLoadShift = 5, 109239310Sdim isStoreMask = 0x40, 110239310Sdim isStoreShift = 6 111239310Sdim}; 112239310Sdim 113239310Sdimnamespace PTXLdStInstCode { 114249423Sdimenum AddressSpace { 115239310Sdim GENERIC = 0, 116239310Sdim GLOBAL = 1, 117239310Sdim CONSTANT = 2, 118239310Sdim SHARED = 3, 119239310Sdim PARAM = 4, 120239310Sdim LOCAL = 5 121239310Sdim}; 122239310Sdimenum FromType { 123239310Sdim Unsigned = 0, 124239310Sdim Signed, 125239310Sdim Float 126239310Sdim}; 127239310Sdimenum VecType { 128239310Sdim Scalar = 1, 129239310Sdim V2 = 2, 130239310Sdim V4 = 4 131239310Sdim}; 132239310Sdim} 133239310Sdim} 134239310Sdim} // end namespace llvm; 135239310Sdim 136239310Sdim// Defines symbolic names for NVPTX registers. This defines a mapping from 137239310Sdim// register name to register number. 138239310Sdim#define GET_REGINFO_ENUM 139239310Sdim#include "NVPTXGenRegisterInfo.inc" 140239310Sdim 141239310Sdim// Defines symbolic names for the NVPTX instructions. 142239310Sdim#define GET_INSTRINFO_ENUM 143239310Sdim#include "NVPTXGenInstrInfo.inc" 144239310Sdim 145239310Sdim#endif 146