1234353Sdim//===-- MipsJITInfo.cpp - Implement the Mips JIT Interface ----------------===// 2226584Sdim// 3226584Sdim// The LLVM Compiler Infrastructure 4226584Sdim// 5226584Sdim// This file is distributed under the University of Illinois Open Source 6226584Sdim// License. See LICENSE.TXT for details. 7226584Sdim// 8226584Sdim//===----------------------------------------------------------------------===// 9226584Sdim// 10226584Sdim// This file implements the JIT interfaces for the Mips target. 11226584Sdim// 12226584Sdim//===----------------------------------------------------------------------===// 13226584Sdim 14226584Sdim#define DEBUG_TYPE "jit" 15226584Sdim#include "MipsJITInfo.h" 16226584Sdim#include "MipsInstrInfo.h" 17226584Sdim#include "MipsRelocations.h" 18226584Sdim#include "MipsSubtarget.h" 19226584Sdim#include "llvm/CodeGen/JITCodeEmitter.h" 20249423Sdim#include "llvm/IR/Function.h" 21226584Sdim#include "llvm/Support/Debug.h" 22226584Sdim#include "llvm/Support/ErrorHandling.h" 23249423Sdim#include "llvm/Support/Memory.h" 24226584Sdim#include "llvm/Support/raw_ostream.h" 25226584Sdim#include <cstdlib> 26226584Sdimusing namespace llvm; 27226584Sdim 28226584Sdim 29226584Sdimvoid MipsJITInfo::replaceMachineCodeForFunction(void *Old, void *New) { 30239462Sdim unsigned NewAddr = (intptr_t)New; 31239462Sdim unsigned OldAddr = (intptr_t)Old; 32239462Sdim const unsigned NopInstr = 0x0; 33239462Sdim 34239462Sdim // If the functions are in the same memory segment, insert PC-region branch. 35239462Sdim if ((NewAddr & 0xF0000000) == ((OldAddr + 4) & 0xF0000000)) { 36239462Sdim unsigned *OldInstruction = (unsigned *)Old; 37239462Sdim *OldInstruction = 0x08000000; 38239462Sdim unsigned JTargetAddr = NewAddr & 0x0FFFFFFC; 39239462Sdim 40239462Sdim JTargetAddr >>= 2; 41239462Sdim *OldInstruction |= JTargetAddr; 42239462Sdim 43239462Sdim // Insert a NOP. 44239462Sdim OldInstruction++; 45239462Sdim *OldInstruction = NopInstr; 46239462Sdim 47239462Sdim sys::Memory::InvalidateInstructionCache(Old, 2 * 4); 48239462Sdim } else { 49239462Sdim // We need to clear hint bits from the instruction, in case it is 'jr ra'. 50239462Sdim const unsigned HintMask = 0xFFFFF83F, ReturnSequence = 0x03e00008; 51239462Sdim unsigned* CurrentInstr = (unsigned*)Old; 52239462Sdim unsigned CurrInstrHintClear = (*CurrentInstr) & HintMask; 53239462Sdim unsigned* NextInstr = CurrentInstr + 1; 54239462Sdim unsigned NextInstrHintClear = (*NextInstr) & HintMask; 55239462Sdim 56239462Sdim // Do absolute jump if there are 2 or more instructions before return from 57239462Sdim // the old function. 58239462Sdim if ((CurrInstrHintClear != ReturnSequence) && 59239462Sdim (NextInstrHintClear != ReturnSequence)) { 60239462Sdim const unsigned LuiT0Instr = 0x3c080000, AddiuT0Instr = 0x25080000; 61239462Sdim const unsigned JrT0Instr = 0x01000008; 62239462Sdim // lui t0, high 16 bit of the NewAddr 63239462Sdim (*(CurrentInstr++)) = LuiT0Instr | ((NewAddr & 0xffff0000) >> 16); 64239462Sdim // addiu t0, t0, low 16 bit of the NewAddr 65239462Sdim (*(CurrentInstr++)) = AddiuT0Instr | (NewAddr & 0x0000ffff); 66239462Sdim // jr t0 67239462Sdim (*(CurrentInstr++)) = JrT0Instr; 68239462Sdim (*CurrentInstr) = NopInstr; 69239462Sdim 70239462Sdim sys::Memory::InvalidateInstructionCache(Old, 4 * 4); 71239462Sdim } else { 72239462Sdim // Unsupported case 73239462Sdim report_fatal_error("MipsJITInfo::replaceMachineCodeForFunction"); 74239462Sdim } 75239462Sdim } 76226584Sdim} 77226584Sdim 78226584Sdim/// JITCompilerFunction - This contains the address of the JIT function used to 79226584Sdim/// compile a function lazily. 80226584Sdimstatic TargetJITInfo::JITCompilerFn JITCompilerFunction; 81226584Sdim 82226584Sdim// Get the ASMPREFIX for the current host. This is often '_'. 83226584Sdim#ifndef __USER_LABEL_PREFIX__ 84226584Sdim#define __USER_LABEL_PREFIX__ 85226584Sdim#endif 86226584Sdim#define GETASMPREFIX2(X) #X 87226584Sdim#define GETASMPREFIX(X) GETASMPREFIX2(X) 88226584Sdim#define ASMPREFIX GETASMPREFIX(__USER_LABEL_PREFIX__) 89226584Sdim 90226584Sdim// CompilationCallback stub - We can't use a C function with inline assembly in 91226584Sdim// it, because the prolog/epilog inserted by GCC won't work for us. Instead, 92226584Sdim// write our own wrapper, which does things our way, so we have complete control 93226584Sdim// over register saving and restoring. This code saves registers, calls 94226584Sdim// MipsCompilationCallbackC and restores registers. 95226584Sdimextern "C" { 96226584Sdim#if defined (__mips__) 97226584Sdimvoid MipsCompilationCallback(); 98226584Sdim 99226584Sdim asm( 100226584Sdim ".text\n" 101226584Sdim ".align 2\n" 102226584Sdim ".globl " ASMPREFIX "MipsCompilationCallback\n" 103226584Sdim ASMPREFIX "MipsCompilationCallback:\n" 104226584Sdim ".ent " ASMPREFIX "MipsCompilationCallback\n" 105228379Sdim ".frame $sp, 32, $ra\n" 106226584Sdim ".set noreorder\n" 107226584Sdim ".cpload $t9\n" 108226584Sdim 109228379Sdim "addiu $sp, $sp, -64\n" 110226584Sdim ".cprestore 16\n" 111226584Sdim 112226584Sdim // Save argument registers a0, a1, a2, a3, f12, f14 since they may contain 113226584Sdim // stuff for the real target function right now. We have to act as if this 114226584Sdim // whole compilation callback doesn't exist as far as the caller is 115226584Sdim // concerned. We also need to save the ra register since it contains the 116226584Sdim // original return address, and t8 register since it contains the address 117226584Sdim // of the end of function stub. 118226584Sdim "sw $a0, 20($sp)\n" 119226584Sdim "sw $a1, 24($sp)\n" 120226584Sdim "sw $a2, 28($sp)\n" 121226584Sdim "sw $a3, 32($sp)\n" 122226584Sdim "sw $ra, 36($sp)\n" 123226584Sdim "sw $t8, 40($sp)\n" 124228379Sdim "sdc1 $f12, 48($sp)\n" 125228379Sdim "sdc1 $f14, 56($sp)\n" 126226584Sdim 127226584Sdim // t8 points at the end of function stub. Pass the beginning of the stub 128226584Sdim // to the MipsCompilationCallbackC. 129226584Sdim "addiu $a0, $t8, -16\n" 130226584Sdim "jal " ASMPREFIX "MipsCompilationCallbackC\n" 131226584Sdim "nop\n" 132226584Sdim 133226584Sdim // Restore registers. 134226584Sdim "lw $a0, 20($sp)\n" 135226584Sdim "lw $a1, 24($sp)\n" 136226584Sdim "lw $a2, 28($sp)\n" 137226584Sdim "lw $a3, 32($sp)\n" 138226584Sdim "lw $ra, 36($sp)\n" 139226584Sdim "lw $t8, 40($sp)\n" 140228379Sdim "ldc1 $f12, 48($sp)\n" 141228379Sdim "ldc1 $f14, 56($sp)\n" 142228379Sdim "addiu $sp, $sp, 64\n" 143226584Sdim 144226584Sdim // Jump to the (newly modified) stub to invoke the real function. 145226584Sdim "addiu $t8, $t8, -16\n" 146226584Sdim "jr $t8\n" 147226584Sdim "nop\n" 148226584Sdim 149226584Sdim ".set reorder\n" 150226584Sdim ".end " ASMPREFIX "MipsCompilationCallback\n" 151226584Sdim ); 152226584Sdim#else // host != Mips 153226584Sdim void MipsCompilationCallback() { 154226584Sdim llvm_unreachable( 155226584Sdim "Cannot call MipsCompilationCallback() on a non-Mips arch!"); 156226584Sdim } 157226584Sdim#endif 158226584Sdim} 159226584Sdim 160226584Sdim/// MipsCompilationCallbackC - This is the target-specific function invoked 161226584Sdim/// by the function stub when we did not know the real target of a call. 162226584Sdim/// This function must locate the start of the stub or call site and pass 163226584Sdim/// it into the JIT compiler function. 164226584Sdimextern "C" void MipsCompilationCallbackC(intptr_t StubAddr) { 165226584Sdim // Get the address of the compiled code for this function. 166226584Sdim intptr_t NewVal = (intptr_t) JITCompilerFunction((void*) StubAddr); 167226584Sdim 168226584Sdim // Rewrite the function stub so that we don't end up here every time we 169226584Sdim // execute the call. We're replacing the first four instructions of the 170226584Sdim // stub with code that jumps to the compiled function: 171226584Sdim // lui $t9, %hi(NewVal) 172226584Sdim // addiu $t9, $t9, %lo(NewVal) 173226584Sdim // jr $t9 174226584Sdim // nop 175226584Sdim 176226584Sdim int Hi = ((unsigned)NewVal & 0xffff0000) >> 16; 177226584Sdim if ((NewVal & 0x8000) != 0) 178226584Sdim Hi++; 179226584Sdim int Lo = (int)(NewVal & 0xffff); 180226584Sdim 181226584Sdim *(intptr_t *)(StubAddr) = 0xf << 26 | 25 << 16 | Hi; 182226584Sdim *(intptr_t *)(StubAddr + 4) = 9 << 26 | 25 << 21 | 25 << 16 | Lo; 183226584Sdim *(intptr_t *)(StubAddr + 8) = 25 << 21 | 8; 184226584Sdim *(intptr_t *)(StubAddr + 12) = 0; 185226584Sdim 186226584Sdim sys::Memory::InvalidateInstructionCache((void*) StubAddr, 16); 187226584Sdim} 188226584Sdim 189226584SdimTargetJITInfo::LazyResolverFn MipsJITInfo::getLazyResolverFunction( 190226584Sdim JITCompilerFn F) { 191226584Sdim JITCompilerFunction = F; 192226584Sdim return MipsCompilationCallback; 193226584Sdim} 194226584Sdim 195226584SdimTargetJITInfo::StubLayout MipsJITInfo::getStubLayout() { 196226584Sdim // The stub contains 4 4-byte instructions, aligned at 4 bytes. See 197226584Sdim // emitFunctionStub for details. 198226584Sdim StubLayout Result = { 4*4, 4 }; 199226584Sdim return Result; 200226584Sdim} 201226584Sdim 202239462Sdimvoid *MipsJITInfo::emitFunctionStub(const Function *F, void *Fn, 203239462Sdim JITCodeEmitter &JCE) { 204226584Sdim JCE.emitAlignment(4); 205226584Sdim void *Addr = (void*) (JCE.getCurrentPCValue()); 206226584Sdim if (!sys::Memory::setRangeWritable(Addr, 16)) 207226584Sdim llvm_unreachable("ERROR: Unable to mark stub writable."); 208226584Sdim 209226584Sdim intptr_t EmittedAddr; 210226584Sdim if (Fn != (void*)(intptr_t)MipsCompilationCallback) 211226584Sdim EmittedAddr = (intptr_t)Fn; 212226584Sdim else 213226584Sdim EmittedAddr = (intptr_t)MipsCompilationCallback; 214226584Sdim 215226584Sdim 216226584Sdim int Hi = ((unsigned)EmittedAddr & 0xffff0000) >> 16; 217226584Sdim if ((EmittedAddr & 0x8000) != 0) 218226584Sdim Hi++; 219226584Sdim int Lo = (int)(EmittedAddr & 0xffff); 220226584Sdim 221263508Sdim // lui $t9, %hi(EmittedAddr) 222263508Sdim // addiu $t9, $t9, %lo(EmittedAddr) 223263508Sdim // jalr $t8, $t9 224226584Sdim // nop 225244628Sdim if (IsLittleEndian) { 226244628Sdim JCE.emitWordLE(0xf << 26 | 25 << 16 | Hi); 227244628Sdim JCE.emitWordLE(9 << 26 | 25 << 21 | 25 << 16 | Lo); 228244628Sdim JCE.emitWordLE(25 << 21 | 24 << 11 | 9); 229244628Sdim JCE.emitWordLE(0); 230244628Sdim } else { 231244628Sdim JCE.emitWordBE(0xf << 26 | 25 << 16 | Hi); 232244628Sdim JCE.emitWordBE(9 << 26 | 25 << 21 | 25 << 16 | Lo); 233244628Sdim JCE.emitWordBE(25 << 21 | 24 << 11 | 9); 234244628Sdim JCE.emitWordBE(0); 235244628Sdim } 236226584Sdim 237226584Sdim sys::Memory::InvalidateInstructionCache(Addr, 16); 238226584Sdim if (!sys::Memory::setRangeExecutable(Addr, 16)) 239226584Sdim llvm_unreachable("ERROR: Unable to mark stub executable."); 240226584Sdim 241226584Sdim return Addr; 242226584Sdim} 243226584Sdim 244226584Sdim/// relocate - Before the JIT can run a block of code that has been emitted, 245226584Sdim/// it must rewrite the code to contain the actual addresses of any 246226584Sdim/// referenced global symbols. 247226584Sdimvoid MipsJITInfo::relocate(void *Function, MachineRelocation *MR, 248239462Sdim unsigned NumRelocs, unsigned char *GOTBase) { 249226584Sdim for (unsigned i = 0; i != NumRelocs; ++i, ++MR) { 250226584Sdim 251226584Sdim void *RelocPos = (char*) Function + MR->getMachineCodeOffset(); 252226584Sdim intptr_t ResultPtr = (intptr_t) MR->getResultPointer(); 253226584Sdim 254226584Sdim switch ((Mips::RelocationType) MR->getRelocationType()) { 255234353Sdim case Mips::reloc_mips_pc16: 256226584Sdim ResultPtr = (((ResultPtr - (intptr_t) RelocPos) - 4) >> 2) & 0xffff; 257226584Sdim *((unsigned*) RelocPos) |= (unsigned) ResultPtr; 258226584Sdim break; 259226584Sdim 260226584Sdim case Mips::reloc_mips_26: 261226584Sdim ResultPtr = (ResultPtr & 0x0fffffff) >> 2; 262226584Sdim *((unsigned*) RelocPos) |= (unsigned) ResultPtr; 263226584Sdim break; 264226584Sdim 265226584Sdim case Mips::reloc_mips_hi: 266226584Sdim ResultPtr = ResultPtr >> 16; 267226584Sdim if ((((intptr_t) (MR->getResultPointer()) & 0xffff) >> 15) == 1) { 268226584Sdim ResultPtr += 1; 269226584Sdim } 270226584Sdim *((unsigned*) RelocPos) |= (unsigned) ResultPtr; 271226584Sdim break; 272226584Sdim 273234353Sdim case Mips::reloc_mips_lo: { 274234353Sdim // Addend is needed for unaligned load/store instructions, where offset 275234353Sdim // for the second load/store in the expanded instruction sequence must 276234353Sdim // be modified by +1 or +3. Otherwise, Addend is 0. 277234353Sdim int Addend = *((unsigned*) RelocPos) & 0xffff; 278234353Sdim ResultPtr = (ResultPtr + Addend) & 0xffff; 279234353Sdim *((unsigned*) RelocPos) &= 0xffff0000; 280226584Sdim *((unsigned*) RelocPos) |= (unsigned) ResultPtr; 281226584Sdim break; 282226584Sdim } 283234353Sdim } 284226584Sdim } 285226584Sdim} 286