1234285Sdim//===-- HexagoSelectCCInfo.td - Selectcc mappings ----------*- tablegen -*-===// 2234285Sdim// 3234285Sdim// The LLVM Compiler Infrastructure 4234285Sdim// 5234285Sdim// This file is distributed under the University of Illinois Open Source 6234285Sdim// License. See LICENSE.TXT for details. 7234285Sdim// 8234285Sdim//===----------------------------------------------------------------------===// 9234285Sdim 10234285Sdim 11234285Sdim// 12234285Sdim// selectcc mappings. 13234285Sdim// 14234285Sdimdef : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, 15234285Sdim IntRegs:$fval, SETEQ)), 16234285Sdim (i32 (MUX_rr (i1 (CMPEQrr IntRegs:$lhs, IntRegs:$rhs)), 17234285Sdim IntRegs:$tval, IntRegs:$fval))>; 18234285Sdim 19234285Sdimdef : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, 20234285Sdim IntRegs:$fval, SETNE)), 21234285Sdim (i32 (MUX_rr (i1 (NOT_p (CMPEQrr IntRegs:$lhs, IntRegs:$rhs))), 22234285Sdim IntRegs:$tval, IntRegs:$fval))>; 23234285Sdim 24234285Sdimdef : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, 25234285Sdim IntRegs:$fval, SETGT)), 26234285Sdim (i32 (MUX_rr (i1 (CMPGTrr IntRegs:$lhs, IntRegs:$rhs)), 27234285Sdim IntRegs:$tval, IntRegs:$fval))>; 28234285Sdim 29234285Sdimdef : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, 30234285Sdim IntRegs:$fval, SETUGT)), 31234285Sdim (i32 (MUX_rr (i1 (CMPGTUrr IntRegs:$lhs, IntRegs:$rhs)), 32234285Sdim IntRegs:$tval, IntRegs:$fval))>; 33234285Sdim 34234285Sdim 35234285Sdim 36234285Sdimdef : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, 37234285Sdim IntRegs:$fval, SETULT)), 38234285Sdim (i32 (MUX_rr (i1 (NOT_p (CMPGTUrr IntRegs:$lhs, 39234285Sdim (ADD_ri IntRegs:$rhs, -1)))), 40234285Sdim IntRegs:$tval, IntRegs:$fval))>; 41234285Sdim 42234285Sdimdef : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, 43234285Sdim IntRegs:$fval, SETLT)), 44234285Sdim (i32 (MUX_rr (i1 (NOT_p (CMPGTrr IntRegs:$lhs, 45234285Sdim (ADD_ri IntRegs:$rhs, -1)))), 46234285Sdim IntRegs:$tval, IntRegs:$fval))>; 47234285Sdim 48234285Sdimdef : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, 49234285Sdim IntRegs:$fval, SETLE)), 50234285Sdim (i32 (MUX_rr (i1 (NOT_p (CMPGTrr IntRegs:$lhs, IntRegs:$rhs))), 51234285Sdim IntRegs:$tval, IntRegs:$fval))>; 52234285Sdim 53234285Sdimdef : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, 54234285Sdim IntRegs:$fval, SETULE)), 55234285Sdim (i32 (MUX_rr (i1 (NOT_p (CMPGTUrr IntRegs:$lhs, IntRegs:$rhs))), 56234285Sdim IntRegs:$tval, IntRegs:$fval))>; 57234285Sdim 58234285Sdim 59234285Sdim// 60234285Sdim// selectcc mappings for greater-equal-to Rs => greater-than Rs-1. 61234285Sdim// 62234285Sdimdef : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, 63234285Sdim IntRegs:$fval, SETGE)), 64234285Sdim (i32 (MUX_rr (i1 (CMPGTrr IntRegs:$lhs, (ADD_ri IntRegs:$rhs, -1))), 65234285Sdim IntRegs:$tval, IntRegs:$fval))>; 66234285Sdim 67234285Sdimdef : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, 68234285Sdim IntRegs:$fval, SETUGE)), 69234285Sdim (i32 (MUX_rr (i1 (CMPGTUrr IntRegs:$lhs, (ADD_ri IntRegs:$rhs, -1))), 70234285Sdim IntRegs:$tval, IntRegs:$fval))>; 71234285Sdim 72234285Sdim 73234285Sdim 74234285Sdim// 75234285Sdim// selectcc mappings for predicate comparisons. 76234285Sdim// 77234285Sdim// Convert Rd = selectcc(p0, p1, true_val, false_val, SETEQ) into: 78234285Sdim// pt = not(p1 xor p2) 79234285Sdim// Rd = mux(pt, true_val, false_val) 80234285Sdim// and similarly for SETNE 81234285Sdim// 82234285Sdimdef : Pat <(i32 (selectcc PredRegs:$lhs, PredRegs:$rhs, IntRegs:$tval, 83234285Sdim IntRegs:$fval, SETNE)), 84234285Sdim (i32 (MUX_rr (i1 (XOR_pp PredRegs:$lhs, PredRegs:$rhs)), IntRegs:$tval, 85234285Sdim IntRegs:$fval))>; 86234285Sdim 87234285Sdimdef : Pat <(i32 (selectcc PredRegs:$lhs, PredRegs:$rhs, IntRegs:$tval, 88234285Sdim IntRegs:$fval, SETEQ)), 89234285Sdim (i32 (MUX_rr (i1 (NOT_p (XOR_pp PredRegs:$lhs, PredRegs:$rhs))), 90234285Sdim IntRegs:$tval, IntRegs:$fval))>; 91234285Sdim 92234285Sdim 93234285Sdim// 94234285Sdim// selectcc mappings for 64-bit operands are messy. Hexagon does not have a 95234285Sdim// MUX64 o, use this: 96234285Sdim// selectcc(Rss, Rdd, tval, fval, cond) -> 97234285Sdim// combine(mux(cmp_cond(Rss, Rdd), tval.hi, fval.hi), 98234285Sdim// mux(cmp_cond(Rss, Rdd), tval.lo, fval.lo)) 99234285Sdim 100234285Sdim// setgt-64. 101234285Sdimdef : Pat<(i64 (selectcc DoubleRegs:$lhs, DoubleRegs:$rhs, DoubleRegs:$tval, 102234285Sdim DoubleRegs:$fval, SETGT)), 103234285Sdim (COMBINE_rr (MUX_rr (CMPGT64rr DoubleRegs:$lhs, DoubleRegs:$rhs), 104234285Sdim (EXTRACT_SUBREG DoubleRegs:$tval, subreg_hireg), 105234285Sdim (EXTRACT_SUBREG DoubleRegs:$fval, subreg_hireg)), 106234285Sdim (MUX_rr (CMPGT64rr DoubleRegs:$lhs, DoubleRegs:$rhs), 107234285Sdim (EXTRACT_SUBREG DoubleRegs:$tval, subreg_loreg), 108234285Sdim (EXTRACT_SUBREG DoubleRegs:$fval, subreg_loreg)))>; 109234285Sdim 110234285Sdim 111234285Sdim// setlt-64 -> setgt-64. 112234285Sdimdef : Pat<(i64 (selectcc DoubleRegs:$lhs, DoubleRegs:$rhs, DoubleRegs:$tval, 113234285Sdim DoubleRegs:$fval, SETLT)), 114234285Sdim (COMBINE_rr (MUX_rr (CMPGT64rr DoubleRegs:$lhs, 115234285Sdim (ADD64_rr DoubleRegs:$rhs, (TFRI64 -1))), 116234285Sdim (EXTRACT_SUBREG DoubleRegs:$tval, subreg_hireg), 117234285Sdim (EXTRACT_SUBREG DoubleRegs:$fval, subreg_hireg)), 118234285Sdim (MUX_rr (CMPGT64rr DoubleRegs:$lhs, 119234285Sdim (ADD64_rr DoubleRegs:$rhs, (TFRI64 -1))), 120234285Sdim (EXTRACT_SUBREG DoubleRegs:$tval, subreg_loreg), 121234285Sdim (EXTRACT_SUBREG DoubleRegs:$fval, subreg_loreg)))>; 122