1249259Sdim//===-- AArch64BaseInfo.h - Top level definitions for AArch64- --*- C++ -*-===// 2249259Sdim// 3249259Sdim// The LLVM Compiler Infrastructure 4249259Sdim// 5249259Sdim// This file is distributed under the University of Illinois Open Source 6249259Sdim// License. See LICENSE.TXT for details. 7249259Sdim// 8249259Sdim//===----------------------------------------------------------------------===// 9249259Sdim// 10249259Sdim// This file contains small standalone helper functions and enum definitions for 11249259Sdim// the AArch64 target useful for the compiler back-end and the MC libraries. 12249259Sdim// As such, it deliberately does not include references to LLVM core 13249259Sdim// code gen types, passes, etc.. 14249259Sdim// 15249259Sdim//===----------------------------------------------------------------------===// 16249259Sdim 17249259Sdim#ifndef LLVM_AARCH64_BASEINFO_H 18249259Sdim#define LLVM_AARCH64_BASEINFO_H 19249259Sdim 20249259Sdim#include "llvm/ADT/StringSwitch.h" 21249259Sdim#include "llvm/ADT/STLExtras.h" 22249259Sdim#include "llvm/Support/ErrorHandling.h" 23249259Sdim 24249259Sdimnamespace llvm { 25249259Sdim 26249259Sdim// // Enums corresponding to AArch64 condition codes 27249259Sdimnamespace A64CC { 28249259Sdim // The CondCodes constants map directly to the 4-bit encoding of the 29249259Sdim // condition field for predicated instructions. 30249259Sdim enum CondCodes { // Meaning (integer) Meaning (floating-point) 31249259Sdim EQ = 0, // Equal Equal 32249259Sdim NE, // Not equal Not equal, or unordered 33249259Sdim HS, // Unsigned higher or same >, ==, or unordered 34249259Sdim LO, // Unsigned lower or same Less than 35249259Sdim MI, // Minus, negative Less than 36249259Sdim PL, // Plus, positive or zero >, ==, or unordered 37249259Sdim VS, // Overflow Unordered 38249259Sdim VC, // No overflow Ordered 39249259Sdim HI, // Unsigned higher Greater than, or unordered 40249259Sdim LS, // Unsigned lower or same Less than or equal 41249259Sdim GE, // Greater than or equal Greater than or equal 42249259Sdim LT, // Less than Less than, or unordered 43249259Sdim GT, // Signed greater than Greater than 44249259Sdim LE, // Signed less than or equal <, ==, or unordered 45249259Sdim AL, // Always (unconditional) Always (unconditional) 46249259Sdim NV, // Always (unconditional) Always (unconditional) 47249259Sdim // Note the NV exists purely to disassemble 0b1111. Execution 48249259Sdim // is "always". 49249259Sdim Invalid 50249259Sdim }; 51249259Sdim 52249259Sdim} // namespace A64CC 53249259Sdim 54249259Sdiminline static const char *A64CondCodeToString(A64CC::CondCodes CC) { 55249259Sdim switch (CC) { 56249259Sdim default: llvm_unreachable("Unknown condition code"); 57249259Sdim case A64CC::EQ: return "eq"; 58249259Sdim case A64CC::NE: return "ne"; 59249259Sdim case A64CC::HS: return "hs"; 60249259Sdim case A64CC::LO: return "lo"; 61249259Sdim case A64CC::MI: return "mi"; 62249259Sdim case A64CC::PL: return "pl"; 63249259Sdim case A64CC::VS: return "vs"; 64249259Sdim case A64CC::VC: return "vc"; 65249259Sdim case A64CC::HI: return "hi"; 66249259Sdim case A64CC::LS: return "ls"; 67249259Sdim case A64CC::GE: return "ge"; 68249259Sdim case A64CC::LT: return "lt"; 69249259Sdim case A64CC::GT: return "gt"; 70249259Sdim case A64CC::LE: return "le"; 71249259Sdim case A64CC::AL: return "al"; 72249259Sdim case A64CC::NV: return "nv"; 73249259Sdim } 74249259Sdim} 75249259Sdim 76249259Sdiminline static A64CC::CondCodes A64StringToCondCode(StringRef CondStr) { 77249259Sdim return StringSwitch<A64CC::CondCodes>(CondStr.lower()) 78249259Sdim .Case("eq", A64CC::EQ) 79249259Sdim .Case("ne", A64CC::NE) 80249259Sdim .Case("ne", A64CC::NE) 81249259Sdim .Case("hs", A64CC::HS) 82249259Sdim .Case("cs", A64CC::HS) 83249259Sdim .Case("lo", A64CC::LO) 84249259Sdim .Case("cc", A64CC::LO) 85249259Sdim .Case("mi", A64CC::MI) 86249259Sdim .Case("pl", A64CC::PL) 87249259Sdim .Case("vs", A64CC::VS) 88249259Sdim .Case("vc", A64CC::VC) 89249259Sdim .Case("hi", A64CC::HI) 90249259Sdim .Case("ls", A64CC::LS) 91249259Sdim .Case("ge", A64CC::GE) 92249259Sdim .Case("lt", A64CC::LT) 93249259Sdim .Case("gt", A64CC::GT) 94249259Sdim .Case("le", A64CC::LE) 95249259Sdim .Case("al", A64CC::AL) 96249259Sdim .Case("nv", A64CC::NV) 97249259Sdim .Default(A64CC::Invalid); 98249259Sdim} 99249259Sdim 100249259Sdiminline static A64CC::CondCodes A64InvertCondCode(A64CC::CondCodes CC) { 101249259Sdim // It turns out that the condition codes have been designed so that in order 102249259Sdim // to reverse the intent of the condition you only have to invert the low bit: 103249259Sdim 104249259Sdim return static_cast<A64CC::CondCodes>(static_cast<unsigned>(CC) ^ 0x1); 105249259Sdim} 106249259Sdim 107249259Sdim/// Instances of this class can perform bidirectional mapping from random 108249259Sdim/// identifier strings to operand encodings. For example "MSR" takes a named 109249259Sdim/// system-register which must be encoded somehow and decoded for printing. This 110249259Sdim/// central location means that the information for those transformations is not 111249259Sdim/// duplicated and remains in sync. 112249259Sdim/// 113249259Sdim/// FIXME: currently the algorithm is a completely unoptimised linear 114249259Sdim/// search. Obviously this could be improved, but we would probably want to work 115249259Sdim/// out just how often these instructions are emitted before working on it. It 116249259Sdim/// might even be optimal to just reorder the tables for the common instructions 117249259Sdim/// rather than changing the algorithm. 118249259Sdimstruct NamedImmMapper { 119249259Sdim struct Mapping { 120249259Sdim const char *Name; 121249259Sdim uint32_t Value; 122249259Sdim }; 123249259Sdim 124249259Sdim template<int N> 125249259Sdim NamedImmMapper(const Mapping (&Pairs)[N], uint32_t TooBigImm) 126249259Sdim : Pairs(&Pairs[0]), NumPairs(N), TooBigImm(TooBigImm) {} 127249259Sdim 128249259Sdim StringRef toString(uint32_t Value, bool &Valid) const; 129249259Sdim uint32_t fromString(StringRef Name, bool &Valid) const; 130249259Sdim 131249259Sdim /// Many of the instructions allow an alternative assembly form consisting of 132249259Sdim /// a simple immediate. Currently the only valid forms are ranges [0, N) where 133249259Sdim /// N being 0 indicates no immediate syntax-form is allowed. 134249259Sdim bool validImm(uint32_t Value) const; 135249259Sdimprotected: 136249259Sdim const Mapping *Pairs; 137249259Sdim size_t NumPairs; 138249259Sdim uint32_t TooBigImm; 139249259Sdim}; 140249259Sdim 141249259Sdimnamespace A64AT { 142249259Sdim enum ATValues { 143249259Sdim Invalid = -1, // Op0 Op1 CRn CRm Op2 144249259Sdim S1E1R = 0x43c0, // 01 000 0111 1000 000 145249259Sdim S1E2R = 0x63c0, // 01 100 0111 1000 000 146249259Sdim S1E3R = 0x73c0, // 01 110 0111 1000 000 147249259Sdim S1E1W = 0x43c1, // 01 000 0111 1000 001 148249259Sdim S1E2W = 0x63c1, // 01 100 0111 1000 001 149249259Sdim S1E3W = 0x73c1, // 01 110 0111 1000 001 150249259Sdim S1E0R = 0x43c2, // 01 000 0111 1000 010 151249259Sdim S1E0W = 0x43c3, // 01 000 0111 1000 011 152249259Sdim S12E1R = 0x63c4, // 01 100 0111 1000 100 153249259Sdim S12E1W = 0x63c5, // 01 100 0111 1000 101 154249259Sdim S12E0R = 0x63c6, // 01 100 0111 1000 110 155249259Sdim S12E0W = 0x63c7 // 01 100 0111 1000 111 156249259Sdim }; 157249259Sdim 158249259Sdim struct ATMapper : NamedImmMapper { 159249259Sdim const static Mapping ATPairs[]; 160249259Sdim 161249259Sdim ATMapper(); 162249259Sdim }; 163249259Sdim 164249259Sdim} 165249259Sdimnamespace A64DB { 166249259Sdim enum DBValues { 167249259Sdim Invalid = -1, 168249259Sdim OSHLD = 0x1, 169249259Sdim OSHST = 0x2, 170249259Sdim OSH = 0x3, 171249259Sdim NSHLD = 0x5, 172249259Sdim NSHST = 0x6, 173249259Sdim NSH = 0x7, 174249259Sdim ISHLD = 0x9, 175249259Sdim ISHST = 0xa, 176249259Sdim ISH = 0xb, 177249259Sdim LD = 0xd, 178249259Sdim ST = 0xe, 179249259Sdim SY = 0xf 180249259Sdim }; 181249259Sdim 182249259Sdim struct DBarrierMapper : NamedImmMapper { 183249259Sdim const static Mapping DBarrierPairs[]; 184249259Sdim 185249259Sdim DBarrierMapper(); 186249259Sdim }; 187249259Sdim} 188249259Sdim 189249259Sdimnamespace A64DC { 190249259Sdim enum DCValues { 191249259Sdim Invalid = -1, // Op1 CRn CRm Op2 192249259Sdim ZVA = 0x5ba1, // 01 011 0111 0100 001 193249259Sdim IVAC = 0x43b1, // 01 000 0111 0110 001 194249259Sdim ISW = 0x43b2, // 01 000 0111 0110 010 195249259Sdim CVAC = 0x5bd1, // 01 011 0111 1010 001 196249259Sdim CSW = 0x43d2, // 01 000 0111 1010 010 197249259Sdim CVAU = 0x5bd9, // 01 011 0111 1011 001 198249259Sdim CIVAC = 0x5bf1, // 01 011 0111 1110 001 199249259Sdim CISW = 0x43f2 // 01 000 0111 1110 010 200249259Sdim }; 201249259Sdim 202249259Sdim struct DCMapper : NamedImmMapper { 203249259Sdim const static Mapping DCPairs[]; 204249259Sdim 205249259Sdim DCMapper(); 206249259Sdim }; 207249259Sdim 208249259Sdim} 209249259Sdim 210249259Sdimnamespace A64IC { 211249259Sdim enum ICValues { 212249259Sdim Invalid = -1, // Op1 CRn CRm Op2 213249259Sdim IALLUIS = 0x0388, // 000 0111 0001 000 214249259Sdim IALLU = 0x03a8, // 000 0111 0101 000 215249259Sdim IVAU = 0x1ba9 // 011 0111 0101 001 216249259Sdim }; 217249259Sdim 218249259Sdim 219249259Sdim struct ICMapper : NamedImmMapper { 220249259Sdim const static Mapping ICPairs[]; 221249259Sdim 222249259Sdim ICMapper(); 223249259Sdim }; 224249259Sdim 225249259Sdim static inline bool NeedsRegister(ICValues Val) { 226249259Sdim return Val == IVAU; 227249259Sdim } 228249259Sdim} 229249259Sdim 230249259Sdimnamespace A64ISB { 231249259Sdim enum ISBValues { 232249259Sdim Invalid = -1, 233249259Sdim SY = 0xf 234249259Sdim }; 235249259Sdim struct ISBMapper : NamedImmMapper { 236249259Sdim const static Mapping ISBPairs[]; 237249259Sdim 238249259Sdim ISBMapper(); 239249259Sdim }; 240249259Sdim} 241249259Sdim 242249259Sdimnamespace A64PRFM { 243249259Sdim enum PRFMValues { 244249259Sdim Invalid = -1, 245249259Sdim PLDL1KEEP = 0x00, 246249259Sdim PLDL1STRM = 0x01, 247249259Sdim PLDL2KEEP = 0x02, 248249259Sdim PLDL2STRM = 0x03, 249249259Sdim PLDL3KEEP = 0x04, 250249259Sdim PLDL3STRM = 0x05, 251249259Sdim PLIL1KEEP = 0x08, 252249259Sdim PLIL1STRM = 0x09, 253249259Sdim PLIL2KEEP = 0x0a, 254249259Sdim PLIL2STRM = 0x0b, 255249259Sdim PLIL3KEEP = 0x0c, 256249259Sdim PLIL3STRM = 0x0d, 257249259Sdim PSTL1KEEP = 0x10, 258249259Sdim PSTL1STRM = 0x11, 259249259Sdim PSTL2KEEP = 0x12, 260249259Sdim PSTL2STRM = 0x13, 261249259Sdim PSTL3KEEP = 0x14, 262249259Sdim PSTL3STRM = 0x15 263249259Sdim }; 264249259Sdim 265249259Sdim struct PRFMMapper : NamedImmMapper { 266249259Sdim const static Mapping PRFMPairs[]; 267249259Sdim 268249259Sdim PRFMMapper(); 269249259Sdim }; 270249259Sdim} 271249259Sdim 272249259Sdimnamespace A64PState { 273249259Sdim enum PStateValues { 274249259Sdim Invalid = -1, 275249259Sdim SPSel = 0x05, 276249259Sdim DAIFSet = 0x1e, 277249259Sdim DAIFClr = 0x1f 278249259Sdim }; 279249259Sdim 280249259Sdim struct PStateMapper : NamedImmMapper { 281249259Sdim const static Mapping PStatePairs[]; 282249259Sdim 283249259Sdim PStateMapper(); 284249259Sdim }; 285249259Sdim 286249259Sdim} 287249259Sdim 288249259Sdimnamespace A64SE { 289249259Sdim enum ShiftExtSpecifiers { 290249259Sdim Invalid = -1, 291249259Sdim LSL, 292263508Sdim MSL, 293249259Sdim LSR, 294249259Sdim ASR, 295249259Sdim ROR, 296249259Sdim 297249259Sdim UXTB, 298249259Sdim UXTH, 299249259Sdim UXTW, 300249259Sdim UXTX, 301249259Sdim 302249259Sdim SXTB, 303249259Sdim SXTH, 304249259Sdim SXTW, 305249259Sdim SXTX 306249259Sdim }; 307249259Sdim} 308249259Sdim 309263508Sdimnamespace A64Layout { 310263508Sdim enum VectorLayout { 311263508Sdim Invalid = -1, 312263508Sdim VL_8B, 313263508Sdim VL_4H, 314263508Sdim VL_2S, 315263508Sdim VL_1D, 316263508Sdim 317263508Sdim VL_16B, 318263508Sdim VL_8H, 319263508Sdim VL_4S, 320263508Sdim VL_2D, 321263508Sdim 322263508Sdim // Bare layout for the 128-bit vector 323263508Sdim // (only show ".b", ".h", ".s", ".d" without vector number) 324263508Sdim VL_B, 325263508Sdim VL_H, 326263508Sdim VL_S, 327263508Sdim VL_D 328263508Sdim }; 329263508Sdim} 330263508Sdim 331263508Sdiminline static const char * 332263508SdimA64VectorLayoutToString(A64Layout::VectorLayout Layout) { 333263508Sdim switch (Layout) { 334263508Sdim case A64Layout::VL_8B: return ".8b"; 335263508Sdim case A64Layout::VL_4H: return ".4h"; 336263508Sdim case A64Layout::VL_2S: return ".2s"; 337263508Sdim case A64Layout::VL_1D: return ".1d"; 338263508Sdim case A64Layout::VL_16B: return ".16b"; 339263508Sdim case A64Layout::VL_8H: return ".8h"; 340263508Sdim case A64Layout::VL_4S: return ".4s"; 341263508Sdim case A64Layout::VL_2D: return ".2d"; 342263508Sdim case A64Layout::VL_B: return ".b"; 343263508Sdim case A64Layout::VL_H: return ".h"; 344263508Sdim case A64Layout::VL_S: return ".s"; 345263508Sdim case A64Layout::VL_D: return ".d"; 346263508Sdim default: llvm_unreachable("Unknown Vector Layout"); 347263508Sdim } 348263508Sdim} 349263508Sdim 350263508Sdiminline static A64Layout::VectorLayout 351263508SdimA64StringToVectorLayout(StringRef LayoutStr) { 352263508Sdim return StringSwitch<A64Layout::VectorLayout>(LayoutStr) 353263508Sdim .Case(".8b", A64Layout::VL_8B) 354263508Sdim .Case(".4h", A64Layout::VL_4H) 355263508Sdim .Case(".2s", A64Layout::VL_2S) 356263508Sdim .Case(".1d", A64Layout::VL_1D) 357263508Sdim .Case(".16b", A64Layout::VL_16B) 358263508Sdim .Case(".8h", A64Layout::VL_8H) 359263508Sdim .Case(".4s", A64Layout::VL_4S) 360263508Sdim .Case(".2d", A64Layout::VL_2D) 361263508Sdim .Case(".b", A64Layout::VL_B) 362263508Sdim .Case(".h", A64Layout::VL_H) 363263508Sdim .Case(".s", A64Layout::VL_S) 364263508Sdim .Case(".d", A64Layout::VL_D) 365263508Sdim .Default(A64Layout::Invalid); 366263508Sdim} 367263508Sdim 368249259Sdimnamespace A64SysReg { 369249259Sdim enum SysRegROValues { 370249259Sdim MDCCSR_EL0 = 0x9808, // 10 011 0000 0001 000 371249259Sdim DBGDTRRX_EL0 = 0x9828, // 10 011 0000 0101 000 372249259Sdim MDRAR_EL1 = 0x8080, // 10 000 0001 0000 000 373249259Sdim OSLSR_EL1 = 0x808c, // 10 000 0001 0001 100 374249259Sdim DBGAUTHSTATUS_EL1 = 0x83f6, // 10 000 0111 1110 110 375249259Sdim PMCEID0_EL0 = 0xdce6, // 11 011 1001 1100 110 376249259Sdim PMCEID1_EL0 = 0xdce7, // 11 011 1001 1100 111 377249259Sdim MIDR_EL1 = 0xc000, // 11 000 0000 0000 000 378249259Sdim CCSIDR_EL1 = 0xc800, // 11 001 0000 0000 000 379249259Sdim CLIDR_EL1 = 0xc801, // 11 001 0000 0000 001 380249259Sdim CTR_EL0 = 0xd801, // 11 011 0000 0000 001 381249259Sdim MPIDR_EL1 = 0xc005, // 11 000 0000 0000 101 382249259Sdim REVIDR_EL1 = 0xc006, // 11 000 0000 0000 110 383249259Sdim AIDR_EL1 = 0xc807, // 11 001 0000 0000 111 384249259Sdim DCZID_EL0 = 0xd807, // 11 011 0000 0000 111 385249259Sdim ID_PFR0_EL1 = 0xc008, // 11 000 0000 0001 000 386249259Sdim ID_PFR1_EL1 = 0xc009, // 11 000 0000 0001 001 387249259Sdim ID_DFR0_EL1 = 0xc00a, // 11 000 0000 0001 010 388249259Sdim ID_AFR0_EL1 = 0xc00b, // 11 000 0000 0001 011 389249259Sdim ID_MMFR0_EL1 = 0xc00c, // 11 000 0000 0001 100 390249259Sdim ID_MMFR1_EL1 = 0xc00d, // 11 000 0000 0001 101 391249259Sdim ID_MMFR2_EL1 = 0xc00e, // 11 000 0000 0001 110 392249259Sdim ID_MMFR3_EL1 = 0xc00f, // 11 000 0000 0001 111 393249259Sdim ID_ISAR0_EL1 = 0xc010, // 11 000 0000 0010 000 394249259Sdim ID_ISAR1_EL1 = 0xc011, // 11 000 0000 0010 001 395249259Sdim ID_ISAR2_EL1 = 0xc012, // 11 000 0000 0010 010 396249259Sdim ID_ISAR3_EL1 = 0xc013, // 11 000 0000 0010 011 397249259Sdim ID_ISAR4_EL1 = 0xc014, // 11 000 0000 0010 100 398249259Sdim ID_ISAR5_EL1 = 0xc015, // 11 000 0000 0010 101 399249259Sdim ID_AA64PFR0_EL1 = 0xc020, // 11 000 0000 0100 000 400249259Sdim ID_AA64PFR1_EL1 = 0xc021, // 11 000 0000 0100 001 401249259Sdim ID_AA64DFR0_EL1 = 0xc028, // 11 000 0000 0101 000 402249259Sdim ID_AA64DFR1_EL1 = 0xc029, // 11 000 0000 0101 001 403249259Sdim ID_AA64AFR0_EL1 = 0xc02c, // 11 000 0000 0101 100 404249259Sdim ID_AA64AFR1_EL1 = 0xc02d, // 11 000 0000 0101 101 405249259Sdim ID_AA64ISAR0_EL1 = 0xc030, // 11 000 0000 0110 000 406249259Sdim ID_AA64ISAR1_EL1 = 0xc031, // 11 000 0000 0110 001 407249259Sdim ID_AA64MMFR0_EL1 = 0xc038, // 11 000 0000 0111 000 408249259Sdim ID_AA64MMFR1_EL1 = 0xc039, // 11 000 0000 0111 001 409249259Sdim MVFR0_EL1 = 0xc018, // 11 000 0000 0011 000 410249259Sdim MVFR1_EL1 = 0xc019, // 11 000 0000 0011 001 411249259Sdim MVFR2_EL1 = 0xc01a, // 11 000 0000 0011 010 412249259Sdim RVBAR_EL1 = 0xc601, // 11 000 1100 0000 001 413249259Sdim RVBAR_EL2 = 0xe601, // 11 100 1100 0000 001 414249259Sdim RVBAR_EL3 = 0xf601, // 11 110 1100 0000 001 415249259Sdim ISR_EL1 = 0xc608, // 11 000 1100 0001 000 416249259Sdim CNTPCT_EL0 = 0xdf01, // 11 011 1110 0000 001 417249259Sdim CNTVCT_EL0 = 0xdf02, // 11 011 1110 0000 010 418249259Sdim 419249259Sdim // Trace registers 420249259Sdim TRCSTATR = 0x8818, // 10 001 0000 0011 000 421249259Sdim TRCIDR8 = 0x8806, // 10 001 0000 0000 110 422249259Sdim TRCIDR9 = 0x880e, // 10 001 0000 0001 110 423249259Sdim TRCIDR10 = 0x8816, // 10 001 0000 0010 110 424249259Sdim TRCIDR11 = 0x881e, // 10 001 0000 0011 110 425249259Sdim TRCIDR12 = 0x8826, // 10 001 0000 0100 110 426249259Sdim TRCIDR13 = 0x882e, // 10 001 0000 0101 110 427249259Sdim TRCIDR0 = 0x8847, // 10 001 0000 1000 111 428249259Sdim TRCIDR1 = 0x884f, // 10 001 0000 1001 111 429249259Sdim TRCIDR2 = 0x8857, // 10 001 0000 1010 111 430249259Sdim TRCIDR3 = 0x885f, // 10 001 0000 1011 111 431249259Sdim TRCIDR4 = 0x8867, // 10 001 0000 1100 111 432249259Sdim TRCIDR5 = 0x886f, // 10 001 0000 1101 111 433249259Sdim TRCIDR6 = 0x8877, // 10 001 0000 1110 111 434249259Sdim TRCIDR7 = 0x887f, // 10 001 0000 1111 111 435249259Sdim TRCOSLSR = 0x888c, // 10 001 0001 0001 100 436249259Sdim TRCPDSR = 0x88ac, // 10 001 0001 0101 100 437249259Sdim TRCDEVAFF0 = 0x8bd6, // 10 001 0111 1010 110 438249259Sdim TRCDEVAFF1 = 0x8bde, // 10 001 0111 1011 110 439249259Sdim TRCLSR = 0x8bee, // 10 001 0111 1101 110 440249259Sdim TRCAUTHSTATUS = 0x8bf6, // 10 001 0111 1110 110 441249259Sdim TRCDEVARCH = 0x8bfe, // 10 001 0111 1111 110 442249259Sdim TRCDEVID = 0x8b97, // 10 001 0111 0010 111 443249259Sdim TRCDEVTYPE = 0x8b9f, // 10 001 0111 0011 111 444249259Sdim TRCPIDR4 = 0x8ba7, // 10 001 0111 0100 111 445249259Sdim TRCPIDR5 = 0x8baf, // 10 001 0111 0101 111 446249259Sdim TRCPIDR6 = 0x8bb7, // 10 001 0111 0110 111 447249259Sdim TRCPIDR7 = 0x8bbf, // 10 001 0111 0111 111 448249259Sdim TRCPIDR0 = 0x8bc7, // 10 001 0111 1000 111 449249259Sdim TRCPIDR1 = 0x8bcf, // 10 001 0111 1001 111 450249259Sdim TRCPIDR2 = 0x8bd7, // 10 001 0111 1010 111 451249259Sdim TRCPIDR3 = 0x8bdf, // 10 001 0111 1011 111 452249259Sdim TRCCIDR0 = 0x8be7, // 10 001 0111 1100 111 453249259Sdim TRCCIDR1 = 0x8bef, // 10 001 0111 1101 111 454249259Sdim TRCCIDR2 = 0x8bf7, // 10 001 0111 1110 111 455249259Sdim TRCCIDR3 = 0x8bff, // 10 001 0111 1111 111 456249259Sdim 457249259Sdim // GICv3 registers 458249259Sdim ICC_IAR1_EL1 = 0xc660, // 11 000 1100 1100 000 459249259Sdim ICC_IAR0_EL1 = 0xc640, // 11 000 1100 1000 000 460249259Sdim ICC_HPPIR1_EL1 = 0xc662, // 11 000 1100 1100 010 461249259Sdim ICC_HPPIR0_EL1 = 0xc642, // 11 000 1100 1000 010 462249259Sdim ICC_RPR_EL1 = 0xc65b, // 11 000 1100 1011 011 463249259Sdim ICH_VTR_EL2 = 0xe659, // 11 100 1100 1011 001 464249259Sdim ICH_EISR_EL2 = 0xe65b, // 11 100 1100 1011 011 465249259Sdim ICH_ELSR_EL2 = 0xe65d // 11 100 1100 1011 101 466249259Sdim }; 467249259Sdim 468249259Sdim enum SysRegWOValues { 469249259Sdim DBGDTRTX_EL0 = 0x9828, // 10 011 0000 0101 000 470249259Sdim OSLAR_EL1 = 0x8084, // 10 000 0001 0000 100 471249259Sdim PMSWINC_EL0 = 0xdce4, // 11 011 1001 1100 100 472249259Sdim 473249259Sdim // Trace Registers 474249259Sdim TRCOSLAR = 0x8884, // 10 001 0001 0000 100 475249259Sdim TRCLAR = 0x8be6, // 10 001 0111 1100 110 476249259Sdim 477249259Sdim // GICv3 registers 478249259Sdim ICC_EOIR1_EL1 = 0xc661, // 11 000 1100 1100 001 479249259Sdim ICC_EOIR0_EL1 = 0xc641, // 11 000 1100 1000 001 480249259Sdim ICC_DIR_EL1 = 0xc659, // 11 000 1100 1011 001 481249259Sdim ICC_SGI1R_EL1 = 0xc65d, // 11 000 1100 1011 101 482249259Sdim ICC_ASGI1R_EL1 = 0xc65e, // 11 000 1100 1011 110 483249259Sdim ICC_SGI0R_EL1 = 0xc65f // 11 000 1100 1011 111 484249259Sdim }; 485249259Sdim 486249259Sdim enum SysRegValues { 487249259Sdim Invalid = -1, // Op0 Op1 CRn CRm Op2 488249259Sdim OSDTRRX_EL1 = 0x8002, // 10 000 0000 0000 010 489249259Sdim OSDTRTX_EL1 = 0x801a, // 10 000 0000 0011 010 490249259Sdim TEECR32_EL1 = 0x9000, // 10 010 0000 0000 000 491249259Sdim MDCCINT_EL1 = 0x8010, // 10 000 0000 0010 000 492249259Sdim MDSCR_EL1 = 0x8012, // 10 000 0000 0010 010 493249259Sdim DBGDTR_EL0 = 0x9820, // 10 011 0000 0100 000 494249259Sdim OSECCR_EL1 = 0x8032, // 10 000 0000 0110 010 495249259Sdim DBGVCR32_EL2 = 0xa038, // 10 100 0000 0111 000 496249259Sdim DBGBVR0_EL1 = 0x8004, // 10 000 0000 0000 100 497249259Sdim DBGBVR1_EL1 = 0x800c, // 10 000 0000 0001 100 498249259Sdim DBGBVR2_EL1 = 0x8014, // 10 000 0000 0010 100 499249259Sdim DBGBVR3_EL1 = 0x801c, // 10 000 0000 0011 100 500249259Sdim DBGBVR4_EL1 = 0x8024, // 10 000 0000 0100 100 501249259Sdim DBGBVR5_EL1 = 0x802c, // 10 000 0000 0101 100 502249259Sdim DBGBVR6_EL1 = 0x8034, // 10 000 0000 0110 100 503249259Sdim DBGBVR7_EL1 = 0x803c, // 10 000 0000 0111 100 504249259Sdim DBGBVR8_EL1 = 0x8044, // 10 000 0000 1000 100 505249259Sdim DBGBVR9_EL1 = 0x804c, // 10 000 0000 1001 100 506249259Sdim DBGBVR10_EL1 = 0x8054, // 10 000 0000 1010 100 507249259Sdim DBGBVR11_EL1 = 0x805c, // 10 000 0000 1011 100 508249259Sdim DBGBVR12_EL1 = 0x8064, // 10 000 0000 1100 100 509249259Sdim DBGBVR13_EL1 = 0x806c, // 10 000 0000 1101 100 510249259Sdim DBGBVR14_EL1 = 0x8074, // 10 000 0000 1110 100 511249259Sdim DBGBVR15_EL1 = 0x807c, // 10 000 0000 1111 100 512249259Sdim DBGBCR0_EL1 = 0x8005, // 10 000 0000 0000 101 513249259Sdim DBGBCR1_EL1 = 0x800d, // 10 000 0000 0001 101 514249259Sdim DBGBCR2_EL1 = 0x8015, // 10 000 0000 0010 101 515249259Sdim DBGBCR3_EL1 = 0x801d, // 10 000 0000 0011 101 516249259Sdim DBGBCR4_EL1 = 0x8025, // 10 000 0000 0100 101 517249259Sdim DBGBCR5_EL1 = 0x802d, // 10 000 0000 0101 101 518249259Sdim DBGBCR6_EL1 = 0x8035, // 10 000 0000 0110 101 519249259Sdim DBGBCR7_EL1 = 0x803d, // 10 000 0000 0111 101 520249259Sdim DBGBCR8_EL1 = 0x8045, // 10 000 0000 1000 101 521249259Sdim DBGBCR9_EL1 = 0x804d, // 10 000 0000 1001 101 522249259Sdim DBGBCR10_EL1 = 0x8055, // 10 000 0000 1010 101 523249259Sdim DBGBCR11_EL1 = 0x805d, // 10 000 0000 1011 101 524249259Sdim DBGBCR12_EL1 = 0x8065, // 10 000 0000 1100 101 525249259Sdim DBGBCR13_EL1 = 0x806d, // 10 000 0000 1101 101 526249259Sdim DBGBCR14_EL1 = 0x8075, // 10 000 0000 1110 101 527249259Sdim DBGBCR15_EL1 = 0x807d, // 10 000 0000 1111 101 528249259Sdim DBGWVR0_EL1 = 0x8006, // 10 000 0000 0000 110 529249259Sdim DBGWVR1_EL1 = 0x800e, // 10 000 0000 0001 110 530249259Sdim DBGWVR2_EL1 = 0x8016, // 10 000 0000 0010 110 531249259Sdim DBGWVR3_EL1 = 0x801e, // 10 000 0000 0011 110 532249259Sdim DBGWVR4_EL1 = 0x8026, // 10 000 0000 0100 110 533249259Sdim DBGWVR5_EL1 = 0x802e, // 10 000 0000 0101 110 534249259Sdim DBGWVR6_EL1 = 0x8036, // 10 000 0000 0110 110 535249259Sdim DBGWVR7_EL1 = 0x803e, // 10 000 0000 0111 110 536249259Sdim DBGWVR8_EL1 = 0x8046, // 10 000 0000 1000 110 537249259Sdim DBGWVR9_EL1 = 0x804e, // 10 000 0000 1001 110 538249259Sdim DBGWVR10_EL1 = 0x8056, // 10 000 0000 1010 110 539249259Sdim DBGWVR11_EL1 = 0x805e, // 10 000 0000 1011 110 540249259Sdim DBGWVR12_EL1 = 0x8066, // 10 000 0000 1100 110 541249259Sdim DBGWVR13_EL1 = 0x806e, // 10 000 0000 1101 110 542249259Sdim DBGWVR14_EL1 = 0x8076, // 10 000 0000 1110 110 543249259Sdim DBGWVR15_EL1 = 0x807e, // 10 000 0000 1111 110 544249259Sdim DBGWCR0_EL1 = 0x8007, // 10 000 0000 0000 111 545249259Sdim DBGWCR1_EL1 = 0x800f, // 10 000 0000 0001 111 546249259Sdim DBGWCR2_EL1 = 0x8017, // 10 000 0000 0010 111 547249259Sdim DBGWCR3_EL1 = 0x801f, // 10 000 0000 0011 111 548249259Sdim DBGWCR4_EL1 = 0x8027, // 10 000 0000 0100 111 549249259Sdim DBGWCR5_EL1 = 0x802f, // 10 000 0000 0101 111 550249259Sdim DBGWCR6_EL1 = 0x8037, // 10 000 0000 0110 111 551249259Sdim DBGWCR7_EL1 = 0x803f, // 10 000 0000 0111 111 552249259Sdim DBGWCR8_EL1 = 0x8047, // 10 000 0000 1000 111 553249259Sdim DBGWCR9_EL1 = 0x804f, // 10 000 0000 1001 111 554249259Sdim DBGWCR10_EL1 = 0x8057, // 10 000 0000 1010 111 555249259Sdim DBGWCR11_EL1 = 0x805f, // 10 000 0000 1011 111 556249259Sdim DBGWCR12_EL1 = 0x8067, // 10 000 0000 1100 111 557249259Sdim DBGWCR13_EL1 = 0x806f, // 10 000 0000 1101 111 558249259Sdim DBGWCR14_EL1 = 0x8077, // 10 000 0000 1110 111 559249259Sdim DBGWCR15_EL1 = 0x807f, // 10 000 0000 1111 111 560249259Sdim TEEHBR32_EL1 = 0x9080, // 10 010 0001 0000 000 561249259Sdim OSDLR_EL1 = 0x809c, // 10 000 0001 0011 100 562249259Sdim DBGPRCR_EL1 = 0x80a4, // 10 000 0001 0100 100 563249259Sdim DBGCLAIMSET_EL1 = 0x83c6, // 10 000 0111 1000 110 564249259Sdim DBGCLAIMCLR_EL1 = 0x83ce, // 10 000 0111 1001 110 565249259Sdim CSSELR_EL1 = 0xd000, // 11 010 0000 0000 000 566249259Sdim VPIDR_EL2 = 0xe000, // 11 100 0000 0000 000 567249259Sdim VMPIDR_EL2 = 0xe005, // 11 100 0000 0000 101 568249259Sdim CPACR_EL1 = 0xc082, // 11 000 0001 0000 010 569249259Sdim SCTLR_EL1 = 0xc080, // 11 000 0001 0000 000 570249259Sdim SCTLR_EL2 = 0xe080, // 11 100 0001 0000 000 571249259Sdim SCTLR_EL3 = 0xf080, // 11 110 0001 0000 000 572249259Sdim ACTLR_EL1 = 0xc081, // 11 000 0001 0000 001 573249259Sdim ACTLR_EL2 = 0xe081, // 11 100 0001 0000 001 574249259Sdim ACTLR_EL3 = 0xf081, // 11 110 0001 0000 001 575249259Sdim HCR_EL2 = 0xe088, // 11 100 0001 0001 000 576249259Sdim SCR_EL3 = 0xf088, // 11 110 0001 0001 000 577249259Sdim MDCR_EL2 = 0xe089, // 11 100 0001 0001 001 578249259Sdim SDER32_EL3 = 0xf089, // 11 110 0001 0001 001 579249259Sdim CPTR_EL2 = 0xe08a, // 11 100 0001 0001 010 580249259Sdim CPTR_EL3 = 0xf08a, // 11 110 0001 0001 010 581249259Sdim HSTR_EL2 = 0xe08b, // 11 100 0001 0001 011 582249259Sdim HACR_EL2 = 0xe08f, // 11 100 0001 0001 111 583249259Sdim MDCR_EL3 = 0xf099, // 11 110 0001 0011 001 584249259Sdim TTBR0_EL1 = 0xc100, // 11 000 0010 0000 000 585249259Sdim TTBR0_EL2 = 0xe100, // 11 100 0010 0000 000 586249259Sdim TTBR0_EL3 = 0xf100, // 11 110 0010 0000 000 587249259Sdim TTBR1_EL1 = 0xc101, // 11 000 0010 0000 001 588249259Sdim TCR_EL1 = 0xc102, // 11 000 0010 0000 010 589249259Sdim TCR_EL2 = 0xe102, // 11 100 0010 0000 010 590249259Sdim TCR_EL3 = 0xf102, // 11 110 0010 0000 010 591249259Sdim VTTBR_EL2 = 0xe108, // 11 100 0010 0001 000 592249259Sdim VTCR_EL2 = 0xe10a, // 11 100 0010 0001 010 593249259Sdim DACR32_EL2 = 0xe180, // 11 100 0011 0000 000 594249259Sdim SPSR_EL1 = 0xc200, // 11 000 0100 0000 000 595249259Sdim SPSR_EL2 = 0xe200, // 11 100 0100 0000 000 596249259Sdim SPSR_EL3 = 0xf200, // 11 110 0100 0000 000 597249259Sdim ELR_EL1 = 0xc201, // 11 000 0100 0000 001 598249259Sdim ELR_EL2 = 0xe201, // 11 100 0100 0000 001 599249259Sdim ELR_EL3 = 0xf201, // 11 110 0100 0000 001 600249259Sdim SP_EL0 = 0xc208, // 11 000 0100 0001 000 601249259Sdim SP_EL1 = 0xe208, // 11 100 0100 0001 000 602249259Sdim SP_EL2 = 0xf208, // 11 110 0100 0001 000 603249259Sdim SPSel = 0xc210, // 11 000 0100 0010 000 604249259Sdim NZCV = 0xda10, // 11 011 0100 0010 000 605249259Sdim DAIF = 0xda11, // 11 011 0100 0010 001 606249259Sdim CurrentEL = 0xc212, // 11 000 0100 0010 010 607249259Sdim SPSR_irq = 0xe218, // 11 100 0100 0011 000 608249259Sdim SPSR_abt = 0xe219, // 11 100 0100 0011 001 609249259Sdim SPSR_und = 0xe21a, // 11 100 0100 0011 010 610249259Sdim SPSR_fiq = 0xe21b, // 11 100 0100 0011 011 611249259Sdim FPCR = 0xda20, // 11 011 0100 0100 000 612249259Sdim FPSR = 0xda21, // 11 011 0100 0100 001 613249259Sdim DSPSR_EL0 = 0xda28, // 11 011 0100 0101 000 614249259Sdim DLR_EL0 = 0xda29, // 11 011 0100 0101 001 615249259Sdim IFSR32_EL2 = 0xe281, // 11 100 0101 0000 001 616249259Sdim AFSR0_EL1 = 0xc288, // 11 000 0101 0001 000 617249259Sdim AFSR0_EL2 = 0xe288, // 11 100 0101 0001 000 618249259Sdim AFSR0_EL3 = 0xf288, // 11 110 0101 0001 000 619249259Sdim AFSR1_EL1 = 0xc289, // 11 000 0101 0001 001 620249259Sdim AFSR1_EL2 = 0xe289, // 11 100 0101 0001 001 621249259Sdim AFSR1_EL3 = 0xf289, // 11 110 0101 0001 001 622249259Sdim ESR_EL1 = 0xc290, // 11 000 0101 0010 000 623249259Sdim ESR_EL2 = 0xe290, // 11 100 0101 0010 000 624249259Sdim ESR_EL3 = 0xf290, // 11 110 0101 0010 000 625249259Sdim FPEXC32_EL2 = 0xe298, // 11 100 0101 0011 000 626249259Sdim FAR_EL1 = 0xc300, // 11 000 0110 0000 000 627249259Sdim FAR_EL2 = 0xe300, // 11 100 0110 0000 000 628249259Sdim FAR_EL3 = 0xf300, // 11 110 0110 0000 000 629249259Sdim HPFAR_EL2 = 0xe304, // 11 100 0110 0000 100 630249259Sdim PAR_EL1 = 0xc3a0, // 11 000 0111 0100 000 631249259Sdim PMCR_EL0 = 0xdce0, // 11 011 1001 1100 000 632249259Sdim PMCNTENSET_EL0 = 0xdce1, // 11 011 1001 1100 001 633249259Sdim PMCNTENCLR_EL0 = 0xdce2, // 11 011 1001 1100 010 634249259Sdim PMOVSCLR_EL0 = 0xdce3, // 11 011 1001 1100 011 635249259Sdim PMSELR_EL0 = 0xdce5, // 11 011 1001 1100 101 636249259Sdim PMCCNTR_EL0 = 0xdce8, // 11 011 1001 1101 000 637249259Sdim PMXEVTYPER_EL0 = 0xdce9, // 11 011 1001 1101 001 638249259Sdim PMXEVCNTR_EL0 = 0xdcea, // 11 011 1001 1101 010 639249259Sdim PMUSERENR_EL0 = 0xdcf0, // 11 011 1001 1110 000 640249259Sdim PMINTENSET_EL1 = 0xc4f1, // 11 000 1001 1110 001 641249259Sdim PMINTENCLR_EL1 = 0xc4f2, // 11 000 1001 1110 010 642249259Sdim PMOVSSET_EL0 = 0xdcf3, // 11 011 1001 1110 011 643249259Sdim MAIR_EL1 = 0xc510, // 11 000 1010 0010 000 644249259Sdim MAIR_EL2 = 0xe510, // 11 100 1010 0010 000 645249259Sdim MAIR_EL3 = 0xf510, // 11 110 1010 0010 000 646249259Sdim AMAIR_EL1 = 0xc518, // 11 000 1010 0011 000 647249259Sdim AMAIR_EL2 = 0xe518, // 11 100 1010 0011 000 648249259Sdim AMAIR_EL3 = 0xf518, // 11 110 1010 0011 000 649249259Sdim VBAR_EL1 = 0xc600, // 11 000 1100 0000 000 650249259Sdim VBAR_EL2 = 0xe600, // 11 100 1100 0000 000 651249259Sdim VBAR_EL3 = 0xf600, // 11 110 1100 0000 000 652249259Sdim RMR_EL1 = 0xc602, // 11 000 1100 0000 010 653249259Sdim RMR_EL2 = 0xe602, // 11 100 1100 0000 010 654249259Sdim RMR_EL3 = 0xf602, // 11 110 1100 0000 010 655249259Sdim CONTEXTIDR_EL1 = 0xc681, // 11 000 1101 0000 001 656249259Sdim TPIDR_EL0 = 0xde82, // 11 011 1101 0000 010 657249259Sdim TPIDR_EL2 = 0xe682, // 11 100 1101 0000 010 658249259Sdim TPIDR_EL3 = 0xf682, // 11 110 1101 0000 010 659249259Sdim TPIDRRO_EL0 = 0xde83, // 11 011 1101 0000 011 660249259Sdim TPIDR_EL1 = 0xc684, // 11 000 1101 0000 100 661249259Sdim CNTFRQ_EL0 = 0xdf00, // 11 011 1110 0000 000 662249259Sdim CNTVOFF_EL2 = 0xe703, // 11 100 1110 0000 011 663249259Sdim CNTKCTL_EL1 = 0xc708, // 11 000 1110 0001 000 664249259Sdim CNTHCTL_EL2 = 0xe708, // 11 100 1110 0001 000 665249259Sdim CNTP_TVAL_EL0 = 0xdf10, // 11 011 1110 0010 000 666249259Sdim CNTHP_TVAL_EL2 = 0xe710, // 11 100 1110 0010 000 667249259Sdim CNTPS_TVAL_EL1 = 0xff10, // 11 111 1110 0010 000 668249259Sdim CNTP_CTL_EL0 = 0xdf11, // 11 011 1110 0010 001 669249259Sdim CNTHP_CTL_EL2 = 0xe711, // 11 100 1110 0010 001 670249259Sdim CNTPS_CTL_EL1 = 0xff11, // 11 111 1110 0010 001 671249259Sdim CNTP_CVAL_EL0 = 0xdf12, // 11 011 1110 0010 010 672249259Sdim CNTHP_CVAL_EL2 = 0xe712, // 11 100 1110 0010 010 673249259Sdim CNTPS_CVAL_EL1 = 0xff12, // 11 111 1110 0010 010 674249259Sdim CNTV_TVAL_EL0 = 0xdf18, // 11 011 1110 0011 000 675249259Sdim CNTV_CTL_EL0 = 0xdf19, // 11 011 1110 0011 001 676249259Sdim CNTV_CVAL_EL0 = 0xdf1a, // 11 011 1110 0011 010 677249259Sdim PMEVCNTR0_EL0 = 0xdf40, // 11 011 1110 1000 000 678249259Sdim PMEVCNTR1_EL0 = 0xdf41, // 11 011 1110 1000 001 679249259Sdim PMEVCNTR2_EL0 = 0xdf42, // 11 011 1110 1000 010 680249259Sdim PMEVCNTR3_EL0 = 0xdf43, // 11 011 1110 1000 011 681249259Sdim PMEVCNTR4_EL0 = 0xdf44, // 11 011 1110 1000 100 682249259Sdim PMEVCNTR5_EL0 = 0xdf45, // 11 011 1110 1000 101 683249259Sdim PMEVCNTR6_EL0 = 0xdf46, // 11 011 1110 1000 110 684249259Sdim PMEVCNTR7_EL0 = 0xdf47, // 11 011 1110 1000 111 685249259Sdim PMEVCNTR8_EL0 = 0xdf48, // 11 011 1110 1001 000 686249259Sdim PMEVCNTR9_EL0 = 0xdf49, // 11 011 1110 1001 001 687249259Sdim PMEVCNTR10_EL0 = 0xdf4a, // 11 011 1110 1001 010 688249259Sdim PMEVCNTR11_EL0 = 0xdf4b, // 11 011 1110 1001 011 689249259Sdim PMEVCNTR12_EL0 = 0xdf4c, // 11 011 1110 1001 100 690249259Sdim PMEVCNTR13_EL0 = 0xdf4d, // 11 011 1110 1001 101 691249259Sdim PMEVCNTR14_EL0 = 0xdf4e, // 11 011 1110 1001 110 692249259Sdim PMEVCNTR15_EL0 = 0xdf4f, // 11 011 1110 1001 111 693249259Sdim PMEVCNTR16_EL0 = 0xdf50, // 11 011 1110 1010 000 694249259Sdim PMEVCNTR17_EL0 = 0xdf51, // 11 011 1110 1010 001 695249259Sdim PMEVCNTR18_EL0 = 0xdf52, // 11 011 1110 1010 010 696249259Sdim PMEVCNTR19_EL0 = 0xdf53, // 11 011 1110 1010 011 697249259Sdim PMEVCNTR20_EL0 = 0xdf54, // 11 011 1110 1010 100 698249259Sdim PMEVCNTR21_EL0 = 0xdf55, // 11 011 1110 1010 101 699249259Sdim PMEVCNTR22_EL0 = 0xdf56, // 11 011 1110 1010 110 700249259Sdim PMEVCNTR23_EL0 = 0xdf57, // 11 011 1110 1010 111 701249259Sdim PMEVCNTR24_EL0 = 0xdf58, // 11 011 1110 1011 000 702249259Sdim PMEVCNTR25_EL0 = 0xdf59, // 11 011 1110 1011 001 703249259Sdim PMEVCNTR26_EL0 = 0xdf5a, // 11 011 1110 1011 010 704249259Sdim PMEVCNTR27_EL0 = 0xdf5b, // 11 011 1110 1011 011 705249259Sdim PMEVCNTR28_EL0 = 0xdf5c, // 11 011 1110 1011 100 706249259Sdim PMEVCNTR29_EL0 = 0xdf5d, // 11 011 1110 1011 101 707249259Sdim PMEVCNTR30_EL0 = 0xdf5e, // 11 011 1110 1011 110 708249259Sdim PMCCFILTR_EL0 = 0xdf7f, // 11 011 1110 1111 111 709249259Sdim PMEVTYPER0_EL0 = 0xdf60, // 11 011 1110 1100 000 710249259Sdim PMEVTYPER1_EL0 = 0xdf61, // 11 011 1110 1100 001 711249259Sdim PMEVTYPER2_EL0 = 0xdf62, // 11 011 1110 1100 010 712249259Sdim PMEVTYPER3_EL0 = 0xdf63, // 11 011 1110 1100 011 713249259Sdim PMEVTYPER4_EL0 = 0xdf64, // 11 011 1110 1100 100 714249259Sdim PMEVTYPER5_EL0 = 0xdf65, // 11 011 1110 1100 101 715249259Sdim PMEVTYPER6_EL0 = 0xdf66, // 11 011 1110 1100 110 716249259Sdim PMEVTYPER7_EL0 = 0xdf67, // 11 011 1110 1100 111 717249259Sdim PMEVTYPER8_EL0 = 0xdf68, // 11 011 1110 1101 000 718249259Sdim PMEVTYPER9_EL0 = 0xdf69, // 11 011 1110 1101 001 719249259Sdim PMEVTYPER10_EL0 = 0xdf6a, // 11 011 1110 1101 010 720249259Sdim PMEVTYPER11_EL0 = 0xdf6b, // 11 011 1110 1101 011 721249259Sdim PMEVTYPER12_EL0 = 0xdf6c, // 11 011 1110 1101 100 722249259Sdim PMEVTYPER13_EL0 = 0xdf6d, // 11 011 1110 1101 101 723249259Sdim PMEVTYPER14_EL0 = 0xdf6e, // 11 011 1110 1101 110 724249259Sdim PMEVTYPER15_EL0 = 0xdf6f, // 11 011 1110 1101 111 725249259Sdim PMEVTYPER16_EL0 = 0xdf70, // 11 011 1110 1110 000 726249259Sdim PMEVTYPER17_EL0 = 0xdf71, // 11 011 1110 1110 001 727249259Sdim PMEVTYPER18_EL0 = 0xdf72, // 11 011 1110 1110 010 728249259Sdim PMEVTYPER19_EL0 = 0xdf73, // 11 011 1110 1110 011 729249259Sdim PMEVTYPER20_EL0 = 0xdf74, // 11 011 1110 1110 100 730249259Sdim PMEVTYPER21_EL0 = 0xdf75, // 11 011 1110 1110 101 731249259Sdim PMEVTYPER22_EL0 = 0xdf76, // 11 011 1110 1110 110 732249259Sdim PMEVTYPER23_EL0 = 0xdf77, // 11 011 1110 1110 111 733249259Sdim PMEVTYPER24_EL0 = 0xdf78, // 11 011 1110 1111 000 734249259Sdim PMEVTYPER25_EL0 = 0xdf79, // 11 011 1110 1111 001 735249259Sdim PMEVTYPER26_EL0 = 0xdf7a, // 11 011 1110 1111 010 736249259Sdim PMEVTYPER27_EL0 = 0xdf7b, // 11 011 1110 1111 011 737249259Sdim PMEVTYPER28_EL0 = 0xdf7c, // 11 011 1110 1111 100 738249259Sdim PMEVTYPER29_EL0 = 0xdf7d, // 11 011 1110 1111 101 739249259Sdim PMEVTYPER30_EL0 = 0xdf7e, // 11 011 1110 1111 110 740249259Sdim 741249259Sdim // Trace registers 742249259Sdim TRCPRGCTLR = 0x8808, // 10 001 0000 0001 000 743249259Sdim TRCPROCSELR = 0x8810, // 10 001 0000 0010 000 744249259Sdim TRCCONFIGR = 0x8820, // 10 001 0000 0100 000 745249259Sdim TRCAUXCTLR = 0x8830, // 10 001 0000 0110 000 746249259Sdim TRCEVENTCTL0R = 0x8840, // 10 001 0000 1000 000 747249259Sdim TRCEVENTCTL1R = 0x8848, // 10 001 0000 1001 000 748249259Sdim TRCSTALLCTLR = 0x8858, // 10 001 0000 1011 000 749249259Sdim TRCTSCTLR = 0x8860, // 10 001 0000 1100 000 750249259Sdim TRCSYNCPR = 0x8868, // 10 001 0000 1101 000 751249259Sdim TRCCCCTLR = 0x8870, // 10 001 0000 1110 000 752249259Sdim TRCBBCTLR = 0x8878, // 10 001 0000 1111 000 753249259Sdim TRCTRACEIDR = 0x8801, // 10 001 0000 0000 001 754249259Sdim TRCQCTLR = 0x8809, // 10 001 0000 0001 001 755249259Sdim TRCVICTLR = 0x8802, // 10 001 0000 0000 010 756249259Sdim TRCVIIECTLR = 0x880a, // 10 001 0000 0001 010 757249259Sdim TRCVISSCTLR = 0x8812, // 10 001 0000 0010 010 758249259Sdim TRCVIPCSSCTLR = 0x881a, // 10 001 0000 0011 010 759249259Sdim TRCVDCTLR = 0x8842, // 10 001 0000 1000 010 760249259Sdim TRCVDSACCTLR = 0x884a, // 10 001 0000 1001 010 761249259Sdim TRCVDARCCTLR = 0x8852, // 10 001 0000 1010 010 762249259Sdim TRCSEQEVR0 = 0x8804, // 10 001 0000 0000 100 763249259Sdim TRCSEQEVR1 = 0x880c, // 10 001 0000 0001 100 764249259Sdim TRCSEQEVR2 = 0x8814, // 10 001 0000 0010 100 765249259Sdim TRCSEQRSTEVR = 0x8834, // 10 001 0000 0110 100 766249259Sdim TRCSEQSTR = 0x883c, // 10 001 0000 0111 100 767249259Sdim TRCEXTINSELR = 0x8844, // 10 001 0000 1000 100 768249259Sdim TRCCNTRLDVR0 = 0x8805, // 10 001 0000 0000 101 769249259Sdim TRCCNTRLDVR1 = 0x880d, // 10 001 0000 0001 101 770249259Sdim TRCCNTRLDVR2 = 0x8815, // 10 001 0000 0010 101 771249259Sdim TRCCNTRLDVR3 = 0x881d, // 10 001 0000 0011 101 772249259Sdim TRCCNTCTLR0 = 0x8825, // 10 001 0000 0100 101 773249259Sdim TRCCNTCTLR1 = 0x882d, // 10 001 0000 0101 101 774249259Sdim TRCCNTCTLR2 = 0x8835, // 10 001 0000 0110 101 775249259Sdim TRCCNTCTLR3 = 0x883d, // 10 001 0000 0111 101 776249259Sdim TRCCNTVR0 = 0x8845, // 10 001 0000 1000 101 777249259Sdim TRCCNTVR1 = 0x884d, // 10 001 0000 1001 101 778249259Sdim TRCCNTVR2 = 0x8855, // 10 001 0000 1010 101 779249259Sdim TRCCNTVR3 = 0x885d, // 10 001 0000 1011 101 780249259Sdim TRCIMSPEC0 = 0x8807, // 10 001 0000 0000 111 781249259Sdim TRCIMSPEC1 = 0x880f, // 10 001 0000 0001 111 782249259Sdim TRCIMSPEC2 = 0x8817, // 10 001 0000 0010 111 783249259Sdim TRCIMSPEC3 = 0x881f, // 10 001 0000 0011 111 784249259Sdim TRCIMSPEC4 = 0x8827, // 10 001 0000 0100 111 785249259Sdim TRCIMSPEC5 = 0x882f, // 10 001 0000 0101 111 786249259Sdim TRCIMSPEC6 = 0x8837, // 10 001 0000 0110 111 787249259Sdim TRCIMSPEC7 = 0x883f, // 10 001 0000 0111 111 788249259Sdim TRCRSCTLR2 = 0x8890, // 10 001 0001 0010 000 789249259Sdim TRCRSCTLR3 = 0x8898, // 10 001 0001 0011 000 790249259Sdim TRCRSCTLR4 = 0x88a0, // 10 001 0001 0100 000 791249259Sdim TRCRSCTLR5 = 0x88a8, // 10 001 0001 0101 000 792249259Sdim TRCRSCTLR6 = 0x88b0, // 10 001 0001 0110 000 793249259Sdim TRCRSCTLR7 = 0x88b8, // 10 001 0001 0111 000 794249259Sdim TRCRSCTLR8 = 0x88c0, // 10 001 0001 1000 000 795249259Sdim TRCRSCTLR9 = 0x88c8, // 10 001 0001 1001 000 796249259Sdim TRCRSCTLR10 = 0x88d0, // 10 001 0001 1010 000 797249259Sdim TRCRSCTLR11 = 0x88d8, // 10 001 0001 1011 000 798249259Sdim TRCRSCTLR12 = 0x88e0, // 10 001 0001 1100 000 799249259Sdim TRCRSCTLR13 = 0x88e8, // 10 001 0001 1101 000 800249259Sdim TRCRSCTLR14 = 0x88f0, // 10 001 0001 1110 000 801249259Sdim TRCRSCTLR15 = 0x88f8, // 10 001 0001 1111 000 802249259Sdim TRCRSCTLR16 = 0x8881, // 10 001 0001 0000 001 803249259Sdim TRCRSCTLR17 = 0x8889, // 10 001 0001 0001 001 804249259Sdim TRCRSCTLR18 = 0x8891, // 10 001 0001 0010 001 805249259Sdim TRCRSCTLR19 = 0x8899, // 10 001 0001 0011 001 806249259Sdim TRCRSCTLR20 = 0x88a1, // 10 001 0001 0100 001 807249259Sdim TRCRSCTLR21 = 0x88a9, // 10 001 0001 0101 001 808249259Sdim TRCRSCTLR22 = 0x88b1, // 10 001 0001 0110 001 809249259Sdim TRCRSCTLR23 = 0x88b9, // 10 001 0001 0111 001 810249259Sdim TRCRSCTLR24 = 0x88c1, // 10 001 0001 1000 001 811249259Sdim TRCRSCTLR25 = 0x88c9, // 10 001 0001 1001 001 812249259Sdim TRCRSCTLR26 = 0x88d1, // 10 001 0001 1010 001 813249259Sdim TRCRSCTLR27 = 0x88d9, // 10 001 0001 1011 001 814249259Sdim TRCRSCTLR28 = 0x88e1, // 10 001 0001 1100 001 815249259Sdim TRCRSCTLR29 = 0x88e9, // 10 001 0001 1101 001 816249259Sdim TRCRSCTLR30 = 0x88f1, // 10 001 0001 1110 001 817249259Sdim TRCRSCTLR31 = 0x88f9, // 10 001 0001 1111 001 818249259Sdim TRCSSCCR0 = 0x8882, // 10 001 0001 0000 010 819249259Sdim TRCSSCCR1 = 0x888a, // 10 001 0001 0001 010 820249259Sdim TRCSSCCR2 = 0x8892, // 10 001 0001 0010 010 821249259Sdim TRCSSCCR3 = 0x889a, // 10 001 0001 0011 010 822249259Sdim TRCSSCCR4 = 0x88a2, // 10 001 0001 0100 010 823249259Sdim TRCSSCCR5 = 0x88aa, // 10 001 0001 0101 010 824249259Sdim TRCSSCCR6 = 0x88b2, // 10 001 0001 0110 010 825249259Sdim TRCSSCCR7 = 0x88ba, // 10 001 0001 0111 010 826249259Sdim TRCSSCSR0 = 0x88c2, // 10 001 0001 1000 010 827249259Sdim TRCSSCSR1 = 0x88ca, // 10 001 0001 1001 010 828249259Sdim TRCSSCSR2 = 0x88d2, // 10 001 0001 1010 010 829249259Sdim TRCSSCSR3 = 0x88da, // 10 001 0001 1011 010 830249259Sdim TRCSSCSR4 = 0x88e2, // 10 001 0001 1100 010 831249259Sdim TRCSSCSR5 = 0x88ea, // 10 001 0001 1101 010 832249259Sdim TRCSSCSR6 = 0x88f2, // 10 001 0001 1110 010 833249259Sdim TRCSSCSR7 = 0x88fa, // 10 001 0001 1111 010 834249259Sdim TRCSSPCICR0 = 0x8883, // 10 001 0001 0000 011 835249259Sdim TRCSSPCICR1 = 0x888b, // 10 001 0001 0001 011 836249259Sdim TRCSSPCICR2 = 0x8893, // 10 001 0001 0010 011 837249259Sdim TRCSSPCICR3 = 0x889b, // 10 001 0001 0011 011 838249259Sdim TRCSSPCICR4 = 0x88a3, // 10 001 0001 0100 011 839249259Sdim TRCSSPCICR5 = 0x88ab, // 10 001 0001 0101 011 840249259Sdim TRCSSPCICR6 = 0x88b3, // 10 001 0001 0110 011 841249259Sdim TRCSSPCICR7 = 0x88bb, // 10 001 0001 0111 011 842249259Sdim TRCPDCR = 0x88a4, // 10 001 0001 0100 100 843249259Sdim TRCACVR0 = 0x8900, // 10 001 0010 0000 000 844249259Sdim TRCACVR1 = 0x8910, // 10 001 0010 0010 000 845249259Sdim TRCACVR2 = 0x8920, // 10 001 0010 0100 000 846249259Sdim TRCACVR3 = 0x8930, // 10 001 0010 0110 000 847249259Sdim TRCACVR4 = 0x8940, // 10 001 0010 1000 000 848249259Sdim TRCACVR5 = 0x8950, // 10 001 0010 1010 000 849249259Sdim TRCACVR6 = 0x8960, // 10 001 0010 1100 000 850249259Sdim TRCACVR7 = 0x8970, // 10 001 0010 1110 000 851249259Sdim TRCACVR8 = 0x8901, // 10 001 0010 0000 001 852249259Sdim TRCACVR9 = 0x8911, // 10 001 0010 0010 001 853249259Sdim TRCACVR10 = 0x8921, // 10 001 0010 0100 001 854249259Sdim TRCACVR11 = 0x8931, // 10 001 0010 0110 001 855249259Sdim TRCACVR12 = 0x8941, // 10 001 0010 1000 001 856249259Sdim TRCACVR13 = 0x8951, // 10 001 0010 1010 001 857249259Sdim TRCACVR14 = 0x8961, // 10 001 0010 1100 001 858249259Sdim TRCACVR15 = 0x8971, // 10 001 0010 1110 001 859249259Sdim TRCACATR0 = 0x8902, // 10 001 0010 0000 010 860249259Sdim TRCACATR1 = 0x8912, // 10 001 0010 0010 010 861249259Sdim TRCACATR2 = 0x8922, // 10 001 0010 0100 010 862249259Sdim TRCACATR3 = 0x8932, // 10 001 0010 0110 010 863249259Sdim TRCACATR4 = 0x8942, // 10 001 0010 1000 010 864249259Sdim TRCACATR5 = 0x8952, // 10 001 0010 1010 010 865249259Sdim TRCACATR6 = 0x8962, // 10 001 0010 1100 010 866249259Sdim TRCACATR7 = 0x8972, // 10 001 0010 1110 010 867249259Sdim TRCACATR8 = 0x8903, // 10 001 0010 0000 011 868249259Sdim TRCACATR9 = 0x8913, // 10 001 0010 0010 011 869249259Sdim TRCACATR10 = 0x8923, // 10 001 0010 0100 011 870249259Sdim TRCACATR11 = 0x8933, // 10 001 0010 0110 011 871249259Sdim TRCACATR12 = 0x8943, // 10 001 0010 1000 011 872249259Sdim TRCACATR13 = 0x8953, // 10 001 0010 1010 011 873249259Sdim TRCACATR14 = 0x8963, // 10 001 0010 1100 011 874249259Sdim TRCACATR15 = 0x8973, // 10 001 0010 1110 011 875249259Sdim TRCDVCVR0 = 0x8904, // 10 001 0010 0000 100 876249259Sdim TRCDVCVR1 = 0x8924, // 10 001 0010 0100 100 877249259Sdim TRCDVCVR2 = 0x8944, // 10 001 0010 1000 100 878249259Sdim TRCDVCVR3 = 0x8964, // 10 001 0010 1100 100 879249259Sdim TRCDVCVR4 = 0x8905, // 10 001 0010 0000 101 880249259Sdim TRCDVCVR5 = 0x8925, // 10 001 0010 0100 101 881249259Sdim TRCDVCVR6 = 0x8945, // 10 001 0010 1000 101 882249259Sdim TRCDVCVR7 = 0x8965, // 10 001 0010 1100 101 883249259Sdim TRCDVCMR0 = 0x8906, // 10 001 0010 0000 110 884249259Sdim TRCDVCMR1 = 0x8926, // 10 001 0010 0100 110 885249259Sdim TRCDVCMR2 = 0x8946, // 10 001 0010 1000 110 886249259Sdim TRCDVCMR3 = 0x8966, // 10 001 0010 1100 110 887249259Sdim TRCDVCMR4 = 0x8907, // 10 001 0010 0000 111 888249259Sdim TRCDVCMR5 = 0x8927, // 10 001 0010 0100 111 889249259Sdim TRCDVCMR6 = 0x8947, // 10 001 0010 1000 111 890249259Sdim TRCDVCMR7 = 0x8967, // 10 001 0010 1100 111 891249259Sdim TRCCIDCVR0 = 0x8980, // 10 001 0011 0000 000 892249259Sdim TRCCIDCVR1 = 0x8990, // 10 001 0011 0010 000 893249259Sdim TRCCIDCVR2 = 0x89a0, // 10 001 0011 0100 000 894249259Sdim TRCCIDCVR3 = 0x89b0, // 10 001 0011 0110 000 895249259Sdim TRCCIDCVR4 = 0x89c0, // 10 001 0011 1000 000 896249259Sdim TRCCIDCVR5 = 0x89d0, // 10 001 0011 1010 000 897249259Sdim TRCCIDCVR6 = 0x89e0, // 10 001 0011 1100 000 898249259Sdim TRCCIDCVR7 = 0x89f0, // 10 001 0011 1110 000 899249259Sdim TRCVMIDCVR0 = 0x8981, // 10 001 0011 0000 001 900249259Sdim TRCVMIDCVR1 = 0x8991, // 10 001 0011 0010 001 901249259Sdim TRCVMIDCVR2 = 0x89a1, // 10 001 0011 0100 001 902249259Sdim TRCVMIDCVR3 = 0x89b1, // 10 001 0011 0110 001 903249259Sdim TRCVMIDCVR4 = 0x89c1, // 10 001 0011 1000 001 904249259Sdim TRCVMIDCVR5 = 0x89d1, // 10 001 0011 1010 001 905249259Sdim TRCVMIDCVR6 = 0x89e1, // 10 001 0011 1100 001 906249259Sdim TRCVMIDCVR7 = 0x89f1, // 10 001 0011 1110 001 907249259Sdim TRCCIDCCTLR0 = 0x8982, // 10 001 0011 0000 010 908249259Sdim TRCCIDCCTLR1 = 0x898a, // 10 001 0011 0001 010 909249259Sdim TRCVMIDCCTLR0 = 0x8992, // 10 001 0011 0010 010 910249259Sdim TRCVMIDCCTLR1 = 0x899a, // 10 001 0011 0011 010 911249259Sdim TRCITCTRL = 0x8b84, // 10 001 0111 0000 100 912249259Sdim TRCCLAIMSET = 0x8bc6, // 10 001 0111 1000 110 913249259Sdim TRCCLAIMCLR = 0x8bce, // 10 001 0111 1001 110 914249259Sdim 915249259Sdim // GICv3 registers 916249259Sdim ICC_BPR1_EL1 = 0xc663, // 11 000 1100 1100 011 917249259Sdim ICC_BPR0_EL1 = 0xc643, // 11 000 1100 1000 011 918249259Sdim ICC_PMR_EL1 = 0xc230, // 11 000 0100 0110 000 919249259Sdim ICC_CTLR_EL1 = 0xc664, // 11 000 1100 1100 100 920249259Sdim ICC_CTLR_EL3 = 0xf664, // 11 110 1100 1100 100 921249259Sdim ICC_SRE_EL1 = 0xc665, // 11 000 1100 1100 101 922249259Sdim ICC_SRE_EL2 = 0xe64d, // 11 100 1100 1001 101 923249259Sdim ICC_SRE_EL3 = 0xf665, // 11 110 1100 1100 101 924249259Sdim ICC_IGRPEN0_EL1 = 0xc666, // 11 000 1100 1100 110 925249259Sdim ICC_IGRPEN1_EL1 = 0xc667, // 11 000 1100 1100 111 926249259Sdim ICC_IGRPEN1_EL3 = 0xf667, // 11 110 1100 1100 111 927249259Sdim ICC_SEIEN_EL1 = 0xc668, // 11 000 1100 1101 000 928249259Sdim ICC_AP0R0_EL1 = 0xc644, // 11 000 1100 1000 100 929249259Sdim ICC_AP0R1_EL1 = 0xc645, // 11 000 1100 1000 101 930249259Sdim ICC_AP0R2_EL1 = 0xc646, // 11 000 1100 1000 110 931249259Sdim ICC_AP0R3_EL1 = 0xc647, // 11 000 1100 1000 111 932249259Sdim ICC_AP1R0_EL1 = 0xc648, // 11 000 1100 1001 000 933249259Sdim ICC_AP1R1_EL1 = 0xc649, // 11 000 1100 1001 001 934249259Sdim ICC_AP1R2_EL1 = 0xc64a, // 11 000 1100 1001 010 935249259Sdim ICC_AP1R3_EL1 = 0xc64b, // 11 000 1100 1001 011 936249259Sdim ICH_AP0R0_EL2 = 0xe640, // 11 100 1100 1000 000 937249259Sdim ICH_AP0R1_EL2 = 0xe641, // 11 100 1100 1000 001 938249259Sdim ICH_AP0R2_EL2 = 0xe642, // 11 100 1100 1000 010 939249259Sdim ICH_AP0R3_EL2 = 0xe643, // 11 100 1100 1000 011 940249259Sdim ICH_AP1R0_EL2 = 0xe648, // 11 100 1100 1001 000 941249259Sdim ICH_AP1R1_EL2 = 0xe649, // 11 100 1100 1001 001 942249259Sdim ICH_AP1R2_EL2 = 0xe64a, // 11 100 1100 1001 010 943249259Sdim ICH_AP1R3_EL2 = 0xe64b, // 11 100 1100 1001 011 944249259Sdim ICH_HCR_EL2 = 0xe658, // 11 100 1100 1011 000 945249259Sdim ICH_MISR_EL2 = 0xe65a, // 11 100 1100 1011 010 946249259Sdim ICH_VMCR_EL2 = 0xe65f, // 11 100 1100 1011 111 947249259Sdim ICH_VSEIR_EL2 = 0xe64c, // 11 100 1100 1001 100 948249259Sdim ICH_LR0_EL2 = 0xe660, // 11 100 1100 1100 000 949249259Sdim ICH_LR1_EL2 = 0xe661, // 11 100 1100 1100 001 950249259Sdim ICH_LR2_EL2 = 0xe662, // 11 100 1100 1100 010 951249259Sdim ICH_LR3_EL2 = 0xe663, // 11 100 1100 1100 011 952249259Sdim ICH_LR4_EL2 = 0xe664, // 11 100 1100 1100 100 953249259Sdim ICH_LR5_EL2 = 0xe665, // 11 100 1100 1100 101 954249259Sdim ICH_LR6_EL2 = 0xe666, // 11 100 1100 1100 110 955249259Sdim ICH_LR7_EL2 = 0xe667, // 11 100 1100 1100 111 956249259Sdim ICH_LR8_EL2 = 0xe668, // 11 100 1100 1101 000 957249259Sdim ICH_LR9_EL2 = 0xe669, // 11 100 1100 1101 001 958249259Sdim ICH_LR10_EL2 = 0xe66a, // 11 100 1100 1101 010 959249259Sdim ICH_LR11_EL2 = 0xe66b, // 11 100 1100 1101 011 960249259Sdim ICH_LR12_EL2 = 0xe66c, // 11 100 1100 1101 100 961249259Sdim ICH_LR13_EL2 = 0xe66d, // 11 100 1100 1101 101 962249259Sdim ICH_LR14_EL2 = 0xe66e, // 11 100 1100 1101 110 963249259Sdim ICH_LR15_EL2 = 0xe66f // 11 100 1100 1101 111 964249259Sdim }; 965249259Sdim 966249259Sdim // Note that these do not inherit from NamedImmMapper. This class is 967249259Sdim // sufficiently different in its behaviour that I don't believe it's worth 968249259Sdim // burdening the common NamedImmMapper with abstractions only needed in 969249259Sdim // this one case. 970249259Sdim struct SysRegMapper { 971249259Sdim static const NamedImmMapper::Mapping SysRegPairs[]; 972249259Sdim 973249259Sdim const NamedImmMapper::Mapping *InstPairs; 974249259Sdim size_t NumInstPairs; 975249259Sdim 976249259Sdim SysRegMapper() {} 977249259Sdim uint32_t fromString(StringRef Name, bool &Valid) const; 978249259Sdim std::string toString(uint32_t Bits, bool &Valid) const; 979249259Sdim }; 980249259Sdim 981249259Sdim struct MSRMapper : SysRegMapper { 982249259Sdim static const NamedImmMapper::Mapping MSRPairs[]; 983249259Sdim MSRMapper(); 984249259Sdim }; 985249259Sdim 986249259Sdim struct MRSMapper : SysRegMapper { 987249259Sdim static const NamedImmMapper::Mapping MRSPairs[]; 988249259Sdim MRSMapper(); 989249259Sdim }; 990249259Sdim 991249259Sdim uint32_t ParseGenericRegister(StringRef Name, bool &Valid); 992249259Sdim} 993249259Sdim 994249259Sdimnamespace A64TLBI { 995249259Sdim enum TLBIValues { 996249259Sdim Invalid = -1, // Op0 Op1 CRn CRm Op2 997249259Sdim IPAS2E1IS = 0x6401, // 01 100 1000 0000 001 998249259Sdim IPAS2LE1IS = 0x6405, // 01 100 1000 0000 101 999249259Sdim VMALLE1IS = 0x4418, // 01 000 1000 0011 000 1000249259Sdim ALLE2IS = 0x6418, // 01 100 1000 0011 000 1001249259Sdim ALLE3IS = 0x7418, // 01 110 1000 0011 000 1002249259Sdim VAE1IS = 0x4419, // 01 000 1000 0011 001 1003249259Sdim VAE2IS = 0x6419, // 01 100 1000 0011 001 1004249259Sdim VAE3IS = 0x7419, // 01 110 1000 0011 001 1005249259Sdim ASIDE1IS = 0x441a, // 01 000 1000 0011 010 1006249259Sdim VAAE1IS = 0x441b, // 01 000 1000 0011 011 1007249259Sdim ALLE1IS = 0x641c, // 01 100 1000 0011 100 1008249259Sdim VALE1IS = 0x441d, // 01 000 1000 0011 101 1009249259Sdim VALE2IS = 0x641d, // 01 100 1000 0011 101 1010249259Sdim VALE3IS = 0x741d, // 01 110 1000 0011 101 1011249259Sdim VMALLS12E1IS = 0x641e, // 01 100 1000 0011 110 1012249259Sdim VAALE1IS = 0x441f, // 01 000 1000 0011 111 1013249259Sdim IPAS2E1 = 0x6421, // 01 100 1000 0100 001 1014249259Sdim IPAS2LE1 = 0x6425, // 01 100 1000 0100 101 1015249259Sdim VMALLE1 = 0x4438, // 01 000 1000 0111 000 1016249259Sdim ALLE2 = 0x6438, // 01 100 1000 0111 000 1017249259Sdim ALLE3 = 0x7438, // 01 110 1000 0111 000 1018249259Sdim VAE1 = 0x4439, // 01 000 1000 0111 001 1019249259Sdim VAE2 = 0x6439, // 01 100 1000 0111 001 1020249259Sdim VAE3 = 0x7439, // 01 110 1000 0111 001 1021249259Sdim ASIDE1 = 0x443a, // 01 000 1000 0111 010 1022249259Sdim VAAE1 = 0x443b, // 01 000 1000 0111 011 1023249259Sdim ALLE1 = 0x643c, // 01 100 1000 0111 100 1024249259Sdim VALE1 = 0x443d, // 01 000 1000 0111 101 1025249259Sdim VALE2 = 0x643d, // 01 100 1000 0111 101 1026249259Sdim VALE3 = 0x743d, // 01 110 1000 0111 101 1027249259Sdim VMALLS12E1 = 0x643e, // 01 100 1000 0111 110 1028249259Sdim VAALE1 = 0x443f // 01 000 1000 0111 111 1029249259Sdim }; 1030249259Sdim 1031249259Sdim struct TLBIMapper : NamedImmMapper { 1032249259Sdim const static Mapping TLBIPairs[]; 1033249259Sdim 1034249259Sdim TLBIMapper(); 1035249259Sdim }; 1036249259Sdim 1037249259Sdim static inline bool NeedsRegister(TLBIValues Val) { 1038249259Sdim switch (Val) { 1039249259Sdim case VMALLE1IS: 1040249259Sdim case ALLE2IS: 1041249259Sdim case ALLE3IS: 1042249259Sdim case ALLE1IS: 1043249259Sdim case VMALLS12E1IS: 1044249259Sdim case VMALLE1: 1045249259Sdim case ALLE2: 1046249259Sdim case ALLE3: 1047249259Sdim case ALLE1: 1048249259Sdim case VMALLS12E1: 1049249259Sdim return false; 1050249259Sdim default: 1051249259Sdim return true; 1052249259Sdim } 1053249259Sdim } 1054249259Sdim} 1055249259Sdim 1056249259Sdimnamespace AArch64II { 1057249259Sdim 1058249259Sdim enum TOF { 1059249259Sdim //===--------------------------------------------------------------===// 1060249259Sdim // AArch64 Specific MachineOperand flags. 1061249259Sdim 1062249259Sdim MO_NO_FLAG, 1063249259Sdim 1064249259Sdim // MO_GOT - Represents a relocation referring to the GOT entry of a given 1065249259Sdim // symbol. Used in adrp. 1066249259Sdim MO_GOT, 1067249259Sdim 1068249259Sdim // MO_GOT_LO12 - Represents a relocation referring to the low 12 bits of the 1069249259Sdim // GOT entry of a given symbol. Used in ldr only. 1070249259Sdim MO_GOT_LO12, 1071249259Sdim 1072249259Sdim // MO_DTPREL_* - Represents a relocation referring to the offset from a 1073249259Sdim // module's dynamic thread pointer. Used in the local-dynamic TLS access 1074249259Sdim // model. 1075249259Sdim MO_DTPREL_G1, 1076249259Sdim MO_DTPREL_G0_NC, 1077249259Sdim 1078249259Sdim // MO_GOTTPREL_* - Represents a relocation referring to a GOT entry 1079249259Sdim // providing the offset of a variable from the thread-pointer. Used in 1080249259Sdim // initial-exec TLS model where this offset is assigned in the static thread 1081249259Sdim // block and thus known by the dynamic linker. 1082249259Sdim MO_GOTTPREL, 1083249259Sdim MO_GOTTPREL_LO12, 1084249259Sdim 1085249259Sdim // MO_TLSDESC_* - Represents a relocation referring to a GOT entry providing 1086249259Sdim // a TLS descriptor chosen by the dynamic linker. Used for the 1087249259Sdim // general-dynamic and local-dynamic TLS access models where very littls is 1088249259Sdim // known at link-time. 1089249259Sdim MO_TLSDESC, 1090249259Sdim MO_TLSDESC_LO12, 1091249259Sdim 1092249259Sdim // MO_TPREL_* - Represents a relocation referring to the offset of a 1093249259Sdim // variable from the thread pointer itself. Used in the local-exec TLS 1094249259Sdim // access model. 1095249259Sdim MO_TPREL_G1, 1096249259Sdim MO_TPREL_G0_NC, 1097249259Sdim 1098249259Sdim // MO_LO12 - On a symbol operand, this represents a relocation containing 1099249259Sdim // lower 12 bits of the address. Used in add/sub/ldr/str. 1100251662Sdim MO_LO12, 1101251662Sdim 1102251662Sdim // MO_ABS_G* - Represent the 16-bit granules of an absolute reference using 1103251662Sdim // movz/movk instructions. 1104251662Sdim MO_ABS_G3, 1105251662Sdim MO_ABS_G2_NC, 1106251662Sdim MO_ABS_G1_NC, 1107251662Sdim MO_ABS_G0_NC 1108249259Sdim }; 1109249259Sdim} 1110249259Sdim 1111249259Sdimclass APFloat; 1112249259Sdim 1113249259Sdimnamespace A64Imms { 1114249259Sdim bool isFPImm(const APFloat &Val, uint32_t &Imm8Bits); 1115249259Sdim 1116249259Sdim inline bool isFPImm(const APFloat &Val) { 1117249259Sdim uint32_t Imm8; 1118249259Sdim return isFPImm(Val, Imm8); 1119249259Sdim } 1120249259Sdim 1121249259Sdim bool isLogicalImm(unsigned RegWidth, uint64_t Imm, uint32_t &Bits); 1122249259Sdim bool isLogicalImmBits(unsigned RegWidth, uint32_t Bits, uint64_t &Imm); 1123249259Sdim 1124249259Sdim bool isMOVZImm(int RegWidth, uint64_t Value, int &UImm16, int &Shift); 1125249259Sdim bool isMOVNImm(int RegWidth, uint64_t Value, int &UImm16, int &Shift); 1126249259Sdim 1127249259Sdim // We sometimes want to know whether the immediate is representable with a 1128249259Sdim // MOVN but *not* with a MOVZ (because that would take priority). 1129249259Sdim bool isOnlyMOVNImm(int RegWidth, uint64_t Value, int &UImm16, int &Shift); 1130249259Sdim 1131263508Sdim uint64_t decodeNeonModImm(unsigned Val, unsigned OpCmode, unsigned &EltBits); 1132263508Sdim bool decodeNeonModShiftImm(unsigned OpCmode, unsigned &ShiftImm, 1133263508Sdim unsigned &ShiftOnesIn); 1134263508Sdim } 1135249259Sdim 1136249259Sdim} // end namespace llvm; 1137249259Sdim 1138249259Sdim#endif 1139