1212793Sdim//===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===// 2212793Sdim// 3212793Sdim// The LLVM Compiler Infrastructure 4212793Sdim// 5212793Sdim// This file is distributed under the University of Illinois Open Source 6212793Sdim// License. See LICENSE.TXT for details. 7212793Sdim// 8212793Sdim//===----------------------------------------------------------------------===// 9212793Sdim// 10212793Sdim// This file contains the SplitAnalysis class as well as mutator functions for 11212793Sdim// live range splitting. 12212793Sdim// 13212793Sdim//===----------------------------------------------------------------------===// 14212793Sdim 15218893Sdim#define DEBUG_TYPE "regalloc" 16212793Sdim#include "SplitKit.h" 17221345Sdim#include "llvm/ADT/Statistic.h" 18212793Sdim#include "llvm/CodeGen/LiveIntervalAnalysis.h" 19234353Sdim#include "llvm/CodeGen/LiveRangeEdit.h" 20218893Sdim#include "llvm/CodeGen/MachineDominators.h" 21212793Sdim#include "llvm/CodeGen/MachineInstrBuilder.h" 22226633Sdim#include "llvm/CodeGen/MachineLoopInfo.h" 23212793Sdim#include "llvm/CodeGen/MachineRegisterInfo.h" 24249423Sdim#include "llvm/CodeGen/VirtRegMap.h" 25212793Sdim#include "llvm/Support/Debug.h" 26212793Sdim#include "llvm/Support/raw_ostream.h" 27212793Sdim#include "llvm/Target/TargetInstrInfo.h" 28212793Sdim#include "llvm/Target/TargetMachine.h" 29212793Sdim 30212793Sdimusing namespace llvm; 31212793Sdim 32221345SdimSTATISTIC(NumFinished, "Number of splits finished"); 33221345SdimSTATISTIC(NumSimple, "Number of splits that were simple"); 34223017SdimSTATISTIC(NumCopies, "Number of copies inserted for splitting"); 35223017SdimSTATISTIC(NumRemats, "Number of rematerialized defs for splitting"); 36223017SdimSTATISTIC(NumRepairs, "Number of invalid live ranges repaired"); 37212793Sdim 38212793Sdim//===----------------------------------------------------------------------===// 39212793Sdim// Split Analysis 40212793Sdim//===----------------------------------------------------------------------===// 41212793Sdim 42218893SdimSplitAnalysis::SplitAnalysis(const VirtRegMap &vrm, 43212793Sdim const LiveIntervals &lis, 44212793Sdim const MachineLoopInfo &mli) 45218893Sdim : MF(vrm.getMachineFunction()), 46218893Sdim VRM(vrm), 47218893Sdim LIS(lis), 48218893Sdim Loops(mli), 49218893Sdim TII(*MF.getTarget().getInstrInfo()), 50221345Sdim CurLI(0), 51221345Sdim LastSplitPoint(MF.getNumBlockIDs()) {} 52212793Sdim 53212793Sdimvoid SplitAnalysis::clear() { 54218893Sdim UseSlots.clear(); 55221345Sdim UseBlocks.clear(); 56221345Sdim ThroughBlocks.clear(); 57218893Sdim CurLI = 0; 58223017Sdim DidRepairRange = false; 59212793Sdim} 60212793Sdim 61221345SdimSlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) { 62221345Sdim const MachineBasicBlock *MBB = MF.getBlockNumbered(Num); 63221345Sdim const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor(); 64221345Sdim std::pair<SlotIndex, SlotIndex> &LSP = LastSplitPoint[Num]; 65234353Sdim SlotIndex MBBEnd = LIS.getMBBEndIdx(MBB); 66221345Sdim 67221345Sdim // Compute split points on the first call. The pair is independent of the 68221345Sdim // current live interval. 69221345Sdim if (!LSP.first.isValid()) { 70221345Sdim MachineBasicBlock::const_iterator FirstTerm = MBB->getFirstTerminator(); 71221345Sdim if (FirstTerm == MBB->end()) 72234353Sdim LSP.first = MBBEnd; 73221345Sdim else 74221345Sdim LSP.first = LIS.getInstructionIndex(FirstTerm); 75221345Sdim 76221345Sdim // If there is a landing pad successor, also find the call instruction. 77221345Sdim if (!LPad) 78221345Sdim return LSP.first; 79221345Sdim // There may not be a call instruction (?) in which case we ignore LPad. 80221345Sdim LSP.second = LSP.first; 81224145Sdim for (MachineBasicBlock::const_iterator I = MBB->end(), E = MBB->begin(); 82224145Sdim I != E;) { 83224145Sdim --I; 84234353Sdim if (I->isCall()) { 85221345Sdim LSP.second = LIS.getInstructionIndex(I); 86221345Sdim break; 87221345Sdim } 88224145Sdim } 89221345Sdim } 90221345Sdim 91221345Sdim // If CurLI is live into a landing pad successor, move the last split point 92221345Sdim // back to the call that may throw. 93234353Sdim if (!LPad || !LSP.second || !LIS.isLiveInToMBB(*CurLI, LPad)) 94221345Sdim return LSP.first; 95234353Sdim 96234353Sdim // Find the value leaving MBB. 97234353Sdim const VNInfo *VNI = CurLI->getVNInfoBefore(MBBEnd); 98234353Sdim if (!VNI) 99234353Sdim return LSP.first; 100234353Sdim 101234353Sdim // If the value leaving MBB was defined after the call in MBB, it can't 102234353Sdim // really be live-in to the landing pad. This can happen if the landing pad 103234353Sdim // has a PHI, and this register is undef on the exceptional edge. 104234353Sdim // <rdar://problem/10664933> 105234353Sdim if (!SlotIndex::isEarlierInstr(VNI->def, LSP.second) && VNI->def < MBBEnd) 106234353Sdim return LSP.first; 107234353Sdim 108234353Sdim // Value is properly live-in to the landing pad. 109234353Sdim // Only allow splits before the call. 110234353Sdim return LSP.second; 111212793Sdim} 112212793Sdim 113234353SdimMachineBasicBlock::iterator 114234353SdimSplitAnalysis::getLastSplitPointIter(MachineBasicBlock *MBB) { 115234353Sdim SlotIndex LSP = getLastSplitPoint(MBB->getNumber()); 116234353Sdim if (LSP == LIS.getMBBEndIdx(MBB)) 117234353Sdim return MBB->end(); 118234353Sdim return LIS.getInstructionFromIndex(LSP); 119234353Sdim} 120234353Sdim 121218893Sdim/// analyzeUses - Count instructions, basic blocks, and loops using CurLI. 122212793Sdimvoid SplitAnalysis::analyzeUses() { 123221345Sdim assert(UseSlots.empty() && "Call clear first"); 124221345Sdim 125221345Sdim // First get all the defs from the interval values. This provides the correct 126221345Sdim // slots for early clobbers. 127221345Sdim for (LiveInterval::const_vni_iterator I = CurLI->vni_begin(), 128221345Sdim E = CurLI->vni_end(); I != E; ++I) 129221345Sdim if (!(*I)->isPHIDef() && !(*I)->isUnused()) 130221345Sdim UseSlots.push_back((*I)->def); 131221345Sdim 132221345Sdim // Get use slots form the use-def chain. 133218893Sdim const MachineRegisterInfo &MRI = MF.getRegInfo(); 134221345Sdim for (MachineRegisterInfo::use_nodbg_iterator 135221345Sdim I = MRI.use_nodbg_begin(CurLI->reg), E = MRI.use_nodbg_end(); I != E; 136221345Sdim ++I) 137221345Sdim if (!I.getOperand().isUndef()) 138234353Sdim UseSlots.push_back(LIS.getInstructionIndex(&*I).getRegSlot()); 139221345Sdim 140221345Sdim array_pod_sort(UseSlots.begin(), UseSlots.end()); 141221345Sdim 142221345Sdim // Remove duplicates, keeping the smaller slot for each instruction. 143221345Sdim // That is what we want for early clobbers. 144221345Sdim UseSlots.erase(std::unique(UseSlots.begin(), UseSlots.end(), 145221345Sdim SlotIndex::isSameInstr), 146221345Sdim UseSlots.end()); 147221345Sdim 148221345Sdim // Compute per-live block info. 149221345Sdim if (!calcLiveBlockInfo()) { 150221345Sdim // FIXME: calcLiveBlockInfo found inconsistencies in the live range. 151224145Sdim // I am looking at you, RegisterCoalescer! 152223017Sdim DidRepairRange = true; 153223017Sdim ++NumRepairs; 154221345Sdim DEBUG(dbgs() << "*** Fixing inconsistent live interval! ***\n"); 155221345Sdim const_cast<LiveIntervals&>(LIS) 156221345Sdim .shrinkToUses(const_cast<LiveInterval*>(CurLI)); 157221345Sdim UseBlocks.clear(); 158221345Sdim ThroughBlocks.clear(); 159221345Sdim bool fixed = calcLiveBlockInfo(); 160221345Sdim (void)fixed; 161221345Sdim assert(fixed && "Couldn't fix broken live interval"); 162212793Sdim } 163221345Sdim 164221345Sdim DEBUG(dbgs() << "Analyze counted " 165221345Sdim << UseSlots.size() << " instrs in " 166221345Sdim << UseBlocks.size() << " blocks, through " 167221345Sdim << NumThroughBlocks << " blocks.\n"); 168212793Sdim} 169212793Sdim 170218893Sdim/// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks 171218893Sdim/// where CurLI is live. 172221345Sdimbool SplitAnalysis::calcLiveBlockInfo() { 173221345Sdim ThroughBlocks.resize(MF.getNumBlockIDs()); 174223017Sdim NumThroughBlocks = NumGapBlocks = 0; 175218893Sdim if (CurLI->empty()) 176221345Sdim return true; 177212793Sdim 178218893Sdim LiveInterval::const_iterator LVI = CurLI->begin(); 179218893Sdim LiveInterval::const_iterator LVE = CurLI->end(); 180212793Sdim 181218893Sdim SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE; 182218893Sdim UseI = UseSlots.begin(); 183218893Sdim UseE = UseSlots.end(); 184212793Sdim 185218893Sdim // Loop over basic blocks where CurLI is live. 186218893Sdim MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start); 187218893Sdim for (;;) { 188218893Sdim BlockInfo BI; 189218893Sdim BI.MBB = MFI; 190218893Sdim SlotIndex Start, Stop; 191218893Sdim tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); 192212793Sdim 193223017Sdim // If the block contains no uses, the range must be live through. At one 194224145Sdim // point, RegisterCoalescer could create dangling ranges that ended 195223017Sdim // mid-block. 196223017Sdim if (UseI == UseE || *UseI >= Stop) { 197223017Sdim ++NumThroughBlocks; 198223017Sdim ThroughBlocks.set(BI.MBB->getNumber()); 199223017Sdim // The range shouldn't end mid-block if there are no uses. This shouldn't 200223017Sdim // happen. 201223017Sdim if (LVI->end < Stop) 202223017Sdim return false; 203223017Sdim } else { 204223017Sdim // This block has uses. Find the first and last uses in the block. 205226633Sdim BI.FirstInstr = *UseI; 206226633Sdim assert(BI.FirstInstr >= Start); 207218893Sdim do ++UseI; 208218893Sdim while (UseI != UseE && *UseI < Stop); 209226633Sdim BI.LastInstr = UseI[-1]; 210226633Sdim assert(BI.LastInstr < Stop); 211212793Sdim 212223017Sdim // LVI is the first live segment overlapping MBB. 213223017Sdim BI.LiveIn = LVI->start <= Start; 214223017Sdim 215226633Sdim // When not live in, the first use should be a def. 216226633Sdim if (!BI.LiveIn) { 217263508Sdim assert(LVI->start == LVI->valno->def && "Dangling Segment start"); 218226633Sdim assert(LVI->start == BI.FirstInstr && "First instr should be a def"); 219226633Sdim BI.FirstDef = BI.FirstInstr; 220226633Sdim } 221226633Sdim 222223017Sdim // Look for gaps in the live range. 223223017Sdim BI.LiveOut = true; 224223017Sdim while (LVI->end < Stop) { 225223017Sdim SlotIndex LastStop = LVI->end; 226223017Sdim if (++LVI == LVE || LVI->start >= Stop) { 227223017Sdim BI.LiveOut = false; 228226633Sdim BI.LastInstr = LastStop; 229223017Sdim break; 230223017Sdim } 231226633Sdim 232223017Sdim if (LastStop < LVI->start) { 233223017Sdim // There is a gap in the live range. Create duplicate entries for the 234223017Sdim // live-in snippet and the live-out snippet. 235223017Sdim ++NumGapBlocks; 236223017Sdim 237223017Sdim // Push the Live-in part. 238223017Sdim BI.LiveOut = false; 239223017Sdim UseBlocks.push_back(BI); 240226633Sdim UseBlocks.back().LastInstr = LastStop; 241223017Sdim 242223017Sdim // Set up BI for the live-out part. 243223017Sdim BI.LiveIn = false; 244223017Sdim BI.LiveOut = true; 245226633Sdim BI.FirstInstr = BI.FirstDef = LVI->start; 246223017Sdim } 247226633Sdim 248263508Sdim // A Segment that starts in the middle of the block must be a def. 249263508Sdim assert(LVI->start == LVI->valno->def && "Dangling Segment start"); 250226633Sdim if (!BI.FirstDef) 251226633Sdim BI.FirstDef = LVI->start; 252218893Sdim } 253212793Sdim 254221345Sdim UseBlocks.push_back(BI); 255223017Sdim 256223017Sdim // LVI is now at LVE or LVI->end >= Stop. 257223017Sdim if (LVI == LVE) 258223017Sdim break; 259221345Sdim } 260212793Sdim 261218893Sdim // Live segment ends exactly at Stop. Move to the next segment. 262218893Sdim if (LVI->end == Stop && ++LVI == LVE) 263218893Sdim break; 264218893Sdim 265218893Sdim // Pick the next basic block. 266218893Sdim if (LVI->start < Stop) 267218893Sdim ++MFI; 268218893Sdim else 269218893Sdim MFI = LIS.getMBBFromIndex(LVI->start); 270212793Sdim } 271223017Sdim 272223017Sdim assert(getNumLiveBlocks() == countLiveBlocks(CurLI) && "Bad block count"); 273221345Sdim return true; 274212793Sdim} 275212793Sdim 276221345Sdimunsigned SplitAnalysis::countLiveBlocks(const LiveInterval *cli) const { 277221345Sdim if (cli->empty()) 278221345Sdim return 0; 279221345Sdim LiveInterval *li = const_cast<LiveInterval*>(cli); 280221345Sdim LiveInterval::iterator LVI = li->begin(); 281221345Sdim LiveInterval::iterator LVE = li->end(); 282221345Sdim unsigned Count = 0; 283221345Sdim 284221345Sdim // Loop over basic blocks where li is live. 285221345Sdim MachineFunction::const_iterator MFI = LIS.getMBBFromIndex(LVI->start); 286221345Sdim SlotIndex Stop = LIS.getMBBEndIdx(MFI); 287221345Sdim for (;;) { 288221345Sdim ++Count; 289221345Sdim LVI = li->advanceTo(LVI, Stop); 290221345Sdim if (LVI == LVE) 291221345Sdim return Count; 292221345Sdim do { 293221345Sdim ++MFI; 294221345Sdim Stop = LIS.getMBBEndIdx(MFI); 295221345Sdim } while (Stop <= LVI->start); 296221345Sdim } 297221345Sdim} 298221345Sdim 299219077Sdimbool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const { 300219077Sdim unsigned OrigReg = VRM.getOriginal(CurLI->reg); 301219077Sdim const LiveInterval &Orig = LIS.getInterval(OrigReg); 302219077Sdim assert(!Orig.empty() && "Splitting empty interval?"); 303219077Sdim LiveInterval::const_iterator I = Orig.find(Idx); 304219077Sdim 305219077Sdim // Range containing Idx should begin at Idx. 306219077Sdim if (I != Orig.end() && I->start <= Idx) 307219077Sdim return I->start == Idx; 308219077Sdim 309219077Sdim // Range does not contain Idx, previous must end at Idx. 310219077Sdim return I != Orig.begin() && (--I)->end == Idx; 311219077Sdim} 312219077Sdim 313212793Sdimvoid SplitAnalysis::analyze(const LiveInterval *li) { 314212793Sdim clear(); 315218893Sdim CurLI = li; 316212793Sdim analyzeUses(); 317212793Sdim} 318212793Sdim 319212793Sdim 320218893Sdim//===----------------------------------------------------------------------===// 321221345Sdim// Split Editor 322218893Sdim//===----------------------------------------------------------------------===// 323212793Sdim 324221345Sdim/// Create a new SplitEditor for editing the LiveInterval analyzed by SA. 325221345SdimSplitEditor::SplitEditor(SplitAnalysis &sa, 326221345Sdim LiveIntervals &lis, 327221345Sdim VirtRegMap &vrm, 328263508Sdim MachineDominatorTree &mdt, 329263508Sdim MachineBlockFrequencyInfo &mbfi) 330221345Sdim : SA(sa), LIS(lis), VRM(vrm), 331221345Sdim MRI(vrm.getMachineFunction().getRegInfo()), 332221345Sdim MDT(mdt), 333221345Sdim TII(*vrm.getMachineFunction().getTarget().getInstrInfo()), 334221345Sdim TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()), 335263508Sdim MBFI(mbfi), 336221345Sdim Edit(0), 337221345Sdim OpenIdx(0), 338226633Sdim SpillMode(SM_Partition), 339221345Sdim RegAssign(Allocator) 340221345Sdim{} 341212793Sdim 342226633Sdimvoid SplitEditor::reset(LiveRangeEdit &LRE, ComplementSpillMode SM) { 343226633Sdim Edit = &LRE; 344226633Sdim SpillMode = SM; 345221345Sdim OpenIdx = 0; 346221345Sdim RegAssign.clear(); 347218893Sdim Values.clear(); 348221345Sdim 349226633Sdim // Reset the LiveRangeCalc instances needed for this spill mode. 350239462Sdim LRCalc[0].reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT, 351239462Sdim &LIS.getVNInfoAllocator()); 352226633Sdim if (SpillMode) 353239462Sdim LRCalc[1].reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT, 354239462Sdim &LIS.getVNInfoAllocator()); 355221345Sdim 356221345Sdim // We don't need an AliasAnalysis since we will only be performing 357221345Sdim // cheap-as-a-copy remats anyway. 358234353Sdim Edit->anyRematerializable(0); 359212793Sdim} 360212793Sdim 361243830Sdim#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 362221345Sdimvoid SplitEditor::dump() const { 363221345Sdim if (RegAssign.empty()) { 364221345Sdim dbgs() << " empty\n"; 365221345Sdim return; 366221345Sdim } 367221345Sdim 368221345Sdim for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I) 369221345Sdim dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value(); 370221345Sdim dbgs() << '\n'; 371212793Sdim} 372243830Sdim#endif 373212793Sdim 374221345SdimVNInfo *SplitEditor::defValue(unsigned RegIdx, 375221345Sdim const VNInfo *ParentVNI, 376221345Sdim SlotIndex Idx) { 377212793Sdim assert(ParentVNI && "Mapping NULL value"); 378212793Sdim assert(Idx.isValid() && "Invalid SlotIndex"); 379221345Sdim assert(Edit->getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI"); 380263508Sdim LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx)); 381212793Sdim 382218893Sdim // Create a new value. 383234353Sdim VNInfo *VNI = LI->getNextValue(Idx, LIS.getVNInfoAllocator()); 384212793Sdim 385218893Sdim // Use insert for lookup, so we can add missing values with a second lookup. 386221345Sdim std::pair<ValueMap::iterator, bool> InsP = 387226633Sdim Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id), 388226633Sdim ValueForcePair(VNI, false))); 389218893Sdim 390221345Sdim // This was the first time (RegIdx, ParentVNI) was mapped. 391221345Sdim // Keep it as a simple def without any liveness. 392221345Sdim if (InsP.second) 393221345Sdim return VNI; 394221345Sdim 395221345Sdim // If the previous value was a simple mapping, add liveness for it now. 396226633Sdim if (VNInfo *OldVNI = InsP.first->second.getPointer()) { 397221345Sdim SlotIndex Def = OldVNI->def; 398263508Sdim LI->addSegment(LiveInterval::Segment(Def, Def.getDeadSlot(), OldVNI)); 399226633Sdim // No longer a simple mapping. Switch to a complex, non-forced mapping. 400226633Sdim InsP.first->second = ValueForcePair(); 401221345Sdim } 402218893Sdim 403221345Sdim // This is a complex mapping, add liveness for VNI 404221345Sdim SlotIndex Def = VNI->def; 405263508Sdim LI->addSegment(LiveInterval::Segment(Def, Def.getDeadSlot(), VNI)); 406221345Sdim 407212793Sdim return VNI; 408212793Sdim} 409212793Sdim 410226633Sdimvoid SplitEditor::forceRecompute(unsigned RegIdx, const VNInfo *ParentVNI) { 411212793Sdim assert(ParentVNI && "Mapping NULL value"); 412226633Sdim ValueForcePair &VFP = Values[std::make_pair(RegIdx, ParentVNI->id)]; 413226633Sdim VNInfo *VNI = VFP.getPointer(); 414212793Sdim 415226633Sdim // ParentVNI was either unmapped or already complex mapped. Either way, just 416226633Sdim // set the force bit. 417226633Sdim if (!VNI) { 418226633Sdim VFP.setInt(true); 419221345Sdim return; 420226633Sdim } 421212793Sdim 422221345Sdim // This was previously a single mapping. Make sure the old def is represented 423221345Sdim // by a trivial live range. 424221345Sdim SlotIndex Def = VNI->def; 425263508Sdim LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx)); 426263508Sdim LI->addSegment(LiveInterval::Segment(Def, Def.getDeadSlot(), VNI)); 427226633Sdim // Mark as complex mapped, forced. 428226633Sdim VFP = ValueForcePair(0, true); 429221345Sdim} 430218893Sdim 431218893SdimVNInfo *SplitEditor::defFromParent(unsigned RegIdx, 432218893Sdim VNInfo *ParentVNI, 433218893Sdim SlotIndex UseIdx, 434218893Sdim MachineBasicBlock &MBB, 435218893Sdim MachineBasicBlock::iterator I) { 436218893Sdim MachineInstr *CopyMI = 0; 437218893Sdim SlotIndex Def; 438263508Sdim LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx)); 439212793Sdim 440221345Sdim // We may be trying to avoid interference that ends at a deleted instruction, 441221345Sdim // so always begin RegIdx 0 early and all others late. 442221345Sdim bool Late = RegIdx != 0; 443221345Sdim 444218893Sdim // Attempt cheap-as-a-copy rematerialization. 445218893Sdim LiveRangeEdit::Remat RM(ParentVNI); 446234353Sdim if (Edit->canRematerializeAt(RM, UseIdx, true)) { 447234353Sdim Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, TRI, Late); 448223017Sdim ++NumRemats; 449218893Sdim } else { 450218893Sdim // Can't remat, just insert a copy from parent. 451218893Sdim CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg) 452221345Sdim .addReg(Edit->getReg()); 453221345Sdim Def = LIS.getSlotIndexes()->insertMachineInstrInMaps(CopyMI, Late) 454234353Sdim .getRegSlot(); 455223017Sdim ++NumCopies; 456212793Sdim } 457212793Sdim 458218893Sdim // Define the value in Reg. 459234353Sdim return defValue(RegIdx, ParentVNI, Def); 460212793Sdim} 461212793Sdim 462212793Sdim/// Create a new virtual register and live interval. 463221345Sdimunsigned SplitEditor::openIntv() { 464218893Sdim // Create the complement as index 0. 465221345Sdim if (Edit->empty()) 466263508Sdim Edit->createEmptyInterval(); 467212793Sdim 468218893Sdim // Create the open interval. 469221345Sdim OpenIdx = Edit->size(); 470263508Sdim Edit->createEmptyInterval(); 471221345Sdim return OpenIdx; 472212793Sdim} 473212793Sdim 474221345Sdimvoid SplitEditor::selectIntv(unsigned Idx) { 475221345Sdim assert(Idx != 0 && "Cannot select the complement interval"); 476221345Sdim assert(Idx < Edit->size() && "Can only select previously opened interval"); 477224145Sdim DEBUG(dbgs() << " selectIntv " << OpenIdx << " -> " << Idx << '\n'); 478221345Sdim OpenIdx = Idx; 479221345Sdim} 480221345Sdim 481218893SdimSlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) { 482218893Sdim assert(OpenIdx && "openIntv not called before enterIntvBefore"); 483218893Sdim DEBUG(dbgs() << " enterIntvBefore " << Idx); 484218893Sdim Idx = Idx.getBaseIndex(); 485221345Sdim VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx); 486218893Sdim if (!ParentVNI) { 487218893Sdim DEBUG(dbgs() << ": not live\n"); 488218893Sdim return Idx; 489212793Sdim } 490218893Sdim DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n'); 491218893Sdim MachineInstr *MI = LIS.getInstructionFromIndex(Idx); 492218893Sdim assert(MI && "enterIntvBefore called with invalid index"); 493212793Sdim 494218893Sdim VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI); 495218893Sdim return VNI->def; 496218893Sdim} 497212793Sdim 498224145SdimSlotIndex SplitEditor::enterIntvAfter(SlotIndex Idx) { 499224145Sdim assert(OpenIdx && "openIntv not called before enterIntvAfter"); 500224145Sdim DEBUG(dbgs() << " enterIntvAfter " << Idx); 501224145Sdim Idx = Idx.getBoundaryIndex(); 502224145Sdim VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx); 503224145Sdim if (!ParentVNI) { 504224145Sdim DEBUG(dbgs() << ": not live\n"); 505224145Sdim return Idx; 506224145Sdim } 507224145Sdim DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n'); 508224145Sdim MachineInstr *MI = LIS.getInstructionFromIndex(Idx); 509224145Sdim assert(MI && "enterIntvAfter called with invalid index"); 510224145Sdim 511224145Sdim VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), 512224145Sdim llvm::next(MachineBasicBlock::iterator(MI))); 513224145Sdim return VNI->def; 514224145Sdim} 515224145Sdim 516218893SdimSlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) { 517218893Sdim assert(OpenIdx && "openIntv not called before enterIntvAtEnd"); 518218893Sdim SlotIndex End = LIS.getMBBEndIdx(&MBB); 519218893Sdim SlotIndex Last = End.getPrevSlot(); 520218893Sdim DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last); 521221345Sdim VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Last); 522218893Sdim if (!ParentVNI) { 523218893Sdim DEBUG(dbgs() << ": not live\n"); 524218893Sdim return End; 525212793Sdim } 526218893Sdim DEBUG(dbgs() << ": valno " << ParentVNI->id); 527218893Sdim VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB, 528234353Sdim SA.getLastSplitPointIter(&MBB)); 529218893Sdim RegAssign.insert(VNI->def, End, OpenIdx); 530218893Sdim DEBUG(dump()); 531218893Sdim return VNI->def; 532212793Sdim} 533212793Sdim 534218893Sdim/// useIntv - indicate that all instructions in MBB should use OpenLI. 535212793Sdimvoid SplitEditor::useIntv(const MachineBasicBlock &MBB) { 536218893Sdim useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB)); 537212793Sdim} 538212793Sdim 539212793Sdimvoid SplitEditor::useIntv(SlotIndex Start, SlotIndex End) { 540218893Sdim assert(OpenIdx && "openIntv not called before useIntv"); 541218893Sdim DEBUG(dbgs() << " useIntv [" << Start << ';' << End << "):"); 542218893Sdim RegAssign.insert(Start, End, OpenIdx); 543218893Sdim DEBUG(dump()); 544218893Sdim} 545212793Sdim 546218893SdimSlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) { 547218893Sdim assert(OpenIdx && "openIntv not called before leaveIntvAfter"); 548218893Sdim DEBUG(dbgs() << " leaveIntvAfter " << Idx); 549212793Sdim 550218893Sdim // The interval must be live beyond the instruction at Idx. 551226633Sdim SlotIndex Boundary = Idx.getBoundaryIndex(); 552226633Sdim VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Boundary); 553218893Sdim if (!ParentVNI) { 554218893Sdim DEBUG(dbgs() << ": not live\n"); 555226633Sdim return Boundary.getNextSlot(); 556212793Sdim } 557218893Sdim DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n'); 558226633Sdim MachineInstr *MI = LIS.getInstructionFromIndex(Boundary); 559226633Sdim assert(MI && "No instruction at index"); 560212793Sdim 561226633Sdim // In spill mode, make live ranges as short as possible by inserting the copy 562226633Sdim // before MI. This is only possible if that instruction doesn't redefine the 563226633Sdim // value. The inserted COPY is not a kill, and we don't need to recompute 564226633Sdim // the source live range. The spiller also won't try to hoist this copy. 565226633Sdim if (SpillMode && !SlotIndex::isSameInstr(ParentVNI->def, Idx) && 566226633Sdim MI->readsVirtualRegister(Edit->getReg())) { 567226633Sdim forceRecompute(0, ParentVNI); 568226633Sdim defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI); 569226633Sdim return Idx; 570226633Sdim } 571226633Sdim 572226633Sdim VNInfo *VNI = defFromParent(0, ParentVNI, Boundary, *MI->getParent(), 573218893Sdim llvm::next(MachineBasicBlock::iterator(MI))); 574218893Sdim return VNI->def; 575212793Sdim} 576212793Sdim 577218893SdimSlotIndex SplitEditor::leaveIntvBefore(SlotIndex Idx) { 578218893Sdim assert(OpenIdx && "openIntv not called before leaveIntvBefore"); 579218893Sdim DEBUG(dbgs() << " leaveIntvBefore " << Idx); 580212793Sdim 581218893Sdim // The interval must be live into the instruction at Idx. 582226633Sdim Idx = Idx.getBaseIndex(); 583221345Sdim VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx); 584218893Sdim if (!ParentVNI) { 585218893Sdim DEBUG(dbgs() << ": not live\n"); 586218893Sdim return Idx.getNextSlot(); 587212793Sdim } 588218893Sdim DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n'); 589212793Sdim 590218893Sdim MachineInstr *MI = LIS.getInstructionFromIndex(Idx); 591218893Sdim assert(MI && "No instruction at index"); 592218893Sdim VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI); 593218893Sdim return VNI->def; 594212793Sdim} 595212793Sdim 596218893SdimSlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) { 597218893Sdim assert(OpenIdx && "openIntv not called before leaveIntvAtTop"); 598218893Sdim SlotIndex Start = LIS.getMBBStartIdx(&MBB); 599218893Sdim DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start); 600212793Sdim 601221345Sdim VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start); 602218893Sdim if (!ParentVNI) { 603218893Sdim DEBUG(dbgs() << ": not live\n"); 604218893Sdim return Start; 605212793Sdim } 606212793Sdim 607218893Sdim VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB, 608218893Sdim MBB.SkipPHIsAndLabels(MBB.begin())); 609218893Sdim RegAssign.insert(Start, VNI->def, OpenIdx); 610218893Sdim DEBUG(dump()); 611218893Sdim return VNI->def; 612218893Sdim} 613212793Sdim 614218893Sdimvoid SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) { 615218893Sdim assert(OpenIdx && "openIntv not called before overlapIntv"); 616221345Sdim const VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start); 617234353Sdim assert(ParentVNI == Edit->getParent().getVNInfoBefore(End) && 618218893Sdim "Parent changes value in extended range"); 619218893Sdim assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) && 620218893Sdim "Range cannot span basic blocks"); 621212793Sdim 622226633Sdim // The complement interval will be extended as needed by LRCalc.extend(). 623221345Sdim if (ParentVNI) 624226633Sdim forceRecompute(0, ParentVNI); 625218893Sdim DEBUG(dbgs() << " overlapIntv [" << Start << ';' << End << "):"); 626218893Sdim RegAssign.insert(Start, End, OpenIdx); 627218893Sdim DEBUG(dump()); 628212793Sdim} 629212793Sdim 630226633Sdim//===----------------------------------------------------------------------===// 631226633Sdim// Spill modes 632226633Sdim//===----------------------------------------------------------------------===// 633226633Sdim 634226633Sdimvoid SplitEditor::removeBackCopies(SmallVectorImpl<VNInfo*> &Copies) { 635263508Sdim LiveInterval *LI = &LIS.getInterval(Edit->get(0)); 636226633Sdim DEBUG(dbgs() << "Removing " << Copies.size() << " back-copies.\n"); 637226633Sdim RegAssignMap::iterator AssignI; 638226633Sdim AssignI.setMap(RegAssign); 639226633Sdim 640226633Sdim for (unsigned i = 0, e = Copies.size(); i != e; ++i) { 641226633Sdim VNInfo *VNI = Copies[i]; 642226633Sdim SlotIndex Def = VNI->def; 643226633Sdim MachineInstr *MI = LIS.getInstructionFromIndex(Def); 644226633Sdim assert(MI && "No instruction for back-copy"); 645226633Sdim 646226633Sdim MachineBasicBlock *MBB = MI->getParent(); 647226633Sdim MachineBasicBlock::iterator MBBI(MI); 648226633Sdim bool AtBegin; 649226633Sdim do AtBegin = MBBI == MBB->begin(); 650226633Sdim while (!AtBegin && (--MBBI)->isDebugValue()); 651226633Sdim 652226633Sdim DEBUG(dbgs() << "Removing " << Def << '\t' << *MI); 653226633Sdim LI->removeValNo(VNI); 654226633Sdim LIS.RemoveMachineInstrFromMaps(MI); 655226633Sdim MI->eraseFromParent(); 656226633Sdim 657226633Sdim // Adjust RegAssign if a register assignment is killed at VNI->def. We 658226633Sdim // want to avoid calculating the live range of the source register if 659226633Sdim // possible. 660239462Sdim AssignI.find(Def.getPrevSlot()); 661226633Sdim if (!AssignI.valid() || AssignI.start() >= Def) 662226633Sdim continue; 663226633Sdim // If MI doesn't kill the assigned register, just leave it. 664226633Sdim if (AssignI.stop() != Def) 665226633Sdim continue; 666226633Sdim unsigned RegIdx = AssignI.value(); 667226633Sdim if (AtBegin || !MBBI->readsVirtualRegister(Edit->getReg())) { 668226633Sdim DEBUG(dbgs() << " cannot find simple kill of RegIdx " << RegIdx << '\n'); 669226633Sdim forceRecompute(RegIdx, Edit->getParent().getVNInfoAt(Def)); 670226633Sdim } else { 671234353Sdim SlotIndex Kill = LIS.getInstructionIndex(MBBI).getRegSlot(); 672226633Sdim DEBUG(dbgs() << " move kill to " << Kill << '\t' << *MBBI); 673226633Sdim AssignI.setStop(Kill); 674226633Sdim } 675226633Sdim } 676226633Sdim} 677226633Sdim 678226633SdimMachineBasicBlock* 679226633SdimSplitEditor::findShallowDominator(MachineBasicBlock *MBB, 680226633Sdim MachineBasicBlock *DefMBB) { 681226633Sdim if (MBB == DefMBB) 682226633Sdim return MBB; 683226633Sdim assert(MDT.dominates(DefMBB, MBB) && "MBB must be dominated by the def."); 684226633Sdim 685226633Sdim const MachineLoopInfo &Loops = SA.Loops; 686226633Sdim const MachineLoop *DefLoop = Loops.getLoopFor(DefMBB); 687226633Sdim MachineDomTreeNode *DefDomNode = MDT[DefMBB]; 688226633Sdim 689226633Sdim // Best candidate so far. 690226633Sdim MachineBasicBlock *BestMBB = MBB; 691226633Sdim unsigned BestDepth = UINT_MAX; 692226633Sdim 693226633Sdim for (;;) { 694226633Sdim const MachineLoop *Loop = Loops.getLoopFor(MBB); 695226633Sdim 696226633Sdim // MBB isn't in a loop, it doesn't get any better. All dominators have a 697226633Sdim // higher frequency by definition. 698226633Sdim if (!Loop) { 699226633Sdim DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#" 700226633Sdim << MBB->getNumber() << " at depth 0\n"); 701226633Sdim return MBB; 702226633Sdim } 703226633Sdim 704226633Sdim // We'll never be able to exit the DefLoop. 705226633Sdim if (Loop == DefLoop) { 706226633Sdim DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#" 707226633Sdim << MBB->getNumber() << " in the same loop\n"); 708226633Sdim return MBB; 709226633Sdim } 710226633Sdim 711226633Sdim // Least busy dominator seen so far. 712226633Sdim unsigned Depth = Loop->getLoopDepth(); 713226633Sdim if (Depth < BestDepth) { 714226633Sdim BestMBB = MBB; 715226633Sdim BestDepth = Depth; 716226633Sdim DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#" 717226633Sdim << MBB->getNumber() << " at depth " << Depth << '\n'); 718226633Sdim } 719226633Sdim 720226633Sdim // Leave loop by going to the immediate dominator of the loop header. 721226633Sdim // This is a bigger stride than simply walking up the dominator tree. 722226633Sdim MachineDomTreeNode *IDom = MDT[Loop->getHeader()]->getIDom(); 723226633Sdim 724226633Sdim // Too far up the dominator tree? 725226633Sdim if (!IDom || !MDT.dominates(DefDomNode, IDom)) 726226633Sdim return BestMBB; 727226633Sdim 728226633Sdim MBB = IDom->getBlock(); 729226633Sdim } 730226633Sdim} 731226633Sdim 732226633Sdimvoid SplitEditor::hoistCopiesForSize() { 733226633Sdim // Get the complement interval, always RegIdx 0. 734263508Sdim LiveInterval *LI = &LIS.getInterval(Edit->get(0)); 735226633Sdim LiveInterval *Parent = &Edit->getParent(); 736226633Sdim 737226633Sdim // Track the nearest common dominator for all back-copies for each ParentVNI, 738226633Sdim // indexed by ParentVNI->id. 739226633Sdim typedef std::pair<MachineBasicBlock*, SlotIndex> DomPair; 740226633Sdim SmallVector<DomPair, 8> NearestDom(Parent->getNumValNums()); 741226633Sdim 742226633Sdim // Find the nearest common dominator for parent values with multiple 743226633Sdim // back-copies. If a single back-copy dominates, put it in DomPair.second. 744226633Sdim for (LiveInterval::vni_iterator VI = LI->vni_begin(), VE = LI->vni_end(); 745226633Sdim VI != VE; ++VI) { 746226633Sdim VNInfo *VNI = *VI; 747239462Sdim if (VNI->isUnused()) 748239462Sdim continue; 749226633Sdim VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def); 750226633Sdim assert(ParentVNI && "Parent not live at complement def"); 751226633Sdim 752226633Sdim // Don't hoist remats. The complement is probably going to disappear 753226633Sdim // completely anyway. 754226633Sdim if (Edit->didRematerialize(ParentVNI)) 755226633Sdim continue; 756226633Sdim 757226633Sdim MachineBasicBlock *ValMBB = LIS.getMBBFromIndex(VNI->def); 758226633Sdim DomPair &Dom = NearestDom[ParentVNI->id]; 759226633Sdim 760226633Sdim // Keep directly defined parent values. This is either a PHI or an 761226633Sdim // instruction in the complement range. All other copies of ParentVNI 762226633Sdim // should be eliminated. 763226633Sdim if (VNI->def == ParentVNI->def) { 764226633Sdim DEBUG(dbgs() << "Direct complement def at " << VNI->def << '\n'); 765226633Sdim Dom = DomPair(ValMBB, VNI->def); 766226633Sdim continue; 767226633Sdim } 768226633Sdim // Skip the singly mapped values. There is nothing to gain from hoisting a 769226633Sdim // single back-copy. 770226633Sdim if (Values.lookup(std::make_pair(0, ParentVNI->id)).getPointer()) { 771226633Sdim DEBUG(dbgs() << "Single complement def at " << VNI->def << '\n'); 772226633Sdim continue; 773226633Sdim } 774226633Sdim 775226633Sdim if (!Dom.first) { 776226633Sdim // First time we see ParentVNI. VNI dominates itself. 777226633Sdim Dom = DomPair(ValMBB, VNI->def); 778226633Sdim } else if (Dom.first == ValMBB) { 779226633Sdim // Two defs in the same block. Pick the earlier def. 780226633Sdim if (!Dom.second.isValid() || VNI->def < Dom.second) 781226633Sdim Dom.second = VNI->def; 782226633Sdim } else { 783226633Sdim // Different basic blocks. Check if one dominates. 784226633Sdim MachineBasicBlock *Near = 785226633Sdim MDT.findNearestCommonDominator(Dom.first, ValMBB); 786226633Sdim if (Near == ValMBB) 787226633Sdim // Def ValMBB dominates. 788226633Sdim Dom = DomPair(ValMBB, VNI->def); 789226633Sdim else if (Near != Dom.first) 790226633Sdim // None dominate. Hoist to common dominator, need new def. 791226633Sdim Dom = DomPair(Near, SlotIndex()); 792226633Sdim } 793226633Sdim 794226633Sdim DEBUG(dbgs() << "Multi-mapped complement " << VNI->id << '@' << VNI->def 795226633Sdim << " for parent " << ParentVNI->id << '@' << ParentVNI->def 796226633Sdim << " hoist to BB#" << Dom.first->getNumber() << ' ' 797226633Sdim << Dom.second << '\n'); 798226633Sdim } 799226633Sdim 800226633Sdim // Insert the hoisted copies. 801226633Sdim for (unsigned i = 0, e = Parent->getNumValNums(); i != e; ++i) { 802226633Sdim DomPair &Dom = NearestDom[i]; 803226633Sdim if (!Dom.first || Dom.second.isValid()) 804226633Sdim continue; 805226633Sdim // This value needs a hoisted copy inserted at the end of Dom.first. 806226633Sdim VNInfo *ParentVNI = Parent->getValNumInfo(i); 807226633Sdim MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(ParentVNI->def); 808226633Sdim // Get a less loopy dominator than Dom.first. 809226633Sdim Dom.first = findShallowDominator(Dom.first, DefMBB); 810226633Sdim SlotIndex Last = LIS.getMBBEndIdx(Dom.first).getPrevSlot(); 811226633Sdim Dom.second = 812226633Sdim defFromParent(0, ParentVNI, Last, *Dom.first, 813234353Sdim SA.getLastSplitPointIter(Dom.first))->def; 814226633Sdim } 815226633Sdim 816226633Sdim // Remove redundant back-copies that are now known to be dominated by another 817226633Sdim // def with the same value. 818226633Sdim SmallVector<VNInfo*, 8> BackCopies; 819226633Sdim for (LiveInterval::vni_iterator VI = LI->vni_begin(), VE = LI->vni_end(); 820226633Sdim VI != VE; ++VI) { 821226633Sdim VNInfo *VNI = *VI; 822239462Sdim if (VNI->isUnused()) 823239462Sdim continue; 824226633Sdim VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def); 825226633Sdim const DomPair &Dom = NearestDom[ParentVNI->id]; 826226633Sdim if (!Dom.first || Dom.second == VNI->def) 827226633Sdim continue; 828226633Sdim BackCopies.push_back(VNI); 829226633Sdim forceRecompute(0, ParentVNI); 830226633Sdim } 831226633Sdim removeBackCopies(BackCopies); 832226633Sdim} 833226633Sdim 834226633Sdim 835221345Sdim/// transferValues - Transfer all possible values to the new live ranges. 836226633Sdim/// Values that were rematerialized are left alone, they need LRCalc.extend(). 837221345Sdimbool SplitEditor::transferValues() { 838221345Sdim bool Skipped = false; 839221345Sdim RegAssignMap::const_iterator AssignI = RegAssign.begin(); 840221345Sdim for (LiveInterval::const_iterator ParentI = Edit->getParent().begin(), 841221345Sdim ParentE = Edit->getParent().end(); ParentI != ParentE; ++ParentI) { 842221345Sdim DEBUG(dbgs() << " blit " << *ParentI << ':'); 843221345Sdim VNInfo *ParentVNI = ParentI->valno; 844221345Sdim // RegAssign has holes where RegIdx 0 should be used. 845221345Sdim SlotIndex Start = ParentI->start; 846221345Sdim AssignI.advanceTo(Start); 847221345Sdim do { 848221345Sdim unsigned RegIdx; 849221345Sdim SlotIndex End = ParentI->end; 850221345Sdim if (!AssignI.valid()) { 851221345Sdim RegIdx = 0; 852221345Sdim } else if (AssignI.start() <= Start) { 853221345Sdim RegIdx = AssignI.value(); 854221345Sdim if (AssignI.stop() < End) { 855221345Sdim End = AssignI.stop(); 856221345Sdim ++AssignI; 857221345Sdim } 858221345Sdim } else { 859221345Sdim RegIdx = 0; 860221345Sdim End = std::min(End, AssignI.start()); 861221345Sdim } 862221345Sdim 863221345Sdim // The interval [Start;End) is continuously mapped to RegIdx, ParentVNI. 864221345Sdim DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx); 865263508Sdim LiveRange &LR = LIS.getInterval(Edit->get(RegIdx)); 866221345Sdim 867221345Sdim // Check for a simply defined value that can be blitted directly. 868226633Sdim ValueForcePair VFP = Values.lookup(std::make_pair(RegIdx, ParentVNI->id)); 869226633Sdim if (VNInfo *VNI = VFP.getPointer()) { 870221345Sdim DEBUG(dbgs() << ':' << VNI->id); 871263508Sdim LR.addSegment(LiveInterval::Segment(Start, End, VNI)); 872221345Sdim Start = End; 873221345Sdim continue; 874221345Sdim } 875221345Sdim 876226633Sdim // Skip values with forced recomputation. 877226633Sdim if (VFP.getInt()) { 878226633Sdim DEBUG(dbgs() << "(recalc)"); 879221345Sdim Skipped = true; 880221345Sdim Start = End; 881221345Sdim continue; 882221345Sdim } 883221345Sdim 884226633Sdim LiveRangeCalc &LRC = getLRCalc(RegIdx); 885221345Sdim 886221345Sdim // This value has multiple defs in RegIdx, but it wasn't rematerialized, 887221345Sdim // so the live range is accurate. Add live-in blocks in [Start;End) to the 888221345Sdim // LiveInBlocks. 889221345Sdim MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start); 890221345Sdim SlotIndex BlockStart, BlockEnd; 891221345Sdim tie(BlockStart, BlockEnd) = LIS.getSlotIndexes()->getMBBRange(MBB); 892221345Sdim 893221345Sdim // The first block may be live-in, or it may have its own def. 894221345Sdim if (Start != BlockStart) { 895263508Sdim VNInfo *VNI = LR.extendInBlock(BlockStart, std::min(BlockEnd, End)); 896221345Sdim assert(VNI && "Missing def for complex mapped value"); 897221345Sdim DEBUG(dbgs() << ':' << VNI->id << "*BB#" << MBB->getNumber()); 898221345Sdim // MBB has its own def. Is it also live-out? 899226633Sdim if (BlockEnd <= End) 900226633Sdim LRC.setLiveOutValue(MBB, VNI); 901226633Sdim 902221345Sdim // Skip to the next block for live-in. 903221345Sdim ++MBB; 904221345Sdim BlockStart = BlockEnd; 905221345Sdim } 906221345Sdim 907221345Sdim // Handle the live-in blocks covered by [Start;End). 908221345Sdim assert(Start <= BlockStart && "Expected live-in block"); 909221345Sdim while (BlockStart < End) { 910221345Sdim DEBUG(dbgs() << ">BB#" << MBB->getNumber()); 911221345Sdim BlockEnd = LIS.getMBBEndIdx(MBB); 912221345Sdim if (BlockStart == ParentVNI->def) { 913221345Sdim // This block has the def of a parent PHI, so it isn't live-in. 914221345Sdim assert(ParentVNI->isPHIDef() && "Non-phi defined at block start?"); 915263508Sdim VNInfo *VNI = LR.extendInBlock(BlockStart, std::min(BlockEnd, End)); 916221345Sdim assert(VNI && "Missing def for complex mapped parent PHI"); 917226633Sdim if (End >= BlockEnd) 918226633Sdim LRC.setLiveOutValue(MBB, VNI); // Live-out as well. 919221345Sdim } else { 920226633Sdim // This block needs a live-in value. The last block covered may not 921226633Sdim // be live-out. 922221345Sdim if (End < BlockEnd) 923263508Sdim LRC.addLiveInBlock(LR, MDT[MBB], End); 924221345Sdim else { 925226633Sdim // Live-through, and we don't know the value. 926263508Sdim LRC.addLiveInBlock(LR, MDT[MBB]); 927226633Sdim LRC.setLiveOutValue(MBB, 0); 928221345Sdim } 929221345Sdim } 930221345Sdim BlockStart = BlockEnd; 931221345Sdim ++MBB; 932221345Sdim } 933221345Sdim Start = End; 934221345Sdim } while (Start != ParentI->end); 935221345Sdim DEBUG(dbgs() << '\n'); 936221345Sdim } 937221345Sdim 938239462Sdim LRCalc[0].calculateValues(); 939226633Sdim if (SpillMode) 940239462Sdim LRCalc[1].calculateValues(); 941221345Sdim 942221345Sdim return Skipped; 943212793Sdim} 944212793Sdim 945221345Sdimvoid SplitEditor::extendPHIKillRanges() { 946221345Sdim // Extend live ranges to be live-out for successor PHI values. 947221345Sdim for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(), 948221345Sdim E = Edit->getParent().vni_end(); I != E; ++I) { 949221345Sdim const VNInfo *PHIVNI = *I; 950221345Sdim if (PHIVNI->isUnused() || !PHIVNI->isPHIDef()) 951221345Sdim continue; 952221345Sdim unsigned RegIdx = RegAssign.lookup(PHIVNI->def); 953263508Sdim LiveRange &LR = LIS.getInterval(Edit->get(RegIdx)); 954226633Sdim LiveRangeCalc &LRC = getLRCalc(RegIdx); 955221345Sdim MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def); 956221345Sdim for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(), 957221345Sdim PE = MBB->pred_end(); PI != PE; ++PI) { 958226633Sdim SlotIndex End = LIS.getMBBEndIdx(*PI); 959226633Sdim SlotIndex LastUse = End.getPrevSlot(); 960221345Sdim // The predecessor may not have a live-out value. That is OK, like an 961221345Sdim // undef PHI operand. 962226633Sdim if (Edit->getParent().liveAt(LastUse)) { 963226633Sdim assert(RegAssign.lookup(LastUse) == RegIdx && 964221345Sdim "Different register assignment in phi predecessor"); 965263508Sdim LRC.extend(LR, End); 966221345Sdim } 967221345Sdim } 968221345Sdim } 969221345Sdim} 970221345Sdim 971221345Sdim/// rewriteAssigned - Rewrite all uses of Edit->getReg(). 972221345Sdimvoid SplitEditor::rewriteAssigned(bool ExtendRanges) { 973221345Sdim for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit->getReg()), 974218893Sdim RE = MRI.reg_end(); RI != RE;) { 975212793Sdim MachineOperand &MO = RI.getOperand(); 976212793Sdim MachineInstr *MI = MO.getParent(); 977212793Sdim ++RI; 978218893Sdim // LiveDebugVariables should have handled all DBG_VALUE instructions. 979212793Sdim if (MI->isDebugValue()) { 980212793Sdim DEBUG(dbgs() << "Zapping " << *MI); 981212793Sdim MO.setReg(0); 982212793Sdim continue; 983212793Sdim } 984218893Sdim 985226633Sdim // <undef> operands don't really read the register, so it doesn't matter 986226633Sdim // which register we choose. When the use operand is tied to a def, we must 987226633Sdim // use the same register as the def, so just do that always. 988218893Sdim SlotIndex Idx = LIS.getInstructionIndex(MI); 989226633Sdim if (MO.isDef() || MO.isUndef()) 990234353Sdim Idx = Idx.getRegSlot(MO.isEarlyClobber()); 991218893Sdim 992218893Sdim // Rewrite to the mapped register at Idx. 993218893Sdim unsigned RegIdx = RegAssign.lookup(Idx); 994263508Sdim LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx)); 995226633Sdim MO.setReg(LI->reg); 996218893Sdim DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t' 997218893Sdim << Idx << ':' << RegIdx << '\t' << *MI); 998218893Sdim 999221345Sdim // Extend liveness to Idx if the instruction reads reg. 1000226633Sdim if (!ExtendRanges || MO.isUndef()) 1001221345Sdim continue; 1002221345Sdim 1003221345Sdim // Skip instructions that don't read Reg. 1004221345Sdim if (MO.isDef()) { 1005221345Sdim if (!MO.getSubReg() && !MO.isEarlyClobber()) 1006221345Sdim continue; 1007221345Sdim // We may wan't to extend a live range for a partial redef, or for a use 1008221345Sdim // tied to an early clobber. 1009221345Sdim Idx = Idx.getPrevSlot(); 1010221345Sdim if (!Edit->getParent().liveAt(Idx)) 1011221345Sdim continue; 1012221345Sdim } else 1013234353Sdim Idx = Idx.getRegSlot(true); 1014221345Sdim 1015263508Sdim getLRCalc(RegIdx).extend(*LI, Idx.getNextSlot()); 1016212793Sdim } 1017218893Sdim} 1018212793Sdim 1019221345Sdimvoid SplitEditor::deleteRematVictims() { 1020221345Sdim SmallVector<MachineInstr*, 8> Dead; 1021221345Sdim for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I){ 1022263508Sdim LiveInterval *LI = &LIS.getInterval(*I); 1023221345Sdim for (LiveInterval::const_iterator LII = LI->begin(), LIE = LI->end(); 1024221345Sdim LII != LIE; ++LII) { 1025234353Sdim // Dead defs end at the dead slot. 1026234353Sdim if (LII->end != LII->valno->def.getDeadSlot()) 1027221345Sdim continue; 1028221345Sdim MachineInstr *MI = LIS.getInstructionFromIndex(LII->valno->def); 1029221345Sdim assert(MI && "Missing instruction for dead def"); 1030221345Sdim MI->addRegisterDead(LI->reg, &TRI); 1031221345Sdim 1032221345Sdim if (!MI->allDefsAreDead()) 1033221345Sdim continue; 1034221345Sdim 1035221345Sdim DEBUG(dbgs() << "All defs dead: " << *MI); 1036221345Sdim Dead.push_back(MI); 1037221345Sdim } 1038212793Sdim } 1039221345Sdim 1040221345Sdim if (Dead.empty()) 1041221345Sdim return; 1042221345Sdim 1043234353Sdim Edit->eliminateDeadDefs(Dead); 1044212793Sdim} 1045212793Sdim 1046221345Sdimvoid SplitEditor::finish(SmallVectorImpl<unsigned> *LRMap) { 1047221345Sdim ++NumFinished; 1048212793Sdim 1049218893Sdim // At this point, the live intervals in Edit contain VNInfos corresponding to 1050218893Sdim // the inserted copies. 1051212793Sdim 1052218893Sdim // Add the original defs from the parent interval. 1053221345Sdim for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(), 1054221345Sdim E = Edit->getParent().vni_end(); I != E; ++I) { 1055218893Sdim const VNInfo *ParentVNI = *I; 1056218893Sdim if (ParentVNI->isUnused()) 1057218893Sdim continue; 1058221345Sdim unsigned RegIdx = RegAssign.lookup(ParentVNI->def); 1059239462Sdim defValue(RegIdx, ParentVNI, ParentVNI->def); 1060221345Sdim 1061226633Sdim // Force rematted values to be recomputed everywhere. 1062221345Sdim // The new live ranges may be truncated. 1063221345Sdim if (Edit->didRematerialize(ParentVNI)) 1064221345Sdim for (unsigned i = 0, e = Edit->size(); i != e; ++i) 1065226633Sdim forceRecompute(i, ParentVNI); 1066218893Sdim } 1067212793Sdim 1068226633Sdim // Hoist back-copies to the complement interval when in spill mode. 1069226633Sdim switch (SpillMode) { 1070226633Sdim case SM_Partition: 1071226633Sdim // Leave all back-copies as is. 1072226633Sdim break; 1073226633Sdim case SM_Size: 1074226633Sdim hoistCopiesForSize(); 1075226633Sdim break; 1076226633Sdim case SM_Speed: 1077226633Sdim llvm_unreachable("Spill mode 'speed' not implemented yet"); 1078226633Sdim } 1079226633Sdim 1080221345Sdim // Transfer the simply mapped values, check if any are skipped. 1081221345Sdim bool Skipped = transferValues(); 1082221345Sdim if (Skipped) 1083221345Sdim extendPHIKillRanges(); 1084221345Sdim else 1085221345Sdim ++NumSimple; 1086212793Sdim 1087221345Sdim // Rewrite virtual registers, possibly extending ranges. 1088221345Sdim rewriteAssigned(Skipped); 1089212793Sdim 1090221345Sdim // Delete defs that were rematted everywhere. 1091221345Sdim if (Skipped) 1092221345Sdim deleteRematVictims(); 1093212793Sdim 1094218893Sdim // Get rid of unused values and set phi-kill flags. 1095263508Sdim for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I) { 1096263508Sdim LiveInterval &LI = LIS.getInterval(*I); 1097263508Sdim LI.RenumberValues(); 1098263508Sdim } 1099218893Sdim 1100221345Sdim // Provide a reverse mapping from original indices to Edit ranges. 1101221345Sdim if (LRMap) { 1102221345Sdim LRMap->clear(); 1103221345Sdim for (unsigned i = 0, e = Edit->size(); i != e; ++i) 1104221345Sdim LRMap->push_back(i); 1105221345Sdim } 1106221345Sdim 1107218893Sdim // Now check if any registers were separated into multiple components. 1108218893Sdim ConnectedVNInfoEqClasses ConEQ(LIS); 1109221345Sdim for (unsigned i = 0, e = Edit->size(); i != e; ++i) { 1110218893Sdim // Don't use iterators, they are invalidated by create() below. 1111263508Sdim LiveInterval *li = &LIS.getInterval(Edit->get(i)); 1112218893Sdim unsigned NumComp = ConEQ.Classify(li); 1113218893Sdim if (NumComp <= 1) 1114218893Sdim continue; 1115218893Sdim DEBUG(dbgs() << " " << NumComp << " components: " << *li << '\n'); 1116218893Sdim SmallVector<LiveInterval*, 8> dups; 1117218893Sdim dups.push_back(li); 1118221345Sdim for (unsigned j = 1; j != NumComp; ++j) 1119263508Sdim dups.push_back(&Edit->createEmptyInterval()); 1120221345Sdim ConEQ.Distribute(&dups[0], MRI); 1121221345Sdim // The new intervals all map back to i. 1122221345Sdim if (LRMap) 1123221345Sdim LRMap->resize(Edit->size(), i); 1124212793Sdim } 1125212793Sdim 1126218893Sdim // Calculate spill weight and allocation hints for new intervals. 1127263508Sdim Edit->calculateRegClassAndHint(VRM.getMachineFunction(), SA.Loops, MBFI); 1128221345Sdim 1129221345Sdim assert(!LRMap || LRMap->size() == Edit->size()); 1130212793Sdim} 1131212793Sdim 1132212793Sdim 1133212793Sdim//===----------------------------------------------------------------------===// 1134212793Sdim// Single Block Splitting 1135212793Sdim//===----------------------------------------------------------------------===// 1136212793Sdim 1137226633Sdimbool SplitAnalysis::shouldSplitSingleBlock(const BlockInfo &BI, 1138226633Sdim bool SingleInstrs) const { 1139226633Sdim // Always split for multiple instructions. 1140226633Sdim if (!BI.isOneInstr()) 1141226633Sdim return true; 1142226633Sdim // Don't split for single instructions unless explicitly requested. 1143226633Sdim if (!SingleInstrs) 1144218893Sdim return false; 1145226633Sdim // Splitting a live-through range always makes progress. 1146226633Sdim if (BI.LiveIn && BI.LiveOut) 1147226633Sdim return true; 1148226633Sdim // No point in isolating a copy. It has no register class constraints. 1149226633Sdim if (LIS.getInstructionFromIndex(BI.FirstInstr)->isCopyLike()) 1150226633Sdim return false; 1151226633Sdim // Finally, don't isolate an end point that was created by earlier splits. 1152226633Sdim return isOriginalEndpoint(BI.FirstInstr); 1153218893Sdim} 1154212793Sdim 1155221345Sdimvoid SplitEditor::splitSingleBlock(const SplitAnalysis::BlockInfo &BI) { 1156221345Sdim openIntv(); 1157221345Sdim SlotIndex LastSplitPoint = SA.getLastSplitPoint(BI.MBB->getNumber()); 1158226633Sdim SlotIndex SegStart = enterIntvBefore(std::min(BI.FirstInstr, 1159221345Sdim LastSplitPoint)); 1160226633Sdim if (!BI.LiveOut || BI.LastInstr < LastSplitPoint) { 1161226633Sdim useIntv(SegStart, leaveIntvAfter(BI.LastInstr)); 1162221345Sdim } else { 1163221345Sdim // The last use is after the last valid split point. 1164221345Sdim SlotIndex SegStop = leaveIntvBefore(LastSplitPoint); 1165221345Sdim useIntv(SegStart, SegStop); 1166226633Sdim overlapIntv(SegStop, BI.LastInstr); 1167221345Sdim } 1168221345Sdim} 1169221345Sdim 1170224145Sdim 1171224145Sdim//===----------------------------------------------------------------------===// 1172224145Sdim// Global Live Range Splitting Support 1173224145Sdim//===----------------------------------------------------------------------===// 1174224145Sdim 1175224145Sdim// These methods support a method of global live range splitting that uses a 1176224145Sdim// global algorithm to decide intervals for CFG edges. They will insert split 1177224145Sdim// points and color intervals in basic blocks while avoiding interference. 1178224145Sdim// 1179224145Sdim// Note that splitSingleBlock is also useful for blocks where both CFG edges 1180224145Sdim// are on the stack. 1181224145Sdim 1182224145Sdimvoid SplitEditor::splitLiveThroughBlock(unsigned MBBNum, 1183224145Sdim unsigned IntvIn, SlotIndex LeaveBefore, 1184224145Sdim unsigned IntvOut, SlotIndex EnterAfter){ 1185224145Sdim SlotIndex Start, Stop; 1186224145Sdim tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(MBBNum); 1187224145Sdim 1188224145Sdim DEBUG(dbgs() << "BB#" << MBBNum << " [" << Start << ';' << Stop 1189224145Sdim << ") intf " << LeaveBefore << '-' << EnterAfter 1190224145Sdim << ", live-through " << IntvIn << " -> " << IntvOut); 1191224145Sdim 1192224145Sdim assert((IntvIn || IntvOut) && "Use splitSingleBlock for isolated blocks"); 1193224145Sdim 1194226633Sdim assert((!LeaveBefore || LeaveBefore < Stop) && "Interference after block"); 1195226633Sdim assert((!IntvIn || !LeaveBefore || LeaveBefore > Start) && "Impossible intf"); 1196226633Sdim assert((!EnterAfter || EnterAfter >= Start) && "Interference before block"); 1197226633Sdim 1198226633Sdim MachineBasicBlock *MBB = VRM.getMachineFunction().getBlockNumbered(MBBNum); 1199226633Sdim 1200224145Sdim if (!IntvOut) { 1201224145Sdim DEBUG(dbgs() << ", spill on entry.\n"); 1202224145Sdim // 1203224145Sdim // <<<<<<<<< Possible LeaveBefore interference. 1204224145Sdim // |-----------| Live through. 1205224145Sdim // -____________ Spill on entry. 1206224145Sdim // 1207224145Sdim selectIntv(IntvIn); 1208224145Sdim SlotIndex Idx = leaveIntvAtTop(*MBB); 1209224145Sdim assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference"); 1210224145Sdim (void)Idx; 1211224145Sdim return; 1212224145Sdim } 1213224145Sdim 1214224145Sdim if (!IntvIn) { 1215224145Sdim DEBUG(dbgs() << ", reload on exit.\n"); 1216224145Sdim // 1217224145Sdim // >>>>>>> Possible EnterAfter interference. 1218224145Sdim // |-----------| Live through. 1219224145Sdim // ___________-- Reload on exit. 1220224145Sdim // 1221224145Sdim selectIntv(IntvOut); 1222224145Sdim SlotIndex Idx = enterIntvAtEnd(*MBB); 1223224145Sdim assert((!EnterAfter || Idx >= EnterAfter) && "Interference"); 1224224145Sdim (void)Idx; 1225224145Sdim return; 1226224145Sdim } 1227224145Sdim 1228224145Sdim if (IntvIn == IntvOut && !LeaveBefore && !EnterAfter) { 1229224145Sdim DEBUG(dbgs() << ", straight through.\n"); 1230224145Sdim // 1231224145Sdim // |-----------| Live through. 1232224145Sdim // ------------- Straight through, same intv, no interference. 1233224145Sdim // 1234224145Sdim selectIntv(IntvOut); 1235224145Sdim useIntv(Start, Stop); 1236224145Sdim return; 1237224145Sdim } 1238224145Sdim 1239224145Sdim // We cannot legally insert splits after LSP. 1240224145Sdim SlotIndex LSP = SA.getLastSplitPoint(MBBNum); 1241226633Sdim assert((!IntvOut || !EnterAfter || EnterAfter < LSP) && "Impossible intf"); 1242224145Sdim 1243224145Sdim if (IntvIn != IntvOut && (!LeaveBefore || !EnterAfter || 1244224145Sdim LeaveBefore.getBaseIndex() > EnterAfter.getBoundaryIndex())) { 1245224145Sdim DEBUG(dbgs() << ", switch avoiding interference.\n"); 1246224145Sdim // 1247224145Sdim // >>>> <<<< Non-overlapping EnterAfter/LeaveBefore interference. 1248224145Sdim // |-----------| Live through. 1249224145Sdim // ------======= Switch intervals between interference. 1250224145Sdim // 1251224145Sdim selectIntv(IntvOut); 1252226633Sdim SlotIndex Idx; 1253226633Sdim if (LeaveBefore && LeaveBefore < LSP) { 1254226633Sdim Idx = enterIntvBefore(LeaveBefore); 1255226633Sdim useIntv(Idx, Stop); 1256226633Sdim } else { 1257226633Sdim Idx = enterIntvAtEnd(*MBB); 1258226633Sdim } 1259224145Sdim selectIntv(IntvIn); 1260224145Sdim useIntv(Start, Idx); 1261224145Sdim assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference"); 1262224145Sdim assert((!EnterAfter || Idx >= EnterAfter) && "Interference"); 1263224145Sdim return; 1264224145Sdim } 1265224145Sdim 1266224145Sdim DEBUG(dbgs() << ", create local intv for interference.\n"); 1267224145Sdim // 1268224145Sdim // >>><><><><<<< Overlapping EnterAfter/LeaveBefore interference. 1269224145Sdim // |-----------| Live through. 1270224145Sdim // ==---------== Switch intervals before/after interference. 1271224145Sdim // 1272224145Sdim assert(LeaveBefore <= EnterAfter && "Missed case"); 1273224145Sdim 1274224145Sdim selectIntv(IntvOut); 1275224145Sdim SlotIndex Idx = enterIntvAfter(EnterAfter); 1276224145Sdim useIntv(Idx, Stop); 1277224145Sdim assert((!EnterAfter || Idx >= EnterAfter) && "Interference"); 1278224145Sdim 1279224145Sdim selectIntv(IntvIn); 1280224145Sdim Idx = leaveIntvBefore(LeaveBefore); 1281224145Sdim useIntv(Start, Idx); 1282224145Sdim assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference"); 1283224145Sdim} 1284224145Sdim 1285224145Sdim 1286224145Sdimvoid SplitEditor::splitRegInBlock(const SplitAnalysis::BlockInfo &BI, 1287224145Sdim unsigned IntvIn, SlotIndex LeaveBefore) { 1288224145Sdim SlotIndex Start, Stop; 1289224145Sdim tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); 1290224145Sdim 1291224145Sdim DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " [" << Start << ';' << Stop 1292226633Sdim << "), uses " << BI.FirstInstr << '-' << BI.LastInstr 1293224145Sdim << ", reg-in " << IntvIn << ", leave before " << LeaveBefore 1294224145Sdim << (BI.LiveOut ? ", stack-out" : ", killed in block")); 1295224145Sdim 1296224145Sdim assert(IntvIn && "Must have register in"); 1297224145Sdim assert(BI.LiveIn && "Must be live-in"); 1298224145Sdim assert((!LeaveBefore || LeaveBefore > Start) && "Bad interference"); 1299224145Sdim 1300226633Sdim if (!BI.LiveOut && (!LeaveBefore || LeaveBefore >= BI.LastInstr)) { 1301224145Sdim DEBUG(dbgs() << " before interference.\n"); 1302224145Sdim // 1303224145Sdim // <<< Interference after kill. 1304224145Sdim // |---o---x | Killed in block. 1305224145Sdim // ========= Use IntvIn everywhere. 1306224145Sdim // 1307224145Sdim selectIntv(IntvIn); 1308226633Sdim useIntv(Start, BI.LastInstr); 1309224145Sdim return; 1310224145Sdim } 1311224145Sdim 1312224145Sdim SlotIndex LSP = SA.getLastSplitPoint(BI.MBB->getNumber()); 1313224145Sdim 1314226633Sdim if (!LeaveBefore || LeaveBefore > BI.LastInstr.getBoundaryIndex()) { 1315224145Sdim // 1316224145Sdim // <<< Possible interference after last use. 1317224145Sdim // |---o---o---| Live-out on stack. 1318224145Sdim // =========____ Leave IntvIn after last use. 1319224145Sdim // 1320224145Sdim // < Interference after last use. 1321224145Sdim // |---o---o--o| Live-out on stack, late last use. 1322224145Sdim // ============ Copy to stack after LSP, overlap IntvIn. 1323224145Sdim // \_____ Stack interval is live-out. 1324224145Sdim // 1325226633Sdim if (BI.LastInstr < LSP) { 1326224145Sdim DEBUG(dbgs() << ", spill after last use before interference.\n"); 1327224145Sdim selectIntv(IntvIn); 1328226633Sdim SlotIndex Idx = leaveIntvAfter(BI.LastInstr); 1329224145Sdim useIntv(Start, Idx); 1330224145Sdim assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference"); 1331224145Sdim } else { 1332224145Sdim DEBUG(dbgs() << ", spill before last split point.\n"); 1333224145Sdim selectIntv(IntvIn); 1334224145Sdim SlotIndex Idx = leaveIntvBefore(LSP); 1335226633Sdim overlapIntv(Idx, BI.LastInstr); 1336224145Sdim useIntv(Start, Idx); 1337224145Sdim assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference"); 1338224145Sdim } 1339224145Sdim return; 1340224145Sdim } 1341224145Sdim 1342224145Sdim // The interference is overlapping somewhere we wanted to use IntvIn. That 1343224145Sdim // means we need to create a local interval that can be allocated a 1344224145Sdim // different register. 1345224145Sdim unsigned LocalIntv = openIntv(); 1346224145Sdim (void)LocalIntv; 1347224145Sdim DEBUG(dbgs() << ", creating local interval " << LocalIntv << ".\n"); 1348224145Sdim 1349226633Sdim if (!BI.LiveOut || BI.LastInstr < LSP) { 1350224145Sdim // 1351224145Sdim // <<<<<<< Interference overlapping uses. 1352224145Sdim // |---o---o---| Live-out on stack. 1353224145Sdim // =====----____ Leave IntvIn before interference, then spill. 1354224145Sdim // 1355226633Sdim SlotIndex To = leaveIntvAfter(BI.LastInstr); 1356224145Sdim SlotIndex From = enterIntvBefore(LeaveBefore); 1357224145Sdim useIntv(From, To); 1358224145Sdim selectIntv(IntvIn); 1359224145Sdim useIntv(Start, From); 1360224145Sdim assert((!LeaveBefore || From <= LeaveBefore) && "Interference"); 1361224145Sdim return; 1362224145Sdim } 1363224145Sdim 1364224145Sdim // <<<<<<< Interference overlapping uses. 1365224145Sdim // |---o---o--o| Live-out on stack, late last use. 1366224145Sdim // =====------- Copy to stack before LSP, overlap LocalIntv. 1367224145Sdim // \_____ Stack interval is live-out. 1368224145Sdim // 1369224145Sdim SlotIndex To = leaveIntvBefore(LSP); 1370226633Sdim overlapIntv(To, BI.LastInstr); 1371224145Sdim SlotIndex From = enterIntvBefore(std::min(To, LeaveBefore)); 1372224145Sdim useIntv(From, To); 1373224145Sdim selectIntv(IntvIn); 1374224145Sdim useIntv(Start, From); 1375224145Sdim assert((!LeaveBefore || From <= LeaveBefore) && "Interference"); 1376224145Sdim} 1377224145Sdim 1378224145Sdimvoid SplitEditor::splitRegOutBlock(const SplitAnalysis::BlockInfo &BI, 1379224145Sdim unsigned IntvOut, SlotIndex EnterAfter) { 1380224145Sdim SlotIndex Start, Stop; 1381224145Sdim tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); 1382224145Sdim 1383224145Sdim DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " [" << Start << ';' << Stop 1384226633Sdim << "), uses " << BI.FirstInstr << '-' << BI.LastInstr 1385224145Sdim << ", reg-out " << IntvOut << ", enter after " << EnterAfter 1386224145Sdim << (BI.LiveIn ? ", stack-in" : ", defined in block")); 1387224145Sdim 1388224145Sdim SlotIndex LSP = SA.getLastSplitPoint(BI.MBB->getNumber()); 1389224145Sdim 1390224145Sdim assert(IntvOut && "Must have register out"); 1391224145Sdim assert(BI.LiveOut && "Must be live-out"); 1392224145Sdim assert((!EnterAfter || EnterAfter < LSP) && "Bad interference"); 1393224145Sdim 1394226633Sdim if (!BI.LiveIn && (!EnterAfter || EnterAfter <= BI.FirstInstr)) { 1395224145Sdim DEBUG(dbgs() << " after interference.\n"); 1396224145Sdim // 1397224145Sdim // >>>> Interference before def. 1398224145Sdim // | o---o---| Defined in block. 1399224145Sdim // ========= Use IntvOut everywhere. 1400224145Sdim // 1401224145Sdim selectIntv(IntvOut); 1402226633Sdim useIntv(BI.FirstInstr, Stop); 1403224145Sdim return; 1404224145Sdim } 1405224145Sdim 1406226633Sdim if (!EnterAfter || EnterAfter < BI.FirstInstr.getBaseIndex()) { 1407224145Sdim DEBUG(dbgs() << ", reload after interference.\n"); 1408224145Sdim // 1409224145Sdim // >>>> Interference before def. 1410224145Sdim // |---o---o---| Live-through, stack-in. 1411224145Sdim // ____========= Enter IntvOut before first use. 1412224145Sdim // 1413224145Sdim selectIntv(IntvOut); 1414226633Sdim SlotIndex Idx = enterIntvBefore(std::min(LSP, BI.FirstInstr)); 1415224145Sdim useIntv(Idx, Stop); 1416224145Sdim assert((!EnterAfter || Idx >= EnterAfter) && "Interference"); 1417224145Sdim return; 1418224145Sdim } 1419224145Sdim 1420224145Sdim // The interference is overlapping somewhere we wanted to use IntvOut. That 1421224145Sdim // means we need to create a local interval that can be allocated a 1422224145Sdim // different register. 1423224145Sdim DEBUG(dbgs() << ", interference overlaps uses.\n"); 1424224145Sdim // 1425224145Sdim // >>>>>>> Interference overlapping uses. 1426224145Sdim // |---o---o---| Live-through, stack-in. 1427224145Sdim // ____---====== Create local interval for interference range. 1428224145Sdim // 1429224145Sdim selectIntv(IntvOut); 1430224145Sdim SlotIndex Idx = enterIntvAfter(EnterAfter); 1431224145Sdim useIntv(Idx, Stop); 1432224145Sdim assert((!EnterAfter || Idx >= EnterAfter) && "Interference"); 1433224145Sdim 1434224145Sdim openIntv(); 1435226633Sdim SlotIndex From = enterIntvBefore(std::min(Idx, BI.FirstInstr)); 1436224145Sdim useIntv(From, Idx); 1437224145Sdim} 1438