AllocationOrder.cpp revision 223017 
1//===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements an allocation order for virtual registers.
11//
12// The preferred allocation order for a virtual register depends on allocation
13// hints and target hooks. The AllocationOrder class encapsulates all of that.
14//
15//===----------------------------------------------------------------------===//
16
17#include "AllocationOrder.h"
18#include "RegisterClassInfo.h"
19#include "VirtRegMap.h"
20#include "llvm/CodeGen/MachineRegisterInfo.h"
21
22using namespace llvm;
23
24// Compare VirtRegMap::getRegAllocPref().
25AllocationOrder::AllocationOrder(unsigned VirtReg,
26                                 const VirtRegMap &VRM,
27                                 const RegisterClassInfo &RegClassInfo)
28  : Begin(0), End(0), Pos(0), RCI(RegClassInfo), OwnedBegin(false) {
29  const TargetRegisterClass *RC = VRM.getRegInfo().getRegClass(VirtReg);
30  std::pair<unsigned, unsigned> HintPair =
31    VRM.getRegInfo().getRegAllocationHint(VirtReg);
32
33  // HintPair.second is a register, phys or virt.
34  Hint = HintPair.second;
35
36  // Translate to physreg, or 0 if not assigned yet.
37  if (TargetRegisterInfo::isVirtualRegister(Hint))
38    Hint = VRM.getPhys(Hint);
39
40  // The first hint pair component indicates a target-specific hint.
41  if (HintPair.first) {
42    const TargetRegisterInfo &TRI = VRM.getTargetRegInfo();
43    // The remaining allocation order may depend on the hint.
44    const unsigned *B, *E;
45    tie(B, E) = TRI.getAllocationOrder(RC, HintPair.first, Hint,
46                                       VRM.getMachineFunction());
47
48    // Empty allocation order?
49    if (B == E)
50      return;
51
52    // Copy the allocation order with reserved registers removed.
53    OwnedBegin = true;
54    unsigned *P = new unsigned[E - B];
55    Begin = P;
56    for (; B != E; ++B)
57      if (!RCI.isReserved(*B))
58        *P++ = *B;
59    End = P;
60
61    // Target-dependent hints require resolution.
62    Hint = TRI.ResolveRegAllocHint(HintPair.first, Hint,
63                                   VRM.getMachineFunction());
64  } else {
65    // If there is no hint or just a normal hint, use the cached allocation
66    // order from RegisterClassInfo.
67    ArrayRef<unsigned> O = RCI.getOrder(RC);
68    Begin = O.begin();
69    End = O.end();
70  }
71
72  // The hint must be a valid physreg for allocation.
73  if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) ||
74               !RC->contains(Hint) || RCI.isReserved(Hint)))
75    Hint = 0;
76}
77
78AllocationOrder::~AllocationOrder() {
79  if (OwnedBegin)
80    delete [] Begin;
81}
82