118334Speter/* Reload pseudo regs into hard regs for insns that require hard regs. 290075Sobrien Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 3169689Skan 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 4169689Skan Free Software Foundation, Inc. 518334Speter 690075SobrienThis file is part of GCC. 718334Speter 890075SobrienGCC is free software; you can redistribute it and/or modify it under 990075Sobrienthe terms of the GNU General Public License as published by the Free 1090075SobrienSoftware Foundation; either version 2, or (at your option) any later 1190075Sobrienversion. 1218334Speter 1390075SobrienGCC is distributed in the hope that it will be useful, but WITHOUT ANY 1490075SobrienWARRANTY; without even the implied warranty of MERCHANTABILITY or 1590075SobrienFITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 1690075Sobrienfor more details. 1718334Speter 1818334SpeterYou should have received a copy of the GNU General Public License 1990075Sobrienalong with GCC; see the file COPYING. If not, write to the Free 20169689SkanSoftware Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 21169689Skan02110-1301, USA. */ 2218334Speter 2318334Speter#include "config.h" 2450397Sobrien#include "system.h" 25132718Skan#include "coretypes.h" 26132718Skan#include "tm.h" 2750397Sobrien 2850397Sobrien#include "machmode.h" 2950397Sobrien#include "hard-reg-set.h" 3018334Speter#include "rtl.h" 3190075Sobrien#include "tm_p.h" 3218334Speter#include "obstack.h" 3318334Speter#include "insn-config.h" 3418334Speter#include "flags.h" 3590075Sobrien#include "function.h" 3618334Speter#include "expr.h" 3790075Sobrien#include "optabs.h" 3818334Speter#include "regs.h" 39169689Skan#include "addresses.h" 4052284Sobrien#include "basic-block.h" 4118334Speter#include "reload.h" 4218334Speter#include "recog.h" 4318334Speter#include "output.h" 4418334Speter#include "real.h" 4550397Sobrien#include "toplev.h" 4690075Sobrien#include "except.h" 4796263Sobrien#include "tree.h" 48169689Skan#include "target.h" 4918334Speter 5018334Speter/* This file contains the reload pass of the compiler, which is 5118334Speter run after register allocation has been done. It checks that 5218334Speter each insn is valid (operands required to be in registers really 5318334Speter are in registers of the proper class) and fixes up invalid ones 5418334Speter by copying values temporarily into registers for the insns 5518334Speter that need them. 5618334Speter 5718334Speter The results of register allocation are described by the vector 5818334Speter reg_renumber; the insns still contain pseudo regs, but reg_renumber 5918334Speter can be used to find which hard reg, if any, a pseudo reg is in. 6018334Speter 6118334Speter The technique we always use is to free up a few hard regs that are 6218334Speter called ``reload regs'', and for each place where a pseudo reg 6318334Speter must be in a hard reg, copy it temporarily into one of the reload regs. 6418334Speter 6552284Sobrien Reload regs are allocated locally for every instruction that needs 6652284Sobrien reloads. When there are pseudos which are allocated to a register that 6752284Sobrien has been chosen as a reload reg, such pseudos must be ``spilled''. 6852284Sobrien This means that they go to other hard regs, or to stack slots if no other 6918334Speter available hard regs can be found. Spilling can invalidate more 7018334Speter insns, requiring additional need for reloads, so we must keep checking 7118334Speter until the process stabilizes. 7218334Speter 7318334Speter For machines with different classes of registers, we must keep track 7418334Speter of the register class needed for each reload, and make sure that 7518334Speter we allocate enough reload registers of each class. 7618334Speter 7718334Speter The file reload.c contains the code that checks one insn for 7818334Speter validity and reports the reloads that it needs. This file 7918334Speter is in charge of scanning the entire rtl code, accumulating the 8018334Speter reload needs, spilling, assigning reload registers to use for 8118334Speter fixing up each insn, and generating the new insns to copy values 8218334Speter into the reload registers. */ 8318334Speter 8418334Speter/* During reload_as_needed, element N contains a REG rtx for the hard reg 8550397Sobrien into which reg N has been reloaded (perhaps for a previous insn). */ 8618334Speterstatic rtx *reg_last_reload_reg; 8718334Speter 8818334Speter/* Elt N nonzero if reg_last_reload_reg[N] has been set in this insn 8918334Speter for an output reload that stores into reg N. */ 90169689Skanstatic regset_head reg_has_output_reload; 9118334Speter 9218334Speter/* Indicates which hard regs are reload-registers for an output reload 9318334Speter in the current insn. */ 9418334Speterstatic HARD_REG_SET reg_is_output_reload; 9518334Speter 9618334Speter/* Element N is the constant value to which pseudo reg N is equivalent, 9718334Speter or zero if pseudo reg N is not equivalent to a constant. 9818334Speter find_reloads looks at this in order to replace pseudo reg N 9918334Speter with the constant it stands for. */ 10018334Speterrtx *reg_equiv_constant; 10118334Speter 102169689Skan/* Element N is an invariant value to which pseudo reg N is equivalent. 103169689Skan eliminate_regs_in_insn uses this to replace pseudos in particular 104169689Skan contexts. */ 105169689Skanrtx *reg_equiv_invariant; 106169689Skan 10718334Speter/* Element N is a memory location to which pseudo reg N is equivalent, 10818334Speter prior to any register elimination (such as frame pointer to stack 10918334Speter pointer). Depending on whether or not it is a valid address, this value 11018334Speter is transferred to either reg_equiv_address or reg_equiv_mem. */ 11118334Speterrtx *reg_equiv_memory_loc; 11218334Speter 113169689Skan/* We allocate reg_equiv_memory_loc inside a varray so that the garbage 114169689Skan collector can keep track of what is inside. */ 115169689SkanVEC(rtx,gc) *reg_equiv_memory_loc_vec; 116169689Skan 11718334Speter/* Element N is the address of stack slot to which pseudo reg N is equivalent. 11818334Speter This is used when the address is not valid as a memory address 11918334Speter (because its displacement is too big for the machine.) */ 12018334Speterrtx *reg_equiv_address; 12118334Speter 12218334Speter/* Element N is the memory slot to which pseudo reg N is equivalent, 12318334Speter or zero if pseudo reg N is not equivalent to a memory slot. */ 12418334Speterrtx *reg_equiv_mem; 12518334Speter 126169689Skan/* Element N is an EXPR_LIST of REG_EQUIVs containing MEMs with 127169689Skan alternate representations of the location of pseudo reg N. */ 128169689Skanrtx *reg_equiv_alt_mem_list; 129169689Skan 13018334Speter/* Widest width in which each pseudo reg is referred to (via subreg). */ 13190075Sobrienstatic unsigned int *reg_max_ref_width; 13218334Speter 13352284Sobrien/* Element N is the list of insns that initialized reg N from its equivalent 13418334Speter constant or memory slot. */ 135169689Skanrtx *reg_equiv_init; 136169689Skanint reg_equiv_init_size; 13718334Speter 13852284Sobrien/* Vector to remember old contents of reg_renumber before spilling. */ 13952284Sobrienstatic short *reg_old_renumber; 14052284Sobrien 14150397Sobrien/* During reload_as_needed, element N contains the last pseudo regno reloaded 14252284Sobrien into hard register N. If that pseudo reg occupied more than one register, 14318334Speter reg_reloaded_contents points to that pseudo for each spill register in 14418334Speter use; all of these must remain set for an inheritance to occur. */ 14518334Speterstatic int reg_reloaded_contents[FIRST_PSEUDO_REGISTER]; 14618334Speter 14718334Speter/* During reload_as_needed, element N contains the insn for which 14850397Sobrien hard register N was last used. Its contents are significant only 14950397Sobrien when reg_reloaded_valid is set for this register. */ 15018334Speterstatic rtx reg_reloaded_insn[FIRST_PSEUDO_REGISTER]; 15118334Speter 152117395Skan/* Indicate if reg_reloaded_insn / reg_reloaded_contents is valid. */ 15350397Sobrienstatic HARD_REG_SET reg_reloaded_valid; 15450397Sobrien/* Indicate if the register was dead at the end of the reload. 15550397Sobrien This is only valid if reg_reloaded_contents is set and valid. */ 15650397Sobrienstatic HARD_REG_SET reg_reloaded_dead; 15750397Sobrien 158132718Skan/* Indicate whether the register's current value is one that is not 159132718Skan safe to retain across a call, even for registers that are normally 160132718Skan call-saved. */ 161132718Skanstatic HARD_REG_SET reg_reloaded_call_part_clobbered; 162132718Skan 16318334Speter/* Number of spill-regs so far; number of valid elements of spill_regs. */ 16418334Speterstatic int n_spills; 16518334Speter 16618334Speter/* In parallel with spill_regs, contains REG rtx's for those regs. 16718334Speter Holds the last rtx used for any given reg, or 0 if it has never 16818334Speter been used for spilling yet. This rtx is reused, provided it has 16918334Speter the proper mode. */ 17018334Speterstatic rtx spill_reg_rtx[FIRST_PSEUDO_REGISTER]; 17118334Speter 17218334Speter/* In parallel with spill_regs, contains nonzero for a spill reg 17318334Speter that was stored after the last time it was used. 17418334Speter The precise value is the insn generated to do the store. */ 17518334Speterstatic rtx spill_reg_store[FIRST_PSEUDO_REGISTER]; 17618334Speter 17752284Sobrien/* This is the register that was stored with spill_reg_store. This is a 17852284Sobrien copy of reload_out / reload_out_reg when the value was stored; if 17952284Sobrien reload_out is a MEM, spill_reg_stored_to will be set to reload_out_reg. */ 18052284Sobrienstatic rtx spill_reg_stored_to[FIRST_PSEUDO_REGISTER]; 18152284Sobrien 18218334Speter/* This table is the inverse mapping of spill_regs: 18318334Speter indexed by hard reg number, 18418334Speter it contains the position of that reg in spill_regs, 18590075Sobrien or -1 for something that is not in spill_regs. 18652284Sobrien 18752284Sobrien ?!? This is no longer accurate. */ 18818334Speterstatic short spill_reg_order[FIRST_PSEUDO_REGISTER]; 18918334Speter 19052284Sobrien/* This reg set indicates registers that can't be used as spill registers for 19152284Sobrien the currently processed insn. These are the hard registers which are live 19252284Sobrien during the insn, but not allocated to pseudos, as well as fixed 19352284Sobrien registers. */ 19452284Sobrienstatic HARD_REG_SET bad_spill_regs; 19518334Speter 19652284Sobrien/* These are the hard registers that can't be used as spill register for any 19752284Sobrien insn. This includes registers used for user variables and registers that 19852284Sobrien we can't eliminate. A register that appears in this set also can't be used 19952284Sobrien to retry register allocation. */ 20052284Sobrienstatic HARD_REG_SET bad_spill_regs_global; 20118334Speter 20252284Sobrien/* Describes order of use of registers for reloading 20352284Sobrien of spilled pseudo-registers. `n_spills' is the number of 20452284Sobrien elements that are actually valid; new ones are added at the end. 20518334Speter 20652284Sobrien Both spill_regs and spill_reg_order are used on two occasions: 20752284Sobrien once during find_reload_regs, where they keep track of the spill registers 20852284Sobrien for a single insn, but also during reload_as_needed where they show all 20952284Sobrien the registers ever used by reload. For the latter case, the information 21052284Sobrien is calculated during finish_spills. */ 21118334Speterstatic short spill_regs[FIRST_PSEUDO_REGISTER]; 21218334Speter 21352284Sobrien/* This vector of reg sets indicates, for each pseudo, which hard registers 21452284Sobrien may not be used for retrying global allocation because the register was 21552284Sobrien formerly spilled from one of them. If we allowed reallocating a pseudo to 21652284Sobrien a register that it was already allocated to, reload might not 21752284Sobrien terminate. */ 21852284Sobrienstatic HARD_REG_SET *pseudo_previous_regs; 21950397Sobrien 22052284Sobrien/* This vector of reg sets indicates, for each pseudo, which hard 22152284Sobrien registers may not be used for retrying global allocation because they 22252284Sobrien are used as spill registers during one of the insns in which the 22352284Sobrien pseudo is live. */ 22452284Sobrienstatic HARD_REG_SET *pseudo_forbidden_regs; 22550397Sobrien 22652284Sobrien/* All hard regs that have been used as spill registers for any insn are 22752284Sobrien marked in this set. */ 22852284Sobrienstatic HARD_REG_SET used_spill_regs; 22952284Sobrien 23018334Speter/* Index of last register assigned as a spill register. We allocate in 23118334Speter a round-robin fashion. */ 23218334Speterstatic int last_spill_reg; 23318334Speter 23418334Speter/* Nonzero if indirect addressing is supported on the machine; this means 23518334Speter that spilling (REG n) does not require reloading it into a register in 23618334Speter order to do (MEM (REG n)) or (MEM (PLUS (REG n) (CONST_INT c))). The 23718334Speter value indicates the level of indirect addressing supported, e.g., two 23818334Speter means that (MEM (MEM (REG n))) is also valid if (REG n) does not get 23918334Speter a hard register. */ 24018334Speterstatic char spill_indirect_levels; 24118334Speter 24218334Speter/* Nonzero if indirect addressing is supported when the innermost MEM is 24318334Speter of the form (MEM (SYMBOL_REF sym)). It is assumed that the level to 24490075Sobrien which these are valid is the same as spill_indirect_levels, above. */ 24518334Speterchar indirect_symref_ok; 24618334Speter 24718334Speter/* Nonzero if an address (plus (reg frame_pointer) (reg ...)) is valid. */ 24818334Speterchar double_reg_address_ok; 24918334Speter 25018334Speter/* Record the stack slot for each spilled hard register. */ 25118334Speterstatic rtx spill_stack_slot[FIRST_PSEUDO_REGISTER]; 25218334Speter 25318334Speter/* Width allocated so far for that stack slot. */ 25490075Sobrienstatic unsigned int spill_stack_slot_width[FIRST_PSEUDO_REGISTER]; 25518334Speter 25652284Sobrien/* Record which pseudos needed to be spilled. */ 25790075Sobrienstatic regset_head spilled_pseudos; 25818334Speter 25990075Sobrien/* Used for communication between order_regs_for_reload and count_pseudo. 26090075Sobrien Used to avoid counting one pseudo twice. */ 26190075Sobrienstatic regset_head pseudos_counted; 26290075Sobrien 26318334Speter/* First uid used by insns created by reload in this function. 26418334Speter Used in find_equiv_reg. */ 26518334Speterint reload_first_uid; 26618334Speter 26718334Speter/* Flag set by local-alloc or global-alloc if anything is live in 26818334Speter a call-clobbered reg across calls. */ 26918334Speterint caller_save_needed; 27018334Speter 27118334Speter/* Set to 1 while reload_as_needed is operating. 27218334Speter Required by some machines to handle any generated moves differently. */ 27318334Speterint reload_in_progress = 0; 27418334Speter 27518334Speter/* These arrays record the insn_code of insns that may be needed to 27618334Speter perform input and output reloads of special objects. They provide a 27718334Speter place to pass a scratch register. */ 27818334Speterenum insn_code reload_in_optab[NUM_MACHINE_MODES]; 27918334Speterenum insn_code reload_out_optab[NUM_MACHINE_MODES]; 28018334Speter 28118334Speter/* This obstack is used for allocation of rtl during register elimination. 28218334Speter The allocated storage can be freed once find_reloads has processed the 28318334Speter insn. */ 284169689Skanstatic struct obstack reload_obstack; 28518334Speter 28652284Sobrien/* Points to the beginning of the reload_obstack. All insn_chain structures 28752284Sobrien are allocated first. */ 288169689Skanstatic char *reload_startobj; 28952284Sobrien 29052284Sobrien/* The point after all insn_chain structures. Used to quickly deallocate 29190075Sobrien memory allocated in copy_reloads during calculate_needs_all_insns. */ 292169689Skanstatic char *reload_firstobj; 29318334Speter 29490075Sobrien/* This points before all local rtl generated by register elimination. 29590075Sobrien Used to quickly free all memory after processing one insn. */ 29690075Sobrienstatic char *reload_insn_firstobj; 29790075Sobrien 29852284Sobrien/* List of insn_chain instructions, one for every insn that reload needs to 29952284Sobrien examine. */ 30052284Sobrienstruct insn_chain *reload_insn_chain; 30152284Sobrien 30252284Sobrien/* List of all insns needing reloads. */ 30352284Sobrienstatic struct insn_chain *insns_need_reload; 30418334Speter 30518334Speter/* This structure is used to record information about register eliminations. 30618334Speter Each array entry describes one possible way of eliminating a register 30718334Speter in favor of another. If there is more than one way of eliminating a 30818334Speter particular register, the most preferred should be specified first. */ 30918334Speter 31052284Sobrienstruct elim_table 31118334Speter{ 31250397Sobrien int from; /* Register number to be eliminated. */ 31350397Sobrien int to; /* Register number used as replacement. */ 314132718Skan HOST_WIDE_INT initial_offset; /* Initial difference between values. */ 315132718Skan int can_eliminate; /* Nonzero if this elimination can be done. */ 31618334Speter int can_eliminate_previous; /* Value of CAN_ELIMINATE in previous scan over 31750397Sobrien insns made by reload. */ 318132718Skan HOST_WIDE_INT offset; /* Current offset between the two regs. */ 319132718Skan HOST_WIDE_INT previous_offset;/* Offset at end of previous insn. */ 32050397Sobrien int ref_outside_mem; /* "to" has been referenced outside a MEM. */ 32118334Speter rtx from_rtx; /* REG rtx for the register to be eliminated. 32218334Speter We cannot simply compare the number since 32318334Speter we might then spuriously replace a hard 32418334Speter register corresponding to a pseudo 32550397Sobrien assigned to the reg to be eliminated. */ 32650397Sobrien rtx to_rtx; /* REG rtx for the replacement. */ 32752284Sobrien}; 32818334Speter 32990075Sobrienstatic struct elim_table *reg_eliminate = 0; 33052284Sobrien 33152284Sobrien/* This is an intermediate structure to initialize the table. It has 33290075Sobrien exactly the members provided by ELIMINABLE_REGS. */ 33390075Sobrienstatic const struct elim_table_1 33452284Sobrien{ 33590075Sobrien const int from; 33690075Sobrien const int to; 33752284Sobrien} reg_eliminate_1[] = 33852284Sobrien 33918334Speter/* If a set of eliminable registers was specified, define the table from it. 34018334Speter Otherwise, default to the normal case of the frame pointer being 34118334Speter replaced by the stack pointer. */ 34218334Speter 34318334Speter#ifdef ELIMINABLE_REGS 34418334Speter ELIMINABLE_REGS; 34518334Speter#else 34618334Speter {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}; 34718334Speter#endif 34818334Speter 34990075Sobrien#define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1) 35018334Speter 35118334Speter/* Record the number of pending eliminations that have an offset not equal 352117395Skan to their initial offset. If nonzero, we use a new copy of each 35318334Speter replacement result in any insns encountered. */ 35452284Sobrienint num_not_at_initial_offset; 35518334Speter 35618334Speter/* Count the number of registers that we may be able to eliminate. */ 35718334Speterstatic int num_eliminable; 35852284Sobrien/* And the number of registers that are equivalent to a constant that 35952284Sobrien can be eliminated to frame_pointer / arg_pointer + constant. */ 36052284Sobrienstatic int num_eliminable_invariants; 36118334Speter 36218334Speter/* For each label, we record the offset of each elimination. If we reach 36318334Speter a label by more than one path and an offset differs, we cannot do the 364117395Skan elimination. This information is indexed by the difference of the 365117395Skan number of the label and the first label number. We can't offset the 366117395Skan pointer itself as this can cause problems on machines with segmented 367117395Skan memory. The first table is an array of flags that records whether we 368117395Skan have yet encountered a label and the second table is an array of arrays, 369117395Skan one entry in the latter array for each elimination. */ 37018334Speter 371117395Skanstatic int first_label_num; 37218334Speterstatic char *offsets_known_at; 373132718Skanstatic HOST_WIDE_INT (*offsets_at)[NUM_ELIMINABLE_REGS]; 37418334Speter 37518334Speter/* Number of labels in the current function. */ 37618334Speter 37718334Speterstatic int num_labels; 37818334Speter 379132718Skanstatic void replace_pseudos_in (rtx *, enum machine_mode, rtx); 380132718Skanstatic void maybe_fix_stack_asms (void); 381132718Skanstatic void copy_reloads (struct insn_chain *); 382132718Skanstatic void calculate_needs_all_insns (int); 383132718Skanstatic int find_reg (struct insn_chain *, int); 384132718Skanstatic void find_reload_regs (struct insn_chain *); 385132718Skanstatic void select_reload_regs (void); 386132718Skanstatic void delete_caller_save_insns (void); 38752284Sobrien 388132718Skanstatic void spill_failure (rtx, enum reg_class); 389132718Skanstatic void count_spilled_pseudo (int, int, int); 390132718Skanstatic void delete_dead_insn (rtx); 391132718Skanstatic void alter_reg (int, int); 392132718Skanstatic void set_label_offsets (rtx, rtx, int); 393132718Skanstatic void check_eliminable_occurrences (rtx); 394132718Skanstatic void elimination_effects (rtx, enum machine_mode); 395132718Skanstatic int eliminate_regs_in_insn (rtx, int); 396132718Skanstatic void update_eliminable_offsets (void); 397132718Skanstatic void mark_not_eliminable (rtx, rtx, void *); 398132718Skanstatic void set_initial_elim_offsets (void); 399169689Skanstatic bool verify_initial_elim_offsets (void); 400132718Skanstatic void set_initial_label_offsets (void); 401132718Skanstatic void set_offsets_for_label (rtx); 402132718Skanstatic void init_elim_table (void); 403132718Skanstatic void update_eliminables (HARD_REG_SET *); 404132718Skanstatic void spill_hard_reg (unsigned int, int); 405132718Skanstatic int finish_spills (int); 406132718Skanstatic void scan_paradoxical_subregs (rtx); 407132718Skanstatic void count_pseudo (int); 408132718Skanstatic void order_regs_for_reload (struct insn_chain *); 409132718Skanstatic void reload_as_needed (int); 410132718Skanstatic void forget_old_reloads_1 (rtx, rtx, void *); 411169689Skanstatic void forget_marked_reloads (regset); 412132718Skanstatic int reload_reg_class_lower (const void *, const void *); 413132718Skanstatic void mark_reload_reg_in_use (unsigned int, int, enum reload_type, 414132718Skan enum machine_mode); 415132718Skanstatic void clear_reload_reg_in_use (unsigned int, int, enum reload_type, 416132718Skan enum machine_mode); 417132718Skanstatic int reload_reg_free_p (unsigned int, int, enum reload_type); 418132718Skanstatic int reload_reg_free_for_value_p (int, int, int, enum reload_type, 419132718Skan rtx, rtx, int, int); 420132718Skanstatic int free_for_value_p (int, enum machine_mode, int, enum reload_type, 421132718Skan rtx, rtx, int, int); 422132718Skanstatic int reload_reg_reaches_end_p (unsigned int, int, enum reload_type); 423132718Skanstatic int allocate_reload_reg (struct insn_chain *, int, int); 424132718Skanstatic int conflicts_with_override (rtx); 425132718Skanstatic void failed_reload (rtx, int); 426132718Skanstatic int set_reload_reg (int, int); 427132718Skanstatic void choose_reload_regs_init (struct insn_chain *, rtx *); 428132718Skanstatic void choose_reload_regs (struct insn_chain *); 429132718Skanstatic void merge_assigned_reloads (rtx); 430132718Skanstatic void emit_input_reload_insns (struct insn_chain *, struct reload *, 431132718Skan rtx, int); 432132718Skanstatic void emit_output_reload_insns (struct insn_chain *, struct reload *, 433132718Skan int); 434132718Skanstatic void do_input_reload (struct insn_chain *, struct reload *, int); 435132718Skanstatic void do_output_reload (struct insn_chain *, struct reload *, int); 436169689Skanstatic bool inherit_piecemeal_p (int, int); 437132718Skanstatic void emit_reload_insns (struct insn_chain *); 438132718Skanstatic void delete_output_reload (rtx, int, int); 439132718Skanstatic void delete_address_reloads (rtx, rtx); 440132718Skanstatic void delete_address_reloads_1 (rtx, rtx, rtx); 441132718Skanstatic rtx inc_for_reload (rtx, rtx, rtx, int); 44252284Sobrien#ifdef AUTO_INC_DEC 443132718Skanstatic void add_auto_inc_notes (rtx, rtx); 44452284Sobrien#endif 445132718Skanstatic void copy_eh_notes (rtx, rtx); 446169689Skanstatic int reloads_conflict (int, int); 447169689Skanstatic rtx gen_reload (rtx, rtx, int, enum reload_type); 448169689Skanstatic rtx emit_insn_if_valid_for_reload (rtx); 44918334Speter 45018334Speter/* Initialize the reload pass once per compilation. */ 45118334Speter 45218334Spetervoid 453132718Skaninit_reload (void) 45418334Speter{ 45590075Sobrien int i; 45618334Speter 45718334Speter /* Often (MEM (REG n)) is still valid even if (REG n) is put on the stack. 45818334Speter Set spill_indirect_levels to the number of levels such addressing is 45918334Speter permitted, zero if it is not permitted at all. */ 46018334Speter 46190075Sobrien rtx tem 46250397Sobrien = gen_rtx_MEM (Pmode, 46350397Sobrien gen_rtx_PLUS (Pmode, 46490075Sobrien gen_rtx_REG (Pmode, 46590075Sobrien LAST_VIRTUAL_REGISTER + 1), 46650397Sobrien GEN_INT (4))); 46718334Speter spill_indirect_levels = 0; 46818334Speter 46918334Speter while (memory_address_p (QImode, tem)) 47018334Speter { 47118334Speter spill_indirect_levels++; 47250397Sobrien tem = gen_rtx_MEM (Pmode, tem); 47318334Speter } 47418334Speter 47518334Speter /* See if indirect addressing is valid for (MEM (SYMBOL_REF ...)). */ 47618334Speter 47750397Sobrien tem = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (Pmode, "foo")); 47818334Speter indirect_symref_ok = memory_address_p (QImode, tem); 47918334Speter 48018334Speter /* See if reg+reg is a valid (and offsettable) address. */ 48118334Speter 48218334Speter for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 48318334Speter { 48450397Sobrien tem = gen_rtx_PLUS (Pmode, 48550397Sobrien gen_rtx_REG (Pmode, HARD_FRAME_POINTER_REGNUM), 48650397Sobrien gen_rtx_REG (Pmode, i)); 48790075Sobrien 48818334Speter /* This way, we make sure that reg+reg is an offsettable address. */ 48918334Speter tem = plus_constant (tem, 4); 49018334Speter 49118334Speter if (memory_address_p (QImode, tem)) 49218334Speter { 49318334Speter double_reg_address_ok = 1; 49418334Speter break; 49518334Speter } 49618334Speter } 49718334Speter 49850397Sobrien /* Initialize obstack for our rtl allocation. */ 49918334Speter gcc_obstack_init (&reload_obstack); 500132718Skan reload_startobj = obstack_alloc (&reload_obstack, 0); 50190075Sobrien 50290075Sobrien INIT_REG_SET (&spilled_pseudos); 50390075Sobrien INIT_REG_SET (&pseudos_counted); 50452284Sobrien} 50550397Sobrien 50652284Sobrien/* List of insn chains that are currently unused. */ 50752284Sobrienstatic struct insn_chain *unused_insn_chains = 0; 50850397Sobrien 50952284Sobrien/* Allocate an empty insn_chain structure. */ 51052284Sobrienstruct insn_chain * 511132718Skannew_insn_chain (void) 51252284Sobrien{ 51352284Sobrien struct insn_chain *c; 51450397Sobrien 51552284Sobrien if (unused_insn_chains == 0) 51652284Sobrien { 517132718Skan c = obstack_alloc (&reload_obstack, sizeof (struct insn_chain)); 51890075Sobrien INIT_REG_SET (&c->live_throughout); 51990075Sobrien INIT_REG_SET (&c->dead_or_set); 52050397Sobrien } 52152284Sobrien else 52252284Sobrien { 52352284Sobrien c = unused_insn_chains; 52452284Sobrien unused_insn_chains = c->next; 52552284Sobrien } 52652284Sobrien c->is_caller_save_insn = 0; 52752284Sobrien c->need_operand_change = 0; 52852284Sobrien c->need_reload = 0; 52952284Sobrien c->need_elim = 0; 53052284Sobrien return c; 53118334Speter} 53218334Speter 53352284Sobrien/* Small utility function to set all regs in hard reg set TO which are 53452284Sobrien allocated to pseudos in regset FROM. */ 53590075Sobrien 53652284Sobrienvoid 537132718Skancompute_use_by_pseudos (HARD_REG_SET *to, regset from) 53852284Sobrien{ 53990075Sobrien unsigned int regno; 540169689Skan reg_set_iterator rsi; 54190075Sobrien 542169689Skan EXECUTE_IF_SET_IN_REG_SET (from, FIRST_PSEUDO_REGISTER, regno, rsi) 543169689Skan { 544169689Skan int r = reg_renumber[regno]; 545169689Skan int nregs; 54690075Sobrien 547169689Skan if (r < 0) 548169689Skan { 549169689Skan /* reload_combine uses the information from 550169689Skan BASIC_BLOCK->global_live_at_start, which might still 551169689Skan contain registers that have not actually been allocated 552169689Skan since they have an equivalence. */ 553169689Skan gcc_assert (reload_completed); 554169689Skan } 555169689Skan else 556169689Skan { 557169689Skan nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)]; 558169689Skan while (nregs-- > 0) 559169689Skan SET_HARD_REG_BIT (*to, r + nregs); 560169689Skan } 561169689Skan } 56252284Sobrien} 56390075Sobrien 56490075Sobrien/* Replace all pseudos found in LOC with their corresponding 56590075Sobrien equivalences. */ 56690075Sobrien 56790075Sobrienstatic void 568132718Skanreplace_pseudos_in (rtx *loc, enum machine_mode mem_mode, rtx usage) 56990075Sobrien{ 57090075Sobrien rtx x = *loc; 57190075Sobrien enum rtx_code code; 57290075Sobrien const char *fmt; 57390075Sobrien int i, j; 57490075Sobrien 57590075Sobrien if (! x) 57690075Sobrien return; 57790075Sobrien 57890075Sobrien code = GET_CODE (x); 57990075Sobrien if (code == REG) 58090075Sobrien { 58190075Sobrien unsigned int regno = REGNO (x); 58290075Sobrien 58390075Sobrien if (regno < FIRST_PSEUDO_REGISTER) 58490075Sobrien return; 58590075Sobrien 58690075Sobrien x = eliminate_regs (x, mem_mode, usage); 58790075Sobrien if (x != *loc) 58890075Sobrien { 58990075Sobrien *loc = x; 590132718Skan replace_pseudos_in (loc, mem_mode, usage); 59190075Sobrien return; 59290075Sobrien } 59390075Sobrien 59490075Sobrien if (reg_equiv_constant[regno]) 59590075Sobrien *loc = reg_equiv_constant[regno]; 59690075Sobrien else if (reg_equiv_mem[regno]) 59790075Sobrien *loc = reg_equiv_mem[regno]; 59890075Sobrien else if (reg_equiv_address[regno]) 59990075Sobrien *loc = gen_rtx_MEM (GET_MODE (x), reg_equiv_address[regno]); 60090075Sobrien else 601169689Skan { 602169689Skan gcc_assert (!REG_P (regno_reg_rtx[regno]) 603169689Skan || REGNO (regno_reg_rtx[regno]) != regno); 604169689Skan *loc = regno_reg_rtx[regno]; 605169689Skan } 60690075Sobrien 60790075Sobrien return; 60890075Sobrien } 60990075Sobrien else if (code == MEM) 61090075Sobrien { 611132718Skan replace_pseudos_in (& XEXP (x, 0), GET_MODE (x), usage); 61290075Sobrien return; 61390075Sobrien } 61490075Sobrien 61590075Sobrien /* Process each of our operands recursively. */ 61690075Sobrien fmt = GET_RTX_FORMAT (code); 61790075Sobrien for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) 61890075Sobrien if (*fmt == 'e') 619132718Skan replace_pseudos_in (&XEXP (x, i), mem_mode, usage); 62090075Sobrien else if (*fmt == 'E') 62190075Sobrien for (j = 0; j < XVECLEN (x, i); j++) 622132718Skan replace_pseudos_in (& XVECEXP (x, i, j), mem_mode, usage); 62390075Sobrien} 62490075Sobrien 62552284Sobrien 62652284Sobrien/* Global variables used by reload and its subroutines. */ 62752284Sobrien 62852284Sobrien/* Set during calculate_needs if an insn needs register elimination. */ 62952284Sobrienstatic int something_needs_elimination; 63052284Sobrien/* Set during calculate_needs if an insn needs an operand changed. */ 631169689Skanstatic int something_needs_operands_changed; 63252284Sobrien 63352284Sobrien/* Nonzero means we couldn't get enough spill regs. */ 63452284Sobrienstatic int failure; 63552284Sobrien 63618334Speter/* Main entry point for the reload pass. 63718334Speter 63818334Speter FIRST is the first insn of the function being compiled. 63918334Speter 64018334Speter GLOBAL nonzero means we were called from global_alloc 64118334Speter and should attempt to reallocate any pseudoregs that we 64218334Speter displace from hard regs we will use for reloads. 64318334Speter If GLOBAL is zero, we do not have enough information to do that, 64418334Speter so any pseudo reg that is spilled must go to the stack. 64518334Speter 64618334Speter Return value is nonzero if reload failed 64718334Speter and we must not do any more for this function. */ 64818334Speter 64918334Speterint 650132718Skanreload (rtx first, int global) 65118334Speter{ 65290075Sobrien int i; 65390075Sobrien rtx insn; 65490075Sobrien struct elim_table *ep; 655117395Skan basic_block bb; 65618334Speter 65752284Sobrien /* Make sure even insns with volatile mem refs are recognizable. */ 65852284Sobrien init_recog (); 65918334Speter 66052284Sobrien failure = 0; 66118334Speter 662132718Skan reload_firstobj = obstack_alloc (&reload_obstack, 0); 66318334Speter 66452284Sobrien /* Make sure that the last insn in the chain 66552284Sobrien is not something that needs reloading. */ 666132718Skan emit_note (NOTE_INSN_DELETED); 66718334Speter 66818334Speter /* Enable find_equiv_reg to distinguish insns made by reload. */ 66918334Speter reload_first_uid = get_max_uid (); 67018334Speter 67118334Speter#ifdef SECONDARY_MEMORY_NEEDED 67218334Speter /* Initialize the secondary memory table. */ 67318334Speter clear_secondary_mem (); 67418334Speter#endif 67518334Speter 67618334Speter /* We don't have a stack slot for any spill reg yet. */ 677132718Skan memset (spill_stack_slot, 0, sizeof spill_stack_slot); 678132718Skan memset (spill_stack_slot_width, 0, sizeof spill_stack_slot_width); 67918334Speter 68018334Speter /* Initialize the save area information for caller-save, in case some 68118334Speter are needed. */ 68218334Speter init_save_areas (); 68318334Speter 68418334Speter /* Compute which hard registers are now in use 68518334Speter as homes for pseudo registers. 68618334Speter This is done here rather than (eg) in global_alloc 68718334Speter because this point is reached even if not optimizing. */ 68818334Speter for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 68918334Speter mark_home_live (i); 69018334Speter 69150397Sobrien /* A function that receives a nonlocal goto must save all call-saved 69250397Sobrien registers. */ 69350397Sobrien if (current_function_has_nonlocal_label) 69450397Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 69590075Sobrien if (! call_used_regs[i] && ! fixed_regs[i] && ! LOCAL_REGNO (i)) 69690075Sobrien regs_ever_live[i] = 1; 69750397Sobrien 69818334Speter /* Find all the pseudo registers that didn't get hard regs 69918334Speter but do have known equivalent constants or memory slots. 70018334Speter These include parameters (known equivalent to parameter slots) 70118334Speter and cse'd or loop-moved constant memory addresses. 70218334Speter 70318334Speter Record constant equivalents in reg_equiv_constant 70418334Speter so they will be substituted by find_reloads. 70518334Speter Record memory equivalents in reg_mem_equiv so they can 70618334Speter be substituted eventually by altering the REG-rtx's. */ 70718334Speter 708169689Skan reg_equiv_constant = XCNEWVEC (rtx, max_regno); 709169689Skan reg_equiv_invariant = XCNEWVEC (rtx, max_regno); 710169689Skan reg_equiv_mem = XCNEWVEC (rtx, max_regno); 711169689Skan reg_equiv_alt_mem_list = XCNEWVEC (rtx, max_regno); 712169689Skan reg_equiv_address = XCNEWVEC (rtx, max_regno); 713169689Skan reg_max_ref_width = XCNEWVEC (unsigned int, max_regno); 714169689Skan reg_old_renumber = XCNEWVEC (short, max_regno); 71590075Sobrien memcpy (reg_old_renumber, reg_renumber, max_regno * sizeof (short)); 716169689Skan pseudo_forbidden_regs = XNEWVEC (HARD_REG_SET, max_regno); 717169689Skan pseudo_previous_regs = XCNEWVEC (HARD_REG_SET, max_regno); 71818334Speter 71952284Sobrien CLEAR_HARD_REG_SET (bad_spill_regs_global); 72018334Speter 721169689Skan /* Look for REG_EQUIV notes; record what each pseudo is equivalent 722169689Skan to. Also find all paradoxical subregs and find largest such for 723169689Skan each pseudo. */ 72418334Speter 72552284Sobrien num_eliminable_invariants = 0; 72618334Speter for (insn = first; insn; insn = NEXT_INSN (insn)) 72718334Speter { 72818334Speter rtx set = single_set (insn); 72918334Speter 73090075Sobrien /* We may introduce USEs that we want to remove at the end, so 73190075Sobrien we'll mark them with QImode. Make sure there are no 73290075Sobrien previously-marked insns left by say regmove. */ 73390075Sobrien if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE 73490075Sobrien && GET_MODE (insn) != VOIDmode) 73590075Sobrien PUT_MODE (insn, VOIDmode); 73690075Sobrien 737169689Skan if (INSN_P (insn)) 738169689Skan scan_paradoxical_subregs (PATTERN (insn)); 739169689Skan 740169689Skan if (set != 0 && REG_P (SET_DEST (set))) 74118334Speter { 74218334Speter rtx note = find_reg_note (insn, REG_EQUIV, NULL_RTX); 743169689Skan rtx x; 744169689Skan 745169689Skan if (! note) 746169689Skan continue; 747169689Skan 748169689Skan i = REGNO (SET_DEST (set)); 749169689Skan x = XEXP (note, 0); 750169689Skan 751169689Skan if (i <= LAST_VIRTUAL_REGISTER) 752169689Skan continue; 753169689Skan 754169689Skan if (! function_invariant_p (x) 755169689Skan || ! flag_pic 756169689Skan /* A function invariant is often CONSTANT_P but may 757169689Skan include a register. We promise to only pass 758169689Skan CONSTANT_P objects to LEGITIMATE_PIC_OPERAND_P. */ 759169689Skan || (CONSTANT_P (x) 760169689Skan && LEGITIMATE_PIC_OPERAND_P (x))) 76118334Speter { 762169689Skan /* It can happen that a REG_EQUIV note contains a MEM 763169689Skan that is not a legitimate memory operand. As later 764169689Skan stages of reload assume that all addresses found 765169689Skan in the reg_equiv_* arrays were originally legitimate, 766169689Skan we ignore such REG_EQUIV notes. */ 767169689Skan if (memory_operand (x, VOIDmode)) 76818334Speter { 769169689Skan /* Always unshare the equivalence, so we can 770169689Skan substitute into this insn without touching the 771169689Skan equivalence. */ 772169689Skan reg_equiv_memory_loc[i] = copy_rtx (x); 773169689Skan } 774169689Skan else if (function_invariant_p (x)) 775169689Skan { 776169689Skan if (GET_CODE (x) == PLUS) 77750397Sobrien { 778169689Skan /* This is PLUS of frame pointer and a constant, 779169689Skan and might be shared. Unshare it. */ 780169689Skan reg_equiv_invariant[i] = copy_rtx (x); 781169689Skan num_eliminable_invariants++; 78250397Sobrien } 783169689Skan else if (x == frame_pointer_rtx || x == arg_pointer_rtx) 78418334Speter { 785169689Skan reg_equiv_invariant[i] = x; 786169689Skan num_eliminable_invariants++; 78718334Speter } 788169689Skan else if (LEGITIMATE_CONSTANT_P (x)) 789169689Skan reg_equiv_constant[i] = x; 79018334Speter else 791169689Skan { 792169689Skan reg_equiv_memory_loc[i] 793169689Skan = force_const_mem (GET_MODE (SET_DEST (set)), x); 794169689Skan if (! reg_equiv_memory_loc[i]) 795169689Skan reg_equiv_init[i] = NULL_RTX; 796169689Skan } 79718334Speter } 798169689Skan else 799169689Skan { 800169689Skan reg_equiv_init[i] = NULL_RTX; 801169689Skan continue; 802169689Skan } 80318334Speter } 804169689Skan else 805169689Skan reg_equiv_init[i] = NULL_RTX; 80618334Speter } 807169689Skan } 80818334Speter 809169689Skan if (dump_file) 810169689Skan for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 811169689Skan if (reg_equiv_init[i]) 812169689Skan { 813169689Skan fprintf (dump_file, "init_insns for %u: ", i); 814169689Skan print_inline_rtx (dump_file, reg_equiv_init[i], 20); 815169689Skan fprintf (dump_file, "\n"); 816169689Skan } 81718334Speter 81852284Sobrien init_elim_table (); 81918334Speter 820117395Skan first_label_num = get_first_label_num (); 821117395Skan num_labels = max_label_num () - first_label_num; 82218334Speter 82318334Speter /* Allocate the tables used to store offset information at labels. */ 82450397Sobrien /* We used to use alloca here, but the size of what it would try to 82550397Sobrien allocate would occasionally cause it to exceed the stack limit and 82650397Sobrien cause a core dump. */ 827169689Skan offsets_known_at = XNEWVEC (char, num_labels); 828169689Skan offsets_at = (HOST_WIDE_INT (*)[NUM_ELIMINABLE_REGS]) xmalloc (num_labels * NUM_ELIMINABLE_REGS * sizeof (HOST_WIDE_INT)); 82918334Speter 83018334Speter /* Alter each pseudo-reg rtx to contain its hard reg number. 83118334Speter Assign stack slots to the pseudos that lack hard regs or equivalents. 83218334Speter Do not touch virtual registers. */ 83318334Speter 83418334Speter for (i = LAST_VIRTUAL_REGISTER + 1; i < max_regno; i++) 83518334Speter alter_reg (i, -1); 83618334Speter 83718334Speter /* If we have some registers we think can be eliminated, scan all insns to 83818334Speter see if there is an insn that sets one of these registers to something 83918334Speter other than itself plus a constant. If so, the register cannot be 84018334Speter eliminated. Doing this scan here eliminates an extra pass through the 84118334Speter main reload loop in the most common case where register elimination 84218334Speter cannot be done. */ 84318334Speter for (insn = first; insn && num_eliminable; insn = NEXT_INSN (insn)) 844169689Skan if (INSN_P (insn)) 84590075Sobrien note_stores (PATTERN (insn), mark_not_eliminable, NULL); 84618334Speter 84752284Sobrien maybe_fix_stack_asms (); 84818334Speter 84952284Sobrien insns_need_reload = 0; 85052284Sobrien something_needs_elimination = 0; 85190075Sobrien 85218334Speter /* Initialize to -1, which means take the first spill register. */ 85318334Speter last_spill_reg = -1; 85418334Speter 85518334Speter /* Spill any hard regs that we know we can't eliminate. */ 85652284Sobrien CLEAR_HARD_REG_SET (used_spill_regs); 857169689Skan /* There can be multiple ways to eliminate a register; 858169689Skan they should be listed adjacently. 859169689Skan Elimination for any register fails only if all possible ways fail. */ 860169689Skan for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ) 861169689Skan { 862169689Skan int from = ep->from; 863169689Skan int can_eliminate = 0; 864169689Skan do 865169689Skan { 866169689Skan can_eliminate |= ep->can_eliminate; 867169689Skan ep++; 868169689Skan } 869169689Skan while (ep < ®_eliminate[NUM_ELIMINABLE_REGS] && ep->from == from); 870169689Skan if (! can_eliminate) 871169689Skan spill_hard_reg (from, 1); 872169689Skan } 87318334Speter 87418334Speter#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 87518334Speter if (frame_pointer_needed) 87690075Sobrien spill_hard_reg (HARD_FRAME_POINTER_REGNUM, 1); 87718334Speter#endif 87890075Sobrien finish_spills (global); 87918334Speter 88052284Sobrien /* From now on, we may need to generate moves differently. We may also 88152284Sobrien allow modifications of insns which cause them to not be recognized. 88252284Sobrien Any such modifications will be cleaned up during reload itself. */ 88318334Speter reload_in_progress = 1; 88418334Speter 88518334Speter /* This loop scans the entire function each go-round 88618334Speter and repeats until one repetition spills no additional hard regs. */ 88752284Sobrien for (;;) 88818334Speter { 88952284Sobrien int something_changed; 89052284Sobrien int did_spill; 89118334Speter 89250397Sobrien HOST_WIDE_INT starting_frame_size; 89318334Speter 89490075Sobrien /* Round size of stack frame to stack_alignment_needed. This must be done 89550397Sobrien here because the stack size may be a part of the offset computation 89650397Sobrien for register elimination, and there might have been new stack slots 89790075Sobrien created in the last iteration of this loop. */ 89890075Sobrien if (cfun->stack_alignment_needed) 89990075Sobrien assign_stack_local (BLKmode, 0, cfun->stack_alignment_needed); 90050397Sobrien 90150397Sobrien starting_frame_size = get_frame_size (); 90250397Sobrien 90352284Sobrien set_initial_elim_offsets (); 90452284Sobrien set_initial_label_offsets (); 90518334Speter 90618334Speter /* For each pseudo register that has an equivalent location defined, 90718334Speter try to eliminate any eliminable registers (such as the frame pointer) 90818334Speter assuming initial offsets for the replacement register, which 90918334Speter is the normal case. 91018334Speter 91118334Speter If the resulting location is directly addressable, substitute 91218334Speter the MEM we just got directly for the old REG. 91318334Speter 91418334Speter If it is not addressable but is a constant or the sum of a hard reg 91518334Speter and constant, it is probably not addressable because the constant is 91618334Speter out of range, in that case record the address; we will generate 91718334Speter hairy code to compute the address in a register each time it is 91818334Speter needed. Similarly if it is a hard register, but one that is not 91918334Speter valid as an address register. 92018334Speter 92118334Speter If the location is not addressable, but does not have one of the 92218334Speter above forms, assign a stack slot. We have to do this to avoid the 92318334Speter potential of producing lots of reloads if, e.g., a location involves 92418334Speter a pseudo that didn't get a hard register and has an equivalent memory 92518334Speter location that also involves a pseudo that didn't get a hard register. 92618334Speter 92718334Speter Perhaps at some point we will improve reload_when_needed handling 92818334Speter so this problem goes away. But that's very hairy. */ 92918334Speter 93018334Speter for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 93118334Speter if (reg_renumber[i] < 0 && reg_equiv_memory_loc[i]) 93218334Speter { 93318334Speter rtx x = eliminate_regs (reg_equiv_memory_loc[i], 0, NULL_RTX); 93418334Speter 93518334Speter if (strict_memory_address_p (GET_MODE (regno_reg_rtx[i]), 93618334Speter XEXP (x, 0))) 93718334Speter reg_equiv_mem[i] = x, reg_equiv_address[i] = 0; 93818334Speter else if (CONSTANT_P (XEXP (x, 0)) 939169689Skan || (REG_P (XEXP (x, 0)) 94018334Speter && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER) 94118334Speter || (GET_CODE (XEXP (x, 0)) == PLUS 942169689Skan && REG_P (XEXP (XEXP (x, 0), 0)) 94318334Speter && (REGNO (XEXP (XEXP (x, 0), 0)) 94418334Speter < FIRST_PSEUDO_REGISTER) 94518334Speter && CONSTANT_P (XEXP (XEXP (x, 0), 1)))) 94618334Speter reg_equiv_address[i] = XEXP (x, 0), reg_equiv_mem[i] = 0; 94718334Speter else 94818334Speter { 94918334Speter /* Make a new stack slot. Then indicate that something 95018334Speter changed so we go back and recompute offsets for 95118334Speter eliminable registers because the allocation of memory 95218334Speter below might change some offset. reg_equiv_{mem,address} 95318334Speter will be set up for this pseudo on the next pass around 95418334Speter the loop. */ 95518334Speter reg_equiv_memory_loc[i] = 0; 95618334Speter reg_equiv_init[i] = 0; 95718334Speter alter_reg (i, -1); 95818334Speter } 95918334Speter } 96018334Speter 96152284Sobrien if (caller_save_needed) 96252284Sobrien setup_save_areas (); 96352284Sobrien 96452284Sobrien /* If we allocated another stack slot, redo elimination bookkeeping. */ 96552284Sobrien if (starting_frame_size != get_frame_size ()) 96618334Speter continue; 96718334Speter 96852284Sobrien if (caller_save_needed) 96918334Speter { 97052284Sobrien save_call_clobbered_regs (); 97152284Sobrien /* That might have allocated new insn_chain structures. */ 972132718Skan reload_firstobj = obstack_alloc (&reload_obstack, 0); 97318334Speter } 97418334Speter 97552284Sobrien calculate_needs_all_insns (global); 97618334Speter 97790075Sobrien CLEAR_REG_SET (&spilled_pseudos); 97852284Sobrien did_spill = 0; 97918334Speter 98052284Sobrien something_changed = 0; 98118334Speter 98252284Sobrien /* If we allocated any new memory locations, make another pass 98352284Sobrien since it might have changed elimination offsets. */ 98452284Sobrien if (starting_frame_size != get_frame_size ()) 98552284Sobrien something_changed = 1; 98618334Speter 987169689Skan /* Even if the frame size remained the same, we might still have 988169689Skan changed elimination offsets, e.g. if find_reloads called 989169689Skan force_const_mem requiring the back end to allocate a constant 990169689Skan pool base register that needs to be saved on the stack. */ 991169689Skan else if (!verify_initial_elim_offsets ()) 992169689Skan something_changed = 1; 993169689Skan 99452284Sobrien { 99552284Sobrien HARD_REG_SET to_spill; 99652284Sobrien CLEAR_HARD_REG_SET (to_spill); 99752284Sobrien update_eliminables (&to_spill); 998169689Skan AND_COMPL_HARD_REG_SET(used_spill_regs, to_spill); 999169689Skan 100052284Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 100152284Sobrien if (TEST_HARD_REG_BIT (to_spill, i)) 100218334Speter { 100390075Sobrien spill_hard_reg (i, 1); 100452284Sobrien did_spill = 1; 100518334Speter 100652284Sobrien /* Regardless of the state of spills, if we previously had 1007117395Skan a register that we thought we could eliminate, but now can 100852284Sobrien not eliminate, we must run another pass. 100918334Speter 101052284Sobrien Consider pseudos which have an entry in reg_equiv_* which 101152284Sobrien reference an eliminable register. We must make another pass 101252284Sobrien to update reg_equiv_* so that we do not substitute in the 101352284Sobrien old value from when we thought the elimination could be 101452284Sobrien performed. */ 101552284Sobrien something_changed = 1; 101652284Sobrien } 101752284Sobrien } 101818334Speter 101990075Sobrien select_reload_regs (); 102052284Sobrien if (failure) 102152284Sobrien goto failed; 102218334Speter 102352284Sobrien if (insns_need_reload != 0 || did_spill) 102490075Sobrien something_changed |= finish_spills (global); 102518334Speter 102652284Sobrien if (! something_changed) 102752284Sobrien break; 102818334Speter 102952284Sobrien if (caller_save_needed) 103052284Sobrien delete_caller_save_insns (); 103190075Sobrien 103290075Sobrien obstack_free (&reload_obstack, reload_firstobj); 103352284Sobrien } 103418334Speter 103552284Sobrien /* If global-alloc was run, notify it of any register eliminations we have 103652284Sobrien done. */ 103752284Sobrien if (global) 103852284Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 103952284Sobrien if (ep->can_eliminate) 104052284Sobrien mark_elimination (ep->from, ep->to); 104152284Sobrien 104252284Sobrien /* If a pseudo has no hard reg, delete the insns that made the equivalence. 104352284Sobrien If that insn didn't set the register (i.e., it copied the register to 104452284Sobrien memory), just delete that insn instead of the equivalencing insn plus 104552284Sobrien anything now dead. If we call delete_dead_insn on that insn, we may 104652284Sobrien delete the insn that actually sets the register if the register dies 104752284Sobrien there and that is incorrect. */ 104852284Sobrien 104952284Sobrien for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 105052284Sobrien { 105152284Sobrien if (reg_renumber[i] < 0 && reg_equiv_init[i] != 0) 105252284Sobrien { 105352284Sobrien rtx list; 105452284Sobrien for (list = reg_equiv_init[i]; list; list = XEXP (list, 1)) 105552284Sobrien { 105652284Sobrien rtx equiv_insn = XEXP (list, 0); 105790075Sobrien 105890075Sobrien /* If we already deleted the insn or if it may trap, we can't 105990075Sobrien delete it. The latter case shouldn't happen, but can 106090075Sobrien if an insn has a variable address, gets a REG_EH_REGION 1061169689Skan note added to it, and then gets converted into a load 106290075Sobrien from a constant address. */ 1063169689Skan if (NOTE_P (equiv_insn) 106490075Sobrien || can_throw_internal (equiv_insn)) 106590075Sobrien ; 106690075Sobrien else if (reg_set_p (regno_reg_rtx[i], PATTERN (equiv_insn))) 106752284Sobrien delete_dead_insn (equiv_insn); 106852284Sobrien else 1069169689Skan SET_INSN_DELETED (equiv_insn); 107052284Sobrien } 107152284Sobrien } 107252284Sobrien } 107318334Speter 107452284Sobrien /* Use the reload registers where necessary 107552284Sobrien by generating move instructions to move the must-be-register 107652284Sobrien values into or out of the reload registers. */ 107718334Speter 107852284Sobrien if (insns_need_reload != 0 || something_needs_elimination 107952284Sobrien || something_needs_operands_changed) 108052284Sobrien { 108190075Sobrien HOST_WIDE_INT old_frame_size = get_frame_size (); 108218334Speter 108352284Sobrien reload_as_needed (global); 108418334Speter 1085169689Skan gcc_assert (old_frame_size == get_frame_size ()); 108618334Speter 1087169689Skan gcc_assert (verify_initial_elim_offsets ()); 108852284Sobrien } 108918334Speter 109052284Sobrien /* If we were able to eliminate the frame pointer, show that it is no 109152284Sobrien longer live at the start of any basic block. If it ls live by 109252284Sobrien virtue of being in a pseudo, that pseudo will be marked live 109352284Sobrien and hence the frame pointer will be known to be live via that 109452284Sobrien pseudo. */ 109518334Speter 109652284Sobrien if (! frame_pointer_needed) 1097117395Skan FOR_EACH_BB (bb) 1098169689Skan CLEAR_REGNO_REG_SET (bb->il.rtl->global_live_at_start, 109952284Sobrien HARD_FRAME_POINTER_REGNUM); 110018334Speter 1101169689Skan /* Come here (with failure set nonzero) if we can't get enough spill 1102169689Skan regs. */ 110352284Sobrien failed: 110418334Speter 110590075Sobrien CLEAR_REG_SET (&spilled_pseudos); 110652284Sobrien reload_in_progress = 0; 110718334Speter 110852284Sobrien /* Now eliminate all pseudo regs by modifying them into 110952284Sobrien their equivalent memory references. 111052284Sobrien The REG-rtx's for the pseudos are modified in place, 111152284Sobrien so all insns that used to refer to them now refer to memory. 111218334Speter 111352284Sobrien For a reg that has a reg_equiv_address, all those insns 111452284Sobrien were changed by reloading so that no insns refer to it any longer; 111552284Sobrien but the DECL_RTL of a variable decl may refer to it, 111652284Sobrien and if so this causes the debugging info to mention the variable. */ 111718334Speter 111852284Sobrien for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 111952284Sobrien { 112052284Sobrien rtx addr = 0; 112118334Speter 112252284Sobrien if (reg_equiv_mem[i]) 112352284Sobrien addr = XEXP (reg_equiv_mem[i], 0); 112418334Speter 112552284Sobrien if (reg_equiv_address[i]) 112652284Sobrien addr = reg_equiv_address[i]; 112718334Speter 112852284Sobrien if (addr) 112952284Sobrien { 113052284Sobrien if (reg_renumber[i] < 0) 113152284Sobrien { 113252284Sobrien rtx reg = regno_reg_rtx[i]; 113390075Sobrien 1134117395Skan REG_USERVAR_P (reg) = 0; 113590075Sobrien PUT_CODE (reg, MEM); 113652284Sobrien XEXP (reg, 0) = addr; 113790075Sobrien if (reg_equiv_memory_loc[i]) 113890075Sobrien MEM_COPY_ATTRIBUTES (reg, reg_equiv_memory_loc[i]); 113990075Sobrien else 114090075Sobrien { 1141169689Skan MEM_IN_STRUCT_P (reg) = MEM_SCALAR_P (reg) = 0; 114290075Sobrien MEM_ATTRS (reg) = 0; 114390075Sobrien } 1144169689Skan MEM_NOTRAP_P (reg) = 1; 114552284Sobrien } 114652284Sobrien else if (reg_equiv_mem[i]) 114752284Sobrien XEXP (reg_equiv_mem[i], 0) = addr; 114852284Sobrien } 114952284Sobrien } 115018334Speter 115152284Sobrien /* We must set reload_completed now since the cleanup_subreg_operands call 115252284Sobrien below will re-recognize each insn and reload may have generated insns 115352284Sobrien which are only valid during and after reload. */ 115452284Sobrien reload_completed = 1; 115518334Speter 115690075Sobrien /* Make a pass over all the insns and delete all USEs which we inserted 115790075Sobrien only to tag a REG_EQUAL note on them. Remove all REG_DEAD and REG_UNUSED 1158117395Skan notes. Delete all CLOBBER insns, except those that refer to the return 1159117395Skan value and the special mem:BLK CLOBBERs added to prevent the scheduler 1160117395Skan from misarranging variable-array code, and simplify (subreg (reg)) 1161117395Skan operands. Also remove all REG_RETVAL and REG_LIBCALL notes since they 1162117395Skan are no longer useful or accurate. Strip and regenerate REG_INC notes 1163117395Skan that may have been moved around. */ 116418334Speter 116552284Sobrien for (insn = first; insn; insn = NEXT_INSN (insn)) 116690075Sobrien if (INSN_P (insn)) 116752284Sobrien { 116852284Sobrien rtx *pnote; 116918334Speter 1170169689Skan if (CALL_P (insn)) 1171132718Skan replace_pseudos_in (& CALL_INSN_FUNCTION_USAGE (insn), 1172132718Skan VOIDmode, CALL_INSN_FUNCTION_USAGE (insn)); 117390075Sobrien 117452284Sobrien if ((GET_CODE (PATTERN (insn)) == USE 117590075Sobrien /* We mark with QImode USEs introduced by reload itself. */ 117690075Sobrien && (GET_MODE (insn) == QImode 117790075Sobrien || find_reg_note (insn, REG_EQUAL, NULL_RTX))) 117890075Sobrien || (GET_CODE (PATTERN (insn)) == CLOBBER 1179169689Skan && (!MEM_P (XEXP (PATTERN (insn), 0)) 1180117395Skan || GET_MODE (XEXP (PATTERN (insn), 0)) != BLKmode 1181117395Skan || (GET_CODE (XEXP (XEXP (PATTERN (insn), 0), 0)) != SCRATCH 1182132718Skan && XEXP (XEXP (PATTERN (insn), 0), 0) 1183117395Skan != stack_pointer_rtx)) 1184169689Skan && (!REG_P (XEXP (PATTERN (insn), 0)) 118590075Sobrien || ! REG_FUNCTION_VALUE_P (XEXP (PATTERN (insn), 0))))) 118652284Sobrien { 118790075Sobrien delete_insn (insn); 118852284Sobrien continue; 118952284Sobrien } 119018334Speter 1191132718Skan /* Some CLOBBERs may survive until here and still reference unassigned 1192132718Skan pseudos with const equivalent, which may in turn cause ICE in later 1193132718Skan passes if the reference remains in place. */ 1194132718Skan if (GET_CODE (PATTERN (insn)) == CLOBBER) 1195132718Skan replace_pseudos_in (& XEXP (PATTERN (insn), 0), 1196132718Skan VOIDmode, PATTERN (insn)); 1197132718Skan 1198169689Skan /* Discard obvious no-ops, even without -O. This optimization 1199169689Skan is fast and doesn't interfere with debugging. */ 1200169689Skan if (NONJUMP_INSN_P (insn) 1201169689Skan && GET_CODE (PATTERN (insn)) == SET 1202169689Skan && REG_P (SET_SRC (PATTERN (insn))) 1203169689Skan && REG_P (SET_DEST (PATTERN (insn))) 1204169689Skan && (REGNO (SET_SRC (PATTERN (insn))) 1205169689Skan == REGNO (SET_DEST (PATTERN (insn))))) 1206169689Skan { 1207169689Skan delete_insn (insn); 1208169689Skan continue; 1209169689Skan } 1210169689Skan 121152284Sobrien pnote = ®_NOTES (insn); 121252284Sobrien while (*pnote != 0) 121352284Sobrien { 121452284Sobrien if (REG_NOTE_KIND (*pnote) == REG_DEAD 121552284Sobrien || REG_NOTE_KIND (*pnote) == REG_UNUSED 121652284Sobrien || REG_NOTE_KIND (*pnote) == REG_INC 121752284Sobrien || REG_NOTE_KIND (*pnote) == REG_RETVAL 121852284Sobrien || REG_NOTE_KIND (*pnote) == REG_LIBCALL) 121952284Sobrien *pnote = XEXP (*pnote, 1); 122052284Sobrien else 122152284Sobrien pnote = &XEXP (*pnote, 1); 122252284Sobrien } 122318334Speter 122452284Sobrien#ifdef AUTO_INC_DEC 122552284Sobrien add_auto_inc_notes (insn, PATTERN (insn)); 122652284Sobrien#endif 122718334Speter 1228169689Skan /* Simplify (subreg (reg)) if it appears as an operand. */ 122952284Sobrien cleanup_subreg_operands (insn); 1230169689Skan 1231169689Skan /* Clean up invalid ASMs so that they don't confuse later passes. 1232169689Skan See PR 21299. */ 1233169689Skan if (asm_noperands (PATTERN (insn)) >= 0) 1234169689Skan { 1235169689Skan extract_insn (insn); 1236169689Skan if (!constrain_operands (1)) 1237169689Skan { 1238169689Skan error_for_asm (insn, 1239169689Skan "%<asm%> operand has impossible constraints"); 1240169689Skan delete_insn (insn); 1241169689Skan continue; 1242169689Skan } 1243169689Skan } 124452284Sobrien } 124518334Speter 124652284Sobrien /* If we are doing stack checking, give a warning if this function's 124752284Sobrien frame size is larger than we expect. */ 124852284Sobrien if (flag_stack_check && ! STACK_CHECK_BUILTIN) 124952284Sobrien { 125052284Sobrien HOST_WIDE_INT size = get_frame_size () + STACK_CHECK_FIXED_FRAME_SIZE; 125190075Sobrien static int verbose_warned = 0; 125290075Sobrien 125352284Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 125452284Sobrien if (regs_ever_live[i] && ! fixed_regs[i] && call_used_regs[i]) 125552284Sobrien size += UNITS_PER_WORD; 125618334Speter 125752284Sobrien if (size > STACK_CHECK_MAX_FRAME_SIZE) 125890075Sobrien { 1259169689Skan warning (0, "frame size too large for reliable stack checking"); 126052284Sobrien if (! verbose_warned) 126152284Sobrien { 1262169689Skan warning (0, "try reducing the number of local variables"); 126352284Sobrien verbose_warned = 1; 126452284Sobrien } 126552284Sobrien } 126652284Sobrien } 126718334Speter 126852284Sobrien /* Indicate that we no longer have known memory locations or constants. */ 126952284Sobrien if (reg_equiv_constant) 127052284Sobrien free (reg_equiv_constant); 1271169689Skan if (reg_equiv_invariant) 1272169689Skan free (reg_equiv_invariant); 127352284Sobrien reg_equiv_constant = 0; 1274169689Skan reg_equiv_invariant = 0; 1275169689Skan VEC_free (rtx, gc, reg_equiv_memory_loc_vec); 127652284Sobrien reg_equiv_memory_loc = 0; 127718334Speter 1278117395Skan if (offsets_known_at) 1279117395Skan free (offsets_known_at); 1280117395Skan if (offsets_at) 1281117395Skan free (offsets_at); 128218334Speter 1283169689Skan for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1284169689Skan if (reg_equiv_alt_mem_list[i]) 1285169689Skan free_EXPR_LIST_list (®_equiv_alt_mem_list[i]); 1286169689Skan free (reg_equiv_alt_mem_list); 1287169689Skan 128852284Sobrien free (reg_equiv_mem); 1289169689Skan reg_equiv_init = 0; 129052284Sobrien free (reg_equiv_address); 129152284Sobrien free (reg_max_ref_width); 129252284Sobrien free (reg_old_renumber); 129352284Sobrien free (pseudo_previous_regs); 129452284Sobrien free (pseudo_forbidden_regs); 129518334Speter 129652284Sobrien CLEAR_HARD_REG_SET (used_spill_regs); 129752284Sobrien for (i = 0; i < n_spills; i++) 129852284Sobrien SET_HARD_REG_BIT (used_spill_regs, spill_regs[i]); 129918334Speter 130052284Sobrien /* Free all the insn_chain structures at once. */ 130152284Sobrien obstack_free (&reload_obstack, reload_startobj); 130252284Sobrien unused_insn_chains = 0; 130390075Sobrien fixup_abnormal_edges (); 130418334Speter 130596263Sobrien /* Replacing pseudos with their memory equivalents might have 130696263Sobrien created shared rtx. Subsequent passes would get confused 130796263Sobrien by this, so unshare everything here. */ 130896263Sobrien unshare_all_rtl_again (first); 130996263Sobrien 1310132718Skan#ifdef STACK_BOUNDARY 1311132718Skan /* init_emit has set the alignment of the hard frame pointer 1312132718Skan to STACK_BOUNDARY. It is very likely no longer valid if 1313132718Skan the hard frame pointer was used for register allocation. */ 1314132718Skan if (!frame_pointer_needed) 1315132718Skan REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = BITS_PER_UNIT; 1316132718Skan#endif 1317132718Skan 131852284Sobrien return failure; 131952284Sobrien} 132018334Speter 132152284Sobrien/* Yet another special case. Unfortunately, reg-stack forces people to 132252284Sobrien write incorrect clobbers in asm statements. These clobbers must not 132352284Sobrien cause the register to appear in bad_spill_regs, otherwise we'll call 132452284Sobrien fatal_insn later. We clear the corresponding regnos in the live 132552284Sobrien register sets to avoid this. 132652284Sobrien The whole thing is rather sick, I'm afraid. */ 132790075Sobrien 132852284Sobrienstatic void 1329132718Skanmaybe_fix_stack_asms (void) 133052284Sobrien{ 133152284Sobrien#ifdef STACK_REGS 133290075Sobrien const char *constraints[MAX_RECOG_OPERANDS]; 133352284Sobrien enum machine_mode operand_mode[MAX_RECOG_OPERANDS]; 133452284Sobrien struct insn_chain *chain; 133518334Speter 133652284Sobrien for (chain = reload_insn_chain; chain != 0; chain = chain->next) 133752284Sobrien { 133852284Sobrien int i, noperands; 133952284Sobrien HARD_REG_SET clobbered, allowed; 134052284Sobrien rtx pat; 134118334Speter 134290075Sobrien if (! INSN_P (chain->insn) 134352284Sobrien || (noperands = asm_noperands (PATTERN (chain->insn))) < 0) 134452284Sobrien continue; 134552284Sobrien pat = PATTERN (chain->insn); 134652284Sobrien if (GET_CODE (pat) != PARALLEL) 134752284Sobrien continue; 134818334Speter 134952284Sobrien CLEAR_HARD_REG_SET (clobbered); 135052284Sobrien CLEAR_HARD_REG_SET (allowed); 135118334Speter 135252284Sobrien /* First, make a mask of all stack regs that are clobbered. */ 135352284Sobrien for (i = 0; i < XVECLEN (pat, 0); i++) 135452284Sobrien { 135552284Sobrien rtx t = XVECEXP (pat, 0, i); 135652284Sobrien if (GET_CODE (t) == CLOBBER && STACK_REG_P (XEXP (t, 0))) 135752284Sobrien SET_HARD_REG_BIT (clobbered, REGNO (XEXP (t, 0))); 135852284Sobrien } 135918334Speter 136052284Sobrien /* Get the operand values and constraints out of the insn. */ 136190075Sobrien decode_asm_operands (pat, recog_data.operand, recog_data.operand_loc, 136252284Sobrien constraints, operand_mode); 136318334Speter 136452284Sobrien /* For every operand, see what registers are allowed. */ 136552284Sobrien for (i = 0; i < noperands; i++) 136652284Sobrien { 136790075Sobrien const char *p = constraints[i]; 136852284Sobrien /* For every alternative, we compute the class of registers allowed 136952284Sobrien for reloading in CLS, and merge its contents into the reg set 137052284Sobrien ALLOWED. */ 137152284Sobrien int cls = (int) NO_REGS; 137218334Speter 137352284Sobrien for (;;) 137452284Sobrien { 1375132718Skan char c = *p; 137618334Speter 137752284Sobrien if (c == '\0' || c == ',' || c == '#') 137852284Sobrien { 137952284Sobrien /* End of one alternative - mark the regs in the current 138052284Sobrien class, and reset the class. */ 138152284Sobrien IOR_HARD_REG_SET (allowed, reg_class_contents[cls]); 138252284Sobrien cls = NO_REGS; 1383132718Skan p++; 138452284Sobrien if (c == '#') 138552284Sobrien do { 138652284Sobrien c = *p++; 138752284Sobrien } while (c != '\0' && c != ','); 138852284Sobrien if (c == '\0') 138952284Sobrien break; 139052284Sobrien continue; 139152284Sobrien } 139218334Speter 139352284Sobrien switch (c) 139452284Sobrien { 139552284Sobrien case '=': case '+': case '*': case '%': case '?': case '!': 139652284Sobrien case '0': case '1': case '2': case '3': case '4': case 'm': 139752284Sobrien case '<': case '>': case 'V': case 'o': case '&': case 'E': 139852284Sobrien case 'F': case 's': case 'i': case 'n': case 'X': case 'I': 139952284Sobrien case 'J': case 'K': case 'L': case 'M': case 'N': case 'O': 140052284Sobrien case 'P': 140152284Sobrien break; 140218334Speter 140352284Sobrien case 'p': 140490075Sobrien cls = (int) reg_class_subunion[cls] 1405169689Skan [(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)]; 140652284Sobrien break; 140718334Speter 140852284Sobrien case 'g': 140952284Sobrien case 'r': 141052284Sobrien cls = (int) reg_class_subunion[cls][(int) GENERAL_REGS]; 141152284Sobrien break; 141218334Speter 141352284Sobrien default: 1414132718Skan if (EXTRA_ADDRESS_CONSTRAINT (c, p)) 1415117395Skan cls = (int) reg_class_subunion[cls] 1416169689Skan [(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)]; 1417117395Skan else 1418117395Skan cls = (int) reg_class_subunion[cls] 1419132718Skan [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]; 142018334Speter } 1421132718Skan p += CONSTRAINT_LEN (c, p); 142252284Sobrien } 142352284Sobrien } 142452284Sobrien /* Those of the registers which are clobbered, but allowed by the 142552284Sobrien constraints, must be usable as reload registers. So clear them 142652284Sobrien out of the life information. */ 142752284Sobrien AND_HARD_REG_SET (allowed, clobbered); 142852284Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 142952284Sobrien if (TEST_HARD_REG_BIT (allowed, i)) 143052284Sobrien { 143190075Sobrien CLEAR_REGNO_REG_SET (&chain->live_throughout, i); 143290075Sobrien CLEAR_REGNO_REG_SET (&chain->dead_or_set, i); 143352284Sobrien } 143452284Sobrien } 143518334Speter 143652284Sobrien#endif 143752284Sobrien} 143890075Sobrien 143990075Sobrien/* Copy the global variables n_reloads and rld into the corresponding elts 144090075Sobrien of CHAIN. */ 144190075Sobrienstatic void 1442132718Skancopy_reloads (struct insn_chain *chain) 144390075Sobrien{ 144490075Sobrien chain->n_reloads = n_reloads; 1445132718Skan chain->rld = obstack_alloc (&reload_obstack, 1446132718Skan n_reloads * sizeof (struct reload)); 144790075Sobrien memcpy (chain->rld, rld, n_reloads * sizeof (struct reload)); 1448132718Skan reload_insn_firstobj = obstack_alloc (&reload_obstack, 0); 144990075Sobrien} 145018334Speter 145152284Sobrien/* Walk the chain of insns, and determine for each whether it needs reloads 145252284Sobrien and/or eliminations. Build the corresponding insns_need_reload list, and 145352284Sobrien set something_needs_elimination as appropriate. */ 145452284Sobrienstatic void 1455132718Skancalculate_needs_all_insns (int global) 145652284Sobrien{ 145752284Sobrien struct insn_chain **pprev_reload = &insns_need_reload; 145890075Sobrien struct insn_chain *chain, *next = 0; 145918334Speter 146052284Sobrien something_needs_elimination = 0; 146118334Speter 1462132718Skan reload_insn_firstobj = obstack_alloc (&reload_obstack, 0); 146390075Sobrien for (chain = reload_insn_chain; chain != 0; chain = next) 146452284Sobrien { 146590075Sobrien rtx insn = chain->insn; 146618334Speter 146790075Sobrien next = chain->next; 146818334Speter 146990075Sobrien /* Clear out the shortcuts. */ 147090075Sobrien chain->n_reloads = 0; 147190075Sobrien chain->need_elim = 0; 147290075Sobrien chain->need_reload = 0; 147390075Sobrien chain->need_operand_change = 0; 147490075Sobrien 147552284Sobrien /* If this is a label, a JUMP_INSN, or has REG_NOTES (which might 147652284Sobrien include REG_LABEL), we need to see what effects this has on the 147752284Sobrien known offsets at labels. */ 147818334Speter 1479169689Skan if (LABEL_P (insn) || JUMP_P (insn) 148090075Sobrien || (INSN_P (insn) && REG_NOTES (insn) != 0)) 148152284Sobrien set_label_offsets (insn, insn, 0); 148218334Speter 148390075Sobrien if (INSN_P (insn)) 148452284Sobrien { 148552284Sobrien rtx old_body = PATTERN (insn); 148652284Sobrien int old_code = INSN_CODE (insn); 148752284Sobrien rtx old_notes = REG_NOTES (insn); 148852284Sobrien int did_elimination = 0; 148952284Sobrien int operands_changed = 0; 149052284Sobrien rtx set = single_set (insn); 149118334Speter 149252284Sobrien /* Skip insns that only set an equivalence. */ 1493169689Skan if (set && REG_P (SET_DEST (set)) 149452284Sobrien && reg_renumber[REGNO (SET_DEST (set))] < 0 1495169689Skan && (reg_equiv_constant[REGNO (SET_DEST (set))] 1496169689Skan || (reg_equiv_invariant[REGNO (SET_DEST (set))])) 1497169689Skan && reg_equiv_init[REGNO (SET_DEST (set))]) 149890075Sobrien continue; 149918334Speter 150052284Sobrien /* If needed, eliminate any eliminable registers. */ 150152284Sobrien if (num_eliminable || num_eliminable_invariants) 150252284Sobrien did_elimination = eliminate_regs_in_insn (insn, 0); 150318334Speter 150452284Sobrien /* Analyze the instruction. */ 150552284Sobrien operands_changed = find_reloads (insn, 0, spill_indirect_levels, 150652284Sobrien global, spill_reg_order); 150718334Speter 150852284Sobrien /* If a no-op set needs more than one reload, this is likely 150952284Sobrien to be something that needs input address reloads. We 151052284Sobrien can't get rid of this cleanly later, and it is of no use 151152284Sobrien anyway, so discard it now. 151252284Sobrien We only do this when expensive_optimizations is enabled, 151352284Sobrien since this complements reload inheritance / output 151452284Sobrien reload deletion, and it can make debugging harder. */ 151552284Sobrien if (flag_expensive_optimizations && n_reloads > 1) 151652284Sobrien { 151752284Sobrien rtx set = single_set (insn); 151852284Sobrien if (set 151952284Sobrien && SET_SRC (set) == SET_DEST (set) 1520169689Skan && REG_P (SET_SRC (set)) 152152284Sobrien && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER) 152218334Speter { 152390075Sobrien delete_insn (insn); 1524117395Skan /* Delete it from the reload chain. */ 152590075Sobrien if (chain->prev) 152690075Sobrien chain->prev->next = next; 152790075Sobrien else 152890075Sobrien reload_insn_chain = next; 152990075Sobrien if (next) 153090075Sobrien next->prev = chain->prev; 153190075Sobrien chain->next = unused_insn_chains; 153290075Sobrien unused_insn_chains = chain; 153352284Sobrien continue; 153418334Speter } 153518334Speter } 153652284Sobrien if (num_eliminable) 153752284Sobrien update_eliminable_offsets (); 153818334Speter 153952284Sobrien /* Remember for later shortcuts which insns had any reloads or 154052284Sobrien register eliminations. */ 154152284Sobrien chain->need_elim = did_elimination; 154252284Sobrien chain->need_reload = n_reloads > 0; 154352284Sobrien chain->need_operand_change = operands_changed; 154418334Speter 154552284Sobrien /* Discard any register replacements done. */ 154652284Sobrien if (did_elimination) 154752284Sobrien { 154890075Sobrien obstack_free (&reload_obstack, reload_insn_firstobj); 154952284Sobrien PATTERN (insn) = old_body; 155052284Sobrien INSN_CODE (insn) = old_code; 155152284Sobrien REG_NOTES (insn) = old_notes; 155252284Sobrien something_needs_elimination = 1; 155352284Sobrien } 155418334Speter 155552284Sobrien something_needs_operands_changed |= operands_changed; 155618334Speter 155752284Sobrien if (n_reloads != 0) 155850397Sobrien { 155990075Sobrien copy_reloads (chain); 156052284Sobrien *pprev_reload = chain; 156152284Sobrien pprev_reload = &chain->next_need_reload; 156250397Sobrien } 156318334Speter } 156452284Sobrien } 156552284Sobrien *pprev_reload = 0; 156652284Sobrien} 156790075Sobrien 156890075Sobrien/* Comparison function for qsort to decide which of two reloads 156990075Sobrien should be handled first. *P1 and *P2 are the reload numbers. */ 157018334Speter 157190075Sobrienstatic int 1572132718Skanreload_reg_class_lower (const void *r1p, const void *r2p) 157390075Sobrien{ 157490075Sobrien int r1 = *(const short *) r1p, r2 = *(const short *) r2p; 157590075Sobrien int t; 157618334Speter 157790075Sobrien /* Consider required reloads before optional ones. */ 157890075Sobrien t = rld[r1].optional - rld[r2].optional; 157990075Sobrien if (t != 0) 158090075Sobrien return t; 158118334Speter 158290075Sobrien /* Count all solitary classes before non-solitary ones. */ 158390075Sobrien t = ((reg_class_size[(int) rld[r2].class] == 1) 158490075Sobrien - (reg_class_size[(int) rld[r1].class] == 1)); 158590075Sobrien if (t != 0) 158690075Sobrien return t; 158718334Speter 158890075Sobrien /* Aside from solitaires, consider all multi-reg groups first. */ 158990075Sobrien t = rld[r2].nregs - rld[r1].nregs; 159090075Sobrien if (t != 0) 159190075Sobrien return t; 159218334Speter 159390075Sobrien /* Consider reloads in order of increasing reg-class number. */ 159490075Sobrien t = (int) rld[r1].class - (int) rld[r2].class; 159590075Sobrien if (t != 0) 159690075Sobrien return t; 159718334Speter 159890075Sobrien /* If reloads are equally urgent, sort by reload number, 159990075Sobrien so that the results of qsort leave nothing to chance. */ 160090075Sobrien return r1 - r2; 160190075Sobrien} 160290075Sobrien 160390075Sobrien/* The cost of spilling each hard reg. */ 160490075Sobrienstatic int spill_cost[FIRST_PSEUDO_REGISTER]; 160518334Speter 160690075Sobrien/* When spilling multiple hard registers, we use SPILL_COST for the first 160790075Sobrien spilled hard reg and SPILL_ADD_COST for subsequent regs. SPILL_ADD_COST 160890075Sobrien only the first hard reg for a multi-reg pseudo. */ 160990075Sobrienstatic int spill_add_cost[FIRST_PSEUDO_REGISTER]; 161018334Speter 161190075Sobrien/* Update the spill cost arrays, considering that pseudo REG is live. */ 161218334Speter 161390075Sobrienstatic void 1614132718Skancount_pseudo (int reg) 161590075Sobrien{ 161690075Sobrien int freq = REG_FREQ (reg); 161790075Sobrien int r = reg_renumber[reg]; 161890075Sobrien int nregs; 161918334Speter 162090075Sobrien if (REGNO_REG_SET_P (&pseudos_counted, reg) 162190075Sobrien || REGNO_REG_SET_P (&spilled_pseudos, reg)) 162290075Sobrien return; 162352284Sobrien 162490075Sobrien SET_REGNO_REG_SET (&pseudos_counted, reg); 162552284Sobrien 1626169689Skan gcc_assert (r >= 0); 162718334Speter 162890075Sobrien spill_add_cost[r] += freq; 162918334Speter 1630169689Skan nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (reg)]; 163190075Sobrien while (nregs-- > 0) 163290075Sobrien spill_cost[r + nregs] += freq; 163390075Sobrien} 163418334Speter 163590075Sobrien/* Calculate the SPILL_COST and SPILL_ADD_COST arrays and determine the 163690075Sobrien contents of BAD_SPILL_REGS for the insn described by CHAIN. */ 163718334Speter 163890075Sobrienstatic void 1639132718Skanorder_regs_for_reload (struct insn_chain *chain) 164090075Sobrien{ 1641169689Skan unsigned i; 164290075Sobrien HARD_REG_SET used_by_pseudos; 164390075Sobrien HARD_REG_SET used_by_pseudos2; 1644169689Skan reg_set_iterator rsi; 164518334Speter 164690075Sobrien COPY_HARD_REG_SET (bad_spill_regs, fixed_reg_set); 164718334Speter 164890075Sobrien memset (spill_cost, 0, sizeof spill_cost); 164990075Sobrien memset (spill_add_cost, 0, sizeof spill_add_cost); 165018334Speter 165190075Sobrien /* Count number of uses of each hard reg by pseudo regs allocated to it 165290075Sobrien and then order them by decreasing use. First exclude hard registers 165390075Sobrien that are live in or across this insn. */ 165452284Sobrien 165590075Sobrien REG_SET_TO_HARD_REG_SET (used_by_pseudos, &chain->live_throughout); 165690075Sobrien REG_SET_TO_HARD_REG_SET (used_by_pseudos2, &chain->dead_or_set); 165790075Sobrien IOR_HARD_REG_SET (bad_spill_regs, used_by_pseudos); 165890075Sobrien IOR_HARD_REG_SET (bad_spill_regs, used_by_pseudos2); 165952284Sobrien 166090075Sobrien /* Now find out which pseudos are allocated to it, and update 166190075Sobrien hard_reg_n_uses. */ 166290075Sobrien CLEAR_REG_SET (&pseudos_counted); 166318334Speter 166490075Sobrien EXECUTE_IF_SET_IN_REG_SET 1665169689Skan (&chain->live_throughout, FIRST_PSEUDO_REGISTER, i, rsi) 1666169689Skan { 1667169689Skan count_pseudo (i); 1668169689Skan } 166990075Sobrien EXECUTE_IF_SET_IN_REG_SET 1670169689Skan (&chain->dead_or_set, FIRST_PSEUDO_REGISTER, i, rsi) 1671169689Skan { 1672169689Skan count_pseudo (i); 1673169689Skan } 167490075Sobrien CLEAR_REG_SET (&pseudos_counted); 167590075Sobrien} 167690075Sobrien 167790075Sobrien/* Vector of reload-numbers showing the order in which the reloads should 167890075Sobrien be processed. */ 167990075Sobrienstatic short reload_order[MAX_RELOADS]; 168018334Speter 168190075Sobrien/* This is used to keep track of the spill regs used in one insn. */ 168290075Sobrienstatic HARD_REG_SET used_spill_regs_local; 168318334Speter 168490075Sobrien/* We decided to spill hard register SPILLED, which has a size of 168590075Sobrien SPILLED_NREGS. Determine how pseudo REG, which is live during the insn, 168690075Sobrien is affected. We will add it to SPILLED_PSEUDOS if necessary, and we will 168790075Sobrien update SPILL_COST/SPILL_ADD_COST. */ 168818334Speter 168990075Sobrienstatic void 1690132718Skancount_spilled_pseudo (int spilled, int spilled_nregs, int reg) 169190075Sobrien{ 169290075Sobrien int r = reg_renumber[reg]; 1693169689Skan int nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (reg)]; 169418334Speter 169590075Sobrien if (REGNO_REG_SET_P (&spilled_pseudos, reg) 169690075Sobrien || spilled + spilled_nregs <= r || r + nregs <= spilled) 169790075Sobrien return; 169818334Speter 169990075Sobrien SET_REGNO_REG_SET (&spilled_pseudos, reg); 170018334Speter 170190075Sobrien spill_add_cost[r] -= REG_FREQ (reg); 170290075Sobrien while (nregs-- > 0) 170390075Sobrien spill_cost[r + nregs] -= REG_FREQ (reg); 170490075Sobrien} 170518334Speter 170690075Sobrien/* Find reload register to use for reload number ORDER. */ 170718334Speter 170890075Sobrienstatic int 1709132718Skanfind_reg (struct insn_chain *chain, int order) 171090075Sobrien{ 171190075Sobrien int rnum = reload_order[order]; 171290075Sobrien struct reload *rl = rld + rnum; 171390075Sobrien int best_cost = INT_MAX; 171490075Sobrien int best_reg = -1; 171590075Sobrien unsigned int i, j; 171690075Sobrien int k; 171790075Sobrien HARD_REG_SET not_usable; 171890075Sobrien HARD_REG_SET used_by_other_reload; 1719169689Skan reg_set_iterator rsi; 172018334Speter 172190075Sobrien COPY_HARD_REG_SET (not_usable, bad_spill_regs); 172290075Sobrien IOR_HARD_REG_SET (not_usable, bad_spill_regs_global); 172390075Sobrien IOR_COMPL_HARD_REG_SET (not_usable, reg_class_contents[rl->class]); 172418334Speter 172590075Sobrien CLEAR_HARD_REG_SET (used_by_other_reload); 172690075Sobrien for (k = 0; k < order; k++) 172790075Sobrien { 172890075Sobrien int other = reload_order[k]; 172918334Speter 173090075Sobrien if (rld[other].regno >= 0 && reloads_conflict (other, rnum)) 173190075Sobrien for (j = 0; j < rld[other].nregs; j++) 173290075Sobrien SET_HARD_REG_BIT (used_by_other_reload, rld[other].regno + j); 173390075Sobrien } 173418334Speter 173552284Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 173652284Sobrien { 173790075Sobrien unsigned int regno = i; 173818334Speter 173990075Sobrien if (! TEST_HARD_REG_BIT (not_usable, regno) 174090075Sobrien && ! TEST_HARD_REG_BIT (used_by_other_reload, regno) 174190075Sobrien && HARD_REGNO_MODE_OK (regno, rl->mode)) 174252284Sobrien { 174390075Sobrien int this_cost = spill_cost[regno]; 174490075Sobrien int ok = 1; 1745169689Skan unsigned int this_nregs = hard_regno_nregs[regno][rl->mode]; 174618334Speter 174790075Sobrien for (j = 1; j < this_nregs; j++) 174818334Speter { 174990075Sobrien this_cost += spill_add_cost[regno + j]; 175090075Sobrien if ((TEST_HARD_REG_BIT (not_usable, regno + j)) 175190075Sobrien || TEST_HARD_REG_BIT (used_by_other_reload, regno + j)) 175290075Sobrien ok = 0; 175352284Sobrien } 175490075Sobrien if (! ok) 175590075Sobrien continue; 1756169689Skan if (rl->in && REG_P (rl->in) && REGNO (rl->in) == regno) 175790075Sobrien this_cost--; 1758169689Skan if (rl->out && REG_P (rl->out) && REGNO (rl->out) == regno) 175990075Sobrien this_cost--; 176090075Sobrien if (this_cost < best_cost 176190075Sobrien /* Among registers with equal cost, prefer caller-saved ones, or 176290075Sobrien use REG_ALLOC_ORDER if it is defined. */ 176390075Sobrien || (this_cost == best_cost 176490075Sobrien#ifdef REG_ALLOC_ORDER 176590075Sobrien && (inv_reg_alloc_order[regno] 176690075Sobrien < inv_reg_alloc_order[best_reg]) 176790075Sobrien#else 176890075Sobrien && call_used_regs[regno] 176990075Sobrien && ! call_used_regs[best_reg] 177090075Sobrien#endif 177190075Sobrien )) 177290075Sobrien { 177390075Sobrien best_reg = regno; 177490075Sobrien best_cost = this_cost; 177590075Sobrien } 177652284Sobrien } 177752284Sobrien } 177890075Sobrien if (best_reg == -1) 177990075Sobrien return 0; 178018334Speter 1781169689Skan if (dump_file) 1782169689Skan fprintf (dump_file, "Using reg %d for reload %d\n", best_reg, rnum); 178318334Speter 1784169689Skan rl->nregs = hard_regno_nregs[best_reg][rl->mode]; 178590075Sobrien rl->regno = best_reg; 178618334Speter 178790075Sobrien EXECUTE_IF_SET_IN_REG_SET 1788169689Skan (&chain->live_throughout, FIRST_PSEUDO_REGISTER, j, rsi) 1789169689Skan { 1790169689Skan count_spilled_pseudo (best_reg, rl->nregs, j); 1791169689Skan } 179218334Speter 179390075Sobrien EXECUTE_IF_SET_IN_REG_SET 1794169689Skan (&chain->dead_or_set, FIRST_PSEUDO_REGISTER, j, rsi) 1795169689Skan { 1796169689Skan count_spilled_pseudo (best_reg, rl->nregs, j); 1797169689Skan } 179818334Speter 179990075Sobrien for (i = 0; i < rl->nregs; i++) 180052284Sobrien { 1801169689Skan gcc_assert (spill_cost[best_reg + i] == 0); 1802169689Skan gcc_assert (spill_add_cost[best_reg + i] == 0); 180390075Sobrien SET_HARD_REG_BIT (used_spill_regs_local, best_reg + i); 180418334Speter } 180590075Sobrien return 1; 180652284Sobrien} 180718334Speter 180852284Sobrien/* Find more reload regs to satisfy the remaining need of an insn, which 180952284Sobrien is given by CHAIN. 181052284Sobrien Do it by ascending class number, since otherwise a reg 181152284Sobrien might be spilled for a big class and might fail to count 181290075Sobrien for a smaller class even though it belongs to that class. */ 181318334Speter 181452284Sobrienstatic void 1815132718Skanfind_reload_regs (struct insn_chain *chain) 181652284Sobrien{ 181790075Sobrien int i; 181818334Speter 181990075Sobrien /* In order to be certain of getting the registers we need, 182090075Sobrien we must sort the reloads into order of increasing register class. 182190075Sobrien Then our grabbing of reload registers will parallel the process 182290075Sobrien that provided the reload registers. */ 182390075Sobrien for (i = 0; i < chain->n_reloads; i++) 182418334Speter { 182590075Sobrien /* Show whether this reload already has a hard reg. */ 182690075Sobrien if (chain->rld[i].reg_rtx) 182752284Sobrien { 182890075Sobrien int regno = REGNO (chain->rld[i].reg_rtx); 182990075Sobrien chain->rld[i].regno = regno; 183090075Sobrien chain->rld[i].nregs 1831169689Skan = hard_regno_nregs[regno][GET_MODE (chain->rld[i].reg_rtx)]; 183218334Speter } 183390075Sobrien else 183490075Sobrien chain->rld[i].regno = -1; 183590075Sobrien reload_order[i] = i; 183690075Sobrien } 183750397Sobrien 183890075Sobrien n_reloads = chain->n_reloads; 183990075Sobrien memcpy (rld, chain->rld, n_reloads * sizeof (struct reload)); 184050397Sobrien 184190075Sobrien CLEAR_HARD_REG_SET (used_spill_regs_local); 184250397Sobrien 1843169689Skan if (dump_file) 1844169689Skan fprintf (dump_file, "Spilling for insn %d.\n", INSN_UID (chain->insn)); 184552284Sobrien 184690075Sobrien qsort (reload_order, n_reloads, sizeof (short), reload_reg_class_lower); 184752284Sobrien 184890075Sobrien /* Compute the order of preference for hard registers to spill. */ 184952284Sobrien 185090075Sobrien order_regs_for_reload (chain); 185152284Sobrien 185290075Sobrien for (i = 0; i < n_reloads; i++) 185390075Sobrien { 185490075Sobrien int r = reload_order[i]; 185552284Sobrien 185690075Sobrien /* Ignore reloads that got marked inoperative. */ 185790075Sobrien if ((rld[r].out != 0 || rld[r].in != 0 || rld[r].secondary_p) 185890075Sobrien && ! rld[r].optional 185990075Sobrien && rld[r].regno == -1) 186090075Sobrien if (! find_reg (chain, i)) 186190075Sobrien { 1862169689Skan if (dump_file) 1863169689Skan fprintf(dump_file, "reload failure for reload %d\n", r); 186490075Sobrien spill_failure (chain->insn, rld[r].class); 186590075Sobrien failure = 1; 186652284Sobrien return; 186790075Sobrien } 186818334Speter } 186918334Speter 187090075Sobrien COPY_HARD_REG_SET (chain->used_spill_regs, used_spill_regs_local); 187190075Sobrien IOR_HARD_REG_SET (used_spill_regs, used_spill_regs_local); 187290075Sobrien 187390075Sobrien memcpy (chain->rld, rld, n_reloads * sizeof (struct reload)); 187452284Sobrien} 187518334Speter 187690075Sobrienstatic void 1877132718Skanselect_reload_regs (void) 187852284Sobrien{ 187990075Sobrien struct insn_chain *chain; 188018334Speter 188190075Sobrien /* Try to satisfy the needs for each insn. */ 188290075Sobrien for (chain = insns_need_reload; chain != 0; 188390075Sobrien chain = chain->next_need_reload) 188490075Sobrien find_reload_regs (chain); 188552284Sobrien} 188652284Sobrien 188752284Sobrien/* Delete all insns that were inserted by emit_caller_save_insns during 188852284Sobrien this iteration. */ 188952284Sobrienstatic void 1890132718Skandelete_caller_save_insns (void) 189152284Sobrien{ 189252284Sobrien struct insn_chain *c = reload_insn_chain; 189318334Speter 189452284Sobrien while (c != 0) 189552284Sobrien { 189652284Sobrien while (c != 0 && c->is_caller_save_insn) 189752284Sobrien { 189852284Sobrien struct insn_chain *next = c->next; 189952284Sobrien rtx insn = c->insn; 190050397Sobrien 190152284Sobrien if (c == reload_insn_chain) 190252284Sobrien reload_insn_chain = next; 190390075Sobrien delete_insn (insn); 190418334Speter 190552284Sobrien if (next) 190652284Sobrien next->prev = c->prev; 190752284Sobrien if (c->prev) 190852284Sobrien c->prev->next = next; 190952284Sobrien c->next = unused_insn_chains; 191052284Sobrien unused_insn_chains = c; 191152284Sobrien c = next; 191252284Sobrien } 191352284Sobrien if (c != 0) 191452284Sobrien c = c->next; 191552284Sobrien } 191618334Speter} 191718334Speter 191818334Speter/* Handle the failure to find a register to spill. 191918334Speter INSN should be one of the insns which needed this particular spill reg. */ 192018334Speter 192118334Speterstatic void 1922132718Skanspill_failure (rtx insn, enum reg_class class) 192318334Speter{ 192418334Speter if (asm_noperands (PATTERN (insn)) >= 0) 1925169689Skan error_for_asm (insn, "can't find a register in class %qs while " 1926169689Skan "reloading %<asm%>", 192790075Sobrien reg_class_names[class]); 192818334Speter else 192952284Sobrien { 1930169689Skan error ("unable to find a register to spill in class %qs", 193190075Sobrien reg_class_names[class]); 1932169689Skan 1933169689Skan if (dump_file) 1934169689Skan { 1935169689Skan fprintf (dump_file, "\nReloads for insn # %d\n", INSN_UID (insn)); 1936169689Skan debug_reload_to_stream (dump_file); 1937169689Skan } 193890075Sobrien fatal_insn ("this is the insn:", insn); 193952284Sobrien } 194018334Speter} 194118334Speter 194218334Speter/* Delete an unneeded INSN and any previous insns who sole purpose is loading 194318334Speter data that is dead in INSN. */ 194418334Speter 194518334Speterstatic void 1946132718Skandelete_dead_insn (rtx insn) 194718334Speter{ 194818334Speter rtx prev = prev_real_insn (insn); 194918334Speter rtx prev_dest; 195018334Speter 195118334Speter /* If the previous insn sets a register that dies in our insn, delete it 195218334Speter too. */ 195318334Speter if (prev && GET_CODE (PATTERN (prev)) == SET 1954169689Skan && (prev_dest = SET_DEST (PATTERN (prev)), REG_P (prev_dest)) 195518334Speter && reg_mentioned_p (prev_dest, PATTERN (insn)) 195650397Sobrien && find_regno_note (insn, REG_DEAD, REGNO (prev_dest)) 195750397Sobrien && ! side_effects_p (SET_SRC (PATTERN (prev)))) 195818334Speter delete_dead_insn (prev); 195918334Speter 1960169689Skan SET_INSN_DELETED (insn); 196118334Speter} 196218334Speter 196318334Speter/* Modify the home of pseudo-reg I. 196418334Speter The new home is present in reg_renumber[I]. 196518334Speter 196618334Speter FROM_REG may be the hard reg that the pseudo-reg is being spilled from; 196718334Speter or it may be -1, meaning there is none or it is not relevant. 196818334Speter This is used so that all pseudos spilled from a given hard reg 196918334Speter can share one stack slot. */ 197018334Speter 197118334Speterstatic void 1972132718Skanalter_reg (int i, int from_reg) 197318334Speter{ 197418334Speter /* When outputting an inline function, this can happen 197518334Speter for a reg that isn't actually used. */ 197618334Speter if (regno_reg_rtx[i] == 0) 197718334Speter return; 197818334Speter 197918334Speter /* If the reg got changed to a MEM at rtl-generation time, 198018334Speter ignore it. */ 1981169689Skan if (!REG_P (regno_reg_rtx[i])) 198218334Speter return; 198318334Speter 198418334Speter /* Modify the reg-rtx to contain the new hard reg 198518334Speter number or else to contain its pseudo reg number. */ 198618334Speter REGNO (regno_reg_rtx[i]) 198718334Speter = reg_renumber[i] >= 0 ? reg_renumber[i] : i; 198818334Speter 198918334Speter /* If we have a pseudo that is needed but has no hard reg or equivalent, 199018334Speter allocate a stack slot for it. */ 199118334Speter 199218334Speter if (reg_renumber[i] < 0 199350397Sobrien && REG_N_REFS (i) > 0 199418334Speter && reg_equiv_constant[i] == 0 1995169689Skan && (reg_equiv_invariant[i] == 0 || reg_equiv_init[i] == 0) 199618334Speter && reg_equiv_memory_loc[i] == 0) 199718334Speter { 199890075Sobrien rtx x; 1999169689Skan enum machine_mode mode = GET_MODE (regno_reg_rtx[i]); 200090075Sobrien unsigned int inherent_size = PSEUDO_REGNO_BYTES (i); 2001169689Skan unsigned int inherent_align = GET_MODE_ALIGNMENT (mode); 200290075Sobrien unsigned int total_size = MAX (inherent_size, reg_max_ref_width[i]); 2003169689Skan unsigned int min_align = reg_max_ref_width[i] * BITS_PER_UNIT; 200418334Speter int adjust = 0; 200518334Speter 200618334Speter /* Each pseudo reg has an inherent size which comes from its own mode, 200718334Speter and a total size which provides room for paradoxical subregs 200818334Speter which refer to the pseudo reg in wider modes. 200918334Speter 201018334Speter We can use a slot already allocated if it provides both 201118334Speter enough inherent space and enough total space. 201218334Speter Otherwise, we allocate a new slot, making sure that it has no less 201318334Speter inherent space, and no less total space, then the previous slot. */ 201418334Speter if (from_reg == -1) 201518334Speter { 201618334Speter /* No known place to spill from => no slot to reuse. */ 2017169689Skan x = assign_stack_local (mode, total_size, 2018169689Skan min_align > inherent_align 2019169689Skan || total_size > inherent_size ? -1 : 0); 202018334Speter if (BYTES_BIG_ENDIAN) 202118334Speter /* Cancel the big-endian correction done in assign_stack_local. 202218334Speter Get the address of the beginning of the slot. 202318334Speter This is so we can do a big-endian correction unconditionally 202418334Speter below. */ 202518334Speter adjust = inherent_size - total_size; 202618334Speter 202790075Sobrien /* Nothing can alias this slot except this pseudo. */ 202890075Sobrien set_mem_alias_set (x, new_alias_set ()); 202918334Speter } 203090075Sobrien 203118334Speter /* Reuse a stack slot if possible. */ 203218334Speter else if (spill_stack_slot[from_reg] != 0 203318334Speter && spill_stack_slot_width[from_reg] >= total_size 203418334Speter && (GET_MODE_SIZE (GET_MODE (spill_stack_slot[from_reg])) 2035169689Skan >= inherent_size) 2036169689Skan && MEM_ALIGN (spill_stack_slot[from_reg]) >= min_align) 203718334Speter x = spill_stack_slot[from_reg]; 203890075Sobrien 203918334Speter /* Allocate a bigger slot. */ 204018334Speter else 204118334Speter { 204218334Speter /* Compute maximum size needed, both for inherent size 204318334Speter and for total size. */ 204418334Speter rtx stack_slot; 204590075Sobrien 204618334Speter if (spill_stack_slot[from_reg]) 204718334Speter { 204818334Speter if (GET_MODE_SIZE (GET_MODE (spill_stack_slot[from_reg])) 204918334Speter > inherent_size) 205018334Speter mode = GET_MODE (spill_stack_slot[from_reg]); 205118334Speter if (spill_stack_slot_width[from_reg] > total_size) 205218334Speter total_size = spill_stack_slot_width[from_reg]; 2053169689Skan if (MEM_ALIGN (spill_stack_slot[from_reg]) > min_align) 2054169689Skan min_align = MEM_ALIGN (spill_stack_slot[from_reg]); 205518334Speter } 205690075Sobrien 205718334Speter /* Make a slot with that size. */ 205850397Sobrien x = assign_stack_local (mode, total_size, 2059169689Skan min_align > inherent_align 2060169689Skan || total_size > inherent_size ? -1 : 0); 206118334Speter stack_slot = x; 206290075Sobrien 206390075Sobrien /* All pseudos mapped to this slot can alias each other. */ 206490075Sobrien if (spill_stack_slot[from_reg]) 206590075Sobrien set_mem_alias_set (x, MEM_ALIAS_SET (spill_stack_slot[from_reg])); 206690075Sobrien else 206790075Sobrien set_mem_alias_set (x, new_alias_set ()); 206890075Sobrien 206918334Speter if (BYTES_BIG_ENDIAN) 207018334Speter { 207118334Speter /* Cancel the big-endian correction done in assign_stack_local. 207218334Speter Get the address of the beginning of the slot. 207318334Speter This is so we can do a big-endian correction unconditionally 207418334Speter below. */ 207518334Speter adjust = GET_MODE_SIZE (mode) - total_size; 207618334Speter if (adjust) 207790075Sobrien stack_slot 207890075Sobrien = adjust_address_nv (x, mode_for_size (total_size 207950397Sobrien * BITS_PER_UNIT, 208050397Sobrien MODE_INT, 1), 208190075Sobrien adjust); 208218334Speter } 208390075Sobrien 208418334Speter spill_stack_slot[from_reg] = stack_slot; 208518334Speter spill_stack_slot_width[from_reg] = total_size; 208618334Speter } 208718334Speter 208818334Speter /* On a big endian machine, the "address" of the slot 208918334Speter is the address of the low part that fits its inherent mode. */ 209018334Speter if (BYTES_BIG_ENDIAN && inherent_size < total_size) 209118334Speter adjust += (total_size - inherent_size); 209218334Speter 209318334Speter /* If we have any adjustment to make, or if the stack slot is the 209418334Speter wrong mode, make a new stack slot. */ 209590075Sobrien x = adjust_address_nv (x, GET_MODE (regno_reg_rtx[i]), adjust); 209690075Sobrien 209790075Sobrien /* If we have a decl for the original register, set it for the 209890075Sobrien memory. If this is a shared MEM, make a copy. */ 2099132718Skan if (REG_EXPR (regno_reg_rtx[i]) 2100169689Skan && DECL_P (REG_EXPR (regno_reg_rtx[i]))) 210118334Speter { 2102132718Skan rtx decl = DECL_RTL_IF_SET (REG_EXPR (regno_reg_rtx[i])); 210350397Sobrien 210496263Sobrien /* We can do this only for the DECLs home pseudo, not for 210596263Sobrien any copies of it, since otherwise when the stack slot 210696263Sobrien is reused, nonoverlapping_memrefs_p might think they 210796263Sobrien cannot overlap. */ 2108169689Skan if (decl && REG_P (decl) && REGNO (decl) == (unsigned) i) 210996263Sobrien { 211096263Sobrien if (from_reg != -1 && spill_stack_slot[from_reg] == x) 211196263Sobrien x = copy_rtx (x); 211296263Sobrien 2113132718Skan set_mem_attrs_from_reg (x, regno_reg_rtx[i]); 211496263Sobrien } 211518334Speter } 211618334Speter 211790075Sobrien /* Save the stack slot for later. */ 211818334Speter reg_equiv_memory_loc[i] = x; 211918334Speter } 212018334Speter} 212118334Speter 212218334Speter/* Mark the slots in regs_ever_live for the hard regs 212318334Speter used by pseudo-reg number REGNO. */ 212418334Speter 212518334Spetervoid 2126132718Skanmark_home_live (int regno) 212718334Speter{ 212890075Sobrien int i, lim; 212990075Sobrien 213018334Speter i = reg_renumber[regno]; 213118334Speter if (i < 0) 213218334Speter return; 2133169689Skan lim = i + hard_regno_nregs[i][PSEUDO_REGNO_MODE (regno)]; 213418334Speter while (i < lim) 213518334Speter regs_ever_live[i++] = 1; 213618334Speter} 213718334Speter 213818334Speter/* This function handles the tracking of elimination offsets around branches. 213918334Speter 214018334Speter X is a piece of RTL being scanned. 214118334Speter 214218334Speter INSN is the insn that it came from, if any. 214318334Speter 2144117395Skan INITIAL_P is nonzero if we are to set the offset to be the initial 214518334Speter offset and zero if we are setting the offset of the label to be the 214618334Speter current offset. */ 214718334Speter 214818334Speterstatic void 2149132718Skanset_label_offsets (rtx x, rtx insn, int initial_p) 215018334Speter{ 215118334Speter enum rtx_code code = GET_CODE (x); 215218334Speter rtx tem; 215352284Sobrien unsigned int i; 215418334Speter struct elim_table *p; 215518334Speter 215618334Speter switch (code) 215718334Speter { 215818334Speter case LABEL_REF: 215918334Speter if (LABEL_REF_NONLOCAL_P (x)) 216018334Speter return; 216118334Speter 216218334Speter x = XEXP (x, 0); 216318334Speter 216450397Sobrien /* ... fall through ... */ 216518334Speter 216618334Speter case CODE_LABEL: 216718334Speter /* If we know nothing about this label, set the desired offsets. Note 216818334Speter that this sets the offset at a label to be the offset before a label 216918334Speter if we don't know anything about the label. This is not correct for 217018334Speter the label after a BARRIER, but is the best guess we can make. If 217118334Speter we guessed wrong, we will suppress an elimination that might have 217218334Speter been possible had we been able to guess correctly. */ 217318334Speter 2174117395Skan if (! offsets_known_at[CODE_LABEL_NUMBER (x) - first_label_num]) 217518334Speter { 217618334Speter for (i = 0; i < NUM_ELIMINABLE_REGS; i++) 2177117395Skan offsets_at[CODE_LABEL_NUMBER (x) - first_label_num][i] 217818334Speter = (initial_p ? reg_eliminate[i].initial_offset 217918334Speter : reg_eliminate[i].offset); 2180117395Skan offsets_known_at[CODE_LABEL_NUMBER (x) - first_label_num] = 1; 218118334Speter } 218218334Speter 218318334Speter /* Otherwise, if this is the definition of a label and it is 218418334Speter preceded by a BARRIER, set our offsets to the known offset of 218518334Speter that label. */ 218618334Speter 218718334Speter else if (x == insn 218818334Speter && (tem = prev_nonnote_insn (insn)) != 0 2189169689Skan && BARRIER_P (tem)) 219052284Sobrien set_offsets_for_label (insn); 219118334Speter else 219218334Speter /* If neither of the above cases is true, compare each offset 219318334Speter with those previously recorded and suppress any eliminations 219418334Speter where the offsets disagree. */ 219518334Speter 219618334Speter for (i = 0; i < NUM_ELIMINABLE_REGS; i++) 2197117395Skan if (offsets_at[CODE_LABEL_NUMBER (x) - first_label_num][i] 219818334Speter != (initial_p ? reg_eliminate[i].initial_offset 219918334Speter : reg_eliminate[i].offset)) 220018334Speter reg_eliminate[i].can_eliminate = 0; 220118334Speter 220218334Speter return; 220318334Speter 220418334Speter case JUMP_INSN: 220518334Speter set_label_offsets (PATTERN (insn), insn, initial_p); 220618334Speter 220750397Sobrien /* ... fall through ... */ 220818334Speter 220918334Speter case INSN: 221018334Speter case CALL_INSN: 221118334Speter /* Any labels mentioned in REG_LABEL notes can be branched to indirectly 221218334Speter and hence must have all eliminations at their initial offsets. */ 221318334Speter for (tem = REG_NOTES (x); tem; tem = XEXP (tem, 1)) 221418334Speter if (REG_NOTE_KIND (tem) == REG_LABEL) 221518334Speter set_label_offsets (XEXP (tem, 0), insn, 1); 221618334Speter return; 221718334Speter 221890075Sobrien case PARALLEL: 221918334Speter case ADDR_VEC: 222018334Speter case ADDR_DIFF_VEC: 222190075Sobrien /* Each of the labels in the parallel or address vector must be 222290075Sobrien at their initial offsets. We want the first field for PARALLEL 222390075Sobrien and ADDR_VEC and the second field for ADDR_DIFF_VEC. */ 222418334Speter 222552284Sobrien for (i = 0; i < (unsigned) XVECLEN (x, code == ADDR_DIFF_VEC); i++) 222618334Speter set_label_offsets (XVECEXP (x, code == ADDR_DIFF_VEC, i), 222718334Speter insn, initial_p); 222818334Speter return; 222918334Speter 223018334Speter case SET: 223118334Speter /* We only care about setting PC. If the source is not RETURN, 223218334Speter IF_THEN_ELSE, or a label, disable any eliminations not at 223318334Speter their initial offsets. Similarly if any arm of the IF_THEN_ELSE 223418334Speter isn't one of those possibilities. For branches to a label, 223518334Speter call ourselves recursively. 223618334Speter 223718334Speter Note that this can disable elimination unnecessarily when we have 223818334Speter a non-local goto since it will look like a non-constant jump to 223918334Speter someplace in the current function. This isn't a significant 224018334Speter problem since such jumps will normally be when all elimination 224118334Speter pairs are back to their initial offsets. */ 224218334Speter 224318334Speter if (SET_DEST (x) != pc_rtx) 224418334Speter return; 224518334Speter 224618334Speter switch (GET_CODE (SET_SRC (x))) 224718334Speter { 224818334Speter case PC: 224918334Speter case RETURN: 225018334Speter return; 225118334Speter 225218334Speter case LABEL_REF: 2253169689Skan set_label_offsets (SET_SRC (x), insn, initial_p); 225418334Speter return; 225518334Speter 225618334Speter case IF_THEN_ELSE: 225718334Speter tem = XEXP (SET_SRC (x), 1); 225818334Speter if (GET_CODE (tem) == LABEL_REF) 225918334Speter set_label_offsets (XEXP (tem, 0), insn, initial_p); 226018334Speter else if (GET_CODE (tem) != PC && GET_CODE (tem) != RETURN) 226118334Speter break; 226218334Speter 226318334Speter tem = XEXP (SET_SRC (x), 2); 226418334Speter if (GET_CODE (tem) == LABEL_REF) 226518334Speter set_label_offsets (XEXP (tem, 0), insn, initial_p); 226618334Speter else if (GET_CODE (tem) != PC && GET_CODE (tem) != RETURN) 226718334Speter break; 226818334Speter return; 226950397Sobrien 227050397Sobrien default: 227150397Sobrien break; 227218334Speter } 227318334Speter 227418334Speter /* If we reach here, all eliminations must be at their initial 227518334Speter offset because we are doing a jump to a variable address. */ 227618334Speter for (p = reg_eliminate; p < ®_eliminate[NUM_ELIMINABLE_REGS]; p++) 227718334Speter if (p->offset != p->initial_offset) 227818334Speter p->can_eliminate = 0; 227950397Sobrien break; 228090075Sobrien 228150397Sobrien default: 228250397Sobrien break; 228318334Speter } 228418334Speter} 228518334Speter 228618334Speter/* Scan X and replace any eliminable registers (such as fp) with a 228718334Speter replacement (such as sp), plus an offset. 228818334Speter 228918334Speter MEM_MODE is the mode of an enclosing MEM. We need this to know how 229018334Speter much to adjust a register for, e.g., PRE_DEC. Also, if we are inside a 229118334Speter MEM, we are allowed to replace a sum of a register and the constant zero 229218334Speter with the register, which we cannot do outside a MEM. In addition, we need 229318334Speter to record the fact that a register is referenced outside a MEM. 229418334Speter 229518334Speter If INSN is an insn, it is the insn containing X. If we replace a REG 2296117395Skan in a SET_DEST with an equivalent MEM and INSN is nonzero, write a 229718334Speter CLOBBER of the pseudo after INSN so find_equiv_regs will know that 229850397Sobrien the REG is being modified. 229918334Speter 230018334Speter Alternatively, INSN may be a note (an EXPR_LIST or INSN_LIST). 230118334Speter That's used when we eliminate in expressions stored in notes. 230218334Speter This means, do not set ref_outside_mem even if the reference 230318334Speter is outside of MEMs. 230418334Speter 230518334Speter REG_EQUIV_MEM and REG_EQUIV_ADDRESS contain address that have had 230618334Speter replacements done assuming all offsets are at their initial values. If 230718334Speter they are not, or if REG_EQUIV_ADDRESS is nonzero for a pseudo we 230818334Speter encounter, return the actual location so that find_reloads will do 230918334Speter the proper thing. */ 231018334Speter 2311169689Skanstatic rtx 2312169689Skaneliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn, 2313169689Skan bool may_use_invariant) 231418334Speter{ 231518334Speter enum rtx_code code = GET_CODE (x); 231618334Speter struct elim_table *ep; 231718334Speter int regno; 231818334Speter rtx new; 231918334Speter int i, j; 232090075Sobrien const char *fmt; 232118334Speter int copied = 0; 232218334Speter 232352284Sobrien if (! current_function_decl) 232452284Sobrien return x; 232552284Sobrien 232618334Speter switch (code) 232718334Speter { 232818334Speter case CONST_INT: 232918334Speter case CONST_DOUBLE: 233096263Sobrien case CONST_VECTOR: 233118334Speter case CONST: 233218334Speter case SYMBOL_REF: 233318334Speter case CODE_LABEL: 233418334Speter case PC: 233518334Speter case CC0: 233618334Speter case ASM_INPUT: 233718334Speter case ADDR_VEC: 233818334Speter case ADDR_DIFF_VEC: 233918334Speter case RETURN: 234018334Speter return x; 234118334Speter 234218334Speter case REG: 234318334Speter regno = REGNO (x); 234418334Speter 234518334Speter /* First handle the case where we encounter a bare register that 234618334Speter is eliminable. Replace it with a PLUS. */ 234718334Speter if (regno < FIRST_PSEUDO_REGISTER) 234818334Speter { 234918334Speter for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 235018334Speter ep++) 235118334Speter if (ep->from_rtx == x && ep->can_eliminate) 235290075Sobrien return plus_constant (ep->to_rtx, ep->previous_offset); 235318334Speter 235418334Speter } 235590075Sobrien else if (reg_renumber && reg_renumber[regno] < 0 2356169689Skan && reg_equiv_invariant && reg_equiv_invariant[regno]) 2357169689Skan { 2358169689Skan if (may_use_invariant) 2359169689Skan return eliminate_regs_1 (copy_rtx (reg_equiv_invariant[regno]), 2360169689Skan mem_mode, insn, true); 2361169689Skan /* There exists at least one use of REGNO that cannot be 2362169689Skan eliminated. Prevent the defining insn from being deleted. */ 2363169689Skan reg_equiv_init[regno] = NULL_RTX; 2364169689Skan alter_reg (regno, -1); 2365169689Skan } 236618334Speter return x; 236718334Speter 236890075Sobrien /* You might think handling MINUS in a manner similar to PLUS is a 236990075Sobrien good idea. It is not. It has been tried multiple times and every 237090075Sobrien time the change has had to have been reverted. 237190075Sobrien 237290075Sobrien Other parts of reload know a PLUS is special (gen_reload for example) 237390075Sobrien and require special code to handle code a reloaded PLUS operand. 237490075Sobrien 237590075Sobrien Also consider backends where the flags register is clobbered by a 2376169689Skan MINUS, but we can emit a PLUS that does not clobber flags (IA-32, 237790075Sobrien lea instruction comes to mind). If we try to reload a MINUS, we 237890075Sobrien may kill the flags register that was holding a useful value. 237990075Sobrien 238090075Sobrien So, please before trying to handle MINUS, consider reload as a 238190075Sobrien whole instead of this little section as well as the backend issues. */ 238218334Speter case PLUS: 238318334Speter /* If this is the sum of an eliminable register and a constant, rework 238490075Sobrien the sum. */ 2385169689Skan if (REG_P (XEXP (x, 0)) 238618334Speter && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER 238718334Speter && CONSTANT_P (XEXP (x, 1))) 238818334Speter { 238918334Speter for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 239018334Speter ep++) 239118334Speter if (ep->from_rtx == XEXP (x, 0) && ep->can_eliminate) 239218334Speter { 239318334Speter /* The only time we want to replace a PLUS with a REG (this 239418334Speter occurs when the constant operand of the PLUS is the negative 239518334Speter of the offset) is when we are inside a MEM. We won't want 239618334Speter to do so at other times because that would change the 239718334Speter structure of the insn in a way that reload can't handle. 239818334Speter We special-case the commonest situation in 239918334Speter eliminate_regs_in_insn, so just replace a PLUS with a 240018334Speter PLUS here, unless inside a MEM. */ 240118334Speter if (mem_mode != 0 && GET_CODE (XEXP (x, 1)) == CONST_INT 240218334Speter && INTVAL (XEXP (x, 1)) == - ep->previous_offset) 240318334Speter return ep->to_rtx; 240418334Speter else 240550397Sobrien return gen_rtx_PLUS (Pmode, ep->to_rtx, 240650397Sobrien plus_constant (XEXP (x, 1), 240750397Sobrien ep->previous_offset)); 240818334Speter } 240918334Speter 241018334Speter /* If the register is not eliminable, we are done since the other 241118334Speter operand is a constant. */ 241218334Speter return x; 241318334Speter } 241418334Speter 241518334Speter /* If this is part of an address, we want to bring any constant to the 241618334Speter outermost PLUS. We will do this by doing register replacement in 241718334Speter our operands and seeing if a constant shows up in one of them. 241818334Speter 241990075Sobrien Note that there is no risk of modifying the structure of the insn, 242090075Sobrien since we only get called for its operands, thus we are either 242190075Sobrien modifying the address inside a MEM, or something like an address 242290075Sobrien operand of a load-address insn. */ 242318334Speter 242418334Speter { 2425169689Skan rtx new0 = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, true); 2426169689Skan rtx new1 = eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true); 242718334Speter 242890075Sobrien if (reg_renumber && (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))) 242918334Speter { 243018334Speter /* If one side is a PLUS and the other side is a pseudo that 243118334Speter didn't get a hard register but has a reg_equiv_constant, 243218334Speter we must replace the constant here since it may no longer 243318334Speter be in the position of any operand. */ 2434169689Skan if (GET_CODE (new0) == PLUS && REG_P (new1) 243518334Speter && REGNO (new1) >= FIRST_PSEUDO_REGISTER 243618334Speter && reg_renumber[REGNO (new1)] < 0 243718334Speter && reg_equiv_constant != 0 243818334Speter && reg_equiv_constant[REGNO (new1)] != 0) 243918334Speter new1 = reg_equiv_constant[REGNO (new1)]; 2440169689Skan else if (GET_CODE (new1) == PLUS && REG_P (new0) 244118334Speter && REGNO (new0) >= FIRST_PSEUDO_REGISTER 244218334Speter && reg_renumber[REGNO (new0)] < 0 244318334Speter && reg_equiv_constant[REGNO (new0)] != 0) 244418334Speter new0 = reg_equiv_constant[REGNO (new0)]; 244518334Speter 244618334Speter new = form_sum (new0, new1); 244718334Speter 244818334Speter /* As above, if we are not inside a MEM we do not want to 244918334Speter turn a PLUS into something else. We might try to do so here 245018334Speter for an addition of 0 if we aren't optimizing. */ 245118334Speter if (! mem_mode && GET_CODE (new) != PLUS) 245250397Sobrien return gen_rtx_PLUS (GET_MODE (x), new, const0_rtx); 245318334Speter else 245418334Speter return new; 245518334Speter } 245618334Speter } 245718334Speter return x; 245818334Speter 245918334Speter case MULT: 246090075Sobrien /* If this is the product of an eliminable register and a 246118334Speter constant, apply the distribute law and move the constant out 246218334Speter so that we have (plus (mult ..) ..). This is needed in order 246318334Speter to keep load-address insns valid. This case is pathological. 246418334Speter We ignore the possibility of overflow here. */ 2465169689Skan if (REG_P (XEXP (x, 0)) 246618334Speter && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER 246718334Speter && GET_CODE (XEXP (x, 1)) == CONST_INT) 246818334Speter for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 246918334Speter ep++) 247018334Speter if (ep->from_rtx == XEXP (x, 0) && ep->can_eliminate) 247118334Speter { 247218334Speter if (! mem_mode 247318334Speter /* Refs inside notes don't count for this purpose. */ 247418334Speter && ! (insn != 0 && (GET_CODE (insn) == EXPR_LIST 247518334Speter || GET_CODE (insn) == INSN_LIST))) 247618334Speter ep->ref_outside_mem = 1; 247718334Speter 247818334Speter return 247950397Sobrien plus_constant (gen_rtx_MULT (Pmode, ep->to_rtx, XEXP (x, 1)), 248018334Speter ep->previous_offset * INTVAL (XEXP (x, 1))); 248118334Speter } 248218334Speter 248350397Sobrien /* ... fall through ... */ 248418334Speter 248518334Speter case CALL: 248618334Speter case COMPARE: 248790075Sobrien /* See comments before PLUS about handling MINUS. */ 248818334Speter case MINUS: 248918334Speter case DIV: case UDIV: 249018334Speter case MOD: case UMOD: 249118334Speter case AND: case IOR: case XOR: 249218334Speter case ROTATERT: case ROTATE: 249318334Speter case ASHIFTRT: case LSHIFTRT: case ASHIFT: 249418334Speter case NE: case EQ: 249518334Speter case GE: case GT: case GEU: case GTU: 249618334Speter case LE: case LT: case LEU: case LTU: 249718334Speter { 2498169689Skan rtx new0 = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, false); 2499169689Skan rtx new1 = XEXP (x, 1) 2500169689Skan ? eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, false) : 0; 250118334Speter 250218334Speter if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1)) 250350397Sobrien return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1); 250418334Speter } 250518334Speter return x; 250618334Speter 250718334Speter case EXPR_LIST: 250818334Speter /* If we have something in XEXP (x, 0), the usual case, eliminate it. */ 250918334Speter if (XEXP (x, 0)) 251018334Speter { 2511169689Skan new = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, true); 251218334Speter if (new != XEXP (x, 0)) 251352284Sobrien { 251452284Sobrien /* If this is a REG_DEAD note, it is not valid anymore. 251552284Sobrien Using the eliminated version could result in creating a 251652284Sobrien REG_DEAD note for the stack or frame pointer. */ 251752284Sobrien if (GET_MODE (x) == REG_DEAD) 251852284Sobrien return (XEXP (x, 1) 2519169689Skan ? eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true) 252052284Sobrien : NULL_RTX); 252152284Sobrien 252252284Sobrien x = gen_rtx_EXPR_LIST (REG_NOTE_KIND (x), new, XEXP (x, 1)); 252352284Sobrien } 252418334Speter } 252518334Speter 252650397Sobrien /* ... fall through ... */ 252718334Speter 252818334Speter case INSN_LIST: 252918334Speter /* Now do eliminations in the rest of the chain. If this was 253018334Speter an EXPR_LIST, this might result in allocating more memory than is 253118334Speter strictly needed, but it simplifies the code. */ 253218334Speter if (XEXP (x, 1)) 253318334Speter { 2534169689Skan new = eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true); 253518334Speter if (new != XEXP (x, 1)) 253690075Sobrien return 253790075Sobrien gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x), XEXP (x, 0), new); 253818334Speter } 253918334Speter return x; 254018334Speter 254118334Speter case PRE_INC: 254218334Speter case POST_INC: 254318334Speter case PRE_DEC: 254418334Speter case POST_DEC: 254518334Speter case STRICT_LOW_PART: 254618334Speter case NEG: case NOT: 254718334Speter case SIGN_EXTEND: case ZERO_EXTEND: 254818334Speter case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE: 254918334Speter case FLOAT: case FIX: 255018334Speter case UNSIGNED_FIX: case UNSIGNED_FLOAT: 255118334Speter case ABS: 255218334Speter case SQRT: 255318334Speter case FFS: 2554132718Skan case CLZ: 2555132718Skan case CTZ: 2556132718Skan case POPCOUNT: 2557132718Skan case PARITY: 2558259563Spfg case BSWAP: 2559169689Skan new = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, false); 256018334Speter if (new != XEXP (x, 0)) 256150397Sobrien return gen_rtx_fmt_e (code, GET_MODE (x), new); 256218334Speter return x; 256318334Speter 256418334Speter case SUBREG: 256590075Sobrien /* Similar to above processing, but preserve SUBREG_BYTE. 256618334Speter Convert (subreg (mem)) to (mem) if not paradoxical. 256718334Speter Also, if we have a non-paradoxical (subreg (pseudo)) and the 256818334Speter pseudo didn't get a hard reg, we must replace this with the 2569132718Skan eliminated version of the memory location because push_reload 257018334Speter may do the replacement in certain circumstances. */ 2571169689Skan if (REG_P (SUBREG_REG (x)) 257218334Speter && (GET_MODE_SIZE (GET_MODE (x)) 257318334Speter <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) 257418334Speter && reg_equiv_memory_loc != 0 257518334Speter && reg_equiv_memory_loc[REGNO (SUBREG_REG (x))] != 0) 257618334Speter { 257752284Sobrien new = SUBREG_REG (x); 257818334Speter } 257918334Speter else 2580169689Skan new = eliminate_regs_1 (SUBREG_REG (x), mem_mode, insn, false); 258118334Speter 258290075Sobrien if (new != SUBREG_REG (x)) 258318334Speter { 258450397Sobrien int x_size = GET_MODE_SIZE (GET_MODE (x)); 258550397Sobrien int new_size = GET_MODE_SIZE (GET_MODE (new)); 258650397Sobrien 2587169689Skan if (MEM_P (new) 258850397Sobrien && ((x_size < new_size 258950397Sobrien#ifdef WORD_REGISTER_OPERATIONS 259050397Sobrien /* On these machines, combine can create rtl of the form 259150397Sobrien (set (subreg:m1 (reg:m2 R) 0) ...) 259290075Sobrien where m1 < m2, and expects something interesting to 259350397Sobrien happen to the entire word. Moreover, it will use the 259450397Sobrien (reg:m2 R) later, expecting all bits to be preserved. 259590075Sobrien So if the number of words is the same, preserve the 2596132718Skan subreg so that push_reload can see it. */ 259790075Sobrien && ! ((x_size - 1) / UNITS_PER_WORD 259890075Sobrien == (new_size -1 ) / UNITS_PER_WORD) 259918334Speter#endif 260050397Sobrien ) 260190075Sobrien || x_size == new_size) 260218334Speter ) 260396263Sobrien return adjust_address_nv (new, GET_MODE (x), SUBREG_BYTE (x)); 260490075Sobrien else 260590075Sobrien return gen_rtx_SUBREG (GET_MODE (x), new, SUBREG_BYTE (x)); 260690075Sobrien } 260718334Speter 260890075Sobrien return x; 260918334Speter 261090075Sobrien case MEM: 261190075Sobrien /* Our only special processing is to pass the mode of the MEM to our 261290075Sobrien recursive call and copy the flags. While we are here, handle this 261390075Sobrien case more efficiently. */ 261490075Sobrien return 261590075Sobrien replace_equiv_address_nv (x, 2616169689Skan eliminate_regs_1 (XEXP (x, 0), GET_MODE (x), 2617169689Skan insn, true)); 261890075Sobrien 261990075Sobrien case USE: 262090075Sobrien /* Handle insn_list USE that a call to a pure function may generate. */ 2621169689Skan new = eliminate_regs_1 (XEXP (x, 0), 0, insn, false); 262290075Sobrien if (new != XEXP (x, 0)) 262390075Sobrien return gen_rtx_USE (GET_MODE (x), new); 262490075Sobrien return x; 262590075Sobrien 262690075Sobrien case CLOBBER: 262790075Sobrien case ASM_OPERANDS: 262890075Sobrien case SET: 2629169689Skan gcc_unreachable (); 263090075Sobrien 263190075Sobrien default: 263290075Sobrien break; 263390075Sobrien } 263490075Sobrien 263590075Sobrien /* Process each of our operands recursively. If any have changed, make a 263690075Sobrien copy of the rtx. */ 263790075Sobrien fmt = GET_RTX_FORMAT (code); 263890075Sobrien for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) 263990075Sobrien { 264090075Sobrien if (*fmt == 'e') 264190075Sobrien { 2642169689Skan new = eliminate_regs_1 (XEXP (x, i), mem_mode, insn, false); 264390075Sobrien if (new != XEXP (x, i) && ! copied) 264490075Sobrien { 2645169689Skan x = shallow_copy_rtx (x); 264690075Sobrien copied = 1; 264718334Speter } 264890075Sobrien XEXP (x, i) = new; 264918334Speter } 265090075Sobrien else if (*fmt == 'E') 265190075Sobrien { 265290075Sobrien int copied_vec = 0; 265390075Sobrien for (j = 0; j < XVECLEN (x, i); j++) 265490075Sobrien { 2655169689Skan new = eliminate_regs_1 (XVECEXP (x, i, j), mem_mode, insn, false); 265690075Sobrien if (new != XVECEXP (x, i, j) && ! copied_vec) 265790075Sobrien { 265890075Sobrien rtvec new_v = gen_rtvec_v (XVECLEN (x, i), 265990075Sobrien XVEC (x, i)->elem); 266090075Sobrien if (! copied) 266190075Sobrien { 2662169689Skan x = shallow_copy_rtx (x); 266390075Sobrien copied = 1; 266490075Sobrien } 266590075Sobrien XVEC (x, i) = new_v; 266690075Sobrien copied_vec = 1; 266790075Sobrien } 266890075Sobrien XVECEXP (x, i, j) = new; 266990075Sobrien } 267090075Sobrien } 267190075Sobrien } 267218334Speter 267390075Sobrien return x; 267490075Sobrien} 267518334Speter 2676169689Skanrtx 2677169689Skaneliminate_regs (rtx x, enum machine_mode mem_mode, rtx insn) 2678169689Skan{ 2679169689Skan return eliminate_regs_1 (x, mem_mode, insn, false); 2680169689Skan} 2681169689Skan 268290075Sobrien/* Scan rtx X for modifications of elimination target registers. Update 268390075Sobrien the table of eliminables to reflect the changed state. MEM_MODE is 268490075Sobrien the mode of an enclosing MEM rtx, or VOIDmode if not within a MEM. */ 268590075Sobrien 268690075Sobrienstatic void 2687132718Skanelimination_effects (rtx x, enum machine_mode mem_mode) 268890075Sobrien{ 268990075Sobrien enum rtx_code code = GET_CODE (x); 269090075Sobrien struct elim_table *ep; 269190075Sobrien int regno; 269290075Sobrien int i, j; 269390075Sobrien const char *fmt; 269490075Sobrien 269590075Sobrien switch (code) 269690075Sobrien { 269790075Sobrien case CONST_INT: 269890075Sobrien case CONST_DOUBLE: 269996263Sobrien case CONST_VECTOR: 270090075Sobrien case CONST: 270190075Sobrien case SYMBOL_REF: 270290075Sobrien case CODE_LABEL: 270390075Sobrien case PC: 270490075Sobrien case CC0: 270590075Sobrien case ASM_INPUT: 270690075Sobrien case ADDR_VEC: 270790075Sobrien case ADDR_DIFF_VEC: 270890075Sobrien case RETURN: 270990075Sobrien return; 271090075Sobrien 271190075Sobrien case REG: 271290075Sobrien regno = REGNO (x); 271390075Sobrien 271490075Sobrien /* First handle the case where we encounter a bare register that 271590075Sobrien is eliminable. Replace it with a PLUS. */ 271690075Sobrien if (regno < FIRST_PSEUDO_REGISTER) 271790075Sobrien { 271890075Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 271990075Sobrien ep++) 272090075Sobrien if (ep->from_rtx == x && ep->can_eliminate) 272190075Sobrien { 272290075Sobrien if (! mem_mode) 272390075Sobrien ep->ref_outside_mem = 1; 272490075Sobrien return; 272590075Sobrien } 272690075Sobrien 272790075Sobrien } 272890075Sobrien else if (reg_renumber[regno] < 0 && reg_equiv_constant 272990075Sobrien && reg_equiv_constant[regno] 273090075Sobrien && ! function_invariant_p (reg_equiv_constant[regno])) 273190075Sobrien elimination_effects (reg_equiv_constant[regno], mem_mode); 273290075Sobrien return; 273390075Sobrien 273490075Sobrien case PRE_INC: 273590075Sobrien case POST_INC: 273690075Sobrien case PRE_DEC: 273790075Sobrien case POST_DEC: 273890075Sobrien case POST_MODIFY: 273990075Sobrien case PRE_MODIFY: 274090075Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 274190075Sobrien if (ep->to_rtx == XEXP (x, 0)) 274290075Sobrien { 274390075Sobrien int size = GET_MODE_SIZE (mem_mode); 274490075Sobrien 274590075Sobrien /* If more bytes than MEM_MODE are pushed, account for them. */ 274690075Sobrien#ifdef PUSH_ROUNDING 274790075Sobrien if (ep->to_rtx == stack_pointer_rtx) 274890075Sobrien size = PUSH_ROUNDING (size); 274990075Sobrien#endif 275090075Sobrien if (code == PRE_DEC || code == POST_DEC) 275190075Sobrien ep->offset += size; 275290075Sobrien else if (code == PRE_INC || code == POST_INC) 275390075Sobrien ep->offset -= size; 275490075Sobrien else if ((code == PRE_MODIFY || code == POST_MODIFY) 275590075Sobrien && GET_CODE (XEXP (x, 1)) == PLUS 275690075Sobrien && XEXP (x, 0) == XEXP (XEXP (x, 1), 0) 275790075Sobrien && CONSTANT_P (XEXP (XEXP (x, 1), 1))) 275890075Sobrien ep->offset -= INTVAL (XEXP (XEXP (x, 1), 1)); 275990075Sobrien } 276090075Sobrien 276190075Sobrien /* These two aren't unary operators. */ 276290075Sobrien if (code == POST_MODIFY || code == PRE_MODIFY) 276390075Sobrien break; 276490075Sobrien 276590075Sobrien /* Fall through to generic unary operation case. */ 276690075Sobrien case STRICT_LOW_PART: 276790075Sobrien case NEG: case NOT: 276890075Sobrien case SIGN_EXTEND: case ZERO_EXTEND: 276990075Sobrien case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE: 277090075Sobrien case FLOAT: case FIX: 277190075Sobrien case UNSIGNED_FIX: case UNSIGNED_FLOAT: 277290075Sobrien case ABS: 277390075Sobrien case SQRT: 277490075Sobrien case FFS: 2775132718Skan case CLZ: 2776132718Skan case CTZ: 2777132718Skan case POPCOUNT: 2778132718Skan case PARITY: 2779259563Spfg case BSWAP: 278090075Sobrien elimination_effects (XEXP (x, 0), mem_mode); 278190075Sobrien return; 278290075Sobrien 278390075Sobrien case SUBREG: 2784169689Skan if (REG_P (SUBREG_REG (x)) 278590075Sobrien && (GET_MODE_SIZE (GET_MODE (x)) 278690075Sobrien <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) 278790075Sobrien && reg_equiv_memory_loc != 0 278890075Sobrien && reg_equiv_memory_loc[REGNO (SUBREG_REG (x))] != 0) 278990075Sobrien return; 279090075Sobrien 279190075Sobrien elimination_effects (SUBREG_REG (x), mem_mode); 279290075Sobrien return; 279390075Sobrien 279450397Sobrien case USE: 279550397Sobrien /* If using a register that is the source of an eliminate we still 279650397Sobrien think can be performed, note it cannot be performed since we don't 279750397Sobrien know how this register is used. */ 279850397Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 279950397Sobrien if (ep->from_rtx == XEXP (x, 0)) 280050397Sobrien ep->can_eliminate = 0; 280150397Sobrien 280290075Sobrien elimination_effects (XEXP (x, 0), mem_mode); 280390075Sobrien return; 280450397Sobrien 280518334Speter case CLOBBER: 280618334Speter /* If clobbering a register that is the replacement register for an 280718334Speter elimination we still think can be performed, note that it cannot 280818334Speter be performed. Otherwise, we need not be concerned about it. */ 280918334Speter for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 281018334Speter if (ep->to_rtx == XEXP (x, 0)) 281118334Speter ep->can_eliminate = 0; 281218334Speter 281390075Sobrien elimination_effects (XEXP (x, 0), mem_mode); 281490075Sobrien return; 281518334Speter 281618334Speter case SET: 281718334Speter /* Check for setting a register that we know about. */ 2818169689Skan if (REG_P (SET_DEST (x))) 281918334Speter { 282018334Speter /* See if this is setting the replacement register for an 282118334Speter elimination. 282218334Speter 282318334Speter If DEST is the hard frame pointer, we do nothing because we 282418334Speter assume that all assignments to the frame pointer are for 282518334Speter non-local gotos and are being done at a time when they are valid 282618334Speter and do not disturb anything else. Some machines want to 282718334Speter eliminate a fake argument pointer (or even a fake frame pointer) 282818334Speter with either the real frame or the stack pointer. Assignments to 282918334Speter the hard frame pointer must not prevent this elimination. */ 283018334Speter 283118334Speter for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 283218334Speter ep++) 283318334Speter if (ep->to_rtx == SET_DEST (x) 283418334Speter && SET_DEST (x) != hard_frame_pointer_rtx) 283518334Speter { 283618334Speter /* If it is being incremented, adjust the offset. Otherwise, 283718334Speter this elimination can't be done. */ 283818334Speter rtx src = SET_SRC (x); 283918334Speter 284018334Speter if (GET_CODE (src) == PLUS 284118334Speter && XEXP (src, 0) == SET_DEST (x) 284218334Speter && GET_CODE (XEXP (src, 1)) == CONST_INT) 284318334Speter ep->offset -= INTVAL (XEXP (src, 1)); 284418334Speter else 284518334Speter ep->can_eliminate = 0; 284618334Speter } 284718334Speter } 284818334Speter 284990075Sobrien elimination_effects (SET_DEST (x), 0); 285090075Sobrien elimination_effects (SET_SRC (x), 0); 285190075Sobrien return; 285218334Speter 285318334Speter case MEM: 285418334Speter /* Our only special processing is to pass the mode of the MEM to our 285590075Sobrien recursive call. */ 285690075Sobrien elimination_effects (XEXP (x, 0), GET_MODE (x)); 285790075Sobrien return; 285890075Sobrien 285950397Sobrien default: 286050397Sobrien break; 286118334Speter } 286218334Speter 286318334Speter fmt = GET_RTX_FORMAT (code); 286418334Speter for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) 286518334Speter { 286618334Speter if (*fmt == 'e') 286790075Sobrien elimination_effects (XEXP (x, i), mem_mode); 286818334Speter else if (*fmt == 'E') 286990075Sobrien for (j = 0; j < XVECLEN (x, i); j++) 287090075Sobrien elimination_effects (XVECEXP (x, i, j), mem_mode); 287190075Sobrien } 287290075Sobrien} 287390075Sobrien 287490075Sobrien/* Descend through rtx X and verify that no references to eliminable registers 287590075Sobrien remain. If any do remain, mark the involved register as not 287690075Sobrien eliminable. */ 287790075Sobrien 287890075Sobrienstatic void 2879132718Skancheck_eliminable_occurrences (rtx x) 288090075Sobrien{ 288190075Sobrien const char *fmt; 288290075Sobrien int i; 288390075Sobrien enum rtx_code code; 288490075Sobrien 288590075Sobrien if (x == 0) 288690075Sobrien return; 288790075Sobrien 288890075Sobrien code = GET_CODE (x); 288990075Sobrien 289090075Sobrien if (code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) 289190075Sobrien { 289290075Sobrien struct elim_table *ep; 289390075Sobrien 289490075Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 2895169689Skan if (ep->from_rtx == x) 289690075Sobrien ep->can_eliminate = 0; 289790075Sobrien return; 289890075Sobrien } 289990075Sobrien 290090075Sobrien fmt = GET_RTX_FORMAT (code); 290190075Sobrien for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) 290290075Sobrien { 290390075Sobrien if (*fmt == 'e') 290490075Sobrien check_eliminable_occurrences (XEXP (x, i)); 290590075Sobrien else if (*fmt == 'E') 290618334Speter { 290790075Sobrien int j; 290818334Speter for (j = 0; j < XVECLEN (x, i); j++) 290990075Sobrien check_eliminable_occurrences (XVECEXP (x, i, j)); 291018334Speter } 291118334Speter } 291218334Speter} 291318334Speter 291418334Speter/* Scan INSN and eliminate all eliminable registers in it. 291518334Speter 291618334Speter If REPLACE is nonzero, do the replacement destructively. Also 291718334Speter delete the insn as dead it if it is setting an eliminable register. 291818334Speter 291918334Speter If REPLACE is zero, do all our allocations in reload_obstack. 292018334Speter 292118334Speter If no eliminations were done and this insn doesn't require any elimination 292218334Speter processing (these are not identical conditions: it might be updating sp, 292318334Speter but not referencing fp; this needs to be seen during reload_as_needed so 292418334Speter that the offset between fp and sp can be taken into consideration), zero 292518334Speter is returned. Otherwise, 1 is returned. */ 292618334Speter 292718334Speterstatic int 2928132718Skaneliminate_regs_in_insn (rtx insn, int replace) 292918334Speter{ 293090075Sobrien int icode = recog_memoized (insn); 293118334Speter rtx old_body = PATTERN (insn); 293290075Sobrien int insn_is_asm = asm_noperands (old_body) >= 0; 293318334Speter rtx old_set = single_set (insn); 293418334Speter rtx new_body; 293518334Speter int val = 0; 2936132718Skan int i; 293790075Sobrien rtx substed_operand[MAX_RECOG_OPERANDS]; 293890075Sobrien rtx orig_operand[MAX_RECOG_OPERANDS]; 293918334Speter struct elim_table *ep; 2940169689Skan rtx plus_src, plus_cst_src; 294118334Speter 294290075Sobrien if (! insn_is_asm && icode < 0) 294390075Sobrien { 2944169689Skan gcc_assert (GET_CODE (PATTERN (insn)) == USE 2945169689Skan || GET_CODE (PATTERN (insn)) == CLOBBER 2946169689Skan || GET_CODE (PATTERN (insn)) == ADDR_VEC 2947169689Skan || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC 2948169689Skan || GET_CODE (PATTERN (insn)) == ASM_INPUT); 2949169689Skan return 0; 295090075Sobrien } 295118334Speter 2952169689Skan if (old_set != 0 && REG_P (SET_DEST (old_set)) 295318334Speter && REGNO (SET_DEST (old_set)) < FIRST_PSEUDO_REGISTER) 295418334Speter { 295518334Speter /* Check for setting an eliminable register. */ 295618334Speter for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 295718334Speter if (ep->from_rtx == SET_DEST (old_set) && ep->can_eliminate) 295818334Speter { 295918334Speter#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 296018334Speter /* If this is setting the frame pointer register to the 296118334Speter hardware frame pointer register and this is an elimination 296218334Speter that will be done (tested above), this insn is really 296318334Speter adjusting the frame pointer downward to compensate for 296418334Speter the adjustment done before a nonlocal goto. */ 296518334Speter if (ep->from == FRAME_POINTER_REGNUM 296618334Speter && ep->to == HARD_FRAME_POINTER_REGNUM) 296718334Speter { 296890075Sobrien rtx base = SET_SRC (old_set); 296990075Sobrien rtx base_insn = insn; 2970132718Skan HOST_WIDE_INT offset = 0; 297118334Speter 297290075Sobrien while (base != ep->to_rtx) 297350397Sobrien { 297490075Sobrien rtx prev_insn, prev_set; 297590075Sobrien 297690075Sobrien if (GET_CODE (base) == PLUS 297790075Sobrien && GET_CODE (XEXP (base, 1)) == CONST_INT) 297890075Sobrien { 297990075Sobrien offset += INTVAL (XEXP (base, 1)); 298090075Sobrien base = XEXP (base, 0); 298190075Sobrien } 298290075Sobrien else if ((prev_insn = prev_nonnote_insn (base_insn)) != 0 298390075Sobrien && (prev_set = single_set (prev_insn)) != 0 298490075Sobrien && rtx_equal_p (SET_DEST (prev_set), base)) 298590075Sobrien { 298690075Sobrien base = SET_SRC (prev_set); 298790075Sobrien base_insn = prev_insn; 298890075Sobrien } 298990075Sobrien else 299090075Sobrien break; 299150397Sobrien } 299218334Speter 299390075Sobrien if (base == ep->to_rtx) 299418334Speter { 299590075Sobrien rtx src 299690075Sobrien = plus_constant (ep->to_rtx, offset - ep->offset); 299790075Sobrien 299890075Sobrien new_body = old_body; 299990075Sobrien if (! replace) 300018334Speter { 300190075Sobrien new_body = copy_insn (old_body); 300290075Sobrien if (REG_NOTES (insn)) 300390075Sobrien REG_NOTES (insn) = copy_insn_1 (REG_NOTES (insn)); 300490075Sobrien } 300590075Sobrien PATTERN (insn) = new_body; 300690075Sobrien old_set = single_set (insn); 300718334Speter 300890075Sobrien /* First see if this insn remains valid when we 300990075Sobrien make the change. If not, keep the INSN_CODE 301090075Sobrien the same and let reload fit it up. */ 301190075Sobrien validate_change (insn, &SET_SRC (old_set), src, 1); 301290075Sobrien validate_change (insn, &SET_DEST (old_set), 301390075Sobrien ep->to_rtx, 1); 301490075Sobrien if (! apply_change_group ()) 301590075Sobrien { 301690075Sobrien SET_SRC (old_set) = src; 301790075Sobrien SET_DEST (old_set) = ep->to_rtx; 301818334Speter } 301918334Speter 302018334Speter val = 1; 302118334Speter goto done; 302218334Speter } 302318334Speter } 302418334Speter#endif 302518334Speter 302618334Speter /* In this case this insn isn't serving a useful purpose. We 302718334Speter will delete it in reload_as_needed once we know that this 302818334Speter elimination is, in fact, being done. 302918334Speter 303018334Speter If REPLACE isn't set, we can't delete this insn, but needn't 303118334Speter process it since it won't be used unless something changes. */ 303218334Speter if (replace) 303390075Sobrien { 303490075Sobrien delete_dead_insn (insn); 303590075Sobrien return 1; 303690075Sobrien } 303718334Speter val = 1; 303818334Speter goto done; 303918334Speter } 304090075Sobrien } 304118334Speter 304290075Sobrien /* We allow one special case which happens to work on all machines we 3043169689Skan currently support: a single set with the source or a REG_EQUAL 3044169689Skan note being a PLUS of an eliminable register and a constant. */ 3045169689Skan plus_src = plus_cst_src = 0; 3046169689Skan if (old_set && REG_P (SET_DEST (old_set))) 304790075Sobrien { 3048169689Skan if (GET_CODE (SET_SRC (old_set)) == PLUS) 3049169689Skan plus_src = SET_SRC (old_set); 3050169689Skan /* First see if the source is of the form (plus (...) CST). */ 3051169689Skan if (plus_src 3052169689Skan && GET_CODE (XEXP (plus_src, 1)) == CONST_INT) 3053169689Skan plus_cst_src = plus_src; 3054169689Skan else if (REG_P (SET_SRC (old_set)) 3055169689Skan || plus_src) 3056169689Skan { 3057169689Skan /* Otherwise, see if we have a REG_EQUAL note of the form 3058169689Skan (plus (...) CST). */ 3059169689Skan rtx links; 3060169689Skan for (links = REG_NOTES (insn); links; links = XEXP (links, 1)) 3061169689Skan { 3062169689Skan if (REG_NOTE_KIND (links) == REG_EQUAL 3063169689Skan && GET_CODE (XEXP (links, 0)) == PLUS 3064169689Skan && GET_CODE (XEXP (XEXP (links, 0), 1)) == CONST_INT) 3065169689Skan { 3066169689Skan plus_cst_src = XEXP (links, 0); 3067169689Skan break; 3068169689Skan } 3069169689Skan } 3070169689Skan } 307118334Speter 3072169689Skan /* Check that the first operand of the PLUS is a hard reg or 3073169689Skan the lowpart subreg of one. */ 3074169689Skan if (plus_cst_src) 3075169689Skan { 3076169689Skan rtx reg = XEXP (plus_cst_src, 0); 3077169689Skan if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg)) 3078169689Skan reg = SUBREG_REG (reg); 3079169689Skan 3080169689Skan if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER) 3081169689Skan plus_cst_src = 0; 3082169689Skan } 3083169689Skan } 3084169689Skan if (plus_cst_src) 3085169689Skan { 3086169689Skan rtx reg = XEXP (plus_cst_src, 0); 3087169689Skan HOST_WIDE_INT offset = INTVAL (XEXP (plus_cst_src, 1)); 3088169689Skan 3089169689Skan if (GET_CODE (reg) == SUBREG) 3090169689Skan reg = SUBREG_REG (reg); 3091169689Skan 309290075Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 309390075Sobrien if (ep->from_rtx == reg && ep->can_eliminate) 309490075Sobrien { 3095169689Skan rtx to_rtx = ep->to_rtx; 309690075Sobrien offset += ep->offset; 3097169689Skan offset = trunc_int_for_mode (offset, GET_MODE (reg)); 309818334Speter 3099169689Skan if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG) 3100169689Skan to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), 3101169689Skan to_rtx); 3102169689Skan /* If we have a nonzero offset, and the source is already 3103169689Skan a simple REG, the following transformation would 3104169689Skan increase the cost of the insn by replacing a simple REG 3105169689Skan with (plus (reg sp) CST). So try only when we already 3106169689Skan had a PLUS before. */ 3107169689Skan if (offset == 0 || plus_src) 310890075Sobrien { 3109169689Skan rtx new_src = plus_constant (to_rtx, offset); 311090075Sobrien 311190075Sobrien new_body = old_body; 311290075Sobrien if (! replace) 311390075Sobrien { 311490075Sobrien new_body = copy_insn (old_body); 311590075Sobrien if (REG_NOTES (insn)) 311690075Sobrien REG_NOTES (insn) = copy_insn_1 (REG_NOTES (insn)); 311790075Sobrien } 311890075Sobrien PATTERN (insn) = new_body; 311990075Sobrien old_set = single_set (insn); 312090075Sobrien 3121169689Skan /* First see if this insn remains valid when we make the 3122169689Skan change. If not, try to replace the whole pattern with 3123169689Skan a simple set (this may help if the original insn was a 3124169689Skan PARALLEL that was only recognized as single_set due to 3125169689Skan REG_UNUSED notes). If this isn't valid either, keep 3126169689Skan the INSN_CODE the same and let reload fix it up. */ 3127169689Skan if (!validate_change (insn, &SET_SRC (old_set), new_src, 0)) 3128169689Skan { 3129169689Skan rtx new_pat = gen_rtx_SET (VOIDmode, 3130169689Skan SET_DEST (old_set), new_src); 3131169689Skan 3132169689Skan if (!validate_change (insn, &PATTERN (insn), new_pat, 0)) 3133169689Skan SET_SRC (old_set) = new_src; 3134169689Skan } 313590075Sobrien } 3136169689Skan else 3137169689Skan break; 3138169689Skan 313990075Sobrien val = 1; 314090075Sobrien /* This can't have an effect on elimination offsets, so skip right 314190075Sobrien to the end. */ 314290075Sobrien goto done; 314390075Sobrien } 314490075Sobrien } 314590075Sobrien 314690075Sobrien /* Determine the effects of this insn on elimination offsets. */ 314790075Sobrien elimination_effects (old_body, 0); 314890075Sobrien 314990075Sobrien /* Eliminate all eliminable registers occurring in operands that 315090075Sobrien can be handled by reload. */ 315190075Sobrien extract_insn (insn); 315290075Sobrien for (i = 0; i < recog_data.n_operands; i++) 315390075Sobrien { 315490075Sobrien orig_operand[i] = recog_data.operand[i]; 315590075Sobrien substed_operand[i] = recog_data.operand[i]; 315690075Sobrien 315790075Sobrien /* For an asm statement, every operand is eliminable. */ 315890075Sobrien if (insn_is_asm || insn_data[icode].operand[i].eliminable) 315990075Sobrien { 3160169689Skan bool is_set_src, in_plus; 3161169689Skan 316290075Sobrien /* Check for setting a register that we know about. */ 316390075Sobrien if (recog_data.operand_type[i] != OP_IN 3164169689Skan && REG_P (orig_operand[i])) 316518334Speter { 316690075Sobrien /* If we are assigning to a register that can be eliminated, it 316790075Sobrien must be as part of a PARALLEL, since the code above handles 316890075Sobrien single SETs. We must indicate that we can no longer 316990075Sobrien eliminate this reg. */ 317090075Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 317190075Sobrien ep++) 3172169689Skan if (ep->from_rtx == orig_operand[i]) 317390075Sobrien ep->can_eliminate = 0; 317490075Sobrien } 317518334Speter 3176169689Skan /* Companion to the above plus substitution, we can allow 3177169689Skan invariants as the source of a plain move. */ 3178169689Skan is_set_src = false; 3179169689Skan if (old_set && recog_data.operand_loc[i] == &SET_SRC (old_set)) 3180169689Skan is_set_src = true; 3181169689Skan in_plus = false; 3182169689Skan if (plus_src 3183169689Skan && (recog_data.operand_loc[i] == &XEXP (plus_src, 0) 3184169689Skan || recog_data.operand_loc[i] == &XEXP (plus_src, 1))) 3185169689Skan in_plus = true; 3186169689Skan 3187169689Skan substed_operand[i] 3188169689Skan = eliminate_regs_1 (recog_data.operand[i], 0, 3189169689Skan replace ? insn : NULL_RTX, 3190169689Skan is_set_src || in_plus); 319190075Sobrien if (substed_operand[i] != orig_operand[i]) 3192132718Skan val = 1; 319390075Sobrien /* Terminate the search in check_eliminable_occurrences at 319490075Sobrien this point. */ 319590075Sobrien *recog_data.operand_loc[i] = 0; 319690075Sobrien 319790075Sobrien /* If an output operand changed from a REG to a MEM and INSN is an 319890075Sobrien insn, write a CLOBBER insn. */ 319990075Sobrien if (recog_data.operand_type[i] != OP_IN 3200169689Skan && REG_P (orig_operand[i]) 3201169689Skan && MEM_P (substed_operand[i]) 320290075Sobrien && replace) 320390075Sobrien emit_insn_after (gen_rtx_CLOBBER (VOIDmode, orig_operand[i]), 320490075Sobrien insn); 320590075Sobrien } 320618334Speter } 320718334Speter 320890075Sobrien for (i = 0; i < recog_data.n_dups; i++) 320990075Sobrien *recog_data.dup_loc[i] 321090075Sobrien = *recog_data.operand_loc[(int) recog_data.dup_num[i]]; 321118334Speter 321290075Sobrien /* If any eliminable remain, they aren't eliminable anymore. */ 321390075Sobrien check_eliminable_occurrences (old_body); 321418334Speter 321590075Sobrien /* Substitute the operands; the new values are in the substed_operand 321690075Sobrien array. */ 321790075Sobrien for (i = 0; i < recog_data.n_operands; i++) 321890075Sobrien *recog_data.operand_loc[i] = substed_operand[i]; 321990075Sobrien for (i = 0; i < recog_data.n_dups; i++) 322090075Sobrien *recog_data.dup_loc[i] = substed_operand[(int) recog_data.dup_num[i]]; 322190075Sobrien 322290075Sobrien /* If we are replacing a body that was a (set X (plus Y Z)), try to 322318334Speter re-recognize the insn. We do this in case we had a simple addition 322418334Speter but now can do this as a load-address. This saves an insn in this 322590075Sobrien common case. 322690075Sobrien If re-recognition fails, the old insn code number will still be used, 322790075Sobrien and some register operands may have changed into PLUS expressions. 322890075Sobrien These will be handled by find_reloads by loading them into a register 322990075Sobrien again. */ 323018334Speter 323190075Sobrien if (val) 323218334Speter { 323318334Speter /* If we aren't replacing things permanently and we changed something, 323418334Speter make another copy to ensure that all the RTL is new. Otherwise 323518334Speter things can go wrong if find_reload swaps commutative operands 323650397Sobrien and one is inside RTL that has been copied while the other is not. */ 323790075Sobrien new_body = old_body; 323890075Sobrien if (! replace) 323990075Sobrien { 324090075Sobrien new_body = copy_insn (old_body); 324190075Sobrien if (REG_NOTES (insn)) 324290075Sobrien REG_NOTES (insn) = copy_insn_1 (REG_NOTES (insn)); 324390075Sobrien } 324490075Sobrien PATTERN (insn) = new_body; 324518334Speter 324618334Speter /* If we had a move insn but now we don't, rerecognize it. This will 324718334Speter cause spurious re-recognition if the old move had a PARALLEL since 324818334Speter the new one still will, but we can't call single_set without 324918334Speter having put NEW_BODY into the insn and the re-recognition won't 325018334Speter hurt in this rare case. */ 325190075Sobrien /* ??? Why this huge if statement - why don't we just rerecognize the 325290075Sobrien thing always? */ 325390075Sobrien if (! insn_is_asm 325490075Sobrien && old_set != 0 3255169689Skan && ((REG_P (SET_SRC (old_set)) 325618334Speter && (GET_CODE (new_body) != SET 3257169689Skan || !REG_P (SET_SRC (new_body)))) 325818334Speter /* If this was a load from or store to memory, compare 325990075Sobrien the MEM in recog_data.operand to the one in the insn. 326090075Sobrien If they are not equal, then rerecognize the insn. */ 326118334Speter || (old_set != 0 3262169689Skan && ((MEM_P (SET_SRC (old_set)) 326390075Sobrien && SET_SRC (old_set) != recog_data.operand[1]) 3264169689Skan || (MEM_P (SET_DEST (old_set)) 326590075Sobrien && SET_DEST (old_set) != recog_data.operand[0]))) 326618334Speter /* If this was an add insn before, rerecognize. */ 326718334Speter || GET_CODE (SET_SRC (old_set)) == PLUS)) 326818334Speter { 326990075Sobrien int new_icode = recog (PATTERN (insn), insn, 0); 3270169689Skan if (new_icode >= 0) 3271169689Skan INSN_CODE (insn) = new_icode; 327218334Speter } 327390075Sobrien } 327418334Speter 327590075Sobrien /* Restore the old body. If there were any changes to it, we made a copy 327690075Sobrien of it while the changes were still in place, so we'll correctly return 327790075Sobrien a modified insn below. */ 327890075Sobrien if (! replace) 327990075Sobrien { 328090075Sobrien /* Restore the old body. */ 328190075Sobrien for (i = 0; i < recog_data.n_operands; i++) 328290075Sobrien *recog_data.operand_loc[i] = orig_operand[i]; 328390075Sobrien for (i = 0; i < recog_data.n_dups; i++) 328490075Sobrien *recog_data.dup_loc[i] = orig_operand[(int) recog_data.dup_num[i]]; 328518334Speter } 328618334Speter 328790075Sobrien /* Update all elimination pairs to reflect the status after the current 328890075Sobrien insn. The changes we make were determined by the earlier call to 328990075Sobrien elimination_effects. 329018334Speter 3291117395Skan We also detect cases where register elimination cannot be done, 329218334Speter namely, if a register would be both changed and referenced outside a MEM 329318334Speter in the resulting insn since such an insn is often undefined and, even if 329418334Speter not, we cannot know what meaning will be given to it. Note that it is 329518334Speter valid to have a register used in an address in an insn that changes it 329618334Speter (presumably with a pre- or post-increment or decrement). 329718334Speter 329818334Speter If anything changes, return nonzero. */ 329918334Speter 330018334Speter for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 330118334Speter { 330218334Speter if (ep->previous_offset != ep->offset && ep->ref_outside_mem) 330318334Speter ep->can_eliminate = 0; 330418334Speter 330518334Speter ep->ref_outside_mem = 0; 330618334Speter 330718334Speter if (ep->previous_offset != ep->offset) 330818334Speter val = 1; 330918334Speter } 331018334Speter 331118334Speter done: 331218334Speter /* If we changed something, perform elimination in REG_NOTES. This is 331318334Speter needed even when REPLACE is zero because a REG_DEAD note might refer 331418334Speter to a register that we eliminate and could cause a different number 331518334Speter of spill registers to be needed in the final reload pass than in 331618334Speter the pre-passes. */ 331718334Speter if (val && REG_NOTES (insn) != 0) 3318169689Skan REG_NOTES (insn) 3319169689Skan = eliminate_regs_1 (REG_NOTES (insn), 0, REG_NOTES (insn), true); 332018334Speter 332118334Speter return val; 332218334Speter} 332318334Speter 332452284Sobrien/* Loop through all elimination pairs. 332552284Sobrien Recalculate the number not at initial offset. 332652284Sobrien 332752284Sobrien Compute the maximum offset (minimum offset if the stack does not 332852284Sobrien grow downward) for each elimination pair. */ 332952284Sobrien 333052284Sobrienstatic void 3331132718Skanupdate_eliminable_offsets (void) 333252284Sobrien{ 333352284Sobrien struct elim_table *ep; 333452284Sobrien 333552284Sobrien num_not_at_initial_offset = 0; 333652284Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 333752284Sobrien { 333852284Sobrien ep->previous_offset = ep->offset; 333952284Sobrien if (ep->can_eliminate && ep->offset != ep->initial_offset) 334052284Sobrien num_not_at_initial_offset++; 334152284Sobrien } 334252284Sobrien} 334352284Sobrien 334418334Speter/* Given X, a SET or CLOBBER of DEST, if DEST is the target of a register 334518334Speter replacement we currently believe is valid, mark it as not eliminable if X 334618334Speter modifies DEST in any way other than by adding a constant integer to it. 334718334Speter 334818334Speter If DEST is the frame pointer, we do nothing because we assume that 334918334Speter all assignments to the hard frame pointer are nonlocal gotos and are being 335018334Speter done at a time when they are valid and do not disturb anything else. 335118334Speter Some machines want to eliminate a fake argument pointer with either the 335218334Speter frame or stack pointer. Assignments to the hard frame pointer must not 335318334Speter prevent this elimination. 335418334Speter 335518334Speter Called via note_stores from reload before starting its passes to scan 335618334Speter the insns of the function. */ 335718334Speter 335818334Speterstatic void 3359132718Skanmark_not_eliminable (rtx dest, rtx x, void *data ATTRIBUTE_UNUSED) 336018334Speter{ 336190075Sobrien unsigned int i; 336218334Speter 336318334Speter /* A SUBREG of a hard register here is just changing its mode. We should 336418334Speter not see a SUBREG of an eliminable hard register, but check just in 336518334Speter case. */ 336618334Speter if (GET_CODE (dest) == SUBREG) 336718334Speter dest = SUBREG_REG (dest); 336818334Speter 336918334Speter if (dest == hard_frame_pointer_rtx) 337018334Speter return; 337118334Speter 337218334Speter for (i = 0; i < NUM_ELIMINABLE_REGS; i++) 337318334Speter if (reg_eliminate[i].can_eliminate && dest == reg_eliminate[i].to_rtx 337418334Speter && (GET_CODE (x) != SET 337518334Speter || GET_CODE (SET_SRC (x)) != PLUS 337618334Speter || XEXP (SET_SRC (x), 0) != dest 337718334Speter || GET_CODE (XEXP (SET_SRC (x), 1)) != CONST_INT)) 337818334Speter { 337918334Speter reg_eliminate[i].can_eliminate_previous 338018334Speter = reg_eliminate[i].can_eliminate = 0; 338118334Speter num_eliminable--; 338218334Speter } 338318334Speter} 338452284Sobrien 338552284Sobrien/* Verify that the initial elimination offsets did not change since the 338652284Sobrien last call to set_initial_elim_offsets. This is used to catch cases 338752284Sobrien where something illegal happened during reload_as_needed that could 338852284Sobrien cause incorrect code to be generated if we did not check for it. */ 338990075Sobrien 3390169689Skanstatic bool 3391132718Skanverify_initial_elim_offsets (void) 339252284Sobrien{ 3393132718Skan HOST_WIDE_INT t; 339452284Sobrien 3395169689Skan if (!num_eliminable) 3396169689Skan return true; 3397169689Skan 339852284Sobrien#ifdef ELIMINABLE_REGS 3399169689Skan { 3400169689Skan struct elim_table *ep; 340152284Sobrien 3402169689Skan for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 3403169689Skan { 3404169689Skan INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, t); 3405169689Skan if (t != ep->initial_offset) 3406169689Skan return false; 3407169689Skan } 3408169689Skan } 340952284Sobrien#else 341052284Sobrien INITIAL_FRAME_POINTER_OFFSET (t); 341152284Sobrien if (t != reg_eliminate[0].initial_offset) 3412169689Skan return false; 341390075Sobrien#endif 3414169689Skan 3415169689Skan return true; 341652284Sobrien} 341752284Sobrien 341852284Sobrien/* Reset all offsets on eliminable registers to their initial values. */ 341990075Sobrien 342052284Sobrienstatic void 3421132718Skanset_initial_elim_offsets (void) 342252284Sobrien{ 342352284Sobrien struct elim_table *ep = reg_eliminate; 342452284Sobrien 342552284Sobrien#ifdef ELIMINABLE_REGS 342652284Sobrien for (; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 342752284Sobrien { 342852284Sobrien INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->initial_offset); 342952284Sobrien ep->previous_offset = ep->offset = ep->initial_offset; 343052284Sobrien } 343152284Sobrien#else 343252284Sobrien INITIAL_FRAME_POINTER_OFFSET (ep->initial_offset); 343352284Sobrien ep->previous_offset = ep->offset = ep->initial_offset; 343452284Sobrien#endif 343552284Sobrien 343652284Sobrien num_not_at_initial_offset = 0; 343752284Sobrien} 343852284Sobrien 3439146895Skan/* Subroutine of set_initial_label_offsets called via for_each_eh_label. */ 3440146895Skan 3441146895Skanstatic void 3442146895Skanset_initial_eh_label_offset (rtx label) 3443146895Skan{ 3444146895Skan set_label_offsets (label, NULL_RTX, 1); 3445146895Skan} 3446146895Skan 344752284Sobrien/* Initialize the known label offsets. 344852284Sobrien Set a known offset for each forced label to be at the initial offset 344952284Sobrien of each elimination. We do this because we assume that all 345052284Sobrien computed jumps occur from a location where each elimination is 345152284Sobrien at its initial offset. 345252284Sobrien For all other labels, show that we don't know the offsets. */ 345352284Sobrien 345452284Sobrienstatic void 3455132718Skanset_initial_label_offsets (void) 345652284Sobrien{ 345752284Sobrien rtx x; 3458117395Skan memset (offsets_known_at, 0, num_labels); 345952284Sobrien 346052284Sobrien for (x = forced_labels; x; x = XEXP (x, 1)) 346152284Sobrien if (XEXP (x, 0)) 346252284Sobrien set_label_offsets (XEXP (x, 0), NULL_RTX, 1); 3463146895Skan 3464146895Skan for_each_eh_label (set_initial_eh_label_offset); 346552284Sobrien} 346652284Sobrien 346752284Sobrien/* Set all elimination offsets to the known values for the code label given 346852284Sobrien by INSN. */ 346990075Sobrien 347052284Sobrienstatic void 3471132718Skanset_offsets_for_label (rtx insn) 347252284Sobrien{ 347352284Sobrien unsigned int i; 347452284Sobrien int label_nr = CODE_LABEL_NUMBER (insn); 347552284Sobrien struct elim_table *ep; 347652284Sobrien 347752284Sobrien num_not_at_initial_offset = 0; 347852284Sobrien for (i = 0, ep = reg_eliminate; i < NUM_ELIMINABLE_REGS; ep++, i++) 347952284Sobrien { 3480117395Skan ep->offset = ep->previous_offset 3481117395Skan = offsets_at[label_nr - first_label_num][i]; 348252284Sobrien if (ep->can_eliminate && ep->offset != ep->initial_offset) 348352284Sobrien num_not_at_initial_offset++; 348452284Sobrien } 348552284Sobrien} 348652284Sobrien 348752284Sobrien/* See if anything that happened changes which eliminations are valid. 3488117395Skan For example, on the SPARC, whether or not the frame pointer can 348952284Sobrien be eliminated can depend on what registers have been used. We need 349052284Sobrien not check some conditions again (such as flag_omit_frame_pointer) 349152284Sobrien since they can't have changed. */ 349252284Sobrien 349352284Sobrienstatic void 3494132718Skanupdate_eliminables (HARD_REG_SET *pset) 349552284Sobrien{ 349652284Sobrien int previous_frame_pointer_needed = frame_pointer_needed; 349752284Sobrien struct elim_table *ep; 349852284Sobrien 349952284Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 350052284Sobrien if ((ep->from == HARD_FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED) 350152284Sobrien#ifdef ELIMINABLE_REGS 350252284Sobrien || ! CAN_ELIMINATE (ep->from, ep->to) 350352284Sobrien#endif 350452284Sobrien ) 350552284Sobrien ep->can_eliminate = 0; 350652284Sobrien 350752284Sobrien /* Look for the case where we have discovered that we can't replace 350852284Sobrien register A with register B and that means that we will now be 350952284Sobrien trying to replace register A with register C. This means we can 351052284Sobrien no longer replace register C with register B and we need to disable 351152284Sobrien such an elimination, if it exists. This occurs often with A == ap, 351252284Sobrien B == sp, and C == fp. */ 351352284Sobrien 351452284Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 351552284Sobrien { 351652284Sobrien struct elim_table *op; 351790075Sobrien int new_to = -1; 351852284Sobrien 351952284Sobrien if (! ep->can_eliminate && ep->can_eliminate_previous) 352052284Sobrien { 352152284Sobrien /* Find the current elimination for ep->from, if there is a 352252284Sobrien new one. */ 352352284Sobrien for (op = reg_eliminate; 352452284Sobrien op < ®_eliminate[NUM_ELIMINABLE_REGS]; op++) 352552284Sobrien if (op->from == ep->from && op->can_eliminate) 352652284Sobrien { 352752284Sobrien new_to = op->to; 352852284Sobrien break; 352952284Sobrien } 353052284Sobrien 353152284Sobrien /* See if there is an elimination of NEW_TO -> EP->TO. If so, 353252284Sobrien disable it. */ 353352284Sobrien for (op = reg_eliminate; 353452284Sobrien op < ®_eliminate[NUM_ELIMINABLE_REGS]; op++) 353552284Sobrien if (op->from == new_to && op->to == ep->to) 353652284Sobrien op->can_eliminate = 0; 353752284Sobrien } 353852284Sobrien } 353952284Sobrien 354052284Sobrien /* See if any registers that we thought we could eliminate the previous 354152284Sobrien time are no longer eliminable. If so, something has changed and we 354252284Sobrien must spill the register. Also, recompute the number of eliminable 354352284Sobrien registers and see if the frame pointer is needed; it is if there is 354452284Sobrien no elimination of the frame pointer that we can perform. */ 354552284Sobrien 354652284Sobrien frame_pointer_needed = 1; 354752284Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 354852284Sobrien { 354952284Sobrien if (ep->can_eliminate && ep->from == FRAME_POINTER_REGNUM 355052284Sobrien && ep->to != HARD_FRAME_POINTER_REGNUM) 355152284Sobrien frame_pointer_needed = 0; 355252284Sobrien 355352284Sobrien if (! ep->can_eliminate && ep->can_eliminate_previous) 355452284Sobrien { 355552284Sobrien ep->can_eliminate_previous = 0; 355652284Sobrien SET_HARD_REG_BIT (*pset, ep->from); 355752284Sobrien num_eliminable--; 355852284Sobrien } 355952284Sobrien } 356052284Sobrien 356152284Sobrien /* If we didn't need a frame pointer last time, but we do now, spill 356252284Sobrien the hard frame pointer. */ 356352284Sobrien if (frame_pointer_needed && ! previous_frame_pointer_needed) 356452284Sobrien SET_HARD_REG_BIT (*pset, HARD_FRAME_POINTER_REGNUM); 356552284Sobrien} 356652284Sobrien 356752284Sobrien/* Initialize the table of registers to eliminate. */ 356890075Sobrien 356952284Sobrienstatic void 3570132718Skaninit_elim_table (void) 357152284Sobrien{ 357252284Sobrien struct elim_table *ep; 357352284Sobrien#ifdef ELIMINABLE_REGS 357490075Sobrien const struct elim_table_1 *ep1; 357552284Sobrien#endif 357652284Sobrien 357752284Sobrien if (!reg_eliminate) 3578132718Skan reg_eliminate = xcalloc (sizeof (struct elim_table), NUM_ELIMINABLE_REGS); 357990075Sobrien 358052284Sobrien /* Does this function require a frame pointer? */ 358152284Sobrien 358252284Sobrien frame_pointer_needed = (! flag_omit_frame_pointer 358352284Sobrien /* ?? If EXIT_IGNORE_STACK is set, we will not save 358452284Sobrien and restore sp for alloca. So we can't eliminate 358552284Sobrien the frame pointer in that case. At some point, 358652284Sobrien we should improve this by emitting the 358752284Sobrien sp-adjusting insns for this case. */ 358852284Sobrien || (current_function_calls_alloca 358952284Sobrien && EXIT_IGNORE_STACK) 3590169689Skan || current_function_accesses_prior_frames 359152284Sobrien || FRAME_POINTER_REQUIRED); 359252284Sobrien 359352284Sobrien num_eliminable = 0; 359452284Sobrien 359552284Sobrien#ifdef ELIMINABLE_REGS 359652284Sobrien for (ep = reg_eliminate, ep1 = reg_eliminate_1; 359752284Sobrien ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++) 359852284Sobrien { 359952284Sobrien ep->from = ep1->from; 360052284Sobrien ep->to = ep1->to; 360152284Sobrien ep->can_eliminate = ep->can_eliminate_previous 360252284Sobrien = (CAN_ELIMINATE (ep->from, ep->to) 360352284Sobrien && ! (ep->to == STACK_POINTER_REGNUM && frame_pointer_needed)); 360452284Sobrien } 360552284Sobrien#else 360652284Sobrien reg_eliminate[0].from = reg_eliminate_1[0].from; 360752284Sobrien reg_eliminate[0].to = reg_eliminate_1[0].to; 360852284Sobrien reg_eliminate[0].can_eliminate = reg_eliminate[0].can_eliminate_previous 360952284Sobrien = ! frame_pointer_needed; 361052284Sobrien#endif 361152284Sobrien 361252284Sobrien /* Count the number of eliminable registers and build the FROM and TO 3613169689Skan REG rtx's. Note that code in gen_rtx_REG will cause, e.g., 3614169689Skan gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to equal stack_pointer_rtx. 361552284Sobrien We depend on this. */ 361652284Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 361752284Sobrien { 361852284Sobrien num_eliminable += ep->can_eliminate; 361952284Sobrien ep->from_rtx = gen_rtx_REG (Pmode, ep->from); 362052284Sobrien ep->to_rtx = gen_rtx_REG (Pmode, ep->to); 362152284Sobrien } 362252284Sobrien} 362318334Speter 362418334Speter/* Kick all pseudos out of hard register REGNO. 362518334Speter 362618334Speter If CANT_ELIMINATE is nonzero, it means that we are doing this spill 362718334Speter because we found we can't eliminate some register. In the case, no pseudos 362818334Speter are allowed to be in the register, even if they are only in a block that 362918334Speter doesn't require spill registers, unlike the case when we are spilling this 363018334Speter hard reg to produce another spill register. 363118334Speter 363218334Speter Return nonzero if any pseudos needed to be kicked out. */ 363318334Speter 363452284Sobrienstatic void 3635132718Skanspill_hard_reg (unsigned int regno, int cant_eliminate) 363618334Speter{ 363790075Sobrien int i; 363818334Speter 363918334Speter if (cant_eliminate) 364052284Sobrien { 364152284Sobrien SET_HARD_REG_BIT (bad_spill_regs_global, regno); 364252284Sobrien regs_ever_live[regno] = 1; 364352284Sobrien } 364418334Speter 364518334Speter /* Spill every pseudo reg that was allocated to this reg 364618334Speter or to something that overlaps this reg. */ 364718334Speter 364818334Speter for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 364918334Speter if (reg_renumber[i] >= 0 365090075Sobrien && (unsigned int) reg_renumber[i] <= regno 365190075Sobrien && ((unsigned int) reg_renumber[i] 3652169689Skan + hard_regno_nregs[(unsigned int) reg_renumber[i]] 3653169689Skan [PSEUDO_REGNO_MODE (i)] 365418334Speter > regno)) 365590075Sobrien SET_REGNO_REG_SET (&spilled_pseudos, i); 365652284Sobrien} 365718334Speter 365852284Sobrien/* After find_reload_regs has been run for all insn that need reloads, 365952284Sobrien and/or spill_hard_regs was called, this function is used to actually 366052284Sobrien spill pseudo registers and try to reallocate them. It also sets up the 366152284Sobrien spill_regs array for use by choose_reload_regs. */ 366218334Speter 366352284Sobrienstatic int 3664132718Skanfinish_spills (int global) 366552284Sobrien{ 366652284Sobrien struct insn_chain *chain; 366752284Sobrien int something_changed = 0; 3668169689Skan unsigned i; 3669169689Skan reg_set_iterator rsi; 367018334Speter 367152284Sobrien /* Build the spill_regs array for the function. */ 367252284Sobrien /* If there are some registers still to eliminate and one of the spill regs 367352284Sobrien wasn't ever used before, additional stack space may have to be 367452284Sobrien allocated to store this register. Thus, we may have changed the offset 367552284Sobrien between the stack and frame pointers, so mark that something has changed. 367618334Speter 367752284Sobrien One might think that we need only set VAL to 1 if this is a call-used 367852284Sobrien register. However, the set of registers that must be saved by the 367952284Sobrien prologue is not identical to the call-used set. For example, the 368052284Sobrien register used by the call insn for the return PC is a call-used register, 368152284Sobrien but must be saved by the prologue. */ 368252284Sobrien 368352284Sobrien n_spills = 0; 368452284Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 368552284Sobrien if (TEST_HARD_REG_BIT (used_spill_regs, i)) 368652284Sobrien { 368752284Sobrien spill_reg_order[i] = n_spills; 368852284Sobrien spill_regs[n_spills++] = i; 368952284Sobrien if (num_eliminable && ! regs_ever_live[i]) 369052284Sobrien something_changed = 1; 369152284Sobrien regs_ever_live[i] = 1; 369252284Sobrien } 369352284Sobrien else 369452284Sobrien spill_reg_order[i] = -1; 369552284Sobrien 3696169689Skan EXECUTE_IF_SET_IN_REG_SET (&spilled_pseudos, FIRST_PSEUDO_REGISTER, i, rsi) 3697169689Skan { 3698169689Skan /* Record the current hard register the pseudo is allocated to in 3699169689Skan pseudo_previous_regs so we avoid reallocating it to the same 3700169689Skan hard reg in a later pass. */ 3701169689Skan gcc_assert (reg_renumber[i] >= 0); 370218334Speter 3703169689Skan SET_HARD_REG_BIT (pseudo_previous_regs[i], reg_renumber[i]); 3704169689Skan /* Mark it as no longer having a hard register home. */ 3705169689Skan reg_renumber[i] = -1; 3706169689Skan /* We will need to scan everything again. */ 3707169689Skan something_changed = 1; 3708169689Skan } 370990075Sobrien 371052284Sobrien /* Retry global register allocation if possible. */ 371152284Sobrien if (global) 371252284Sobrien { 3713132718Skan memset (pseudo_forbidden_regs, 0, max_regno * sizeof (HARD_REG_SET)); 371452284Sobrien /* For every insn that needs reloads, set the registers used as spill 371552284Sobrien regs in pseudo_forbidden_regs for every pseudo live across the 371652284Sobrien insn. */ 371752284Sobrien for (chain = insns_need_reload; chain; chain = chain->next_need_reload) 371852284Sobrien { 371952284Sobrien EXECUTE_IF_SET_IN_REG_SET 3720169689Skan (&chain->live_throughout, FIRST_PSEUDO_REGISTER, i, rsi) 3721169689Skan { 3722169689Skan IOR_HARD_REG_SET (pseudo_forbidden_regs[i], 3723169689Skan chain->used_spill_regs); 3724169689Skan } 372552284Sobrien EXECUTE_IF_SET_IN_REG_SET 3726169689Skan (&chain->dead_or_set, FIRST_PSEUDO_REGISTER, i, rsi) 3727169689Skan { 3728169689Skan IOR_HARD_REG_SET (pseudo_forbidden_regs[i], 3729169689Skan chain->used_spill_regs); 3730169689Skan } 373152284Sobrien } 373252284Sobrien 373352284Sobrien /* Retry allocating the spilled pseudos. For each reg, merge the 373452284Sobrien various reg sets that indicate which hard regs can't be used, 373552284Sobrien and call retry_global_alloc. 373690075Sobrien We change spill_pseudos here to only contain pseudos that did not 373752284Sobrien get a new hard register. */ 3738169689Skan for (i = FIRST_PSEUDO_REGISTER; i < (unsigned)max_regno; i++) 373952284Sobrien if (reg_old_renumber[i] != reg_renumber[i]) 374018334Speter { 374152284Sobrien HARD_REG_SET forbidden; 374252284Sobrien COPY_HARD_REG_SET (forbidden, bad_spill_regs_global); 374352284Sobrien IOR_HARD_REG_SET (forbidden, pseudo_forbidden_regs[i]); 374452284Sobrien IOR_HARD_REG_SET (forbidden, pseudo_previous_regs[i]); 374552284Sobrien retry_global_alloc (i, forbidden); 374652284Sobrien if (reg_renumber[i] >= 0) 374790075Sobrien CLEAR_REGNO_REG_SET (&spilled_pseudos, i); 374818334Speter } 374952284Sobrien } 375052284Sobrien 375152284Sobrien /* Fix up the register information in the insn chain. 375252284Sobrien This involves deleting those of the spilled pseudos which did not get 375352284Sobrien a new hard register home from the live_{before,after} sets. */ 375452284Sobrien for (chain = reload_insn_chain; chain; chain = chain->next) 375518334Speter { 375652284Sobrien HARD_REG_SET used_by_pseudos; 375752284Sobrien HARD_REG_SET used_by_pseudos2; 375852284Sobrien 375990075Sobrien AND_COMPL_REG_SET (&chain->live_throughout, &spilled_pseudos); 376090075Sobrien AND_COMPL_REG_SET (&chain->dead_or_set, &spilled_pseudos); 376152284Sobrien 376252284Sobrien /* Mark any unallocated hard regs as available for spills. That 376352284Sobrien makes inheritance work somewhat better. */ 376452284Sobrien if (chain->need_reload) 376518334Speter { 376690075Sobrien REG_SET_TO_HARD_REG_SET (used_by_pseudos, &chain->live_throughout); 376790075Sobrien REG_SET_TO_HARD_REG_SET (used_by_pseudos2, &chain->dead_or_set); 376852284Sobrien IOR_HARD_REG_SET (used_by_pseudos, used_by_pseudos2); 376918334Speter 377052284Sobrien /* Save the old value for the sanity test below. */ 377152284Sobrien COPY_HARD_REG_SET (used_by_pseudos2, chain->used_spill_regs); 377218334Speter 377390075Sobrien compute_use_by_pseudos (&used_by_pseudos, &chain->live_throughout); 377490075Sobrien compute_use_by_pseudos (&used_by_pseudos, &chain->dead_or_set); 377552284Sobrien COMPL_HARD_REG_SET (chain->used_spill_regs, used_by_pseudos); 377652284Sobrien AND_HARD_REG_SET (chain->used_spill_regs, used_spill_regs); 377752284Sobrien 377852284Sobrien /* Make sure we only enlarge the set. */ 377952284Sobrien GO_IF_HARD_REG_SUBSET (used_by_pseudos2, chain->used_spill_regs, ok); 3780169689Skan gcc_unreachable (); 378152284Sobrien ok:; 378218334Speter } 378318334Speter } 378418334Speter 378552284Sobrien /* Let alter_reg modify the reg rtx's for the modified pseudos. */ 3786169689Skan for (i = FIRST_PSEUDO_REGISTER; i < (unsigned)max_regno; i++) 378752284Sobrien { 378852284Sobrien int regno = reg_renumber[i]; 378952284Sobrien if (reg_old_renumber[i] == regno) 379052284Sobrien continue; 379190075Sobrien 379252284Sobrien alter_reg (i, reg_old_renumber[i]); 379352284Sobrien reg_old_renumber[i] = regno; 3794169689Skan if (dump_file) 379552284Sobrien { 379652284Sobrien if (regno == -1) 3797169689Skan fprintf (dump_file, " Register %d now on stack.\n\n", i); 379852284Sobrien else 3799169689Skan fprintf (dump_file, " Register %d now in %d.\n\n", 380052284Sobrien i, reg_renumber[i]); 380152284Sobrien } 380252284Sobrien } 380352284Sobrien 380418334Speter return something_changed; 380518334Speter} 380618334Speter 3807169689Skan/* Find all paradoxical subregs within X and update reg_max_ref_width. */ 380818334Speter 380918334Speterstatic void 3810132718Skanscan_paradoxical_subregs (rtx x) 381118334Speter{ 381290075Sobrien int i; 381390075Sobrien const char *fmt; 381490075Sobrien enum rtx_code code = GET_CODE (x); 381518334Speter 381618334Speter switch (code) 381718334Speter { 381818334Speter case REG: 381918334Speter case CONST_INT: 382018334Speter case CONST: 382118334Speter case SYMBOL_REF: 382218334Speter case LABEL_REF: 382318334Speter case CONST_DOUBLE: 382496263Sobrien case CONST_VECTOR: /* shouldn't happen, but just in case. */ 382518334Speter case CC0: 382618334Speter case PC: 382718334Speter case USE: 382818334Speter case CLOBBER: 382918334Speter return; 383018334Speter 383118334Speter case SUBREG: 3832169689Skan if (REG_P (SUBREG_REG (x)) 3833169689Skan && (GET_MODE_SIZE (GET_MODE (x)) 3834169689Skan > reg_max_ref_width[REGNO (SUBREG_REG (x))])) 383518334Speter reg_max_ref_width[REGNO (SUBREG_REG (x))] 383618334Speter = GET_MODE_SIZE (GET_MODE (x)); 383718334Speter return; 383890075Sobrien 383950397Sobrien default: 384050397Sobrien break; 384118334Speter } 384218334Speter 384318334Speter fmt = GET_RTX_FORMAT (code); 384418334Speter for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 384518334Speter { 384618334Speter if (fmt[i] == 'e') 384718334Speter scan_paradoxical_subregs (XEXP (x, i)); 384818334Speter else if (fmt[i] == 'E') 384918334Speter { 385090075Sobrien int j; 385190075Sobrien for (j = XVECLEN (x, i) - 1; j >= 0; j--) 385218334Speter scan_paradoxical_subregs (XVECEXP (x, i, j)); 385318334Speter } 385418334Speter } 385518334Speter} 385618334Speter 3857169689Skan/* A subroutine of reload_as_needed. If INSN has a REG_EH_REGION note, 3858169689Skan examine all of the reload insns between PREV and NEXT exclusive, and 3859169689Skan annotate all that may trap. */ 3860169689Skan 3861169689Skanstatic void 3862169689Skanfixup_eh_region_note (rtx insn, rtx prev, rtx next) 3863169689Skan{ 3864169689Skan rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX); 3865169689Skan unsigned int trap_count; 3866169689Skan rtx i; 3867169689Skan 3868169689Skan if (note == NULL) 3869169689Skan return; 3870169689Skan 3871169689Skan if (may_trap_p (PATTERN (insn))) 3872169689Skan trap_count = 1; 3873169689Skan else 3874169689Skan { 3875169689Skan remove_note (insn, note); 3876169689Skan trap_count = 0; 3877169689Skan } 3878169689Skan 3879169689Skan for (i = NEXT_INSN (prev); i != next; i = NEXT_INSN (i)) 3880169689Skan if (INSN_P (i) && i != insn && may_trap_p (PATTERN (i))) 3881169689Skan { 3882169689Skan trap_count++; 3883169689Skan REG_NOTES (i) 3884169689Skan = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (note, 0), REG_NOTES (i)); 3885169689Skan } 3886169689Skan} 3887169689Skan 388818334Speter/* Reload pseudo-registers into hard regs around each insn as needed. 388918334Speter Additional register load insns are output before the insn that needs it 389018334Speter and perhaps store insns after insns that modify the reloaded pseudo reg. 389118334Speter 389218334Speter reg_last_reload_reg and reg_reloaded_contents keep track of 389318334Speter which registers are already available in reload registers. 389418334Speter We update these for the reloads that we perform, 389518334Speter as the insns are scanned. */ 389618334Speter 389718334Speterstatic void 3898132718Skanreload_as_needed (int live_known) 389918334Speter{ 390052284Sobrien struct insn_chain *chain; 390190075Sobrien#if defined (AUTO_INC_DEC) 390290075Sobrien int i; 390352284Sobrien#endif 390418334Speter rtx x; 390518334Speter 3906132718Skan memset (spill_reg_rtx, 0, sizeof spill_reg_rtx); 3907132718Skan memset (spill_reg_store, 0, sizeof spill_reg_store); 3908169689Skan reg_last_reload_reg = XCNEWVEC (rtx, max_regno); 3909169689Skan INIT_REG_SET (®_has_output_reload); 391050397Sobrien CLEAR_HARD_REG_SET (reg_reloaded_valid); 3911132718Skan CLEAR_HARD_REG_SET (reg_reloaded_call_part_clobbered); 391218334Speter 391352284Sobrien set_initial_elim_offsets (); 391418334Speter 391552284Sobrien for (chain = reload_insn_chain; chain; chain = chain->next) 391618334Speter { 3917132718Skan rtx prev = 0; 391852284Sobrien rtx insn = chain->insn; 391952284Sobrien rtx old_next = NEXT_INSN (insn); 392018334Speter 392118334Speter /* If we pass a label, copy the offsets from the label information 392218334Speter into the current offsets of each elimination. */ 3923169689Skan if (LABEL_P (insn)) 392452284Sobrien set_offsets_for_label (insn); 392518334Speter 392690075Sobrien else if (INSN_P (insn)) 392718334Speter { 3928169689Skan regset_head regs_to_forget; 3929169689Skan INIT_REG_SET (®s_to_forget); 3930169689Skan note_stores (PATTERN (insn), forget_old_reloads_1, ®s_to_forget); 393118334Speter 393218334Speter /* If this is a USE and CLOBBER of a MEM, ensure that any 393318334Speter references to eliminable registers have been removed. */ 393418334Speter 393518334Speter if ((GET_CODE (PATTERN (insn)) == USE 393618334Speter || GET_CODE (PATTERN (insn)) == CLOBBER) 3937169689Skan && MEM_P (XEXP (PATTERN (insn), 0))) 393818334Speter XEXP (XEXP (PATTERN (insn), 0), 0) 393918334Speter = eliminate_regs (XEXP (XEXP (PATTERN (insn), 0), 0), 394050397Sobrien GET_MODE (XEXP (PATTERN (insn), 0)), 394150397Sobrien NULL_RTX); 394218334Speter 394318334Speter /* If we need to do register elimination processing, do so. 394418334Speter This might delete the insn, in which case we are done. */ 394552284Sobrien if ((num_eliminable || num_eliminable_invariants) && chain->need_elim) 394618334Speter { 394718334Speter eliminate_regs_in_insn (insn, 1); 3948169689Skan if (NOTE_P (insn)) 394918334Speter { 395052284Sobrien update_eliminable_offsets (); 3951169689Skan CLEAR_REG_SET (®s_to_forget); 395218334Speter continue; 395318334Speter } 395418334Speter } 395518334Speter 395652284Sobrien /* If need_elim is nonzero but need_reload is zero, one might think 395752284Sobrien that we could simply set n_reloads to 0. However, find_reloads 395852284Sobrien could have done some manipulation of the insn (such as swapping 395952284Sobrien commutative operands), and these manipulations are lost during 396052284Sobrien the first pass for every insn that needs register elimination. 396152284Sobrien So the actions of find_reloads must be redone here. */ 396252284Sobrien 396352284Sobrien if (! chain->need_elim && ! chain->need_reload 396452284Sobrien && ! chain->need_operand_change) 396518334Speter n_reloads = 0; 396618334Speter /* First find the pseudo regs that must be reloaded for this insn. 396718334Speter This info is returned in the tables reload_... (see reload.h). 396818334Speter Also modify the body of INSN by substituting RELOAD 396918334Speter rtx's for those pseudo regs. */ 397018334Speter else 397118334Speter { 3972169689Skan CLEAR_REG_SET (®_has_output_reload); 397318334Speter CLEAR_HARD_REG_SET (reg_is_output_reload); 397418334Speter 397518334Speter find_reloads (insn, 1, spill_indirect_levels, live_known, 397618334Speter spill_reg_order); 397718334Speter } 397818334Speter 397918334Speter if (n_reloads > 0) 398018334Speter { 398152284Sobrien rtx next = NEXT_INSN (insn); 398218334Speter rtx p; 398318334Speter 398452284Sobrien prev = PREV_INSN (insn); 398518334Speter 398618334Speter /* Now compute which reload regs to reload them into. Perhaps 398718334Speter reusing reload regs from previous insns, or else output 398818334Speter load insns to reload them. Maybe output store insns too. 398918334Speter Record the choices of reload reg in reload_reg_rtx. */ 399052284Sobrien choose_reload_regs (chain); 399118334Speter 399290075Sobrien /* Merge any reloads that we didn't combine for fear of 399318334Speter increasing the number of spill registers needed but now 399418334Speter discover can be safely merged. */ 399550397Sobrien if (SMALL_REGISTER_CLASSES) 399650397Sobrien merge_assigned_reloads (insn); 399718334Speter 399818334Speter /* Generate the insns to reload operands into or out of 399918334Speter their reload regs. */ 400052284Sobrien emit_reload_insns (chain); 400118334Speter 400218334Speter /* Substitute the chosen reload regs from reload_reg_rtx 400318334Speter into the insn's body (or perhaps into the bodies of other 400418334Speter load and store insn that we just made for reloading 400518334Speter and that we moved the structure into). */ 400690075Sobrien subst_reloads (insn); 400718334Speter 4008169689Skan /* Adjust the exception region notes for loads and stores. */ 4009169689Skan if (flag_non_call_exceptions && !CALL_P (insn)) 4010169689Skan fixup_eh_region_note (insn, prev, next); 4011169689Skan 401218334Speter /* If this was an ASM, make sure that all the reload insns 401318334Speter we have generated are valid. If not, give an error 401418334Speter and delete them. */ 401518334Speter if (asm_noperands (PATTERN (insn)) >= 0) 401618334Speter for (p = NEXT_INSN (prev); p != next; p = NEXT_INSN (p)) 401790075Sobrien if (p != insn && INSN_P (p) 4018117395Skan && GET_CODE (PATTERN (p)) != USE 401918334Speter && (recog_memoized (p) < 0 402052284Sobrien || (extract_insn (p), ! constrain_operands (1)))) 402118334Speter { 402218334Speter error_for_asm (insn, 4023169689Skan "%<asm%> operand requires " 4024169689Skan "impossible reload"); 402590075Sobrien delete_insn (p); 402618334Speter } 402718334Speter } 402890075Sobrien 402990075Sobrien if (num_eliminable && chain->need_elim) 403090075Sobrien update_eliminable_offsets (); 403190075Sobrien 403218334Speter /* Any previously reloaded spilled pseudo reg, stored in this insn, 403318334Speter is no longer validly lying around to save a future reload. 403418334Speter Note that this does not detect pseudos that were reloaded 403518334Speter for this insn in order to be stored in 403618334Speter (obeying register constraints). That is correct; such reload 403718334Speter registers ARE still valid. */ 4038169689Skan forget_marked_reloads (®s_to_forget); 4039169689Skan CLEAR_REG_SET (®s_to_forget); 404018334Speter 404118334Speter /* There may have been CLOBBER insns placed after INSN. So scan 404218334Speter between INSN and NEXT and use them to forget old reloads. */ 404352284Sobrien for (x = NEXT_INSN (insn); x != old_next; x = NEXT_INSN (x)) 4044169689Skan if (NONJUMP_INSN_P (x) && GET_CODE (PATTERN (x)) == CLOBBER) 404590075Sobrien note_stores (PATTERN (x), forget_old_reloads_1, NULL); 404618334Speter 404718334Speter#ifdef AUTO_INC_DEC 404818334Speter /* Likewise for regs altered by auto-increment in this insn. 404952284Sobrien REG_INC notes have been changed by reloading: 405052284Sobrien find_reloads_address_1 records substitutions for them, 405152284Sobrien which have been performed by subst_reloads above. */ 405252284Sobrien for (i = n_reloads - 1; i >= 0; i--) 405352284Sobrien { 405490075Sobrien rtx in_reg = rld[i].in_reg; 405552284Sobrien if (in_reg) 405652284Sobrien { 405752284Sobrien enum rtx_code code = GET_CODE (in_reg); 405852284Sobrien /* PRE_INC / PRE_DEC will have the reload register ending up 405952284Sobrien with the same value as the stack slot, but that doesn't 406052284Sobrien hold true for POST_INC / POST_DEC. Either we have to 406152284Sobrien convert the memory access to a true POST_INC / POST_DEC, 406252284Sobrien or we can't use the reload register for inheritance. */ 406352284Sobrien if ((code == POST_INC || code == POST_DEC) 406452284Sobrien && TEST_HARD_REG_BIT (reg_reloaded_valid, 406590075Sobrien REGNO (rld[i].reg_rtx)) 406652284Sobrien /* Make sure it is the inc/dec pseudo, and not 406752284Sobrien some other (e.g. output operand) pseudo. */ 4068132718Skan && ((unsigned) reg_reloaded_contents[REGNO (rld[i].reg_rtx)] 406952284Sobrien == REGNO (XEXP (in_reg, 0)))) 407090075Sobrien 407152284Sobrien { 407290075Sobrien rtx reload_reg = rld[i].reg_rtx; 407352284Sobrien enum machine_mode mode = GET_MODE (reload_reg); 407452284Sobrien int n = 0; 407552284Sobrien rtx p; 407652284Sobrien 407752284Sobrien for (p = PREV_INSN (old_next); p != prev; p = PREV_INSN (p)) 407852284Sobrien { 407952284Sobrien /* We really want to ignore REG_INC notes here, so 408052284Sobrien use PATTERN (p) as argument to reg_set_p . */ 408152284Sobrien if (reg_set_p (reload_reg, PATTERN (p))) 408252284Sobrien break; 408390075Sobrien n = count_occurrences (PATTERN (p), reload_reg, 0); 408452284Sobrien if (! n) 408552284Sobrien continue; 408652284Sobrien if (n == 1) 408752284Sobrien { 408852284Sobrien n = validate_replace_rtx (reload_reg, 4089169689Skan gen_rtx_fmt_e (code, 4090169689Skan mode, 4091169689Skan reload_reg), 409252284Sobrien p); 409352284Sobrien 409452284Sobrien /* We must also verify that the constraints 409552284Sobrien are met after the replacement. */ 409652284Sobrien extract_insn (p); 409752284Sobrien if (n) 409852284Sobrien n = constrain_operands (1); 409952284Sobrien else 410052284Sobrien break; 410152284Sobrien 410252284Sobrien /* If the constraints were not met, then 410352284Sobrien undo the replacement. */ 410452284Sobrien if (!n) 410552284Sobrien { 4106169689Skan validate_replace_rtx (gen_rtx_fmt_e (code, 4107169689Skan mode, 4108169689Skan reload_reg), 410952284Sobrien reload_reg, p); 411052284Sobrien break; 411152284Sobrien } 411290075Sobrien 411352284Sobrien } 411452284Sobrien break; 411552284Sobrien } 411652284Sobrien if (n == 1) 411752284Sobrien { 411852284Sobrien REG_NOTES (p) 411952284Sobrien = gen_rtx_EXPR_LIST (REG_INC, reload_reg, 412052284Sobrien REG_NOTES (p)); 412152284Sobrien /* Mark this as having an output reload so that the 412252284Sobrien REG_INC processing code below won't invalidate 412352284Sobrien the reload for inheritance. */ 412452284Sobrien SET_HARD_REG_BIT (reg_is_output_reload, 412552284Sobrien REGNO (reload_reg)); 4126169689Skan SET_REGNO_REG_SET (®_has_output_reload, 4127169689Skan REGNO (XEXP (in_reg, 0))); 412852284Sobrien } 412952284Sobrien else 413090075Sobrien forget_old_reloads_1 (XEXP (in_reg, 0), NULL_RTX, 413190075Sobrien NULL); 413252284Sobrien } 413352284Sobrien else if ((code == PRE_INC || code == PRE_DEC) 413452284Sobrien && TEST_HARD_REG_BIT (reg_reloaded_valid, 413590075Sobrien REGNO (rld[i].reg_rtx)) 413652284Sobrien /* Make sure it is the inc/dec pseudo, and not 413752284Sobrien some other (e.g. output operand) pseudo. */ 4138132718Skan && ((unsigned) reg_reloaded_contents[REGNO (rld[i].reg_rtx)] 413952284Sobrien == REGNO (XEXP (in_reg, 0)))) 414052284Sobrien { 414152284Sobrien SET_HARD_REG_BIT (reg_is_output_reload, 414290075Sobrien REGNO (rld[i].reg_rtx)); 4143169689Skan SET_REGNO_REG_SET (®_has_output_reload, 4144169689Skan REGNO (XEXP (in_reg, 0))); 414552284Sobrien } 414652284Sobrien } 414752284Sobrien } 414852284Sobrien /* If a pseudo that got a hard register is auto-incremented, 414952284Sobrien we must purge records of copying it into pseudos without 415052284Sobrien hard registers. */ 415118334Speter for (x = REG_NOTES (insn); x; x = XEXP (x, 1)) 415218334Speter if (REG_NOTE_KIND (x) == REG_INC) 415318334Speter { 415418334Speter /* See if this pseudo reg was reloaded in this insn. 415518334Speter If so, its last-reload info is still valid 415618334Speter because it is based on this insn's reload. */ 415718334Speter for (i = 0; i < n_reloads; i++) 415890075Sobrien if (rld[i].out == XEXP (x, 0)) 415918334Speter break; 416018334Speter 416118334Speter if (i == n_reloads) 416290075Sobrien forget_old_reloads_1 (XEXP (x, 0), NULL_RTX, NULL); 416318334Speter } 416418334Speter#endif 416518334Speter } 416618334Speter /* A reload reg's contents are unknown after a label. */ 4167169689Skan if (LABEL_P (insn)) 416850397Sobrien CLEAR_HARD_REG_SET (reg_reloaded_valid); 416918334Speter 417018334Speter /* Don't assume a reload reg is still good after a call insn 4171132718Skan if it is a call-used reg, or if it contains a value that will 4172132718Skan be partially clobbered by the call. */ 4173169689Skan else if (CALL_P (insn)) 4174132718Skan { 417590075Sobrien AND_COMPL_HARD_REG_SET (reg_reloaded_valid, call_used_reg_set); 4176132718Skan AND_COMPL_HARD_REG_SET (reg_reloaded_valid, reg_reloaded_call_part_clobbered); 4177132718Skan } 417890075Sobrien } 417918334Speter 418090075Sobrien /* Clean up. */ 418190075Sobrien free (reg_last_reload_reg); 4182169689Skan CLEAR_REG_SET (®_has_output_reload); 418318334Speter} 418418334Speter 418518334Speter/* Discard all record of any value reloaded from X, 418618334Speter or reloaded in X from someplace else; 418718334Speter unless X is an output reload reg of the current insn. 418818334Speter 418918334Speter X may be a hard reg (the reload reg) 4190169689Skan or it may be a pseudo reg that was reloaded from. 419118334Speter 4192169689Skan When DATA is non-NULL just mark the registers in regset 4193169689Skan to be forgotten later. */ 4194169689Skan 419518334Speterstatic void 4196132718Skanforget_old_reloads_1 (rtx x, rtx ignored ATTRIBUTE_UNUSED, 4197169689Skan void *data) 419818334Speter{ 419990075Sobrien unsigned int regno; 420090075Sobrien unsigned int nr; 4201169689Skan regset regs = (regset) data; 420218334Speter 420390075Sobrien /* note_stores does give us subregs of hard regs, 4204169689Skan subreg_regno_offset requires a hard reg. */ 420518334Speter while (GET_CODE (x) == SUBREG) 420618334Speter { 4207117395Skan /* We ignore the subreg offset when calculating the regno, 4208117395Skan because we are using the entire underlying hard register 4209117395Skan below. */ 421018334Speter x = SUBREG_REG (x); 421118334Speter } 421218334Speter 4213169689Skan if (!REG_P (x)) 421418334Speter return; 421518334Speter 4216117395Skan regno = REGNO (x); 421718334Speter 421818334Speter if (regno >= FIRST_PSEUDO_REGISTER) 421918334Speter nr = 1; 422018334Speter else 422118334Speter { 422290075Sobrien unsigned int i; 422390075Sobrien 4224169689Skan nr = hard_regno_nregs[regno][GET_MODE (x)]; 422518334Speter /* Storing into a spilled-reg invalidates its contents. 422618334Speter This can happen if a block-local pseudo is allocated to that reg 422718334Speter and it wasn't spilled because this block's total need is 0. 422818334Speter Then some insn might have an optional reload and use this reg. */ 4229169689Skan if (!regs) 4230169689Skan for (i = 0; i < nr; i++) 4231169689Skan /* But don't do this if the reg actually serves as an output 4232169689Skan reload reg in the current instruction. */ 4233169689Skan if (n_reloads == 0 4234169689Skan || ! TEST_HARD_REG_BIT (reg_is_output_reload, regno + i)) 4235169689Skan { 4236169689Skan CLEAR_HARD_REG_BIT (reg_reloaded_valid, regno + i); 4237169689Skan CLEAR_HARD_REG_BIT (reg_reloaded_call_part_clobbered, regno + i); 4238169689Skan spill_reg_store[regno + i] = 0; 4239169689Skan } 4240169689Skan } 4241169689Skan 4242169689Skan if (regs) 4243169689Skan while (nr-- > 0) 4244169689Skan SET_REGNO_REG_SET (regs, regno + nr); 4245169689Skan else 4246169689Skan { 4247169689Skan /* Since value of X has changed, 4248169689Skan forget any value previously copied from it. */ 4249169689Skan 4250169689Skan while (nr-- > 0) 4251169689Skan /* But don't forget a copy if this is the output reload 4252169689Skan that establishes the copy's validity. */ 425350397Sobrien if (n_reloads == 0 4254169689Skan || !REGNO_REG_SET_P (®_has_output_reload, regno + nr)) 4255169689Skan reg_last_reload_reg[regno + nr] = 0; 4256169689Skan } 4257169689Skan} 4258169689Skan 4259169689Skan/* Forget the reloads marked in regset by previous function. */ 4260169689Skanstatic void 4261169689Skanforget_marked_reloads (regset regs) 4262169689Skan{ 4263169689Skan unsigned int reg; 4264169689Skan reg_set_iterator rsi; 4265169689Skan EXECUTE_IF_SET_IN_REG_SET (regs, 0, reg, rsi) 4266169689Skan { 4267169689Skan if (reg < FIRST_PSEUDO_REGISTER 4268169689Skan /* But don't do this if the reg actually serves as an output 4269169689Skan reload reg in the current instruction. */ 4270169689Skan && (n_reloads == 0 4271169689Skan || ! TEST_HARD_REG_BIT (reg_is_output_reload, reg))) 427270635Sobrien { 4273169689Skan CLEAR_HARD_REG_BIT (reg_reloaded_valid, reg); 4274169689Skan CLEAR_HARD_REG_BIT (reg_reloaded_call_part_clobbered, reg); 4275169689Skan spill_reg_store[reg] = 0; 427670635Sobrien } 4277169689Skan if (n_reloads == 0 4278169689Skan || !REGNO_REG_SET_P (®_has_output_reload, reg)) 4279169689Skan reg_last_reload_reg[reg] = 0; 428018334Speter } 428118334Speter} 428218334Speter 428318334Speter/* The following HARD_REG_SETs indicate when each hard register is 428418334Speter used for a reload of various parts of the current insn. */ 428518334Speter 428670635Sobrien/* If reg is unavailable for all reloads. */ 428770635Sobrienstatic HARD_REG_SET reload_reg_unavailable; 428818334Speter/* If reg is in use as a reload reg for a RELOAD_OTHER reload. */ 428918334Speterstatic HARD_REG_SET reload_reg_used; 429018334Speter/* If reg is in use for a RELOAD_FOR_INPUT_ADDRESS reload for operand I. */ 429118334Speterstatic HARD_REG_SET reload_reg_used_in_input_addr[MAX_RECOG_OPERANDS]; 429250397Sobrien/* If reg is in use for a RELOAD_FOR_INPADDR_ADDRESS reload for operand I. */ 429350397Sobrienstatic HARD_REG_SET reload_reg_used_in_inpaddr_addr[MAX_RECOG_OPERANDS]; 429418334Speter/* If reg is in use for a RELOAD_FOR_OUTPUT_ADDRESS reload for operand I. */ 429518334Speterstatic HARD_REG_SET reload_reg_used_in_output_addr[MAX_RECOG_OPERANDS]; 429650397Sobrien/* If reg is in use for a RELOAD_FOR_OUTADDR_ADDRESS reload for operand I. */ 429750397Sobrienstatic HARD_REG_SET reload_reg_used_in_outaddr_addr[MAX_RECOG_OPERANDS]; 429818334Speter/* If reg is in use for a RELOAD_FOR_INPUT reload for operand I. */ 429918334Speterstatic HARD_REG_SET reload_reg_used_in_input[MAX_RECOG_OPERANDS]; 430018334Speter/* If reg is in use for a RELOAD_FOR_OUTPUT reload for operand I. */ 430118334Speterstatic HARD_REG_SET reload_reg_used_in_output[MAX_RECOG_OPERANDS]; 430218334Speter/* If reg is in use for a RELOAD_FOR_OPERAND_ADDRESS reload. */ 430318334Speterstatic HARD_REG_SET reload_reg_used_in_op_addr; 430418334Speter/* If reg is in use for a RELOAD_FOR_OPADDR_ADDR reload. */ 430518334Speterstatic HARD_REG_SET reload_reg_used_in_op_addr_reload; 430618334Speter/* If reg is in use for a RELOAD_FOR_INSN reload. */ 430718334Speterstatic HARD_REG_SET reload_reg_used_in_insn; 430818334Speter/* If reg is in use for a RELOAD_FOR_OTHER_ADDRESS reload. */ 430918334Speterstatic HARD_REG_SET reload_reg_used_in_other_addr; 431018334Speter 431118334Speter/* If reg is in use as a reload reg for any sort of reload. */ 431218334Speterstatic HARD_REG_SET reload_reg_used_at_all; 431318334Speter 431418334Speter/* If reg is use as an inherited reload. We just mark the first register 431518334Speter in the group. */ 431618334Speterstatic HARD_REG_SET reload_reg_used_for_inherit; 431718334Speter 431852284Sobrien/* Records which hard regs are used in any way, either as explicit use or 431952284Sobrien by being allocated to a pseudo during any point of the current insn. */ 432052284Sobrienstatic HARD_REG_SET reg_used_in_insn; 432152284Sobrien 432218334Speter/* Mark reg REGNO as in use for a reload of the sort spec'd by OPNUM and 432318334Speter TYPE. MODE is used to indicate how many consecutive regs are 432418334Speter actually used. */ 432518334Speter 432618334Speterstatic void 4327132718Skanmark_reload_reg_in_use (unsigned int regno, int opnum, enum reload_type type, 4328132718Skan enum machine_mode mode) 432918334Speter{ 4330169689Skan unsigned int nregs = hard_regno_nregs[regno][mode]; 433190075Sobrien unsigned int i; 433218334Speter 433318334Speter for (i = regno; i < nregs + regno; i++) 433418334Speter { 433518334Speter switch (type) 433618334Speter { 433718334Speter case RELOAD_OTHER: 433818334Speter SET_HARD_REG_BIT (reload_reg_used, i); 433918334Speter break; 434018334Speter 434118334Speter case RELOAD_FOR_INPUT_ADDRESS: 434218334Speter SET_HARD_REG_BIT (reload_reg_used_in_input_addr[opnum], i); 434318334Speter break; 434418334Speter 434550397Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 434650397Sobrien SET_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[opnum], i); 434750397Sobrien break; 434850397Sobrien 434918334Speter case RELOAD_FOR_OUTPUT_ADDRESS: 435018334Speter SET_HARD_REG_BIT (reload_reg_used_in_output_addr[opnum], i); 435118334Speter break; 435218334Speter 435350397Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 435450397Sobrien SET_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[opnum], i); 435550397Sobrien break; 435650397Sobrien 435718334Speter case RELOAD_FOR_OPERAND_ADDRESS: 435818334Speter SET_HARD_REG_BIT (reload_reg_used_in_op_addr, i); 435918334Speter break; 436018334Speter 436118334Speter case RELOAD_FOR_OPADDR_ADDR: 436218334Speter SET_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, i); 436318334Speter break; 436418334Speter 436518334Speter case RELOAD_FOR_OTHER_ADDRESS: 436618334Speter SET_HARD_REG_BIT (reload_reg_used_in_other_addr, i); 436718334Speter break; 436818334Speter 436918334Speter case RELOAD_FOR_INPUT: 437018334Speter SET_HARD_REG_BIT (reload_reg_used_in_input[opnum], i); 437118334Speter break; 437218334Speter 437318334Speter case RELOAD_FOR_OUTPUT: 437418334Speter SET_HARD_REG_BIT (reload_reg_used_in_output[opnum], i); 437518334Speter break; 437618334Speter 437718334Speter case RELOAD_FOR_INSN: 437818334Speter SET_HARD_REG_BIT (reload_reg_used_in_insn, i); 437918334Speter break; 438018334Speter } 438118334Speter 438218334Speter SET_HARD_REG_BIT (reload_reg_used_at_all, i); 438318334Speter } 438418334Speter} 438518334Speter 438618334Speter/* Similarly, but show REGNO is no longer in use for a reload. */ 438718334Speter 438818334Speterstatic void 4389132718Skanclear_reload_reg_in_use (unsigned int regno, int opnum, 4390132718Skan enum reload_type type, enum machine_mode mode) 439118334Speter{ 4392169689Skan unsigned int nregs = hard_regno_nregs[regno][mode]; 439390075Sobrien unsigned int start_regno, end_regno, r; 439418334Speter int i; 439552284Sobrien /* A complication is that for some reload types, inheritance might 439652284Sobrien allow multiple reloads of the same types to share a reload register. 439752284Sobrien We set check_opnum if we have to check only reloads with the same 439852284Sobrien operand number, and check_any if we have to check all reloads. */ 439952284Sobrien int check_opnum = 0; 440052284Sobrien int check_any = 0; 440152284Sobrien HARD_REG_SET *used_in_set; 440218334Speter 440352284Sobrien switch (type) 440418334Speter { 440552284Sobrien case RELOAD_OTHER: 440652284Sobrien used_in_set = &reload_reg_used; 440752284Sobrien break; 440818334Speter 440952284Sobrien case RELOAD_FOR_INPUT_ADDRESS: 441052284Sobrien used_in_set = &reload_reg_used_in_input_addr[opnum]; 441152284Sobrien break; 441218334Speter 441352284Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 441452284Sobrien check_opnum = 1; 441552284Sobrien used_in_set = &reload_reg_used_in_inpaddr_addr[opnum]; 441652284Sobrien break; 441750397Sobrien 441852284Sobrien case RELOAD_FOR_OUTPUT_ADDRESS: 441952284Sobrien used_in_set = &reload_reg_used_in_output_addr[opnum]; 442052284Sobrien break; 442118334Speter 442252284Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 442352284Sobrien check_opnum = 1; 442452284Sobrien used_in_set = &reload_reg_used_in_outaddr_addr[opnum]; 442552284Sobrien break; 442650397Sobrien 442752284Sobrien case RELOAD_FOR_OPERAND_ADDRESS: 442852284Sobrien used_in_set = &reload_reg_used_in_op_addr; 442952284Sobrien break; 443018334Speter 443152284Sobrien case RELOAD_FOR_OPADDR_ADDR: 443252284Sobrien check_any = 1; 443352284Sobrien used_in_set = &reload_reg_used_in_op_addr_reload; 443452284Sobrien break; 443518334Speter 443652284Sobrien case RELOAD_FOR_OTHER_ADDRESS: 443752284Sobrien used_in_set = &reload_reg_used_in_other_addr; 443852284Sobrien check_any = 1; 443952284Sobrien break; 444018334Speter 444152284Sobrien case RELOAD_FOR_INPUT: 444252284Sobrien used_in_set = &reload_reg_used_in_input[opnum]; 444352284Sobrien break; 444418334Speter 444552284Sobrien case RELOAD_FOR_OUTPUT: 444652284Sobrien used_in_set = &reload_reg_used_in_output[opnum]; 444752284Sobrien break; 444818334Speter 444952284Sobrien case RELOAD_FOR_INSN: 445052284Sobrien used_in_set = &reload_reg_used_in_insn; 445152284Sobrien break; 445252284Sobrien default: 4453169689Skan gcc_unreachable (); 445452284Sobrien } 445552284Sobrien /* We resolve conflicts with remaining reloads of the same type by 4456117395Skan excluding the intervals of reload registers by them from the 445752284Sobrien interval of freed reload registers. Since we only keep track of 445852284Sobrien one set of interval bounds, we might have to exclude somewhat 445990075Sobrien more than what would be necessary if we used a HARD_REG_SET here. 446052284Sobrien But this should only happen very infrequently, so there should 446152284Sobrien be no reason to worry about it. */ 446290075Sobrien 446352284Sobrien start_regno = regno; 446452284Sobrien end_regno = regno + nregs; 446552284Sobrien if (check_opnum || check_any) 446652284Sobrien { 446752284Sobrien for (i = n_reloads - 1; i >= 0; i--) 446852284Sobrien { 446990075Sobrien if (rld[i].when_needed == type 447090075Sobrien && (check_any || rld[i].opnum == opnum) 447190075Sobrien && rld[i].reg_rtx) 447252284Sobrien { 447390075Sobrien unsigned int conflict_start = true_regnum (rld[i].reg_rtx); 447490075Sobrien unsigned int conflict_end 447552284Sobrien = (conflict_start 4476169689Skan + hard_regno_nregs[conflict_start][rld[i].mode]); 447752284Sobrien 447852284Sobrien /* If there is an overlap with the first to-be-freed register, 447952284Sobrien adjust the interval start. */ 448052284Sobrien if (conflict_start <= start_regno && conflict_end > start_regno) 448152284Sobrien start_regno = conflict_end; 448252284Sobrien /* Otherwise, if there is a conflict with one of the other 448352284Sobrien to-be-freed registers, adjust the interval end. */ 448452284Sobrien if (conflict_start > start_regno && conflict_start < end_regno) 448552284Sobrien end_regno = conflict_start; 448652284Sobrien } 448718334Speter } 448818334Speter } 448990075Sobrien 449090075Sobrien for (r = start_regno; r < end_regno; r++) 449190075Sobrien CLEAR_HARD_REG_BIT (*used_in_set, r); 449218334Speter} 449318334Speter 449418334Speter/* 1 if reg REGNO is free as a reload reg for a reload of the sort 449518334Speter specified by OPNUM and TYPE. */ 449618334Speter 449718334Speterstatic int 4498132718Skanreload_reg_free_p (unsigned int regno, int opnum, enum reload_type type) 449918334Speter{ 450018334Speter int i; 450118334Speter 450290075Sobrien /* In use for a RELOAD_OTHER means it's not available for anything. */ 450370635Sobrien if (TEST_HARD_REG_BIT (reload_reg_used, regno) 450470635Sobrien || TEST_HARD_REG_BIT (reload_reg_unavailable, regno)) 450518334Speter return 0; 450618334Speter 450718334Speter switch (type) 450818334Speter { 450918334Speter case RELOAD_OTHER: 451050397Sobrien /* In use for anything means we can't use it for RELOAD_OTHER. */ 451150397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_other_addr, regno) 451218334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno) 4513132718Skan || TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno) 451418334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno)) 451518334Speter return 0; 451618334Speter 451718334Speter for (i = 0; i < reload_n_operands; i++) 451818334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno) 451950397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno) 452018334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno) 452150397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno) 452218334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno) 452318334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 452418334Speter return 0; 452518334Speter 452618334Speter return 1; 452718334Speter 452818334Speter case RELOAD_FOR_INPUT: 452918334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno) 453018334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno)) 453118334Speter return 0; 453218334Speter 453318334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno)) 453418334Speter return 0; 453518334Speter 453618334Speter /* If it is used for some other input, can't use it. */ 453718334Speter for (i = 0; i < reload_n_operands; i++) 453818334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 453918334Speter return 0; 454018334Speter 454118334Speter /* If it is used in a later operand's address, can't use it. */ 454218334Speter for (i = opnum + 1; i < reload_n_operands; i++) 454350397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno) 454450397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno)) 454518334Speter return 0; 454618334Speter 454718334Speter return 1; 454818334Speter 454918334Speter case RELOAD_FOR_INPUT_ADDRESS: 455018334Speter /* Can't use a register if it is used for an input address for this 455118334Speter operand or used as an input in an earlier one. */ 455250397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[opnum], regno) 455350397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[opnum], regno)) 455418334Speter return 0; 455518334Speter 455618334Speter for (i = 0; i < opnum; i++) 455718334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 455818334Speter return 0; 455918334Speter 456018334Speter return 1; 456118334Speter 456250397Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 456350397Sobrien /* Can't use a register if it is used for an input address 456490075Sobrien for this operand or used as an input in an earlier 456590075Sobrien one. */ 456650397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[opnum], regno)) 456750397Sobrien return 0; 456850397Sobrien 456950397Sobrien for (i = 0; i < opnum; i++) 457050397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 457150397Sobrien return 0; 457250397Sobrien 457350397Sobrien return 1; 457450397Sobrien 457518334Speter case RELOAD_FOR_OUTPUT_ADDRESS: 457618334Speter /* Can't use a register if it is used for an output address for this 457790075Sobrien operand or used as an output in this or a later operand. Note 457890075Sobrien that multiple output operands are emitted in reverse order, so 457990075Sobrien the conflicting ones are those with lower indices. */ 458018334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[opnum], regno)) 458118334Speter return 0; 458218334Speter 458390075Sobrien for (i = 0; i <= opnum; i++) 458418334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 458518334Speter return 0; 458618334Speter 458718334Speter return 1; 458818334Speter 458950397Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 459050397Sobrien /* Can't use a register if it is used for an output address 459190075Sobrien for this operand or used as an output in this or a 459290075Sobrien later operand. Note that multiple output operands are 459390075Sobrien emitted in reverse order, so the conflicting ones are 459490075Sobrien those with lower indices. */ 459550397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[opnum], regno)) 459650397Sobrien return 0; 459750397Sobrien 459890075Sobrien for (i = 0; i <= opnum; i++) 459950397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 460050397Sobrien return 0; 460150397Sobrien 460250397Sobrien return 1; 460350397Sobrien 460418334Speter case RELOAD_FOR_OPERAND_ADDRESS: 460518334Speter for (i = 0; i < reload_n_operands; i++) 460618334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 460718334Speter return 0; 460818334Speter 460918334Speter return (! TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno) 461018334Speter && ! TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno)); 461118334Speter 461218334Speter case RELOAD_FOR_OPADDR_ADDR: 461318334Speter for (i = 0; i < reload_n_operands; i++) 461490075Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 461590075Sobrien return 0; 461618334Speter 461718334Speter return (!TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno)); 461818334Speter 461918334Speter case RELOAD_FOR_OUTPUT: 462018334Speter /* This cannot share a register with RELOAD_FOR_INSN reloads, other 462190075Sobrien outputs, or an operand address for this or an earlier output. 462290075Sobrien Note that multiple output operands are emitted in reverse order, 462390075Sobrien so the conflicting ones are those with higher indices. */ 462418334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno)) 462518334Speter return 0; 462618334Speter 462718334Speter for (i = 0; i < reload_n_operands; i++) 462818334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 462918334Speter return 0; 463018334Speter 463190075Sobrien for (i = opnum; i < reload_n_operands; i++) 463250397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno) 463350397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno)) 463418334Speter return 0; 463518334Speter 463618334Speter return 1; 463718334Speter 463818334Speter case RELOAD_FOR_INSN: 463918334Speter for (i = 0; i < reload_n_operands; i++) 464018334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno) 464118334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 464218334Speter return 0; 464318334Speter 464418334Speter return (! TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno) 464518334Speter && ! TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno)); 464618334Speter 464718334Speter case RELOAD_FOR_OTHER_ADDRESS: 464818334Speter return ! TEST_HARD_REG_BIT (reload_reg_used_in_other_addr, regno); 4649169689Skan 4650169689Skan default: 4651169689Skan gcc_unreachable (); 465218334Speter } 465318334Speter} 465418334Speter 465518334Speter/* Return 1 if the value in reload reg REGNO, as used by a reload 465618334Speter needed for the part of the insn specified by OPNUM and TYPE, 465718334Speter is still available in REGNO at the end of the insn. 465818334Speter 465918334Speter We can assume that the reload reg was already tested for availability 466018334Speter at the time it is needed, and we should not check this again, 466118334Speter in case the reg has already been marked in use. */ 466218334Speter 466318334Speterstatic int 4664132718Skanreload_reg_reaches_end_p (unsigned int regno, int opnum, enum reload_type type) 466518334Speter{ 466618334Speter int i; 466718334Speter 466818334Speter switch (type) 466918334Speter { 467018334Speter case RELOAD_OTHER: 467118334Speter /* Since a RELOAD_OTHER reload claims the reg for the entire insn, 467218334Speter its value must reach the end. */ 467318334Speter return 1; 467418334Speter 467518334Speter /* If this use is for part of the insn, 467690075Sobrien its value reaches if no subsequent part uses the same register. 467718334Speter Just like the above function, don't try to do this with lots 467818334Speter of fallthroughs. */ 467918334Speter 468018334Speter case RELOAD_FOR_OTHER_ADDRESS: 468118334Speter /* Here we check for everything else, since these don't conflict 468218334Speter with anything else and everything comes later. */ 468318334Speter 468418334Speter for (i = 0; i < reload_n_operands; i++) 468518334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno) 468650397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno) 468718334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno) 468818334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno) 468950397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno) 469018334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 469118334Speter return 0; 469218334Speter 469318334Speter return (! TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno) 4694132718Skan && ! TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno) 469518334Speter && ! TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno) 469618334Speter && ! TEST_HARD_REG_BIT (reload_reg_used, regno)); 469718334Speter 469818334Speter case RELOAD_FOR_INPUT_ADDRESS: 469950397Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 470018334Speter /* Similar, except that we check only for this and subsequent inputs 470118334Speter and the address of only subsequent inputs and we do not need 470218334Speter to check for RELOAD_OTHER objects since they are known not to 470318334Speter conflict. */ 470418334Speter 470518334Speter for (i = opnum; i < reload_n_operands; i++) 470618334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 470718334Speter return 0; 470818334Speter 470918334Speter for (i = opnum + 1; i < reload_n_operands; i++) 471050397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno) 471150397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno)) 471218334Speter return 0; 471318334Speter 471418334Speter for (i = 0; i < reload_n_operands; i++) 471518334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno) 471650397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno) 471718334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 471818334Speter return 0; 471918334Speter 472018334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno)) 472118334Speter return 0; 472218334Speter 472390075Sobrien return (!TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno) 472490075Sobrien && !TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno) 472590075Sobrien && !TEST_HARD_REG_BIT (reload_reg_used, regno)); 472618334Speter 472718334Speter case RELOAD_FOR_INPUT: 472818334Speter /* Similar to input address, except we start at the next operand for 472990075Sobrien both input and input address and we do not check for 473018334Speter RELOAD_FOR_OPERAND_ADDRESS and RELOAD_FOR_INSN since these 473118334Speter would conflict. */ 473218334Speter 473318334Speter for (i = opnum + 1; i < reload_n_operands; i++) 473418334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno) 473550397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno) 473618334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 473718334Speter return 0; 473818334Speter 473950397Sobrien /* ... fall through ... */ 474018334Speter 474118334Speter case RELOAD_FOR_OPERAND_ADDRESS: 474218334Speter /* Check outputs and their addresses. */ 474318334Speter 474418334Speter for (i = 0; i < reload_n_operands; i++) 474518334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno) 474650397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno) 474718334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 474818334Speter return 0; 474918334Speter 475090075Sobrien return (!TEST_HARD_REG_BIT (reload_reg_used, regno)); 475118334Speter 475218334Speter case RELOAD_FOR_OPADDR_ADDR: 475318334Speter for (i = 0; i < reload_n_operands; i++) 475418334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno) 475550397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno) 475618334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 475718334Speter return 0; 475818334Speter 475990075Sobrien return (!TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno) 476090075Sobrien && !TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno) 476190075Sobrien && !TEST_HARD_REG_BIT (reload_reg_used, regno)); 476218334Speter 476318334Speter case RELOAD_FOR_INSN: 476418334Speter /* These conflict with other outputs with RELOAD_OTHER. So 476518334Speter we need only check for output addresses. */ 476618334Speter 476790075Sobrien opnum = reload_n_operands; 476818334Speter 476950397Sobrien /* ... fall through ... */ 477018334Speter 477118334Speter case RELOAD_FOR_OUTPUT: 477218334Speter case RELOAD_FOR_OUTPUT_ADDRESS: 477350397Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 477418334Speter /* We already know these can't conflict with a later output. So the 477590075Sobrien only thing to check are later output addresses. 477690075Sobrien Note that multiple output operands are emitted in reverse order, 477790075Sobrien so the conflicting ones are those with lower indices. */ 477890075Sobrien for (i = 0; i < opnum; i++) 477950397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno) 478050397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno)) 478118334Speter return 0; 478218334Speter 478318334Speter return 1; 4784169689Skan 4785169689Skan default: 4786169689Skan gcc_unreachable (); 478718334Speter } 478818334Speter} 478918334Speter 479018334Speter/* Return 1 if the reloads denoted by R1 and R2 cannot share a register. 479118334Speter Return 0 otherwise. 479218334Speter 479318334Speter This function uses the same algorithm as reload_reg_free_p above. */ 479418334Speter 4795169689Skanstatic int 4796132718Skanreloads_conflict (int r1, int r2) 479718334Speter{ 479890075Sobrien enum reload_type r1_type = rld[r1].when_needed; 479990075Sobrien enum reload_type r2_type = rld[r2].when_needed; 480090075Sobrien int r1_opnum = rld[r1].opnum; 480190075Sobrien int r2_opnum = rld[r2].opnum; 480218334Speter 480350397Sobrien /* RELOAD_OTHER conflicts with everything. */ 480450397Sobrien if (r2_type == RELOAD_OTHER) 480518334Speter return 1; 480618334Speter 480718334Speter /* Otherwise, check conflicts differently for each type. */ 480818334Speter 480918334Speter switch (r1_type) 481018334Speter { 481118334Speter case RELOAD_FOR_INPUT: 481290075Sobrien return (r2_type == RELOAD_FOR_INSN 481318334Speter || r2_type == RELOAD_FOR_OPERAND_ADDRESS 481418334Speter || r2_type == RELOAD_FOR_OPADDR_ADDR 481518334Speter || r2_type == RELOAD_FOR_INPUT 481650397Sobrien || ((r2_type == RELOAD_FOR_INPUT_ADDRESS 481750397Sobrien || r2_type == RELOAD_FOR_INPADDR_ADDRESS) 481850397Sobrien && r2_opnum > r1_opnum)); 481918334Speter 482018334Speter case RELOAD_FOR_INPUT_ADDRESS: 482118334Speter return ((r2_type == RELOAD_FOR_INPUT_ADDRESS && r1_opnum == r2_opnum) 482218334Speter || (r2_type == RELOAD_FOR_INPUT && r2_opnum < r1_opnum)); 482318334Speter 482450397Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 482550397Sobrien return ((r2_type == RELOAD_FOR_INPADDR_ADDRESS && r1_opnum == r2_opnum) 482650397Sobrien || (r2_type == RELOAD_FOR_INPUT && r2_opnum < r1_opnum)); 482750397Sobrien 482818334Speter case RELOAD_FOR_OUTPUT_ADDRESS: 482918334Speter return ((r2_type == RELOAD_FOR_OUTPUT_ADDRESS && r2_opnum == r1_opnum) 483090075Sobrien || (r2_type == RELOAD_FOR_OUTPUT && r2_opnum <= r1_opnum)); 483118334Speter 483250397Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 483350397Sobrien return ((r2_type == RELOAD_FOR_OUTADDR_ADDRESS && r2_opnum == r1_opnum) 483490075Sobrien || (r2_type == RELOAD_FOR_OUTPUT && r2_opnum <= r1_opnum)); 483550397Sobrien 483618334Speter case RELOAD_FOR_OPERAND_ADDRESS: 483718334Speter return (r2_type == RELOAD_FOR_INPUT || r2_type == RELOAD_FOR_INSN 483818334Speter || r2_type == RELOAD_FOR_OPERAND_ADDRESS); 483918334Speter 484018334Speter case RELOAD_FOR_OPADDR_ADDR: 484190075Sobrien return (r2_type == RELOAD_FOR_INPUT 484218334Speter || r2_type == RELOAD_FOR_OPADDR_ADDR); 484318334Speter 484418334Speter case RELOAD_FOR_OUTPUT: 484518334Speter return (r2_type == RELOAD_FOR_INSN || r2_type == RELOAD_FOR_OUTPUT 484650397Sobrien || ((r2_type == RELOAD_FOR_OUTPUT_ADDRESS 484750397Sobrien || r2_type == RELOAD_FOR_OUTADDR_ADDRESS) 484890075Sobrien && r2_opnum >= r1_opnum)); 484918334Speter 485018334Speter case RELOAD_FOR_INSN: 485118334Speter return (r2_type == RELOAD_FOR_INPUT || r2_type == RELOAD_FOR_OUTPUT 485218334Speter || r2_type == RELOAD_FOR_INSN 485318334Speter || r2_type == RELOAD_FOR_OPERAND_ADDRESS); 485418334Speter 485518334Speter case RELOAD_FOR_OTHER_ADDRESS: 485618334Speter return r2_type == RELOAD_FOR_OTHER_ADDRESS; 485718334Speter 485818334Speter case RELOAD_OTHER: 485950397Sobrien return 1; 486018334Speter 486118334Speter default: 4862169689Skan gcc_unreachable (); 486318334Speter } 486418334Speter} 486518334Speter 486618334Speter/* Indexed by reload number, 1 if incoming value 486718334Speter inherited from previous insns. */ 4868169689Skanstatic char reload_inherited[MAX_RELOADS]; 486918334Speter 487018334Speter/* For an inherited reload, this is the insn the reload was inherited from, 487118334Speter if we know it. Otherwise, this is 0. */ 4872169689Skanstatic rtx reload_inheritance_insn[MAX_RELOADS]; 487318334Speter 4874117395Skan/* If nonzero, this is a place to get the value of the reload, 487518334Speter rather than using reload_in. */ 4876169689Skanstatic rtx reload_override_in[MAX_RELOADS]; 487718334Speter 487850397Sobrien/* For each reload, the hard register number of the register used, 487950397Sobrien or -1 if we did not need a register for this reload. */ 4880169689Skanstatic int reload_spill_index[MAX_RELOADS]; 488118334Speter 488290075Sobrien/* Subroutine of free_for_value_p, used to check a single register. 488390075Sobrien START_REGNO is the starting regno of the full reload register 488490075Sobrien (possibly comprising multiple hard registers) that we are considering. */ 488550397Sobrien 488650397Sobrienstatic int 4887132718Skanreload_reg_free_for_value_p (int start_regno, int regno, int opnum, 4888132718Skan enum reload_type type, rtx value, rtx out, 4889132718Skan int reloadnum, int ignore_address_reloads) 489050397Sobrien{ 489150397Sobrien int time1; 489270635Sobrien /* Set if we see an input reload that must not share its reload register 489370635Sobrien with any new earlyclobber, but might otherwise share the reload 489470635Sobrien register with an output or input-output reload. */ 489570635Sobrien int check_earlyclobber = 0; 489650397Sobrien int i; 489752284Sobrien int copy = 0; 489850397Sobrien 489970635Sobrien if (TEST_HARD_REG_BIT (reload_reg_unavailable, regno)) 490057844Sobrien return 0; 490157844Sobrien 490252284Sobrien if (out == const0_rtx) 490352284Sobrien { 490452284Sobrien copy = 1; 490552284Sobrien out = NULL_RTX; 490652284Sobrien } 490752284Sobrien 490850397Sobrien /* We use some pseudo 'time' value to check if the lifetimes of the 490950397Sobrien new register use would overlap with the one of a previous reload 491050397Sobrien that is not read-only or uses a different value. 491150397Sobrien The 'time' used doesn't have to be linear in any shape or form, just 491250397Sobrien monotonic. 491350397Sobrien Some reload types use different 'buckets' for each operand. 491450397Sobrien So there are MAX_RECOG_OPERANDS different time values for each 491550397Sobrien such reload type. 491650397Sobrien We compute TIME1 as the time when the register for the prospective 491750397Sobrien new reload ceases to be live, and TIME2 for each existing 491850397Sobrien reload as the time when that the reload register of that reload 491950397Sobrien becomes live. 492050397Sobrien Where there is little to be gained by exact lifetime calculations, 492150397Sobrien we just make conservative assumptions, i.e. a longer lifetime; 492250397Sobrien this is done in the 'default:' cases. */ 492350397Sobrien switch (type) 492450397Sobrien { 492550397Sobrien case RELOAD_FOR_OTHER_ADDRESS: 492670635Sobrien /* RELOAD_FOR_OTHER_ADDRESS conflicts with RELOAD_OTHER reloads. */ 492770635Sobrien time1 = copy ? 0 : 1; 492850397Sobrien break; 492952284Sobrien case RELOAD_OTHER: 493052284Sobrien time1 = copy ? 1 : MAX_RECOG_OPERANDS * 5 + 5; 493152284Sobrien break; 493290075Sobrien /* For each input, we may have a sequence of RELOAD_FOR_INPADDR_ADDRESS, 493390075Sobrien RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT. By adding 0 / 1 / 2 , 493490075Sobrien respectively, to the time values for these, we get distinct time 493590075Sobrien values. To get distinct time values for each operand, we have to 493690075Sobrien multiply opnum by at least three. We round that up to four because 493790075Sobrien multiply by four is often cheaper. */ 493850397Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 493952284Sobrien time1 = opnum * 4 + 2; 494050397Sobrien break; 494150397Sobrien case RELOAD_FOR_INPUT_ADDRESS: 494252284Sobrien time1 = opnum * 4 + 3; 494350397Sobrien break; 494450397Sobrien case RELOAD_FOR_INPUT: 494552284Sobrien /* All RELOAD_FOR_INPUT reloads remain live till the instruction 494652284Sobrien executes (inclusive). */ 494752284Sobrien time1 = copy ? opnum * 4 + 4 : MAX_RECOG_OPERANDS * 4 + 3; 494850397Sobrien break; 494952284Sobrien case RELOAD_FOR_OPADDR_ADDR: 495090075Sobrien /* opnum * 4 + 4 495190075Sobrien <= (MAX_RECOG_OPERANDS - 1) * 4 + 4 == MAX_RECOG_OPERANDS * 4 */ 495252284Sobrien time1 = MAX_RECOG_OPERANDS * 4 + 1; 495352284Sobrien break; 495452284Sobrien case RELOAD_FOR_OPERAND_ADDRESS: 495552284Sobrien /* RELOAD_FOR_OPERAND_ADDRESS reloads are live even while the insn 495652284Sobrien is executed. */ 495752284Sobrien time1 = copy ? MAX_RECOG_OPERANDS * 4 + 2 : MAX_RECOG_OPERANDS * 4 + 3; 495852284Sobrien break; 495952284Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 496052284Sobrien time1 = MAX_RECOG_OPERANDS * 4 + 4 + opnum; 496152284Sobrien break; 496250397Sobrien case RELOAD_FOR_OUTPUT_ADDRESS: 496352284Sobrien time1 = MAX_RECOG_OPERANDS * 4 + 5 + opnum; 496450397Sobrien break; 496550397Sobrien default: 496652284Sobrien time1 = MAX_RECOG_OPERANDS * 5 + 5; 496750397Sobrien } 496850397Sobrien 496950397Sobrien for (i = 0; i < n_reloads; i++) 497050397Sobrien { 497190075Sobrien rtx reg = rld[i].reg_rtx; 4972169689Skan if (reg && REG_P (reg) 497350397Sobrien && ((unsigned) regno - true_regnum (reg) 4974169689Skan <= hard_regno_nregs[REGNO (reg)][GET_MODE (reg)] - (unsigned) 1) 497550397Sobrien && i != reloadnum) 497650397Sobrien { 497790075Sobrien rtx other_input = rld[i].in; 497890075Sobrien 497990075Sobrien /* If the other reload loads the same input value, that 498090075Sobrien will not cause a conflict only if it's loading it into 498190075Sobrien the same register. */ 498290075Sobrien if (true_regnum (reg) != start_regno) 498390075Sobrien other_input = NULL_RTX; 498490075Sobrien if (! other_input || ! rtx_equal_p (other_input, value) 498590075Sobrien || rld[i].out || out) 498650397Sobrien { 498750397Sobrien int time2; 498890075Sobrien switch (rld[i].when_needed) 498950397Sobrien { 499050397Sobrien case RELOAD_FOR_OTHER_ADDRESS: 499150397Sobrien time2 = 0; 499250397Sobrien break; 499350397Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 499452284Sobrien /* find_reloads makes sure that a 499552284Sobrien RELOAD_FOR_{INP,OP,OUT}ADDR_ADDRESS reload is only used 499652284Sobrien by at most one - the first - 499752284Sobrien RELOAD_FOR_{INPUT,OPERAND,OUTPUT}_ADDRESS . If the 499852284Sobrien address reload is inherited, the address address reload 499952284Sobrien goes away, so we can ignore this conflict. */ 500052284Sobrien if (type == RELOAD_FOR_INPUT_ADDRESS && reloadnum == i + 1 500152284Sobrien && ignore_address_reloads 500252284Sobrien /* Unless the RELOAD_FOR_INPUT is an auto_inc expression. 500352284Sobrien Then the address address is still needed to store 500452284Sobrien back the new address. */ 500590075Sobrien && ! rld[reloadnum].out) 500652284Sobrien continue; 500752284Sobrien /* Likewise, if a RELOAD_FOR_INPUT can inherit a value, its 500852284Sobrien RELOAD_FOR_INPUT_ADDRESS / RELOAD_FOR_INPADDR_ADDRESS 500952284Sobrien reloads go away. */ 501090075Sobrien if (type == RELOAD_FOR_INPUT && opnum == rld[i].opnum 501152284Sobrien && ignore_address_reloads 501252284Sobrien /* Unless we are reloading an auto_inc expression. */ 501390075Sobrien && ! rld[reloadnum].out) 501452284Sobrien continue; 501590075Sobrien time2 = rld[i].opnum * 4 + 2; 501650397Sobrien break; 501750397Sobrien case RELOAD_FOR_INPUT_ADDRESS: 501890075Sobrien if (type == RELOAD_FOR_INPUT && opnum == rld[i].opnum 501952284Sobrien && ignore_address_reloads 502090075Sobrien && ! rld[reloadnum].out) 502152284Sobrien continue; 502290075Sobrien time2 = rld[i].opnum * 4 + 3; 502350397Sobrien break; 502450397Sobrien case RELOAD_FOR_INPUT: 502590075Sobrien time2 = rld[i].opnum * 4 + 4; 502670635Sobrien check_earlyclobber = 1; 502750397Sobrien break; 502890075Sobrien /* rld[i].opnum * 4 + 4 <= (MAX_RECOG_OPERAND - 1) * 4 + 4 502990075Sobrien == MAX_RECOG_OPERAND * 4 */ 503052284Sobrien case RELOAD_FOR_OPADDR_ADDR: 503152284Sobrien if (type == RELOAD_FOR_OPERAND_ADDRESS && reloadnum == i + 1 503252284Sobrien && ignore_address_reloads 503390075Sobrien && ! rld[reloadnum].out) 503452284Sobrien continue; 503552284Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 1; 503652284Sobrien break; 503752284Sobrien case RELOAD_FOR_OPERAND_ADDRESS: 503852284Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 2; 503970635Sobrien check_earlyclobber = 1; 504052284Sobrien break; 504152284Sobrien case RELOAD_FOR_INSN: 504252284Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 3; 504352284Sobrien break; 504450397Sobrien case RELOAD_FOR_OUTPUT: 504590075Sobrien /* All RELOAD_FOR_OUTPUT reloads become live just after the 504690075Sobrien instruction is executed. */ 504752284Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 4; 504850397Sobrien break; 504990075Sobrien /* The first RELOAD_FOR_OUTADDR_ADDRESS reload conflicts with 505090075Sobrien the RELOAD_FOR_OUTPUT reloads, so assign it the same time 505190075Sobrien value. */ 505252284Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 505352284Sobrien if (type == RELOAD_FOR_OUTPUT_ADDRESS && reloadnum == i + 1 505452284Sobrien && ignore_address_reloads 505590075Sobrien && ! rld[reloadnum].out) 505652284Sobrien continue; 505790075Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 4 + rld[i].opnum; 505852284Sobrien break; 505950397Sobrien case RELOAD_FOR_OUTPUT_ADDRESS: 506090075Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 5 + rld[i].opnum; 506150397Sobrien break; 506250397Sobrien case RELOAD_OTHER: 506352284Sobrien /* If there is no conflict in the input part, handle this 506452284Sobrien like an output reload. */ 506590075Sobrien if (! rld[i].in || rtx_equal_p (other_input, value)) 506650397Sobrien { 506752284Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 4; 506870635Sobrien /* Earlyclobbered outputs must conflict with inputs. */ 506990075Sobrien if (earlyclobber_operand_p (rld[i].out)) 507070635Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 3; 507190075Sobrien 507250397Sobrien break; 507350397Sobrien } 507452284Sobrien time2 = 1; 507552284Sobrien /* RELOAD_OTHER might be live beyond instruction execution, 507652284Sobrien but this is not obvious when we set time2 = 1. So check 507752284Sobrien here if there might be a problem with the new reload 507852284Sobrien clobbering the register used by the RELOAD_OTHER. */ 507952284Sobrien if (out) 508052284Sobrien return 0; 508152284Sobrien break; 508250397Sobrien default: 508352284Sobrien return 0; 508450397Sobrien } 508552284Sobrien if ((time1 >= time2 508690075Sobrien && (! rld[i].in || rld[i].out 508790075Sobrien || ! rtx_equal_p (other_input, value))) 508890075Sobrien || (out && rld[reloadnum].out_reg 508952284Sobrien && time2 >= MAX_RECOG_OPERANDS * 4 + 3)) 509050397Sobrien return 0; 509150397Sobrien } 509250397Sobrien } 509350397Sobrien } 509470635Sobrien 509570635Sobrien /* Earlyclobbered outputs must conflict with inputs. */ 509670635Sobrien if (check_earlyclobber && out && earlyclobber_operand_p (out)) 509770635Sobrien return 0; 509870635Sobrien 509950397Sobrien return 1; 510050397Sobrien} 510150397Sobrien 510270635Sobrien/* Return 1 if the value in reload reg REGNO, as used by a reload 510370635Sobrien needed for the part of the insn specified by OPNUM and TYPE, 510470635Sobrien may be used to load VALUE into it. 510570635Sobrien 510670635Sobrien MODE is the mode in which the register is used, this is needed to 510770635Sobrien determine how many hard regs to test. 510870635Sobrien 510970635Sobrien Other read-only reloads with the same value do not conflict 5110117395Skan unless OUT is nonzero and these other reloads have to live while 511170635Sobrien output reloads live. 511270635Sobrien If OUT is CONST0_RTX, this is a special case: it means that the 511370635Sobrien test should not be for using register REGNO as reload register, but 511470635Sobrien for copying from register REGNO into the reload register. 511570635Sobrien 511670635Sobrien RELOADNUM is the number of the reload we want to load this value for; 511770635Sobrien a reload does not conflict with itself. 511870635Sobrien 511970635Sobrien When IGNORE_ADDRESS_RELOADS is set, we can not have conflicts with 512070635Sobrien reloads that load an address for the very reload we are considering. 512170635Sobrien 512270635Sobrien The caller has to make sure that there is no conflict with the return 512370635Sobrien register. */ 512470635Sobrien 512570635Sobrienstatic int 5126132718Skanfree_for_value_p (int regno, enum machine_mode mode, int opnum, 5127132718Skan enum reload_type type, rtx value, rtx out, int reloadnum, 5128132718Skan int ignore_address_reloads) 512970635Sobrien{ 5130169689Skan int nregs = hard_regno_nregs[regno][mode]; 513170635Sobrien while (nregs-- > 0) 513290075Sobrien if (! reload_reg_free_for_value_p (regno, regno + nregs, opnum, type, 513390075Sobrien value, out, reloadnum, 513490075Sobrien ignore_address_reloads)) 513570635Sobrien return 0; 513670635Sobrien return 1; 513770635Sobrien} 513870635Sobrien 5139169689Skan/* Return nonzero if the rtx X is invariant over the current function. */ 5140169689Skan/* ??? Actually, the places where we use this expect exactly what is 5141169689Skan tested here, and not everything that is function invariant. In 5142169689Skan particular, the frame pointer and arg pointer are special cased; 5143169689Skan pic_offset_table_rtx is not, and we must not spill these things to 5144169689Skan memory. */ 5145169689Skan 5146169689Skanint 5147169689Skanfunction_invariant_p (rtx x) 5148169689Skan{ 5149169689Skan if (CONSTANT_P (x)) 5150169689Skan return 1; 5151169689Skan if (x == frame_pointer_rtx || x == arg_pointer_rtx) 5152169689Skan return 1; 5153169689Skan if (GET_CODE (x) == PLUS 5154169689Skan && (XEXP (x, 0) == frame_pointer_rtx || XEXP (x, 0) == arg_pointer_rtx) 5155169689Skan && CONSTANT_P (XEXP (x, 1))) 5156169689Skan return 1; 5157169689Skan return 0; 5158169689Skan} 5159169689Skan 516070635Sobrien/* Determine whether the reload reg X overlaps any rtx'es used for 516170635Sobrien overriding inheritance. Return nonzero if so. */ 516270635Sobrien 516370635Sobrienstatic int 5164132718Skanconflicts_with_override (rtx x) 516570635Sobrien{ 516670635Sobrien int i; 516770635Sobrien for (i = 0; i < n_reloads; i++) 516870635Sobrien if (reload_override_in[i] 516970635Sobrien && reg_overlap_mentioned_p (x, reload_override_in[i])) 517070635Sobrien return 1; 517170635Sobrien return 0; 517270635Sobrien} 517390075Sobrien 517490075Sobrien/* Give an error message saying we failed to find a reload for INSN, 517590075Sobrien and clear out reload R. */ 517690075Sobrienstatic void 5177132718Skanfailed_reload (rtx insn, int r) 517890075Sobrien{ 517990075Sobrien if (asm_noperands (PATTERN (insn)) < 0) 518090075Sobrien /* It's the compiler's fault. */ 518190075Sobrien fatal_insn ("could not find a spill register", insn); 518270635Sobrien 518390075Sobrien /* It's the user's fault; the operand's mode and constraint 518490075Sobrien don't match. Disable this reload so we don't crash in final. */ 518590075Sobrien error_for_asm (insn, 5186169689Skan "%<asm%> operand constraint incompatible with operand size"); 518790075Sobrien rld[r].in = 0; 518890075Sobrien rld[r].out = 0; 518990075Sobrien rld[r].reg_rtx = 0; 519090075Sobrien rld[r].optional = 1; 519190075Sobrien rld[r].secondary_p = 1; 519290075Sobrien} 519390075Sobrien 519490075Sobrien/* I is the index in SPILL_REG_RTX of the reload register we are to allocate 519590075Sobrien for reload R. If it's valid, get an rtx for it. Return nonzero if 519690075Sobrien successful. */ 519790075Sobrienstatic int 5198132718Skanset_reload_reg (int i, int r) 519990075Sobrien{ 520090075Sobrien int regno; 520190075Sobrien rtx reg = spill_reg_rtx[i]; 520290075Sobrien 520390075Sobrien if (reg == 0 || GET_MODE (reg) != rld[r].mode) 520490075Sobrien spill_reg_rtx[i] = reg 520590075Sobrien = gen_rtx_REG (rld[r].mode, spill_regs[i]); 520690075Sobrien 520790075Sobrien regno = true_regnum (reg); 520890075Sobrien 520990075Sobrien /* Detect when the reload reg can't hold the reload mode. 521090075Sobrien This used to be one `if', but Sequent compiler can't handle that. */ 521190075Sobrien if (HARD_REGNO_MODE_OK (regno, rld[r].mode)) 521290075Sobrien { 521390075Sobrien enum machine_mode test_mode = VOIDmode; 521490075Sobrien if (rld[r].in) 521590075Sobrien test_mode = GET_MODE (rld[r].in); 521690075Sobrien /* If rld[r].in has VOIDmode, it means we will load it 521790075Sobrien in whatever mode the reload reg has: to wit, rld[r].mode. 521890075Sobrien We have already tested that for validity. */ 521990075Sobrien /* Aside from that, we need to test that the expressions 522090075Sobrien to reload from or into have modes which are valid for this 522190075Sobrien reload register. Otherwise the reload insns would be invalid. */ 522290075Sobrien if (! (rld[r].in != 0 && test_mode != VOIDmode 522390075Sobrien && ! HARD_REGNO_MODE_OK (regno, test_mode))) 522490075Sobrien if (! (rld[r].out != 0 522590075Sobrien && ! HARD_REGNO_MODE_OK (regno, GET_MODE (rld[r].out)))) 522690075Sobrien { 522790075Sobrien /* The reg is OK. */ 522890075Sobrien last_spill_reg = i; 522990075Sobrien 523090075Sobrien /* Mark as in use for this insn the reload regs we use 523190075Sobrien for this. */ 523290075Sobrien mark_reload_reg_in_use (spill_regs[i], rld[r].opnum, 523390075Sobrien rld[r].when_needed, rld[r].mode); 523490075Sobrien 523590075Sobrien rld[r].reg_rtx = reg; 523690075Sobrien reload_spill_index[r] = spill_regs[i]; 523790075Sobrien return 1; 523890075Sobrien } 523990075Sobrien } 524090075Sobrien return 0; 524190075Sobrien} 524290075Sobrien 524318334Speter/* Find a spill register to use as a reload register for reload R. 5244117395Skan LAST_RELOAD is nonzero if this is the last reload for the insn being 524518334Speter processed. 524618334Speter 524790075Sobrien Set rld[R].reg_rtx to the register allocated. 524818334Speter 524990075Sobrien We return 1 if successful, or 0 if we couldn't find a spill reg and 525090075Sobrien we didn't change anything. */ 525118334Speter 525218334Speterstatic int 5253132718Skanallocate_reload_reg (struct insn_chain *chain ATTRIBUTE_UNUSED, int r, 5254132718Skan int last_reload) 525518334Speter{ 525690075Sobrien int i, pass, count; 525718334Speter 525818334Speter /* If we put this reload ahead, thinking it is a group, 525918334Speter then insist on finding a group. Otherwise we can grab a 526018334Speter reg that some other reload needs. 526118334Speter (That can happen when we have a 68000 DATA_OR_FP_REG 526218334Speter which is a group of data regs or one fp reg.) 526318334Speter We need not be so restrictive if there are no more reloads 526418334Speter for this insn. 526518334Speter 526618334Speter ??? Really it would be nicer to have smarter handling 526718334Speter for that kind of reg class, where a problem like this is normal. 526818334Speter Perhaps those classes should be avoided for reloading 526918334Speter by use of more alternatives. */ 527018334Speter 527190075Sobrien int force_group = rld[r].nregs > 1 && ! last_reload; 527218334Speter 527318334Speter /* If we want a single register and haven't yet found one, 527418334Speter take any reg in the right class and not in use. 527518334Speter If we want a consecutive group, here is where we look for it. 527618334Speter 527718334Speter We use two passes so we can first look for reload regs to 527818334Speter reuse, which are already in use for other reloads in this insn, 527918334Speter and only then use additional registers. 528018334Speter I think that maximizing reuse is needed to make sure we don't 528118334Speter run out of reload regs. Suppose we have three reloads, and 528218334Speter reloads A and B can share regs. These need two regs. 528318334Speter Suppose A and B are given different regs. 528418334Speter That leaves none for C. */ 528518334Speter for (pass = 0; pass < 2; pass++) 528618334Speter { 528718334Speter /* I is the index in spill_regs. 528818334Speter We advance it round-robin between insns to use all spill regs 528918334Speter equally, so that inherited reloads have a chance 529090075Sobrien of leapfrogging each other. */ 529118334Speter 529290075Sobrien i = last_spill_reg; 529390075Sobrien 529418334Speter for (count = 0; count < n_spills; count++) 529518334Speter { 529690075Sobrien int class = (int) rld[r].class; 529752284Sobrien int regnum; 529818334Speter 529952284Sobrien i++; 530052284Sobrien if (i >= n_spills) 530152284Sobrien i -= n_spills; 530252284Sobrien regnum = spill_regs[i]; 530318334Speter 530490075Sobrien if ((reload_reg_free_p (regnum, rld[r].opnum, 530590075Sobrien rld[r].when_needed) 530690075Sobrien || (rld[r].in 530790075Sobrien /* We check reload_reg_used to make sure we 530890075Sobrien don't clobber the return register. */ 530952284Sobrien && ! TEST_HARD_REG_BIT (reload_reg_used, regnum) 531090075Sobrien && free_for_value_p (regnum, rld[r].mode, rld[r].opnum, 531190075Sobrien rld[r].when_needed, rld[r].in, 531290075Sobrien rld[r].out, r, 1))) 531352284Sobrien && TEST_HARD_REG_BIT (reg_class_contents[class], regnum) 531490075Sobrien && HARD_REGNO_MODE_OK (regnum, rld[r].mode) 531518334Speter /* Look first for regs to share, then for unshared. But 531618334Speter don't share regs used for inherited reloads; they are 531718334Speter the ones we want to preserve. */ 531818334Speter && (pass 531918334Speter || (TEST_HARD_REG_BIT (reload_reg_used_at_all, 532052284Sobrien regnum) 532118334Speter && ! TEST_HARD_REG_BIT (reload_reg_used_for_inherit, 532252284Sobrien regnum)))) 532318334Speter { 5324169689Skan int nr = hard_regno_nregs[regnum][rld[r].mode]; 532518334Speter /* Avoid the problem where spilling a GENERAL_OR_FP_REG 532618334Speter (on 68000) got us two FP regs. If NR is 1, 532718334Speter we would reject both of them. */ 532818334Speter if (force_group) 532990075Sobrien nr = rld[r].nregs; 533018334Speter /* If we need only one reg, we have already won. */ 533118334Speter if (nr == 1) 533218334Speter { 533318334Speter /* But reject a single reg if we demand a group. */ 533418334Speter if (force_group) 533518334Speter continue; 533618334Speter break; 533718334Speter } 533818334Speter /* Otherwise check that as many consecutive regs as we need 533990075Sobrien are available here. */ 534090075Sobrien while (nr > 1) 534190075Sobrien { 534290075Sobrien int regno = regnum + nr - 1; 534390075Sobrien if (!(TEST_HARD_REG_BIT (reg_class_contents[class], regno) 534490075Sobrien && spill_reg_order[regno] >= 0 534590075Sobrien && reload_reg_free_p (regno, rld[r].opnum, 534690075Sobrien rld[r].when_needed))) 534790075Sobrien break; 534890075Sobrien nr--; 534990075Sobrien } 535018334Speter if (nr == 1) 535118334Speter break; 535218334Speter } 535318334Speter } 535418334Speter 535518334Speter /* If we found something on pass 1, omit pass 2. */ 535618334Speter if (count < n_spills) 535718334Speter break; 535818334Speter } 535918334Speter 536018334Speter /* We should have found a spill register by now. */ 536190075Sobrien if (count >= n_spills) 536290075Sobrien return 0; 536318334Speter 536418334Speter /* I is the index in SPILL_REG_RTX of the reload register we are to 536518334Speter allocate. Get an rtx for it and find its register number. */ 536618334Speter 536790075Sobrien return set_reload_reg (i, r); 536818334Speter} 536918334Speter 537090075Sobrien/* Initialize all the tables needed to allocate reload registers. 537190075Sobrien CHAIN is the insn currently being processed; SAVE_RELOAD_REG_RTX 537290075Sobrien is the array we use to restore the reg_rtx field for every reload. */ 537318334Speter 537418334Speterstatic void 5375132718Skanchoose_reload_regs_init (struct insn_chain *chain, rtx *save_reload_reg_rtx) 537618334Speter{ 537790075Sobrien int i; 537818334Speter 537990075Sobrien for (i = 0; i < n_reloads; i++) 538090075Sobrien rld[i].reg_rtx = save_reload_reg_rtx[i]; 538118334Speter 538290075Sobrien memset (reload_inherited, 0, MAX_RELOADS); 5383132718Skan memset (reload_inheritance_insn, 0, MAX_RELOADS * sizeof (rtx)); 5384132718Skan memset (reload_override_in, 0, MAX_RELOADS * sizeof (rtx)); 538518334Speter 538618334Speter CLEAR_HARD_REG_SET (reload_reg_used); 538718334Speter CLEAR_HARD_REG_SET (reload_reg_used_at_all); 538818334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_op_addr); 538918334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_op_addr_reload); 539018334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_insn); 539118334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_other_addr); 539218334Speter 539352284Sobrien CLEAR_HARD_REG_SET (reg_used_in_insn); 539452284Sobrien { 539552284Sobrien HARD_REG_SET tmp; 539690075Sobrien REG_SET_TO_HARD_REG_SET (tmp, &chain->live_throughout); 539752284Sobrien IOR_HARD_REG_SET (reg_used_in_insn, tmp); 539890075Sobrien REG_SET_TO_HARD_REG_SET (tmp, &chain->dead_or_set); 539952284Sobrien IOR_HARD_REG_SET (reg_used_in_insn, tmp); 540090075Sobrien compute_use_by_pseudos (®_used_in_insn, &chain->live_throughout); 540190075Sobrien compute_use_by_pseudos (®_used_in_insn, &chain->dead_or_set); 540252284Sobrien } 540390075Sobrien 540418334Speter for (i = 0; i < reload_n_operands; i++) 540518334Speter { 540618334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_output[i]); 540718334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_input[i]); 540818334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_input_addr[i]); 540950397Sobrien CLEAR_HARD_REG_SET (reload_reg_used_in_inpaddr_addr[i]); 541018334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_output_addr[i]); 541150397Sobrien CLEAR_HARD_REG_SET (reload_reg_used_in_outaddr_addr[i]); 541218334Speter } 541318334Speter 541470635Sobrien COMPL_HARD_REG_SET (reload_reg_unavailable, chain->used_spill_regs); 541518334Speter 541690075Sobrien CLEAR_HARD_REG_SET (reload_reg_used_for_inherit); 541718334Speter 541890075Sobrien for (i = 0; i < n_reloads; i++) 541990075Sobrien /* If we have already decided to use a certain register, 542090075Sobrien don't use it in another way. */ 542190075Sobrien if (rld[i].reg_rtx) 542290075Sobrien mark_reload_reg_in_use (REGNO (rld[i].reg_rtx), rld[i].opnum, 542390075Sobrien rld[i].when_needed, rld[i].mode); 542490075Sobrien} 542518334Speter 542690075Sobrien/* Assign hard reg targets for the pseudo-registers we must reload 542790075Sobrien into hard regs for this insn. 542890075Sobrien Also output the instructions to copy them in and out of the hard regs. 542990075Sobrien 543090075Sobrien For machines with register classes, we are responsible for 543190075Sobrien finding a reload reg in the proper class. */ 543290075Sobrien 543390075Sobrienstatic void 5434132718Skanchoose_reload_regs (struct insn_chain *chain) 543590075Sobrien{ 543690075Sobrien rtx insn = chain->insn; 543790075Sobrien int i, j; 543890075Sobrien unsigned int max_group_size = 1; 543990075Sobrien enum reg_class group_class = NO_REGS; 544090075Sobrien int pass, win, inheritance; 544190075Sobrien 544290075Sobrien rtx save_reload_reg_rtx[MAX_RELOADS]; 544390075Sobrien 544418334Speter /* In order to be certain of getting the registers we need, 544518334Speter we must sort the reloads into order of increasing register class. 544618334Speter Then our grabbing of reload registers will parallel the process 544718334Speter that provided the reload registers. 544818334Speter 544918334Speter Also note whether any of the reloads wants a consecutive group of regs. 545018334Speter If so, record the maximum size of the group desired and what 545118334Speter register class contains all the groups needed by this insn. */ 545218334Speter 545318334Speter for (j = 0; j < n_reloads; j++) 545418334Speter { 545518334Speter reload_order[j] = j; 5456220150Smm if (rld[j].reg_rtx != NULL_RTX) 5457220150Smm { 5458220150Smm gcc_assert (REG_P (rld[j].reg_rtx) 5459220150Smm && HARD_REGISTER_P (rld[j].reg_rtx)); 5460220150Smm reload_spill_index[j] = REGNO (rld[j].reg_rtx); 5461220150Smm } 5462220150Smm else 5463220150Smm reload_spill_index[j] = -1; 546418334Speter 546590075Sobrien if (rld[j].nregs > 1) 546618334Speter { 546790075Sobrien max_group_size = MAX (rld[j].nregs, max_group_size); 546890075Sobrien group_class 546990075Sobrien = reg_class_superunion[(int) rld[j].class][(int) group_class]; 547018334Speter } 547118334Speter 547290075Sobrien save_reload_reg_rtx[j] = rld[j].reg_rtx; 547318334Speter } 547418334Speter 547518334Speter if (n_reloads > 1) 547618334Speter qsort (reload_order, n_reloads, sizeof (short), reload_reg_class_lower); 547718334Speter 547818334Speter /* If -O, try first with inheritance, then turning it off. 547918334Speter If not -O, don't do inheritance. 548018334Speter Using inheritance when not optimizing leads to paradoxes 548118334Speter with fp on the 68k: fp numbers (not NaNs) fail to be equal to themselves 548218334Speter because one side of the comparison might be inherited. */ 548390075Sobrien win = 0; 548418334Speter for (inheritance = optimize > 0; inheritance >= 0; inheritance--) 548518334Speter { 548690075Sobrien choose_reload_regs_init (chain, save_reload_reg_rtx); 548790075Sobrien 548818334Speter /* Process the reloads in order of preference just found. 548918334Speter Beyond this point, subregs can be found in reload_reg_rtx. 549018334Speter 549190075Sobrien This used to look for an existing reloaded home for all of the 549290075Sobrien reloads, and only then perform any new reloads. But that could lose 549390075Sobrien if the reloads were done out of reg-class order because a later 549490075Sobrien reload with a looser constraint might have an old home in a register 549590075Sobrien needed by an earlier reload with a tighter constraint. 549618334Speter 549718334Speter To solve this, we make two passes over the reloads, in the order 549818334Speter described above. In the first pass we try to inherit a reload 549918334Speter from a previous insn. If there is a later reload that needs a 550018334Speter class that is a proper subset of the class being processed, we must 550118334Speter also allocate a spill register during the first pass. 550218334Speter 550318334Speter Then make a second pass over the reloads to allocate any reloads 550418334Speter that haven't been given registers yet. */ 550518334Speter 550618334Speter for (j = 0; j < n_reloads; j++) 550718334Speter { 550890075Sobrien int r = reload_order[j]; 550952284Sobrien rtx search_equiv = NULL_RTX; 551018334Speter 551118334Speter /* Ignore reloads that got marked inoperative. */ 551290075Sobrien if (rld[r].out == 0 && rld[r].in == 0 551390075Sobrien && ! rld[r].secondary_p) 551418334Speter continue; 551518334Speter 551652284Sobrien /* If find_reloads chose to use reload_in or reload_out as a reload 551750397Sobrien register, we don't need to chose one. Otherwise, try even if it 551850397Sobrien found one since we might save an insn if we find the value lying 551952284Sobrien around. 552052284Sobrien Try also when reload_in is a pseudo without a hard reg. */ 552190075Sobrien if (rld[r].in != 0 && rld[r].reg_rtx != 0 552290075Sobrien && (rtx_equal_p (rld[r].in, rld[r].reg_rtx) 552390075Sobrien || (rtx_equal_p (rld[r].out, rld[r].reg_rtx) 5524169689Skan && !MEM_P (rld[r].in) 552590075Sobrien && true_regnum (rld[r].in) < FIRST_PSEUDO_REGISTER))) 552618334Speter continue; 552718334Speter 552818334Speter#if 0 /* No longer needed for correct operation. 552918334Speter It might give better code, or might not; worth an experiment? */ 553018334Speter /* If this is an optional reload, we can't inherit from earlier insns 553118334Speter until we are sure that any non-optional reloads have been allocated. 553218334Speter The following code takes advantage of the fact that optional reloads 553318334Speter are at the end of reload_order. */ 553490075Sobrien if (rld[r].optional != 0) 553518334Speter for (i = 0; i < j; i++) 553690075Sobrien if ((rld[reload_order[i]].out != 0 553790075Sobrien || rld[reload_order[i]].in != 0 553890075Sobrien || rld[reload_order[i]].secondary_p) 553990075Sobrien && ! rld[reload_order[i]].optional 554090075Sobrien && rld[reload_order[i]].reg_rtx == 0) 554190075Sobrien allocate_reload_reg (chain, reload_order[i], 0); 554218334Speter#endif 554318334Speter 554418334Speter /* First see if this pseudo is already available as reloaded 554518334Speter for a previous insn. We cannot try to inherit for reloads 554618334Speter that are smaller than the maximum number of registers needed 554718334Speter for groups unless the register we would allocate cannot be used 554818334Speter for the groups. 554918334Speter 555018334Speter We could check here to see if this is a secondary reload for 555118334Speter an object that is already in a register of the desired class. 555218334Speter This would avoid the need for the secondary reload register. 555318334Speter But this is complex because we can't easily determine what 555450397Sobrien objects might want to be loaded via this reload. So let a 555550397Sobrien register be allocated here. In `emit_reload_insns' we suppress 555650397Sobrien one of the loads in the case described above. */ 555718334Speter 555818334Speter if (inheritance) 555918334Speter { 556090075Sobrien int byte = 0; 556190075Sobrien int regno = -1; 556290075Sobrien enum machine_mode mode = VOIDmode; 556318334Speter 556490075Sobrien if (rld[r].in == 0) 556518334Speter ; 5566169689Skan else if (REG_P (rld[r].in)) 556718334Speter { 556890075Sobrien regno = REGNO (rld[r].in); 556990075Sobrien mode = GET_MODE (rld[r].in); 557018334Speter } 5571169689Skan else if (REG_P (rld[r].in_reg)) 557218334Speter { 557390075Sobrien regno = REGNO (rld[r].in_reg); 557490075Sobrien mode = GET_MODE (rld[r].in_reg); 557518334Speter } 557690075Sobrien else if (GET_CODE (rld[r].in_reg) == SUBREG 5577169689Skan && REG_P (SUBREG_REG (rld[r].in_reg))) 557850397Sobrien { 557990075Sobrien byte = SUBREG_BYTE (rld[r].in_reg); 558090075Sobrien regno = REGNO (SUBREG_REG (rld[r].in_reg)); 558152284Sobrien if (regno < FIRST_PSEUDO_REGISTER) 558290075Sobrien regno = subreg_regno (rld[r].in_reg); 558390075Sobrien mode = GET_MODE (rld[r].in_reg); 558450397Sobrien } 558552284Sobrien#ifdef AUTO_INC_DEC 5586169689Skan else if (GET_RTX_CLASS (GET_CODE (rld[r].in_reg)) == RTX_AUTOINC 5587169689Skan && REG_P (XEXP (rld[r].in_reg, 0))) 558852284Sobrien { 558990075Sobrien regno = REGNO (XEXP (rld[r].in_reg, 0)); 559090075Sobrien mode = GET_MODE (XEXP (rld[r].in_reg, 0)); 559190075Sobrien rld[r].out = rld[r].in; 559252284Sobrien } 559352284Sobrien#endif 559418334Speter#if 0 559518334Speter /* This won't work, since REGNO can be a pseudo reg number. 559618334Speter Also, it takes much more hair to keep track of all the things 559718334Speter that can invalidate an inherited reload of part of a pseudoreg. */ 559890075Sobrien else if (GET_CODE (rld[r].in) == SUBREG 5599169689Skan && REG_P (SUBREG_REG (rld[r].in))) 560090075Sobrien regno = subreg_regno (rld[r].in); 560118334Speter#endif 560218334Speter 560318334Speter if (regno >= 0 && reg_last_reload_reg[regno] != 0) 560418334Speter { 560590075Sobrien enum reg_class class = rld[r].class, last_class; 560652284Sobrien rtx last_reg = reg_last_reload_reg[regno]; 560790075Sobrien enum machine_mode need_mode; 560890075Sobrien 560990075Sobrien i = REGNO (last_reg); 561090075Sobrien i += subreg_regno_offset (i, GET_MODE (last_reg), byte, mode); 561152284Sobrien last_class = REGNO_REG_CLASS (i); 561290075Sobrien 561390075Sobrien if (byte == 0) 561490075Sobrien need_mode = mode; 561590075Sobrien else 561690075Sobrien need_mode 5617146895Skan = smallest_mode_for_size (GET_MODE_BITSIZE (mode) 5618146895Skan + byte * BITS_PER_UNIT, 561990075Sobrien GET_MODE_CLASS (mode)); 562090075Sobrien 5621146895Skan if ((GET_MODE_SIZE (GET_MODE (last_reg)) 562290075Sobrien >= GET_MODE_SIZE (need_mode)) 5623117395Skan#ifdef CANNOT_CHANGE_MODE_CLASS 5624146895Skan /* Verify that the register in "i" can be obtained 5625146895Skan from LAST_REG. */ 5626146895Skan && !REG_CANNOT_CHANGE_MODE_P (REGNO (last_reg), 5627146895Skan GET_MODE (last_reg), 5628146895Skan mode) 562990075Sobrien#endif 563052284Sobrien && reg_reloaded_contents[i] == regno 563150397Sobrien && TEST_HARD_REG_BIT (reg_reloaded_valid, i) 563290075Sobrien && HARD_REGNO_MODE_OK (i, rld[r].mode) 563352284Sobrien && (TEST_HARD_REG_BIT (reg_class_contents[(int) class], i) 563452284Sobrien /* Even if we can't use this register as a reload 563552284Sobrien register, we might use it for reload_override_in, 563652284Sobrien if copying it to the desired class is cheap 563752284Sobrien enough. */ 563890075Sobrien || ((REGISTER_MOVE_COST (mode, last_class, class) 563952284Sobrien < MEMORY_MOVE_COST (mode, class, 1)) 5640169689Skan && (secondary_reload_class (1, class, mode, 5641169689Skan last_reg) 564252284Sobrien == NO_REGS) 564352284Sobrien#ifdef SECONDARY_MEMORY_NEEDED 564452284Sobrien && ! SECONDARY_MEMORY_NEEDED (last_class, class, 564552284Sobrien mode) 564652284Sobrien#endif 564752284Sobrien )) 564852284Sobrien 564990075Sobrien && (rld[r].nregs == max_group_size 565018334Speter || ! TEST_HARD_REG_BIT (reg_class_contents[(int) group_class], 565150397Sobrien i)) 565290075Sobrien && free_for_value_p (i, rld[r].mode, rld[r].opnum, 565390075Sobrien rld[r].when_needed, rld[r].in, 565470635Sobrien const0_rtx, r, 1)) 565518334Speter { 565618334Speter /* If a group is needed, verify that all the subsequent 565750397Sobrien registers still have their values intact. */ 5658169689Skan int nr = hard_regno_nregs[i][rld[r].mode]; 565918334Speter int k; 566018334Speter 566118334Speter for (k = 1; k < nr; k++) 566250397Sobrien if (reg_reloaded_contents[i + k] != regno 566350397Sobrien || ! TEST_HARD_REG_BIT (reg_reloaded_valid, i + k)) 566418334Speter break; 566518334Speter 566618334Speter if (k == nr) 566718334Speter { 566818334Speter int i1; 566990075Sobrien int bad_for_class; 567018334Speter 567152284Sobrien last_reg = (GET_MODE (last_reg) == mode 567252284Sobrien ? last_reg : gen_rtx_REG (mode, i)); 567352284Sobrien 567490075Sobrien bad_for_class = 0; 567590075Sobrien for (k = 0; k < nr; k++) 567690075Sobrien bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].class], 567790075Sobrien i+k); 567890075Sobrien 567918334Speter /* We found a register that contains the 568018334Speter value we need. If this register is the 568118334Speter same as an `earlyclobber' operand of the 568218334Speter current insn, just mark it as a place to 568318334Speter reload from since we can't use it as the 568418334Speter reload register itself. */ 568518334Speter 568618334Speter for (i1 = 0; i1 < n_earlyclobbers; i1++) 568718334Speter if (reg_overlap_mentioned_for_reload_p 568818334Speter (reg_last_reload_reg[regno], 568918334Speter reload_earlyclobbers[i1])) 569018334Speter break; 569118334Speter 569218334Speter if (i1 != n_earlyclobbers 569390075Sobrien || ! (free_for_value_p (i, rld[r].mode, 569490075Sobrien rld[r].opnum, 569590075Sobrien rld[r].when_needed, rld[r].in, 569690075Sobrien rld[r].out, r, 1)) 569750397Sobrien /* Don't use it if we'd clobber a pseudo reg. */ 569852284Sobrien || (TEST_HARD_REG_BIT (reg_used_in_insn, i) 569990075Sobrien && rld[r].out 570050397Sobrien && ! TEST_HARD_REG_BIT (reg_reloaded_dead, i)) 570152284Sobrien /* Don't clobber the frame pointer. */ 570252284Sobrien || (i == HARD_FRAME_POINTER_REGNUM 570396263Sobrien && frame_pointer_needed 570490075Sobrien && rld[r].out) 570518334Speter /* Don't really use the inherited spill reg 570618334Speter if we need it wider than we've got it. */ 570790075Sobrien || (GET_MODE_SIZE (rld[r].mode) 570852284Sobrien > GET_MODE_SIZE (mode)) 570990075Sobrien || bad_for_class 571052284Sobrien 571152284Sobrien /* If find_reloads chose reload_out as reload 571252284Sobrien register, stay with it - that leaves the 571352284Sobrien inherited register for subsequent reloads. */ 571490075Sobrien || (rld[r].out && rld[r].reg_rtx 571590075Sobrien && rtx_equal_p (rld[r].out, rld[r].reg_rtx))) 571652284Sobrien { 571790075Sobrien if (! rld[r].optional) 571870635Sobrien { 571970635Sobrien reload_override_in[r] = last_reg; 572070635Sobrien reload_inheritance_insn[r] 572170635Sobrien = reg_reloaded_insn[i]; 572270635Sobrien } 572352284Sobrien } 572418334Speter else 572518334Speter { 572618334Speter int k; 572718334Speter /* We can use this as a reload reg. */ 572818334Speter /* Mark the register as in use for this part of 572918334Speter the insn. */ 573050397Sobrien mark_reload_reg_in_use (i, 573190075Sobrien rld[r].opnum, 573290075Sobrien rld[r].when_needed, 573390075Sobrien rld[r].mode); 573490075Sobrien rld[r].reg_rtx = last_reg; 573518334Speter reload_inherited[r] = 1; 573618334Speter reload_inheritance_insn[r] 573718334Speter = reg_reloaded_insn[i]; 573818334Speter reload_spill_index[r] = i; 573918334Speter for (k = 0; k < nr; k++) 574018334Speter SET_HARD_REG_BIT (reload_reg_used_for_inherit, 574150397Sobrien i + k); 574218334Speter } 574318334Speter } 574418334Speter } 574518334Speter } 574618334Speter } 574718334Speter 574818334Speter /* Here's another way to see if the value is already lying around. */ 574918334Speter if (inheritance 575090075Sobrien && rld[r].in != 0 575118334Speter && ! reload_inherited[r] 575290075Sobrien && rld[r].out == 0 575390075Sobrien && (CONSTANT_P (rld[r].in) 575490075Sobrien || GET_CODE (rld[r].in) == PLUS 5755169689Skan || REG_P (rld[r].in) 5756169689Skan || MEM_P (rld[r].in)) 575790075Sobrien && (rld[r].nregs == max_group_size 575890075Sobrien || ! reg_classes_intersect_p (rld[r].class, group_class))) 575990075Sobrien search_equiv = rld[r].in; 576052284Sobrien /* If this is an output reload from a simple move insn, look 576152284Sobrien if an equivalence for the input is available. */ 576290075Sobrien else if (inheritance && rld[r].in == 0 && rld[r].out != 0) 576318334Speter { 576452284Sobrien rtx set = single_set (insn); 576552284Sobrien 576652284Sobrien if (set 576790075Sobrien && rtx_equal_p (rld[r].out, SET_DEST (set)) 576852284Sobrien && CONSTANT_P (SET_SRC (set))) 576952284Sobrien search_equiv = SET_SRC (set); 577052284Sobrien } 577152284Sobrien 577252284Sobrien if (search_equiv) 577352284Sobrien { 577490075Sobrien rtx equiv 577590075Sobrien = find_equiv_reg (search_equiv, insn, rld[r].class, 577690075Sobrien -1, NULL, 0, rld[r].mode); 577790075Sobrien int regno = 0; 577818334Speter 577918334Speter if (equiv != 0) 578018334Speter { 5781169689Skan if (REG_P (equiv)) 578218334Speter regno = REGNO (equiv); 5783169689Skan else 578418334Speter { 578518334Speter /* This must be a SUBREG of a hard register. 578618334Speter Make a new REG since this might be used in an 578718334Speter address and not all machines support SUBREGs 578818334Speter there. */ 5789169689Skan gcc_assert (GET_CODE (equiv) == SUBREG); 579090075Sobrien regno = subreg_regno (equiv); 579190075Sobrien equiv = gen_rtx_REG (rld[r].mode, regno); 5792169689Skan /* If we choose EQUIV as the reload register, but the 5793169689Skan loop below decides to cancel the inheritance, we'll 5794169689Skan end up reloading EQUIV in rld[r].mode, not the mode 5795169689Skan it had originally. That isn't safe when EQUIV isn't 5796169689Skan available as a spill register since its value might 5797169689Skan still be live at this point. */ 5798169689Skan for (i = regno; i < regno + (int) rld[r].nregs; i++) 5799169689Skan if (TEST_HARD_REG_BIT (reload_reg_unavailable, i)) 5800169689Skan equiv = 0; 580118334Speter } 580218334Speter } 580318334Speter 580418334Speter /* If we found a spill reg, reject it unless it is free 580518334Speter and of the desired class. */ 5806132718Skan if (equiv != 0) 5807132718Skan { 5808132718Skan int regs_used = 0; 5809132718Skan int bad_for_class = 0; 5810132718Skan int max_regno = regno + rld[r].nregs; 5811132718Skan 5812132718Skan for (i = regno; i < max_regno; i++) 5813132718Skan { 5814132718Skan regs_used |= TEST_HARD_REG_BIT (reload_reg_used_at_all, 5815132718Skan i); 5816132718Skan bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].class], 5817132718Skan i); 5818132718Skan } 5819132718Skan 5820132718Skan if ((regs_used 582190075Sobrien && ! free_for_value_p (regno, rld[r].mode, 582290075Sobrien rld[r].opnum, rld[r].when_needed, 582390075Sobrien rld[r].in, rld[r].out, r, 1)) 5824132718Skan || bad_for_class) 5825132718Skan equiv = 0; 5826132718Skan } 582718334Speter 582890075Sobrien if (equiv != 0 && ! HARD_REGNO_MODE_OK (regno, rld[r].mode)) 582918334Speter equiv = 0; 583018334Speter 583118334Speter /* We found a register that contains the value we need. 583218334Speter If this register is the same as an `earlyclobber' operand 583318334Speter of the current insn, just mark it as a place to reload from 583418334Speter since we can't use it as the reload register itself. */ 583518334Speter 583618334Speter if (equiv != 0) 583718334Speter for (i = 0; i < n_earlyclobbers; i++) 583818334Speter if (reg_overlap_mentioned_for_reload_p (equiv, 583918334Speter reload_earlyclobbers[i])) 584018334Speter { 584190075Sobrien if (! rld[r].optional) 584270635Sobrien reload_override_in[r] = equiv; 584318334Speter equiv = 0; 584418334Speter break; 584518334Speter } 584618334Speter 584750397Sobrien /* If the equiv register we have found is explicitly clobbered 584850397Sobrien in the current insn, it depends on the reload type if we 584950397Sobrien can use it, use it for reload_override_in, or not at all. 585050397Sobrien In particular, we then can't use EQUIV for a 585150397Sobrien RELOAD_FOR_OUTPUT_ADDRESS reload. */ 585218334Speter 585390075Sobrien if (equiv != 0) 585418334Speter { 5855169689Skan if (regno_clobbered_p (regno, insn, rld[r].mode, 2)) 585690075Sobrien switch (rld[r].when_needed) 585790075Sobrien { 585890075Sobrien case RELOAD_FOR_OTHER_ADDRESS: 585990075Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 586090075Sobrien case RELOAD_FOR_INPUT_ADDRESS: 586190075Sobrien case RELOAD_FOR_OPADDR_ADDR: 586290075Sobrien break; 586390075Sobrien case RELOAD_OTHER: 586490075Sobrien case RELOAD_FOR_INPUT: 586590075Sobrien case RELOAD_FOR_OPERAND_ADDRESS: 586690075Sobrien if (! rld[r].optional) 586790075Sobrien reload_override_in[r] = equiv; 586890075Sobrien /* Fall through. */ 586990075Sobrien default: 587090075Sobrien equiv = 0; 587190075Sobrien break; 587290075Sobrien } 587390075Sobrien else if (regno_clobbered_p (regno, insn, rld[r].mode, 1)) 587490075Sobrien switch (rld[r].when_needed) 587590075Sobrien { 587690075Sobrien case RELOAD_FOR_OTHER_ADDRESS: 587790075Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 587890075Sobrien case RELOAD_FOR_INPUT_ADDRESS: 587990075Sobrien case RELOAD_FOR_OPADDR_ADDR: 588090075Sobrien case RELOAD_FOR_OPERAND_ADDRESS: 588190075Sobrien case RELOAD_FOR_INPUT: 588290075Sobrien break; 588390075Sobrien case RELOAD_OTHER: 588490075Sobrien if (! rld[r].optional) 588590075Sobrien reload_override_in[r] = equiv; 588690075Sobrien /* Fall through. */ 588790075Sobrien default: 588890075Sobrien equiv = 0; 588990075Sobrien break; 589090075Sobrien } 589118334Speter } 589218334Speter 589318334Speter /* If we found an equivalent reg, say no code need be generated 589418334Speter to load it, and use it as our reload reg. */ 5895117395Skan if (equiv != 0 5896117395Skan && (regno != HARD_FRAME_POINTER_REGNUM 589796263Sobrien || !frame_pointer_needed)) 589818334Speter { 5899169689Skan int nr = hard_regno_nregs[regno][rld[r].mode]; 590050397Sobrien int k; 590190075Sobrien rld[r].reg_rtx = equiv; 590218334Speter reload_inherited[r] = 1; 590350397Sobrien 590450397Sobrien /* If reg_reloaded_valid is not set for this register, 590550397Sobrien there might be a stale spill_reg_store lying around. 590650397Sobrien We must clear it, since otherwise emit_reload_insns 590750397Sobrien might delete the store. */ 590850397Sobrien if (! TEST_HARD_REG_BIT (reg_reloaded_valid, regno)) 590950397Sobrien spill_reg_store[regno] = NULL_RTX; 591050397Sobrien /* If any of the hard registers in EQUIV are spill 591150397Sobrien registers, mark them as in use for this insn. */ 591250397Sobrien for (k = 0; k < nr; k++) 591318334Speter { 591450397Sobrien i = spill_reg_order[regno + k]; 591550397Sobrien if (i >= 0) 591650397Sobrien { 591790075Sobrien mark_reload_reg_in_use (regno, rld[r].opnum, 591890075Sobrien rld[r].when_needed, 591990075Sobrien rld[r].mode); 592050397Sobrien SET_HARD_REG_BIT (reload_reg_used_for_inherit, 592150397Sobrien regno + k); 592250397Sobrien } 592318334Speter } 592418334Speter } 592518334Speter } 592618334Speter 592718334Speter /* If we found a register to use already, or if this is an optional 592818334Speter reload, we are done. */ 592990075Sobrien if (rld[r].reg_rtx != 0 || rld[r].optional != 0) 593018334Speter continue; 593118334Speter 593290075Sobrien#if 0 593390075Sobrien /* No longer needed for correct operation. Might or might 593490075Sobrien not give better code on the average. Want to experiment? */ 593518334Speter 593618334Speter /* See if there is a later reload that has a class different from our 593718334Speter class that intersects our class or that requires less register 593818334Speter than our reload. If so, we must allocate a register to this 593918334Speter reload now, since that reload might inherit a previous reload 594018334Speter and take the only available register in our class. Don't do this 594118334Speter for optional reloads since they will force all previous reloads 594218334Speter to be allocated. Also don't do this for reloads that have been 594318334Speter turned off. */ 594418334Speter 594518334Speter for (i = j + 1; i < n_reloads; i++) 594618334Speter { 594718334Speter int s = reload_order[i]; 594818334Speter 594990075Sobrien if ((rld[s].in == 0 && rld[s].out == 0 595090075Sobrien && ! rld[s].secondary_p) 595190075Sobrien || rld[s].optional) 595218334Speter continue; 595318334Speter 595490075Sobrien if ((rld[s].class != rld[r].class 595590075Sobrien && reg_classes_intersect_p (rld[r].class, 595690075Sobrien rld[s].class)) 595790075Sobrien || rld[s].nregs < rld[r].nregs) 595890075Sobrien break; 595918334Speter } 596018334Speter 596118334Speter if (i == n_reloads) 596218334Speter continue; 596318334Speter 596490075Sobrien allocate_reload_reg (chain, r, j == n_reloads - 1); 596518334Speter#endif 596618334Speter } 596718334Speter 596818334Speter /* Now allocate reload registers for anything non-optional that 596918334Speter didn't get one yet. */ 597018334Speter for (j = 0; j < n_reloads; j++) 597118334Speter { 597290075Sobrien int r = reload_order[j]; 597318334Speter 597418334Speter /* Ignore reloads that got marked inoperative. */ 597590075Sobrien if (rld[r].out == 0 && rld[r].in == 0 && ! rld[r].secondary_p) 597618334Speter continue; 597718334Speter 597818334Speter /* Skip reloads that already have a register allocated or are 597950397Sobrien optional. */ 598090075Sobrien if (rld[r].reg_rtx != 0 || rld[r].optional) 598118334Speter continue; 598218334Speter 598390075Sobrien if (! allocate_reload_reg (chain, r, j == n_reloads - 1)) 598418334Speter break; 598518334Speter } 598618334Speter 598718334Speter /* If that loop got all the way, we have won. */ 598818334Speter if (j == n_reloads) 598990075Sobrien { 599090075Sobrien win = 1; 599190075Sobrien break; 599290075Sobrien } 599318334Speter 599418334Speter /* Loop around and try without any inheritance. */ 599590075Sobrien } 599690075Sobrien 599790075Sobrien if (! win) 599890075Sobrien { 599918334Speter /* First undo everything done by the failed attempt 600018334Speter to allocate with inheritance. */ 600190075Sobrien choose_reload_regs_init (chain, save_reload_reg_rtx); 600218334Speter 600390075Sobrien /* Some sanity tests to verify that the reloads found in the first 600490075Sobrien pass are identical to the ones we have now. */ 6005169689Skan gcc_assert (chain->n_reloads == n_reloads); 600690075Sobrien 600790075Sobrien for (i = 0; i < n_reloads; i++) 600818334Speter { 600990075Sobrien if (chain->rld[i].regno < 0 || chain->rld[i].reg_rtx != 0) 601090075Sobrien continue; 6011169689Skan gcc_assert (chain->rld[i].when_needed == rld[i].when_needed); 601290075Sobrien for (j = 0; j < n_spills; j++) 601390075Sobrien if (spill_regs[j] == chain->rld[i].regno) 601490075Sobrien if (! set_reload_reg (j, i)) 601590075Sobrien failed_reload (chain->insn, i); 601618334Speter } 601718334Speter } 601818334Speter 601918334Speter /* If we thought we could inherit a reload, because it seemed that 602018334Speter nothing else wanted the same reload register earlier in the insn, 602152284Sobrien verify that assumption, now that all reloads have been assigned. 602252284Sobrien Likewise for reloads where reload_override_in has been set. */ 602318334Speter 602452284Sobrien /* If doing expensive optimizations, do one preliminary pass that doesn't 602552284Sobrien cancel any inheritance, but removes reloads that have been needed only 602652284Sobrien for reloads that we know can be inherited. */ 602752284Sobrien for (pass = flag_expensive_optimizations; pass >= 0; pass--) 602818334Speter { 602952284Sobrien for (j = 0; j < n_reloads; j++) 603050397Sobrien { 603190075Sobrien int r = reload_order[j]; 603252284Sobrien rtx check_reg; 603390075Sobrien if (reload_inherited[r] && rld[r].reg_rtx) 603490075Sobrien check_reg = rld[r].reg_rtx; 603552284Sobrien else if (reload_override_in[r] 6036169689Skan && (REG_P (reload_override_in[r]) 603790075Sobrien || GET_CODE (reload_override_in[r]) == SUBREG)) 603852284Sobrien check_reg = reload_override_in[r]; 603952284Sobrien else 604052284Sobrien continue; 604190075Sobrien if (! free_for_value_p (true_regnum (check_reg), rld[r].mode, 604290075Sobrien rld[r].opnum, rld[r].when_needed, rld[r].in, 604370635Sobrien (reload_inherited[r] 604490075Sobrien ? rld[r].out : const0_rtx), 604570635Sobrien r, 1)) 604650397Sobrien { 604752284Sobrien if (pass) 604852284Sobrien continue; 604952284Sobrien reload_inherited[r] = 0; 605052284Sobrien reload_override_in[r] = 0; 605150397Sobrien } 605252284Sobrien /* If we can inherit a RELOAD_FOR_INPUT, or can use a 605352284Sobrien reload_override_in, then we do not need its related 605452284Sobrien RELOAD_FOR_INPUT_ADDRESS / RELOAD_FOR_INPADDR_ADDRESS reloads; 605552284Sobrien likewise for other reload types. 605652284Sobrien We handle this by removing a reload when its only replacement 605752284Sobrien is mentioned in reload_in of the reload we are going to inherit. 605852284Sobrien A special case are auto_inc expressions; even if the input is 605952284Sobrien inherited, we still need the address for the output. We can 606090075Sobrien recognize them because they have RELOAD_OUT set to RELOAD_IN. 606190075Sobrien If we succeeded removing some reload and we are doing a preliminary 606252284Sobrien pass just to remove such reloads, make another pass, since the 606352284Sobrien removal of one reload might allow us to inherit another one. */ 606490075Sobrien else if (rld[r].in 606590075Sobrien && rld[r].out != rld[r].in 606690075Sobrien && remove_address_replacements (rld[r].in) && pass) 606752284Sobrien pass = 2; 606850397Sobrien } 606918334Speter } 607018334Speter 607118334Speter /* Now that reload_override_in is known valid, 607218334Speter actually override reload_in. */ 607318334Speter for (j = 0; j < n_reloads; j++) 607418334Speter if (reload_override_in[j]) 607590075Sobrien rld[j].in = reload_override_in[j]; 607618334Speter 6077132718Skan /* If this reload won't be done because it has been canceled or is 607818334Speter optional and not inherited, clear reload_reg_rtx so other 607918334Speter routines (such as subst_reloads) don't get confused. */ 608018334Speter for (j = 0; j < n_reloads; j++) 608190075Sobrien if (rld[j].reg_rtx != 0 608290075Sobrien && ((rld[j].optional && ! reload_inherited[j]) 608390075Sobrien || (rld[j].in == 0 && rld[j].out == 0 608490075Sobrien && ! rld[j].secondary_p))) 608518334Speter { 608690075Sobrien int regno = true_regnum (rld[j].reg_rtx); 608718334Speter 608818334Speter if (spill_reg_order[regno] >= 0) 608990075Sobrien clear_reload_reg_in_use (regno, rld[j].opnum, 609090075Sobrien rld[j].when_needed, rld[j].mode); 609190075Sobrien rld[j].reg_rtx = 0; 609257844Sobrien reload_spill_index[j] = -1; 609318334Speter } 609418334Speter 609518334Speter /* Record which pseudos and which spill regs have output reloads. */ 609618334Speter for (j = 0; j < n_reloads; j++) 609718334Speter { 609890075Sobrien int r = reload_order[j]; 609918334Speter 610018334Speter i = reload_spill_index[r]; 610118334Speter 610250397Sobrien /* I is nonneg if this reload uses a register. 610390075Sobrien If rld[r].reg_rtx is 0, this is an optional reload 610418334Speter that we opted to ignore. */ 6105169689Skan if (rld[r].out_reg != 0 && REG_P (rld[r].out_reg) 610690075Sobrien && rld[r].reg_rtx != 0) 610718334Speter { 610890075Sobrien int nregno = REGNO (rld[r].out_reg); 610918334Speter int nr = 1; 611018334Speter 611118334Speter if (nregno < FIRST_PSEUDO_REGISTER) 6112169689Skan nr = hard_regno_nregs[nregno][rld[r].mode]; 611318334Speter 611418334Speter while (--nr >= 0) 6115169689Skan SET_REGNO_REG_SET (®_has_output_reload, 6116169689Skan nregno + nr); 611718334Speter 611818334Speter if (i >= 0) 611918334Speter { 6120169689Skan nr = hard_regno_nregs[i][rld[r].mode]; 612118334Speter while (--nr >= 0) 612250397Sobrien SET_HARD_REG_BIT (reg_is_output_reload, i + nr); 612318334Speter } 612418334Speter 6125169689Skan gcc_assert (rld[r].when_needed == RELOAD_OTHER 6126169689Skan || rld[r].when_needed == RELOAD_FOR_OUTPUT 6127169689Skan || rld[r].when_needed == RELOAD_FOR_INSN); 612818334Speter } 612918334Speter } 613018334Speter} 613152284Sobrien 613252284Sobrien/* Deallocate the reload register for reload R. This is called from 613352284Sobrien remove_address_replacements. */ 613490075Sobrien 613552284Sobrienvoid 6136132718Skandeallocate_reload_reg (int r) 613752284Sobrien{ 613852284Sobrien int regno; 613952284Sobrien 614090075Sobrien if (! rld[r].reg_rtx) 614152284Sobrien return; 614290075Sobrien regno = true_regnum (rld[r].reg_rtx); 614390075Sobrien rld[r].reg_rtx = 0; 614452284Sobrien if (spill_reg_order[regno] >= 0) 614590075Sobrien clear_reload_reg_in_use (regno, rld[r].opnum, rld[r].when_needed, 614690075Sobrien rld[r].mode); 614752284Sobrien reload_spill_index[r] = -1; 614852284Sobrien} 614918334Speter 6150117395Skan/* If SMALL_REGISTER_CLASSES is nonzero, we may not have merged two 615118334Speter reloads of the same item for fear that we might not have enough reload 615218334Speter registers. However, normally they will get the same reload register 615390075Sobrien and hence actually need not be loaded twice. 615418334Speter 615518334Speter Here we check for the most common case of this phenomenon: when we have 615618334Speter a number of reloads for the same object, each of which were allocated 615718334Speter the same reload_reg_rtx, that reload_reg_rtx is not used for any other 615818334Speter reload, and is not modified in the insn itself. If we find such, 615918334Speter merge all the reloads and set the resulting reload to RELOAD_OTHER. 616018334Speter This will not increase the number of spill registers needed and will 616118334Speter prevent redundant code. */ 616218334Speter 616318334Speterstatic void 6164132718Skanmerge_assigned_reloads (rtx insn) 616518334Speter{ 616618334Speter int i, j; 616718334Speter 616818334Speter /* Scan all the reloads looking for ones that only load values and 616918334Speter are not already RELOAD_OTHER and ones whose reload_reg_rtx are 617018334Speter assigned and not modified by INSN. */ 617118334Speter 617218334Speter for (i = 0; i < n_reloads; i++) 617318334Speter { 617450397Sobrien int conflicting_input = 0; 617550397Sobrien int max_input_address_opnum = -1; 617650397Sobrien int min_conflicting_input_opnum = MAX_RECOG_OPERANDS; 617750397Sobrien 617890075Sobrien if (rld[i].in == 0 || rld[i].when_needed == RELOAD_OTHER 617990075Sobrien || rld[i].out != 0 || rld[i].reg_rtx == 0 618090075Sobrien || reg_set_p (rld[i].reg_rtx, insn)) 618118334Speter continue; 618218334Speter 618318334Speter /* Look at all other reloads. Ensure that the only use of this 618418334Speter reload_reg_rtx is in a reload that just loads the same value 618518334Speter as we do. Note that any secondary reloads must be of the identical 618618334Speter class since the values, modes, and result registers are the 618718334Speter same, so we need not do anything with any secondary reloads. */ 618818334Speter 618918334Speter for (j = 0; j < n_reloads; j++) 619018334Speter { 619190075Sobrien if (i == j || rld[j].reg_rtx == 0 619290075Sobrien || ! reg_overlap_mentioned_p (rld[j].reg_rtx, 619390075Sobrien rld[i].reg_rtx)) 619418334Speter continue; 619518334Speter 619690075Sobrien if (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS 619790075Sobrien && rld[j].opnum > max_input_address_opnum) 619890075Sobrien max_input_address_opnum = rld[j].opnum; 619950397Sobrien 620018334Speter /* If the reload regs aren't exactly the same (e.g, different modes) 620150397Sobrien or if the values are different, we can't merge this reload. 620250397Sobrien But if it is an input reload, we might still merge 620350397Sobrien RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_OTHER_ADDRESS reloads. */ 620418334Speter 620590075Sobrien if (! rtx_equal_p (rld[i].reg_rtx, rld[j].reg_rtx) 620690075Sobrien || rld[j].out != 0 || rld[j].in == 0 620790075Sobrien || ! rtx_equal_p (rld[i].in, rld[j].in)) 620850397Sobrien { 620990075Sobrien if (rld[j].when_needed != RELOAD_FOR_INPUT 621090075Sobrien || ((rld[i].when_needed != RELOAD_FOR_INPUT_ADDRESS 621190075Sobrien || rld[i].opnum > rld[j].opnum) 621290075Sobrien && rld[i].when_needed != RELOAD_FOR_OTHER_ADDRESS)) 621350397Sobrien break; 621450397Sobrien conflicting_input = 1; 621590075Sobrien if (min_conflicting_input_opnum > rld[j].opnum) 621690075Sobrien min_conflicting_input_opnum = rld[j].opnum; 621750397Sobrien } 621818334Speter } 621918334Speter 622018334Speter /* If all is OK, merge the reloads. Only set this to RELOAD_OTHER if 622118334Speter we, in fact, found any matching reloads. */ 622218334Speter 622350397Sobrien if (j == n_reloads 622450397Sobrien && max_input_address_opnum <= min_conflicting_input_opnum) 622518334Speter { 6226169689Skan gcc_assert (rld[i].when_needed != RELOAD_FOR_OUTPUT); 6227169689Skan 622818334Speter for (j = 0; j < n_reloads; j++) 622990075Sobrien if (i != j && rld[j].reg_rtx != 0 623090075Sobrien && rtx_equal_p (rld[i].reg_rtx, rld[j].reg_rtx) 623150397Sobrien && (! conflicting_input 623290075Sobrien || rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS 623390075Sobrien || rld[j].when_needed == RELOAD_FOR_OTHER_ADDRESS)) 623418334Speter { 623590075Sobrien rld[i].when_needed = RELOAD_OTHER; 623690075Sobrien rld[j].in = 0; 623750397Sobrien reload_spill_index[j] = -1; 623818334Speter transfer_replacements (i, j); 623918334Speter } 624018334Speter 6241260230Spfg /* If this is now RELOAD_OTHER, look for any reloads that 6242260230Spfg load parts of this operand and set them to 6243260230Spfg RELOAD_FOR_OTHER_ADDRESS if they were for inputs, 6244260230Spfg RELOAD_OTHER for outputs. Note that this test is 6245260230Spfg equivalent to looking for reloads for this operand 6246260230Spfg number. 624718334Speter 6248260230Spfg We must take special care with RELOAD_FOR_OUTPUT_ADDRESS; 6249260230Spfg it may share registers with a RELOAD_FOR_INPUT, so we can 6250260230Spfg not change it to RELOAD_FOR_OTHER_ADDRESS. We should 6251260230Spfg never need to, since we do not modify RELOAD_FOR_OUTPUT. 6252260230Spfg 6253260230Spfg It is possible that the RELOAD_FOR_OPERAND_ADDRESS 6254260230Spfg instruction is assigned the same register as the earlier 6255260230Spfg RELOAD_FOR_OTHER_ADDRESS instruction. Merging these two 6256260230Spfg instructions will cause the RELOAD_FOR_OTHER_ADDRESS 6257260230Spfg instruction to be deleted later on. */ 6258260230Spfg 625990075Sobrien if (rld[i].when_needed == RELOAD_OTHER) 626018334Speter for (j = 0; j < n_reloads; j++) 626190075Sobrien if (rld[j].in != 0 626290075Sobrien && rld[j].when_needed != RELOAD_OTHER 6263117395Skan && rld[j].when_needed != RELOAD_FOR_OTHER_ADDRESS 6264169689Skan && rld[j].when_needed != RELOAD_FOR_OUTPUT_ADDRESS 6265260230Spfg && rld[j].when_needed != RELOAD_FOR_OPERAND_ADDRESS 6266117395Skan && (! conflicting_input 6267117395Skan || rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS 6268117395Skan || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS) 626990075Sobrien && reg_overlap_mentioned_for_reload_p (rld[j].in, 627090075Sobrien rld[i].in)) 6271117395Skan { 6272117395Skan int k; 6273117395Skan 6274117395Skan rld[j].when_needed 6275117395Skan = ((rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS 6276117395Skan || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS) 6277117395Skan ? RELOAD_FOR_OTHER_ADDRESS : RELOAD_OTHER); 6278117395Skan 6279169689Skan /* Check to see if we accidentally converted two 6280169689Skan reloads that use the same reload register with 6281169689Skan different inputs to the same type. If so, the 6282169689Skan resulting code won't work. */ 6283117395Skan if (rld[j].reg_rtx) 6284117395Skan for (k = 0; k < j; k++) 6285169689Skan gcc_assert (rld[k].in == 0 || rld[k].reg_rtx == 0 6286169689Skan || rld[k].when_needed != rld[j].when_needed 6287169689Skan || !rtx_equal_p (rld[k].reg_rtx, 6288169689Skan rld[j].reg_rtx) 6289169689Skan || rtx_equal_p (rld[k].in, 6290169689Skan rld[j].in)); 6291117395Skan } 629218334Speter } 629318334Speter } 629490075Sobrien} 629518334Speter 629690075Sobrien/* These arrays are filled by emit_reload_insns and its subroutines. */ 629790075Sobrienstatic rtx input_reload_insns[MAX_RECOG_OPERANDS]; 629890075Sobrienstatic rtx other_input_address_reload_insns = 0; 629990075Sobrienstatic rtx other_input_reload_insns = 0; 630090075Sobrienstatic rtx input_address_reload_insns[MAX_RECOG_OPERANDS]; 630190075Sobrienstatic rtx inpaddr_address_reload_insns[MAX_RECOG_OPERANDS]; 630290075Sobrienstatic rtx output_reload_insns[MAX_RECOG_OPERANDS]; 630390075Sobrienstatic rtx output_address_reload_insns[MAX_RECOG_OPERANDS]; 630490075Sobrienstatic rtx outaddr_address_reload_insns[MAX_RECOG_OPERANDS]; 630590075Sobrienstatic rtx operand_reload_insns = 0; 630690075Sobrienstatic rtx other_operand_reload_insns = 0; 630790075Sobrienstatic rtx other_output_reload_insns[MAX_RECOG_OPERANDS]; 630818334Speter 630990075Sobrien/* Values to be put in spill_reg_store are put here first. */ 631090075Sobrienstatic rtx new_spill_reg_store[FIRST_PSEUDO_REGISTER]; 631190075Sobrienstatic HARD_REG_SET reg_reloaded_died; 631290075Sobrien 6313169689Skan/* Check if *RELOAD_REG is suitable as an intermediate or scratch register 6314169689Skan of class NEW_CLASS with mode NEW_MODE. Or alternatively, if alt_reload_reg 6315169689Skan is nonzero, if that is suitable. On success, change *RELOAD_REG to the 6316169689Skan adjusted register, and return true. Otherwise, return false. */ 6317169689Skanstatic bool 6318169689Skanreload_adjust_reg_for_temp (rtx *reload_reg, rtx alt_reload_reg, 6319169689Skan enum reg_class new_class, 6320169689Skan enum machine_mode new_mode) 6321169689Skan 6322169689Skan{ 6323169689Skan rtx reg; 6324169689Skan 6325169689Skan for (reg = *reload_reg; reg; reg = alt_reload_reg, alt_reload_reg = 0) 6326169689Skan { 6327169689Skan unsigned regno = REGNO (reg); 6328169689Skan 6329169689Skan if (!TEST_HARD_REG_BIT (reg_class_contents[(int) new_class], regno)) 6330169689Skan continue; 6331169689Skan if (GET_MODE (reg) != new_mode) 6332169689Skan { 6333169689Skan if (!HARD_REGNO_MODE_OK (regno, new_mode)) 6334169689Skan continue; 6335169689Skan if (hard_regno_nregs[regno][new_mode] 6336169689Skan > hard_regno_nregs[regno][GET_MODE (reg)]) 6337169689Skan continue; 6338169689Skan reg = reload_adjust_reg_for_mode (reg, new_mode); 6339169689Skan } 6340169689Skan *reload_reg = reg; 6341169689Skan return true; 6342169689Skan } 6343169689Skan return false; 6344169689Skan} 6345169689Skan 6346169689Skan/* Check if *RELOAD_REG is suitable as a scratch register for the reload 6347169689Skan pattern with insn_code ICODE, or alternatively, if alt_reload_reg is 6348169689Skan nonzero, if that is suitable. On success, change *RELOAD_REG to the 6349169689Skan adjusted register, and return true. Otherwise, return false. */ 6350169689Skanstatic bool 6351169689Skanreload_adjust_reg_for_icode (rtx *reload_reg, rtx alt_reload_reg, 6352169689Skan enum insn_code icode) 6353169689Skan 6354169689Skan{ 6355169689Skan enum reg_class new_class = scratch_reload_class (icode); 6356169689Skan enum machine_mode new_mode = insn_data[(int) icode].operand[2].mode; 6357169689Skan 6358169689Skan return reload_adjust_reg_for_temp (reload_reg, alt_reload_reg, 6359169689Skan new_class, new_mode); 6360169689Skan} 6361169689Skan 636290075Sobrien/* Generate insns to perform reload RL, which is for the insn in CHAIN and 636390075Sobrien has the number J. OLD contains the value to be used as input. */ 636490075Sobrien 636518334Speterstatic void 6366132718Skanemit_input_reload_insns (struct insn_chain *chain, struct reload *rl, 6367132718Skan rtx old, int j) 636818334Speter{ 636952284Sobrien rtx insn = chain->insn; 637090075Sobrien rtx reloadreg = rl->reg_rtx; 637190075Sobrien rtx oldequiv_reg = 0; 637290075Sobrien rtx oldequiv = 0; 637390075Sobrien int special = 0; 637490075Sobrien enum machine_mode mode; 637590075Sobrien rtx *where; 637652284Sobrien 637790075Sobrien /* Determine the mode to reload in. 637890075Sobrien This is very tricky because we have three to choose from. 637990075Sobrien There is the mode the insn operand wants (rl->inmode). 638090075Sobrien There is the mode of the reload register RELOADREG. 638190075Sobrien There is the intrinsic mode of the operand, which we could find 638290075Sobrien by stripping some SUBREGs. 638390075Sobrien It turns out that RELOADREG's mode is irrelevant: 638490075Sobrien we can change that arbitrarily. 638518334Speter 638690075Sobrien Consider (SUBREG:SI foo:QI) as an operand that must be SImode; 638790075Sobrien then the reload reg may not support QImode moves, so use SImode. 638890075Sobrien If foo is in memory due to spilling a pseudo reg, this is safe, 638990075Sobrien because the QImode value is in the least significant part of a 639090075Sobrien slot big enough for a SImode. If foo is some other sort of 639190075Sobrien memory reference, then it is impossible to reload this case, 639290075Sobrien so previous passes had better make sure this never happens. 639350397Sobrien 639490075Sobrien Then consider a one-word union which has SImode and one of its 639590075Sobrien members is a float, being fetched as (SUBREG:SF union:SI). 639690075Sobrien We must fetch that as SFmode because we could be loading into 639790075Sobrien a float-only register. In this case OLD's mode is correct. 639818334Speter 639990075Sobrien Consider an immediate integer: it has VOIDmode. Here we need 640090075Sobrien to get a mode from something else. 640118334Speter 640290075Sobrien In some cases, there is a fourth mode, the operand's 640390075Sobrien containing mode. If the insn specifies a containing mode for 640490075Sobrien this operand, it overrides all others. 640518334Speter 640690075Sobrien I am not sure whether the algorithm here is always right, 640790075Sobrien but it does the right things in those cases. */ 640818334Speter 640990075Sobrien mode = GET_MODE (old); 641090075Sobrien if (mode == VOIDmode) 641190075Sobrien mode = rl->inmode; 641252284Sobrien 641390075Sobrien /* delete_output_reload is only invoked properly if old contains 641490075Sobrien the original pseudo register. Since this is replaced with a 641590075Sobrien hard reg when RELOAD_OVERRIDE_IN is set, see if we can 641690075Sobrien find the pseudo in RELOAD_IN_REG. */ 6417169689Skan if (reload_override_in[j] 6418169689Skan && REG_P (rl->in_reg)) 641990075Sobrien { 642090075Sobrien oldequiv = old; 642190075Sobrien old = rl->in_reg; 642290075Sobrien } 642390075Sobrien if (oldequiv == 0) 642490075Sobrien oldequiv = old; 6425169689Skan else if (REG_P (oldequiv)) 642690075Sobrien oldequiv_reg = oldequiv; 642790075Sobrien else if (GET_CODE (oldequiv) == SUBREG) 642890075Sobrien oldequiv_reg = SUBREG_REG (oldequiv); 642918334Speter 643090075Sobrien /* If we are reloading from a register that was recently stored in 643190075Sobrien with an output-reload, see if we can prove there was 643290075Sobrien actually no need to store the old value in it. */ 643318334Speter 6434169689Skan if (optimize && REG_P (oldequiv) 643590075Sobrien && REGNO (oldequiv) < FIRST_PSEUDO_REGISTER 643690075Sobrien && spill_reg_store[REGNO (oldequiv)] 6437169689Skan && REG_P (old) 643890075Sobrien && (dead_or_set_p (insn, spill_reg_stored_to[REGNO (oldequiv)]) 643990075Sobrien || rtx_equal_p (spill_reg_stored_to[REGNO (oldequiv)], 644090075Sobrien rl->out_reg))) 644190075Sobrien delete_output_reload (insn, j, REGNO (oldequiv)); 644218334Speter 644390075Sobrien /* Encapsulate both RELOADREG and OLDEQUIV into that mode, 644490075Sobrien then load RELOADREG from OLDEQUIV. Note that we cannot use 644590075Sobrien gen_lowpart_common since it can do the wrong thing when 644690075Sobrien RELOADREG has a multi-word mode. Note that RELOADREG 644790075Sobrien must always be a REG here. */ 644818334Speter 644990075Sobrien if (GET_MODE (reloadreg) != mode) 6450132718Skan reloadreg = reload_adjust_reg_for_mode (reloadreg, mode); 645190075Sobrien while (GET_CODE (oldequiv) == SUBREG && GET_MODE (oldequiv) != mode) 645290075Sobrien oldequiv = SUBREG_REG (oldequiv); 645390075Sobrien if (GET_MODE (oldequiv) != VOIDmode 645490075Sobrien && mode != GET_MODE (oldequiv)) 645590075Sobrien oldequiv = gen_lowpart_SUBREG (mode, oldequiv); 645618334Speter 645790075Sobrien /* Switch to the right place to emit the reload insns. */ 645890075Sobrien switch (rl->when_needed) 645990075Sobrien { 646090075Sobrien case RELOAD_OTHER: 646190075Sobrien where = &other_input_reload_insns; 646290075Sobrien break; 646390075Sobrien case RELOAD_FOR_INPUT: 646490075Sobrien where = &input_reload_insns[rl->opnum]; 646590075Sobrien break; 646690075Sobrien case RELOAD_FOR_INPUT_ADDRESS: 646790075Sobrien where = &input_address_reload_insns[rl->opnum]; 646890075Sobrien break; 646990075Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 647090075Sobrien where = &inpaddr_address_reload_insns[rl->opnum]; 647190075Sobrien break; 647290075Sobrien case RELOAD_FOR_OUTPUT_ADDRESS: 647390075Sobrien where = &output_address_reload_insns[rl->opnum]; 647490075Sobrien break; 647590075Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 647690075Sobrien where = &outaddr_address_reload_insns[rl->opnum]; 647790075Sobrien break; 647890075Sobrien case RELOAD_FOR_OPERAND_ADDRESS: 647990075Sobrien where = &operand_reload_insns; 648090075Sobrien break; 648190075Sobrien case RELOAD_FOR_OPADDR_ADDR: 648290075Sobrien where = &other_operand_reload_insns; 648390075Sobrien break; 648490075Sobrien case RELOAD_FOR_OTHER_ADDRESS: 648590075Sobrien where = &other_input_address_reload_insns; 648690075Sobrien break; 648790075Sobrien default: 6488169689Skan gcc_unreachable (); 648990075Sobrien } 649018334Speter 649190075Sobrien push_to_sequence (*where); 649218334Speter 649390075Sobrien /* Auto-increment addresses must be reloaded in a special way. */ 649490075Sobrien if (rl->out && ! rl->out_reg) 649590075Sobrien { 649690075Sobrien /* We are not going to bother supporting the case where a 649790075Sobrien incremented register can't be copied directly from 649890075Sobrien OLDEQUIV since this seems highly unlikely. */ 6499169689Skan gcc_assert (rl->secondary_in_reload < 0); 650018334Speter 650190075Sobrien if (reload_inherited[j]) 650290075Sobrien oldequiv = reloadreg; 650318334Speter 650490075Sobrien old = XEXP (rl->in_reg, 0); 650518334Speter 6506169689Skan if (optimize && REG_P (oldequiv) 650790075Sobrien && REGNO (oldequiv) < FIRST_PSEUDO_REGISTER 650890075Sobrien && spill_reg_store[REGNO (oldequiv)] 6509169689Skan && REG_P (old) 651090075Sobrien && (dead_or_set_p (insn, 651190075Sobrien spill_reg_stored_to[REGNO (oldequiv)]) 651290075Sobrien || rtx_equal_p (spill_reg_stored_to[REGNO (oldequiv)], 651390075Sobrien old))) 651490075Sobrien delete_output_reload (insn, j, REGNO (oldequiv)); 651518334Speter 651690075Sobrien /* Prevent normal processing of this reload. */ 651790075Sobrien special = 1; 651890075Sobrien /* Output a special code sequence for this case. */ 651990075Sobrien new_spill_reg_store[REGNO (reloadreg)] 652090075Sobrien = inc_for_reload (reloadreg, oldequiv, rl->out, 652190075Sobrien rl->inc); 652290075Sobrien } 652390075Sobrien 652490075Sobrien /* If we are reloading a pseudo-register that was set by the previous 652590075Sobrien insn, see if we can get rid of that pseudo-register entirely 652690075Sobrien by redirecting the previous insn into our reload register. */ 652790075Sobrien 6528169689Skan else if (optimize && REG_P (old) 652990075Sobrien && REGNO (old) >= FIRST_PSEUDO_REGISTER 653090075Sobrien && dead_or_set_p (insn, old) 653190075Sobrien /* This is unsafe if some other reload 653290075Sobrien uses the same reg first. */ 653390075Sobrien && ! conflicts_with_override (reloadreg) 653490075Sobrien && free_for_value_p (REGNO (reloadreg), rl->mode, rl->opnum, 653590075Sobrien rl->when_needed, old, rl->out, j, 0)) 653690075Sobrien { 653790075Sobrien rtx temp = PREV_INSN (insn); 6538169689Skan while (temp && NOTE_P (temp)) 653990075Sobrien temp = PREV_INSN (temp); 654090075Sobrien if (temp 6541169689Skan && NONJUMP_INSN_P (temp) 654290075Sobrien && GET_CODE (PATTERN (temp)) == SET 654390075Sobrien && SET_DEST (PATTERN (temp)) == old 654490075Sobrien /* Make sure we can access insn_operand_constraint. */ 654590075Sobrien && asm_noperands (PATTERN (temp)) < 0 654690075Sobrien /* This is unsafe if operand occurs more than once in current 654790075Sobrien insn. Perhaps some occurrences aren't reloaded. */ 6548107590Sobrien && count_occurrences (PATTERN (insn), old, 0) == 1) 654990075Sobrien { 6550107590Sobrien rtx old = SET_DEST (PATTERN (temp)); 655190075Sobrien /* Store into the reload register instead of the pseudo. */ 655290075Sobrien SET_DEST (PATTERN (temp)) = reloadreg; 655390075Sobrien 6554107590Sobrien /* Verify that resulting insn is valid. */ 6555107590Sobrien extract_insn (temp); 6556107590Sobrien if (constrain_operands (1)) 655718334Speter { 6558107590Sobrien /* If the previous insn is an output reload, the source is 6559107590Sobrien a reload register, and its spill_reg_store entry will 6560107590Sobrien contain the previous destination. This is now 6561107590Sobrien invalid. */ 6562169689Skan if (REG_P (SET_SRC (PATTERN (temp))) 6563107590Sobrien && REGNO (SET_SRC (PATTERN (temp))) < FIRST_PSEUDO_REGISTER) 6564107590Sobrien { 6565107590Sobrien spill_reg_store[REGNO (SET_SRC (PATTERN (temp)))] = 0; 6566107590Sobrien spill_reg_stored_to[REGNO (SET_SRC (PATTERN (temp)))] = 0; 6567107590Sobrien } 6568107590Sobrien 6569107590Sobrien /* If these are the only uses of the pseudo reg, 6570107590Sobrien pretend for GDB it lives in the reload reg we used. */ 6571107590Sobrien if (REG_N_DEATHS (REGNO (old)) == 1 6572107590Sobrien && REG_N_SETS (REGNO (old)) == 1) 6573107590Sobrien { 6574107590Sobrien reg_renumber[REGNO (old)] = REGNO (rl->reg_rtx); 6575107590Sobrien alter_reg (REGNO (old), -1); 6576107590Sobrien } 6577107590Sobrien special = 1; 657818334Speter } 6579107590Sobrien else 658018334Speter { 6581107590Sobrien SET_DEST (PATTERN (temp)) = old; 658290075Sobrien } 658390075Sobrien } 658490075Sobrien } 658552284Sobrien 658690075Sobrien /* We can't do that, so output an insn to load RELOADREG. */ 658752284Sobrien 658890075Sobrien /* If we have a secondary reload, pick up the secondary register 658990075Sobrien and icode, if any. If OLDEQUIV and OLD are different or 659090075Sobrien if this is an in-out reload, recompute whether or not we 659190075Sobrien still need a secondary register and what the icode should 659290075Sobrien be. If we still need a secondary register and the class or 659390075Sobrien icode is different, go back to reloading from OLD if using 659490075Sobrien OLDEQUIV means that we got the wrong type of register. We 659590075Sobrien cannot have different class or icode due to an in-out reload 659690075Sobrien because we don't make such reloads when both the input and 659790075Sobrien output need secondary reload registers. */ 659852284Sobrien 659990075Sobrien if (! special && rl->secondary_in_reload >= 0) 660090075Sobrien { 660190075Sobrien rtx second_reload_reg = 0; 6602169689Skan rtx third_reload_reg = 0; 660390075Sobrien int secondary_reload = rl->secondary_in_reload; 660490075Sobrien rtx real_oldequiv = oldequiv; 660590075Sobrien rtx real_old = old; 660690075Sobrien rtx tmp; 660790075Sobrien enum insn_code icode; 6608169689Skan enum insn_code tertiary_icode = CODE_FOR_nothing; 660952284Sobrien 661090075Sobrien /* If OLDEQUIV is a pseudo with a MEM, get the real MEM 661190075Sobrien and similarly for OLD. 661290075Sobrien See comments in get_secondary_reload in reload.c. */ 661390075Sobrien /* If it is a pseudo that cannot be replaced with its 661490075Sobrien equivalent MEM, we must fall back to reload_in, which 661590075Sobrien will have all the necessary substitutions registered. 661690075Sobrien Likewise for a pseudo that can't be replaced with its 661790075Sobrien equivalent constant. 661818334Speter 661990075Sobrien Take extra care for subregs of such pseudos. Note that 662090075Sobrien we cannot use reg_equiv_mem in this case because it is 662190075Sobrien not in the right mode. */ 662218334Speter 662390075Sobrien tmp = oldequiv; 662490075Sobrien if (GET_CODE (tmp) == SUBREG) 662590075Sobrien tmp = SUBREG_REG (tmp); 6626169689Skan if (REG_P (tmp) 662790075Sobrien && REGNO (tmp) >= FIRST_PSEUDO_REGISTER 662890075Sobrien && (reg_equiv_memory_loc[REGNO (tmp)] != 0 662990075Sobrien || reg_equiv_constant[REGNO (tmp)] != 0)) 663090075Sobrien { 663190075Sobrien if (! reg_equiv_mem[REGNO (tmp)] 663290075Sobrien || num_not_at_initial_offset 663390075Sobrien || GET_CODE (oldequiv) == SUBREG) 663490075Sobrien real_oldequiv = rl->in; 663590075Sobrien else 663690075Sobrien real_oldequiv = reg_equiv_mem[REGNO (tmp)]; 663790075Sobrien } 663890075Sobrien 663990075Sobrien tmp = old; 664090075Sobrien if (GET_CODE (tmp) == SUBREG) 664190075Sobrien tmp = SUBREG_REG (tmp); 6642169689Skan if (REG_P (tmp) 664390075Sobrien && REGNO (tmp) >= FIRST_PSEUDO_REGISTER 664490075Sobrien && (reg_equiv_memory_loc[REGNO (tmp)] != 0 664590075Sobrien || reg_equiv_constant[REGNO (tmp)] != 0)) 664690075Sobrien { 664790075Sobrien if (! reg_equiv_mem[REGNO (tmp)] 664890075Sobrien || num_not_at_initial_offset 664990075Sobrien || GET_CODE (old) == SUBREG) 665090075Sobrien real_old = rl->in; 665190075Sobrien else 665290075Sobrien real_old = reg_equiv_mem[REGNO (tmp)]; 665390075Sobrien } 665490075Sobrien 665590075Sobrien second_reload_reg = rld[secondary_reload].reg_rtx; 6656169689Skan if (rld[secondary_reload].secondary_in_reload >= 0) 6657169689Skan { 6658169689Skan int tertiary_reload = rld[secondary_reload].secondary_in_reload; 6659169689Skan 6660169689Skan third_reload_reg = rld[tertiary_reload].reg_rtx; 6661169689Skan tertiary_icode = rld[secondary_reload].secondary_in_icode; 6662169689Skan /* We'd have to add more code for quartary reloads. */ 6663169689Skan gcc_assert (rld[tertiary_reload].secondary_in_reload < 0); 6664169689Skan } 666590075Sobrien icode = rl->secondary_in_icode; 666690075Sobrien 666790075Sobrien if ((old != oldequiv && ! rtx_equal_p (old, oldequiv)) 666890075Sobrien || (rl->in != 0 && rl->out != 0)) 666990075Sobrien { 6670169689Skan secondary_reload_info sri, sri2; 6671169689Skan enum reg_class new_class, new_t_class; 667290075Sobrien 6673169689Skan sri.icode = CODE_FOR_nothing; 6674169689Skan sri.prev_sri = NULL; 6675169689Skan new_class = targetm.secondary_reload (1, real_oldequiv, rl->class, 6676169689Skan mode, &sri); 6677169689Skan 6678169689Skan if (new_class == NO_REGS && sri.icode == CODE_FOR_nothing) 667990075Sobrien second_reload_reg = 0; 6680169689Skan else if (new_class == NO_REGS) 6681169689Skan { 6682169689Skan if (reload_adjust_reg_for_icode (&second_reload_reg, 6683169689Skan third_reload_reg, sri.icode)) 6684169689Skan icode = sri.icode, third_reload_reg = 0; 6685169689Skan else 6686169689Skan oldequiv = old, real_oldequiv = real_old; 6687169689Skan } 6688169689Skan else if (sri.icode != CODE_FOR_nothing) 6689169689Skan /* We currently lack a way to express this in reloads. */ 6690169689Skan gcc_unreachable (); 669190075Sobrien else 669218334Speter { 6693169689Skan sri2.icode = CODE_FOR_nothing; 6694169689Skan sri2.prev_sri = &sri; 6695169689Skan new_t_class = targetm.secondary_reload (1, real_oldequiv, 6696169689Skan new_class, mode, &sri); 6697169689Skan if (new_t_class == NO_REGS && sri2.icode == CODE_FOR_nothing) 669818334Speter { 6699169689Skan if (reload_adjust_reg_for_temp (&second_reload_reg, 6700169689Skan third_reload_reg, 6701169689Skan new_class, mode)) 6702169689Skan third_reload_reg = 0, tertiary_icode = sri2.icode; 6703169689Skan else 6704169689Skan oldequiv = old, real_oldequiv = real_old; 6705169689Skan } 6706169689Skan else if (new_t_class == NO_REGS && sri2.icode != CODE_FOR_nothing) 6707169689Skan { 6708169689Skan rtx intermediate = second_reload_reg; 670952284Sobrien 6710169689Skan if (reload_adjust_reg_for_temp (&intermediate, NULL, 6711169689Skan new_class, mode) 6712169689Skan && reload_adjust_reg_for_icode (&third_reload_reg, NULL, 6713169689Skan sri2.icode)) 6714169689Skan { 6715169689Skan second_reload_reg = intermediate; 6716169689Skan tertiary_icode = sri2.icode; 6717169689Skan } 671890075Sobrien else 6719169689Skan oldequiv = old, real_oldequiv = real_old; 6720169689Skan } 6721169689Skan else if (new_t_class != NO_REGS && sri2.icode == CODE_FOR_nothing) 6722169689Skan { 6723169689Skan rtx intermediate = second_reload_reg; 672452284Sobrien 6725169689Skan if (reload_adjust_reg_for_temp (&intermediate, NULL, 6726169689Skan new_class, mode) 6727169689Skan && reload_adjust_reg_for_temp (&third_reload_reg, NULL, 6728169689Skan new_t_class, mode)) 672918334Speter { 6730169689Skan second_reload_reg = intermediate; 6731169689Skan tertiary_icode = sri2.icode; 673218334Speter } 6733169689Skan else 6734169689Skan oldequiv = old, real_oldequiv = real_old; 673518334Speter } 6736169689Skan else 6737169689Skan /* This could be handled more intelligently too. */ 6738169689Skan oldequiv = old, real_oldequiv = real_old; 673918334Speter } 674090075Sobrien } 674118334Speter 674290075Sobrien /* If we still need a secondary reload register, check 674390075Sobrien to see if it is being used as a scratch or intermediate 674490075Sobrien register and generate code appropriately. If we need 674590075Sobrien a scratch register, use REAL_OLDEQUIV since the form of 674690075Sobrien the insn may depend on the actual address if it is 674790075Sobrien a MEM. */ 674818334Speter 674990075Sobrien if (second_reload_reg) 675090075Sobrien { 675190075Sobrien if (icode != CODE_FOR_nothing) 675218334Speter { 6753169689Skan /* We'd have to add extra code to handle this case. */ 6754169689Skan gcc_assert (!third_reload_reg); 6755169689Skan 675690075Sobrien emit_insn (GEN_FCN (icode) (reloadreg, real_oldequiv, 675790075Sobrien second_reload_reg)); 675890075Sobrien special = 1; 675990075Sobrien } 676090075Sobrien else 676190075Sobrien { 676290075Sobrien /* See if we need a scratch register to load the 676390075Sobrien intermediate register (a tertiary reload). */ 676490075Sobrien if (tertiary_icode != CODE_FOR_nothing) 676518334Speter { 676690075Sobrien emit_insn ((GEN_FCN (tertiary_icode) 676790075Sobrien (second_reload_reg, real_oldequiv, 676890075Sobrien third_reload_reg))); 676990075Sobrien } 6770169689Skan else if (third_reload_reg) 6771169689Skan { 6772169689Skan gen_reload (third_reload_reg, real_oldequiv, 6773169689Skan rl->opnum, 6774169689Skan rl->when_needed); 6775169689Skan gen_reload (second_reload_reg, third_reload_reg, 6776169689Skan rl->opnum, 6777169689Skan rl->when_needed); 6778169689Skan } 677990075Sobrien else 678090075Sobrien gen_reload (second_reload_reg, real_oldequiv, 678190075Sobrien rl->opnum, 678290075Sobrien rl->when_needed); 678318334Speter 678490075Sobrien oldequiv = second_reload_reg; 678590075Sobrien } 678690075Sobrien } 678790075Sobrien } 678818334Speter 678990075Sobrien if (! special && ! rtx_equal_p (reloadreg, oldequiv)) 679090075Sobrien { 679190075Sobrien rtx real_oldequiv = oldequiv; 679252284Sobrien 6793169689Skan if ((REG_P (oldequiv) 679490075Sobrien && REGNO (oldequiv) >= FIRST_PSEUDO_REGISTER 679590075Sobrien && (reg_equiv_memory_loc[REGNO (oldequiv)] != 0 679690075Sobrien || reg_equiv_constant[REGNO (oldequiv)] != 0)) 679790075Sobrien || (GET_CODE (oldequiv) == SUBREG 6798169689Skan && REG_P (SUBREG_REG (oldequiv)) 679990075Sobrien && (REGNO (SUBREG_REG (oldequiv)) 680090075Sobrien >= FIRST_PSEUDO_REGISTER) 680190075Sobrien && ((reg_equiv_memory_loc 680290075Sobrien [REGNO (SUBREG_REG (oldequiv))] != 0) 680390075Sobrien || (reg_equiv_constant 680490075Sobrien [REGNO (SUBREG_REG (oldequiv))] != 0))) 680590075Sobrien || (CONSTANT_P (oldequiv) 680690075Sobrien && (PREFERRED_RELOAD_CLASS (oldequiv, 680790075Sobrien REGNO_REG_CLASS (REGNO (reloadreg))) 680890075Sobrien == NO_REGS))) 680990075Sobrien real_oldequiv = rl->in; 681090075Sobrien gen_reload (reloadreg, real_oldequiv, rl->opnum, 681190075Sobrien rl->when_needed); 681290075Sobrien } 681318334Speter 681490075Sobrien if (flag_non_call_exceptions) 681590075Sobrien copy_eh_notes (insn, get_insns ()); 681618334Speter 681790075Sobrien /* End this sequence. */ 681890075Sobrien *where = get_insns (); 681990075Sobrien end_sequence (); 6820117395Skan 682190075Sobrien /* Update reload_override_in so that delete_address_reloads_1 682290075Sobrien can see the actual register usage. */ 682390075Sobrien if (oldequiv_reg) 682490075Sobrien reload_override_in[j] = oldequiv; 682590075Sobrien} 682618334Speter 682790075Sobrien/* Generate insns to for the output reload RL, which is for the insn described 682890075Sobrien by CHAIN and has the number J. */ 682990075Sobrienstatic void 6830132718Skanemit_output_reload_insns (struct insn_chain *chain, struct reload *rl, 6831132718Skan int j) 683290075Sobrien{ 683390075Sobrien rtx reloadreg = rl->reg_rtx; 683490075Sobrien rtx insn = chain->insn; 683590075Sobrien int special = 0; 683690075Sobrien rtx old = rl->out; 683790075Sobrien enum machine_mode mode = GET_MODE (old); 683890075Sobrien rtx p; 683918334Speter 684090075Sobrien if (rl->when_needed == RELOAD_OTHER) 684190075Sobrien start_sequence (); 684290075Sobrien else 684390075Sobrien push_to_sequence (output_reload_insns[rl->opnum]); 684418334Speter 684590075Sobrien /* Determine the mode to reload in. 684690075Sobrien See comments above (for input reloading). */ 684718334Speter 684890075Sobrien if (mode == VOIDmode) 684990075Sobrien { 685090075Sobrien /* VOIDmode should never happen for an output. */ 685190075Sobrien if (asm_noperands (PATTERN (insn)) < 0) 685290075Sobrien /* It's the compiler's fault. */ 685390075Sobrien fatal_insn ("VOIDmode on an output", insn); 6854169689Skan error_for_asm (insn, "output operand is constant in %<asm%>"); 685590075Sobrien /* Prevent crash--use something we know is valid. */ 685690075Sobrien mode = word_mode; 685790075Sobrien old = gen_rtx_REG (mode, REGNO (reloadreg)); 685890075Sobrien } 685918334Speter 686090075Sobrien if (GET_MODE (reloadreg) != mode) 6861132718Skan reloadreg = reload_adjust_reg_for_mode (reloadreg, mode); 686218334Speter 686390075Sobrien /* If we need two reload regs, set RELOADREG to the intermediate 686490075Sobrien one, since it will be stored into OLD. We might need a secondary 686590075Sobrien register only for an input reload, so check again here. */ 686618334Speter 686790075Sobrien if (rl->secondary_out_reload >= 0) 686890075Sobrien { 686990075Sobrien rtx real_old = old; 6870169689Skan int secondary_reload = rl->secondary_out_reload; 6871169689Skan int tertiary_reload = rld[secondary_reload].secondary_out_reload; 687218334Speter 6873169689Skan if (REG_P (old) && REGNO (old) >= FIRST_PSEUDO_REGISTER 687490075Sobrien && reg_equiv_mem[REGNO (old)] != 0) 687590075Sobrien real_old = reg_equiv_mem[REGNO (old)]; 687618334Speter 6877169689Skan if (secondary_reload_class (0, rl->class, mode, real_old) != NO_REGS) 687890075Sobrien { 687990075Sobrien rtx second_reloadreg = reloadreg; 6880169689Skan reloadreg = rld[secondary_reload].reg_rtx; 688152284Sobrien 688290075Sobrien /* See if RELOADREG is to be used as a scratch register 688390075Sobrien or as an intermediate register. */ 688490075Sobrien if (rl->secondary_out_icode != CODE_FOR_nothing) 688590075Sobrien { 6886169689Skan /* We'd have to add extra code to handle this case. */ 6887169689Skan gcc_assert (tertiary_reload < 0); 6888169689Skan 688990075Sobrien emit_insn ((GEN_FCN (rl->secondary_out_icode) 689090075Sobrien (real_old, second_reloadreg, reloadreg))); 689190075Sobrien special = 1; 689218334Speter } 689390075Sobrien else 689490075Sobrien { 689590075Sobrien /* See if we need both a scratch and intermediate reload 689690075Sobrien register. */ 689718334Speter 689890075Sobrien enum insn_code tertiary_icode 689990075Sobrien = rld[secondary_reload].secondary_out_icode; 690052284Sobrien 6901169689Skan /* We'd have to add more code for quartary reloads. */ 6902169689Skan gcc_assert (tertiary_reload < 0 6903169689Skan || rld[tertiary_reload].secondary_out_reload < 0); 6904169689Skan 690590075Sobrien if (GET_MODE (reloadreg) != mode) 6906132718Skan reloadreg = reload_adjust_reg_for_mode (reloadreg, mode); 690718334Speter 690890075Sobrien if (tertiary_icode != CODE_FOR_nothing) 690990075Sobrien { 6910169689Skan rtx third_reloadreg = rld[tertiary_reload].reg_rtx; 691190075Sobrien rtx tem; 691218334Speter 691390075Sobrien /* Copy primary reload reg to secondary reload reg. 691490075Sobrien (Note that these have been swapped above, then 691590075Sobrien secondary reload reg to OLD using our insn.) */ 691618334Speter 691790075Sobrien /* If REAL_OLD is a paradoxical SUBREG, remove it 691890075Sobrien and try to put the opposite SUBREG on 691990075Sobrien RELOADREG. */ 692090075Sobrien if (GET_CODE (real_old) == SUBREG 692190075Sobrien && (GET_MODE_SIZE (GET_MODE (real_old)) 692290075Sobrien > GET_MODE_SIZE (GET_MODE (SUBREG_REG (real_old)))) 692390075Sobrien && 0 != (tem = gen_lowpart_common 692490075Sobrien (GET_MODE (SUBREG_REG (real_old)), 692590075Sobrien reloadreg))) 692690075Sobrien real_old = SUBREG_REG (real_old), reloadreg = tem; 692718334Speter 692890075Sobrien gen_reload (reloadreg, second_reloadreg, 692990075Sobrien rl->opnum, rl->when_needed); 693090075Sobrien emit_insn ((GEN_FCN (tertiary_icode) 693190075Sobrien (real_old, reloadreg, third_reloadreg))); 693290075Sobrien special = 1; 693390075Sobrien } 693418334Speter 693590075Sobrien else 6936169689Skan { 6937169689Skan /* Copy between the reload regs here and then to 6938169689Skan OUT later. */ 693952284Sobrien 6940169689Skan gen_reload (reloadreg, second_reloadreg, 6941169689Skan rl->opnum, rl->when_needed); 6942169689Skan if (tertiary_reload >= 0) 6943169689Skan { 6944169689Skan rtx third_reloadreg = rld[tertiary_reload].reg_rtx; 6945169689Skan 6946169689Skan gen_reload (third_reloadreg, reloadreg, 6947169689Skan rl->opnum, rl->when_needed); 6948169689Skan reloadreg = third_reloadreg; 6949169689Skan } 6950169689Skan } 695190075Sobrien } 695290075Sobrien } 695390075Sobrien } 695418334Speter 695590075Sobrien /* Output the last reload insn. */ 695690075Sobrien if (! special) 695790075Sobrien { 695890075Sobrien rtx set; 695918334Speter 696090075Sobrien /* Don't output the last reload if OLD is not the dest of 696190075Sobrien INSN and is in the src and is clobbered by INSN. */ 696290075Sobrien if (! flag_expensive_optimizations 6963169689Skan || !REG_P (old) 696490075Sobrien || !(set = single_set (insn)) 696590075Sobrien || rtx_equal_p (old, SET_DEST (set)) 696690075Sobrien || !reg_mentioned_p (old, SET_SRC (set)) 6967169689Skan || !((REGNO (old) < FIRST_PSEUDO_REGISTER) 6968169689Skan && regno_clobbered_p (REGNO (old), insn, rl->mode, 0))) 696990075Sobrien gen_reload (old, reloadreg, rl->opnum, 697090075Sobrien rl->when_needed); 697190075Sobrien } 697218334Speter 697390075Sobrien /* Look at all insns we emitted, just to be safe. */ 697490075Sobrien for (p = get_insns (); p; p = NEXT_INSN (p)) 697590075Sobrien if (INSN_P (p)) 697690075Sobrien { 697790075Sobrien rtx pat = PATTERN (p); 697818334Speter 697990075Sobrien /* If this output reload doesn't come from a spill reg, 698090075Sobrien clear any memory of reloaded copies of the pseudo reg. 698190075Sobrien If this output reload comes from a spill reg, 698290075Sobrien reg_has_output_reload will make this do nothing. */ 698390075Sobrien note_stores (pat, forget_old_reloads_1, NULL); 698418334Speter 698590075Sobrien if (reg_mentioned_p (rl->reg_rtx, pat)) 698690075Sobrien { 698790075Sobrien rtx set = single_set (insn); 698890075Sobrien if (reload_spill_index[j] < 0 698990075Sobrien && set 699090075Sobrien && SET_SRC (set) == rl->reg_rtx) 699190075Sobrien { 699290075Sobrien int src = REGNO (SET_SRC (set)); 699318334Speter 699490075Sobrien reload_spill_index[j] = src; 699590075Sobrien SET_HARD_REG_BIT (reg_is_output_reload, src); 699690075Sobrien if (find_regno_note (insn, REG_DEAD, src)) 699790075Sobrien SET_HARD_REG_BIT (reg_reloaded_died, src); 699890075Sobrien } 699990075Sobrien if (REGNO (rl->reg_rtx) < FIRST_PSEUDO_REGISTER) 700090075Sobrien { 700190075Sobrien int s = rl->secondary_out_reload; 700290075Sobrien set = single_set (p); 700390075Sobrien /* If this reload copies only to the secondary reload 700490075Sobrien register, the secondary reload does the actual 700590075Sobrien store. */ 700690075Sobrien if (s >= 0 && set == NULL_RTX) 700790075Sobrien /* We can't tell what function the secondary reload 700890075Sobrien has and where the actual store to the pseudo is 700990075Sobrien made; leave new_spill_reg_store alone. */ 701090075Sobrien ; 701190075Sobrien else if (s >= 0 701290075Sobrien && SET_SRC (set) == rl->reg_rtx 701390075Sobrien && SET_DEST (set) == rld[s].reg_rtx) 701490075Sobrien { 701590075Sobrien /* Usually the next instruction will be the 701690075Sobrien secondary reload insn; if we can confirm 701790075Sobrien that it is, setting new_spill_reg_store to 701890075Sobrien that insn will allow an extra optimization. */ 701990075Sobrien rtx s_reg = rld[s].reg_rtx; 702090075Sobrien rtx next = NEXT_INSN (p); 702190075Sobrien rld[s].out = rl->out; 702290075Sobrien rld[s].out_reg = rl->out_reg; 702390075Sobrien set = single_set (next); 702490075Sobrien if (set && SET_SRC (set) == s_reg 702590075Sobrien && ! new_spill_reg_store[REGNO (s_reg)]) 702690075Sobrien { 702790075Sobrien SET_HARD_REG_BIT (reg_is_output_reload, 702890075Sobrien REGNO (s_reg)); 702990075Sobrien new_spill_reg_store[REGNO (s_reg)] = next; 703090075Sobrien } 703190075Sobrien } 703290075Sobrien else 703390075Sobrien new_spill_reg_store[REGNO (rl->reg_rtx)] = p; 703490075Sobrien } 703590075Sobrien } 703690075Sobrien } 703752284Sobrien 703890075Sobrien if (rl->when_needed == RELOAD_OTHER) 703990075Sobrien { 7040117395Skan emit_insn (other_output_reload_insns[rl->opnum]); 704190075Sobrien other_output_reload_insns[rl->opnum] = get_insns (); 704290075Sobrien } 704390075Sobrien else 704490075Sobrien output_reload_insns[rl->opnum] = get_insns (); 704518334Speter 704690075Sobrien if (flag_non_call_exceptions) 704790075Sobrien copy_eh_notes (insn, get_insns ()); 704818334Speter 704990075Sobrien end_sequence (); 705090075Sobrien} 705118334Speter 705290075Sobrien/* Do input reloading for reload RL, which is for the insn described by CHAIN 705390075Sobrien and has the number J. */ 705490075Sobrienstatic void 7055132718Skando_input_reload (struct insn_chain *chain, struct reload *rl, int j) 705690075Sobrien{ 705790075Sobrien rtx insn = chain->insn; 7058169689Skan rtx old = (rl->in && MEM_P (rl->in) 705990075Sobrien ? rl->in_reg : rl->in); 706018334Speter 706190075Sobrien if (old != 0 706290075Sobrien /* AUTO_INC reloads need to be handled even if inherited. We got an 706390075Sobrien AUTO_INC reload if reload_out is set but reload_out_reg isn't. */ 706490075Sobrien && (! reload_inherited[j] || (rl->out && ! rl->out_reg)) 706590075Sobrien && ! rtx_equal_p (rl->reg_rtx, old) 706690075Sobrien && rl->reg_rtx != 0) 706790075Sobrien emit_input_reload_insns (chain, rld + j, old, j); 706818334Speter 706990075Sobrien /* When inheriting a wider reload, we have a MEM in rl->in, 707090075Sobrien e.g. inheriting a SImode output reload for 707190075Sobrien (mem:HI (plus:SI (reg:SI 14 fp) (const_int 10))) */ 707290075Sobrien if (optimize && reload_inherited[j] && rl->in 7073169689Skan && MEM_P (rl->in) 7074169689Skan && MEM_P (rl->in_reg) 707590075Sobrien && reload_spill_index[j] >= 0 707690075Sobrien && TEST_HARD_REG_BIT (reg_reloaded_valid, reload_spill_index[j])) 7077132718Skan rl->in = regno_reg_rtx[reg_reloaded_contents[reload_spill_index[j]]]; 707818334Speter 707990075Sobrien /* If we are reloading a register that was recently stored in with an 708090075Sobrien output-reload, see if we can prove there was 708190075Sobrien actually no need to store the old value in it. */ 708218334Speter 708390075Sobrien if (optimize 7084146895Skan /* Only attempt this for input reloads; for RELOAD_OTHER we miss 7085146895Skan that there may be multiple uses of the previous output reload. 7086146895Skan Restricting to RELOAD_FOR_INPUT is mostly paranoia. */ 7087146895Skan && rl->when_needed == RELOAD_FOR_INPUT 708890075Sobrien && (reload_inherited[j] || reload_override_in[j]) 708990075Sobrien && rl->reg_rtx 7090169689Skan && REG_P (rl->reg_rtx) 709190075Sobrien && spill_reg_store[REGNO (rl->reg_rtx)] != 0 709290075Sobrien#if 0 709390075Sobrien /* There doesn't seem to be any reason to restrict this to pseudos 709490075Sobrien and doing so loses in the case where we are copying from a 709590075Sobrien register of the wrong class. */ 709690075Sobrien && (REGNO (spill_reg_stored_to[REGNO (rl->reg_rtx)]) 709790075Sobrien >= FIRST_PSEUDO_REGISTER) 709890075Sobrien#endif 709990075Sobrien /* The insn might have already some references to stackslots 710090075Sobrien replaced by MEMs, while reload_out_reg still names the 710190075Sobrien original pseudo. */ 710290075Sobrien && (dead_or_set_p (insn, 710390075Sobrien spill_reg_stored_to[REGNO (rl->reg_rtx)]) 710490075Sobrien || rtx_equal_p (spill_reg_stored_to[REGNO (rl->reg_rtx)], 710590075Sobrien rl->out_reg))) 710690075Sobrien delete_output_reload (insn, j, REGNO (rl->reg_rtx)); 710790075Sobrien} 710818334Speter 710990075Sobrien/* Do output reloading for reload RL, which is for the insn described by 711090075Sobrien CHAIN and has the number J. 711190075Sobrien ??? At some point we need to support handling output reloads of 711290075Sobrien JUMP_INSNs or insns that set cc0. */ 711390075Sobrienstatic void 7114132718Skando_output_reload (struct insn_chain *chain, struct reload *rl, int j) 711590075Sobrien{ 711690075Sobrien rtx note, old; 711790075Sobrien rtx insn = chain->insn; 711890075Sobrien /* If this is an output reload that stores something that is 711990075Sobrien not loaded in this same reload, see if we can eliminate a previous 712090075Sobrien store. */ 712190075Sobrien rtx pseudo = rl->out_reg; 712218334Speter 712390075Sobrien if (pseudo 7124102780Skan && optimize 7125169689Skan && REG_P (pseudo) 712690075Sobrien && ! rtx_equal_p (rl->in_reg, pseudo) 712790075Sobrien && REGNO (pseudo) >= FIRST_PSEUDO_REGISTER 712890075Sobrien && reg_last_reload_reg[REGNO (pseudo)]) 712990075Sobrien { 713090075Sobrien int pseudo_no = REGNO (pseudo); 713190075Sobrien int last_regno = REGNO (reg_last_reload_reg[pseudo_no]); 713218334Speter 713390075Sobrien /* We don't need to test full validity of last_regno for 713490075Sobrien inherit here; we only want to know if the store actually 713590075Sobrien matches the pseudo. */ 713690075Sobrien if (TEST_HARD_REG_BIT (reg_reloaded_valid, last_regno) 713790075Sobrien && reg_reloaded_contents[last_regno] == pseudo_no 713890075Sobrien && spill_reg_store[last_regno] 713990075Sobrien && rtx_equal_p (pseudo, spill_reg_stored_to[last_regno])) 714090075Sobrien delete_output_reload (insn, j, last_regno); 714190075Sobrien } 714218334Speter 714390075Sobrien old = rl->out_reg; 714490075Sobrien if (old == 0 714590075Sobrien || rl->reg_rtx == old 714690075Sobrien || rl->reg_rtx == 0) 714790075Sobrien return; 714818334Speter 714990075Sobrien /* An output operand that dies right away does need a reload, 715090075Sobrien but need not be copied from it. Show the new location in the 715190075Sobrien REG_UNUSED note. */ 7152169689Skan if ((REG_P (old) || GET_CODE (old) == SCRATCH) 715390075Sobrien && (note = find_reg_note (insn, REG_UNUSED, old)) != 0) 715490075Sobrien { 715590075Sobrien XEXP (note, 0) = rl->reg_rtx; 715690075Sobrien return; 715790075Sobrien } 715890075Sobrien /* Likewise for a SUBREG of an operand that dies. */ 715990075Sobrien else if (GET_CODE (old) == SUBREG 7160169689Skan && REG_P (SUBREG_REG (old)) 716190075Sobrien && 0 != (note = find_reg_note (insn, REG_UNUSED, 716290075Sobrien SUBREG_REG (old)))) 716390075Sobrien { 716490075Sobrien XEXP (note, 0) = gen_lowpart_common (GET_MODE (old), 716590075Sobrien rl->reg_rtx); 716690075Sobrien return; 716790075Sobrien } 716890075Sobrien else if (GET_CODE (old) == SCRATCH) 716990075Sobrien /* If we aren't optimizing, there won't be a REG_UNUSED note, 717090075Sobrien but we don't want to make an output reload. */ 717190075Sobrien return; 717218334Speter 717390075Sobrien /* If is a JUMP_INSN, we can't support output reloads yet. */ 7174169689Skan gcc_assert (NONJUMP_INSN_P (insn)); 717518334Speter 717690075Sobrien emit_output_reload_insns (chain, rld + j, j); 717790075Sobrien} 717818334Speter 7179169689Skan/* Reload number R reloads from or to a group of hard registers starting at 7180169689Skan register REGNO. Return true if it can be treated for inheritance purposes 7181169689Skan like a group of reloads, each one reloading a single hard register. 7182169689Skan The caller has already checked that the spill register and REGNO use 7183169689Skan the same number of registers to store the reload value. */ 7184169689Skan 7185169689Skanstatic bool 7186169689Skaninherit_piecemeal_p (int r ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED) 7187169689Skan{ 7188169689Skan#ifdef CANNOT_CHANGE_MODE_CLASS 7189169689Skan return (!REG_CANNOT_CHANGE_MODE_P (reload_spill_index[r], 7190169689Skan GET_MODE (rld[r].reg_rtx), 7191169689Skan reg_raw_mode[reload_spill_index[r]]) 7192169689Skan && !REG_CANNOT_CHANGE_MODE_P (regno, 7193169689Skan GET_MODE (rld[r].reg_rtx), 7194169689Skan reg_raw_mode[regno])); 7195169689Skan#else 7196169689Skan return true; 7197169689Skan#endif 7198169689Skan} 7199169689Skan 720090075Sobrien/* Output insns to reload values in and out of the chosen reload regs. */ 720118334Speter 720290075Sobrienstatic void 7203132718Skanemit_reload_insns (struct insn_chain *chain) 720490075Sobrien{ 720590075Sobrien rtx insn = chain->insn; 720618334Speter 720790075Sobrien int j; 720818334Speter 720990075Sobrien CLEAR_HARD_REG_SET (reg_reloaded_died); 721050397Sobrien 721190075Sobrien for (j = 0; j < reload_n_operands; j++) 721290075Sobrien input_reload_insns[j] = input_address_reload_insns[j] 721390075Sobrien = inpaddr_address_reload_insns[j] 721490075Sobrien = output_reload_insns[j] = output_address_reload_insns[j] 721590075Sobrien = outaddr_address_reload_insns[j] 721690075Sobrien = other_output_reload_insns[j] = 0; 721790075Sobrien other_input_address_reload_insns = 0; 721890075Sobrien other_input_reload_insns = 0; 721990075Sobrien operand_reload_insns = 0; 722090075Sobrien other_operand_reload_insns = 0; 722150397Sobrien 722290075Sobrien /* Dump reloads into the dump file. */ 7223169689Skan if (dump_file) 722490075Sobrien { 7225169689Skan fprintf (dump_file, "\nReloads for insn # %d\n", INSN_UID (insn)); 7226169689Skan debug_reload_to_stream (dump_file); 722790075Sobrien } 722818334Speter 722990075Sobrien /* Now output the instructions to copy the data into and out of the 723090075Sobrien reload registers. Do these in the order that the reloads were reported, 723190075Sobrien since reloads of base and index registers precede reloads of operands 723290075Sobrien and the operands may need the base and index registers reloaded. */ 723350397Sobrien 723490075Sobrien for (j = 0; j < n_reloads; j++) 723590075Sobrien { 723690075Sobrien if (rld[j].reg_rtx 723790075Sobrien && REGNO (rld[j].reg_rtx) < FIRST_PSEUDO_REGISTER) 723890075Sobrien new_spill_reg_store[REGNO (rld[j].reg_rtx)] = 0; 723918334Speter 724090075Sobrien do_input_reload (chain, rld + j, j); 724190075Sobrien do_output_reload (chain, rld + j, j); 724218334Speter } 724318334Speter 724418334Speter /* Now write all the insns we made for reloads in the order expected by 724518334Speter the allocation functions. Prior to the insn being reloaded, we write 724618334Speter the following reloads: 724718334Speter 724818334Speter RELOAD_FOR_OTHER_ADDRESS reloads for input addresses. 724918334Speter 725050397Sobrien RELOAD_OTHER reloads. 725118334Speter 725250397Sobrien For each operand, any RELOAD_FOR_INPADDR_ADDRESS reloads followed 725350397Sobrien by any RELOAD_FOR_INPUT_ADDRESS reloads followed by the 725450397Sobrien RELOAD_FOR_INPUT reload for the operand. 725518334Speter 725618334Speter RELOAD_FOR_OPADDR_ADDRS reloads. 725718334Speter 725818334Speter RELOAD_FOR_OPERAND_ADDRESS reloads. 725918334Speter 726018334Speter After the insn being reloaded, we write the following: 726118334Speter 726250397Sobrien For each operand, any RELOAD_FOR_OUTADDR_ADDRESS reloads followed 726350397Sobrien by any RELOAD_FOR_OUTPUT_ADDRESS reload followed by the 726450397Sobrien RELOAD_FOR_OUTPUT reload, followed by any RELOAD_OTHER output 726550397Sobrien reloads for the operand. The RELOAD_OTHER output reloads are 726650397Sobrien output in descending order by reload number. */ 726718334Speter 7268117395Skan emit_insn_before (other_input_address_reload_insns, insn); 7269117395Skan emit_insn_before (other_input_reload_insns, insn); 727018334Speter 727118334Speter for (j = 0; j < reload_n_operands; j++) 727218334Speter { 7273117395Skan emit_insn_before (inpaddr_address_reload_insns[j], insn); 7274117395Skan emit_insn_before (input_address_reload_insns[j], insn); 7275117395Skan emit_insn_before (input_reload_insns[j], insn); 727618334Speter } 727718334Speter 7278117395Skan emit_insn_before (other_operand_reload_insns, insn); 7279117395Skan emit_insn_before (operand_reload_insns, insn); 728018334Speter 728118334Speter for (j = 0; j < reload_n_operands; j++) 728218334Speter { 7283117395Skan rtx x = emit_insn_after (outaddr_address_reload_insns[j], insn); 7284117395Skan x = emit_insn_after (output_address_reload_insns[j], x); 7285117395Skan x = emit_insn_after (output_reload_insns[j], x); 7286117395Skan emit_insn_after (other_output_reload_insns[j], x); 728718334Speter } 728818334Speter 728918334Speter /* For all the spill regs newly reloaded in this instruction, 729018334Speter record what they were reloaded from, so subsequent instructions 729118334Speter can inherit the reloads. 729218334Speter 729318334Speter Update spill_reg_store for the reloads of this insn. 729418334Speter Copy the elements that were updated in the loop above. */ 729518334Speter 729618334Speter for (j = 0; j < n_reloads; j++) 729718334Speter { 729890075Sobrien int r = reload_order[j]; 729990075Sobrien int i = reload_spill_index[r]; 730018334Speter 730152284Sobrien /* If this is a non-inherited input reload from a pseudo, we must 730290075Sobrien clear any memory of a previous store to the same pseudo. Only do 730390075Sobrien something if there will not be an output reload for the pseudo 730490075Sobrien being reloaded. */ 730590075Sobrien if (rld[r].in_reg != 0 730690075Sobrien && ! (reload_inherited[r] || reload_override_in[r])) 730790075Sobrien { 730890075Sobrien rtx reg = rld[r].in_reg; 730952284Sobrien 731090075Sobrien if (GET_CODE (reg) == SUBREG) 731152284Sobrien reg = SUBREG_REG (reg); 731290075Sobrien 7313169689Skan if (REG_P (reg) 731452284Sobrien && REGNO (reg) >= FIRST_PSEUDO_REGISTER 7315169689Skan && !REGNO_REG_SET_P (®_has_output_reload, REGNO (reg))) 731652284Sobrien { 731752284Sobrien int nregno = REGNO (reg); 731852284Sobrien 731952284Sobrien if (reg_last_reload_reg[nregno]) 732090075Sobrien { 732190075Sobrien int last_regno = REGNO (reg_last_reload_reg[nregno]); 732252284Sobrien 732390075Sobrien if (reg_reloaded_contents[last_regno] == nregno) 732452284Sobrien spill_reg_store[last_regno] = 0; 732590075Sobrien } 732652284Sobrien } 732752284Sobrien } 732890075Sobrien 732950397Sobrien /* I is nonneg if this reload used a register. 733090075Sobrien If rld[r].reg_rtx is 0, this is an optional reload 733150397Sobrien that we opted to ignore. */ 733218334Speter 733390075Sobrien if (i >= 0 && rld[r].reg_rtx != 0) 733418334Speter { 7335169689Skan int nr = hard_regno_nregs[i][GET_MODE (rld[r].reg_rtx)]; 733618334Speter int k; 733750397Sobrien int part_reaches_end = 0; 733850397Sobrien int all_reaches_end = 1; 733918334Speter 734050397Sobrien /* For a multi register reload, we need to check if all or part 734150397Sobrien of the value lives to the end. */ 734218334Speter for (k = 0; k < nr; k++) 734318334Speter { 734490075Sobrien if (reload_reg_reaches_end_p (i + k, rld[r].opnum, 734590075Sobrien rld[r].when_needed)) 734650397Sobrien part_reaches_end = 1; 734750397Sobrien else 734850397Sobrien all_reaches_end = 0; 734918334Speter } 735018334Speter 735150397Sobrien /* Ignore reloads that don't reach the end of the insn in 735250397Sobrien entirety. */ 735350397Sobrien if (all_reaches_end) 735418334Speter { 735550397Sobrien /* First, clear out memory of what used to be in this spill reg. 735650397Sobrien If consecutive registers are used, clear them all. */ 735718334Speter 735850397Sobrien for (k = 0; k < nr; k++) 7359132718Skan { 736050397Sobrien CLEAR_HARD_REG_BIT (reg_reloaded_valid, i + k); 7361132718Skan CLEAR_HARD_REG_BIT (reg_reloaded_call_part_clobbered, i + k); 7362132718Skan } 736318334Speter 736450397Sobrien /* Maybe the spill reg contains a copy of reload_out. */ 736590075Sobrien if (rld[r].out != 0 7366169689Skan && (REG_P (rld[r].out) 736752284Sobrien#ifdef AUTO_INC_DEC 736890075Sobrien || ! rld[r].out_reg 736952284Sobrien#endif 7370169689Skan || REG_P (rld[r].out_reg))) 737150397Sobrien { 7372169689Skan rtx out = (REG_P (rld[r].out) 737390075Sobrien ? rld[r].out 737490075Sobrien : rld[r].out_reg 737590075Sobrien ? rld[r].out_reg 737690075Sobrien/* AUTO_INC */ : XEXP (rld[r].in_reg, 0)); 737790075Sobrien int nregno = REGNO (out); 737850397Sobrien int nnr = (nregno >= FIRST_PSEUDO_REGISTER ? 1 7379169689Skan : hard_regno_nregs[nregno] 7380169689Skan [GET_MODE (rld[r].reg_rtx)]); 7381169689Skan bool piecemeal; 738218334Speter 738350397Sobrien spill_reg_store[i] = new_spill_reg_store[i]; 738452284Sobrien spill_reg_stored_to[i] = out; 738590075Sobrien reg_last_reload_reg[nregno] = rld[r].reg_rtx; 738618334Speter 7387169689Skan piecemeal = (nregno < FIRST_PSEUDO_REGISTER 7388169689Skan && nr == nnr 7389169689Skan && inherit_piecemeal_p (r, nregno)); 7390169689Skan 739150397Sobrien /* If NREGNO is a hard register, it may occupy more than 739290075Sobrien one register. If it does, say what is in the 739350397Sobrien rest of the registers assuming that both registers 739450397Sobrien agree on how many words the object takes. If not, 739550397Sobrien invalidate the subsequent registers. */ 739650397Sobrien 739750397Sobrien if (nregno < FIRST_PSEUDO_REGISTER) 739850397Sobrien for (k = 1; k < nnr; k++) 739950397Sobrien reg_last_reload_reg[nregno + k] 7400169689Skan = (piecemeal 7401117395Skan ? regno_reg_rtx[REGNO (rld[r].reg_rtx) + k] 740250397Sobrien : 0); 740350397Sobrien 740450397Sobrien /* Now do the inverse operation. */ 740550397Sobrien for (k = 0; k < nr; k++) 740650397Sobrien { 740750397Sobrien CLEAR_HARD_REG_BIT (reg_reloaded_dead, i + k); 740850397Sobrien reg_reloaded_contents[i + k] 7409169689Skan = (nregno >= FIRST_PSEUDO_REGISTER || !piecemeal 741050397Sobrien ? nregno 741150397Sobrien : nregno + k); 741250397Sobrien reg_reloaded_insn[i + k] = insn; 741350397Sobrien SET_HARD_REG_BIT (reg_reloaded_valid, i + k); 7414132718Skan if (HARD_REGNO_CALL_PART_CLOBBERED (i + k, GET_MODE (out))) 7415132718Skan SET_HARD_REG_BIT (reg_reloaded_call_part_clobbered, i + k); 741650397Sobrien } 741718334Speter } 741818334Speter 741950397Sobrien /* Maybe the spill reg contains a copy of reload_in. Only do 742050397Sobrien something if there will not be an output reload for 742150397Sobrien the register being reloaded. */ 742290075Sobrien else if (rld[r].out_reg == 0 742390075Sobrien && rld[r].in != 0 7424169689Skan && ((REG_P (rld[r].in) 742590075Sobrien && REGNO (rld[r].in) >= FIRST_PSEUDO_REGISTER 7426169689Skan && !REGNO_REG_SET_P (®_has_output_reload, 7427169689Skan REGNO (rld[r].in))) 7428169689Skan || (REG_P (rld[r].in_reg) 7429169689Skan && !REGNO_REG_SET_P (®_has_output_reload, 7430169689Skan REGNO (rld[r].in_reg)))) 743190075Sobrien && ! reg_set_p (rld[r].reg_rtx, PATTERN (insn))) 743250397Sobrien { 743390075Sobrien int nregno; 743450397Sobrien int nnr; 7435132718Skan rtx in; 7436169689Skan bool piecemeal; 743718334Speter 7438169689Skan if (REG_P (rld[r].in) 743990075Sobrien && REGNO (rld[r].in) >= FIRST_PSEUDO_REGISTER) 7440132718Skan in = rld[r].in; 7441169689Skan else if (REG_P (rld[r].in_reg)) 7442132718Skan in = rld[r].in_reg; 744350397Sobrien else 7444132718Skan in = XEXP (rld[r].in_reg, 0); 7445132718Skan nregno = REGNO (in); 744618334Speter 744750397Sobrien nnr = (nregno >= FIRST_PSEUDO_REGISTER ? 1 7448169689Skan : hard_regno_nregs[nregno] 7449169689Skan [GET_MODE (rld[r].reg_rtx)]); 745018334Speter 745190075Sobrien reg_last_reload_reg[nregno] = rld[r].reg_rtx; 745290075Sobrien 7453169689Skan piecemeal = (nregno < FIRST_PSEUDO_REGISTER 7454169689Skan && nr == nnr 7455169689Skan && inherit_piecemeal_p (r, nregno)); 7456169689Skan 745750397Sobrien if (nregno < FIRST_PSEUDO_REGISTER) 745850397Sobrien for (k = 1; k < nnr; k++) 745950397Sobrien reg_last_reload_reg[nregno + k] 7460169689Skan = (piecemeal 7461117395Skan ? regno_reg_rtx[REGNO (rld[r].reg_rtx) + k] 746250397Sobrien : 0); 746318334Speter 746450397Sobrien /* Unless we inherited this reload, show we haven't 746552284Sobrien recently done a store. 746652284Sobrien Previous stores of inherited auto_inc expressions 746752284Sobrien also have to be discarded. */ 746852284Sobrien if (! reload_inherited[r] 746990075Sobrien || (rld[r].out && ! rld[r].out_reg)) 747050397Sobrien spill_reg_store[i] = 0; 747118334Speter 747250397Sobrien for (k = 0; k < nr; k++) 747350397Sobrien { 747450397Sobrien CLEAR_HARD_REG_BIT (reg_reloaded_dead, i + k); 747550397Sobrien reg_reloaded_contents[i + k] 7476169689Skan = (nregno >= FIRST_PSEUDO_REGISTER || !piecemeal 747750397Sobrien ? nregno 747850397Sobrien : nregno + k); 747950397Sobrien reg_reloaded_insn[i + k] = insn; 748050397Sobrien SET_HARD_REG_BIT (reg_reloaded_valid, i + k); 7481132718Skan if (HARD_REGNO_CALL_PART_CLOBBERED (i + k, GET_MODE (in))) 7482132718Skan SET_HARD_REG_BIT (reg_reloaded_call_part_clobbered, i + k); 748350397Sobrien } 748450397Sobrien } 748550397Sobrien } 748618334Speter 748750397Sobrien /* However, if part of the reload reaches the end, then we must 748850397Sobrien invalidate the old info for the part that survives to the end. */ 748950397Sobrien else if (part_reaches_end) 749050397Sobrien { 749118334Speter for (k = 0; k < nr; k++) 749250397Sobrien if (reload_reg_reaches_end_p (i + k, 749390075Sobrien rld[r].opnum, 749490075Sobrien rld[r].when_needed)) 749550397Sobrien CLEAR_HARD_REG_BIT (reg_reloaded_valid, i + k); 749618334Speter } 749718334Speter } 749818334Speter 749918334Speter /* The following if-statement was #if 0'd in 1.34 (or before...). 750018334Speter It's reenabled in 1.35 because supposedly nothing else 750118334Speter deals with this problem. */ 750218334Speter 750318334Speter /* If a register gets output-reloaded from a non-spill register, 750418334Speter that invalidates any previous reloaded copy of it. 750518334Speter But forget_old_reloads_1 won't get to see it, because 7506169689Skan it thinks only about the original insn. So invalidate it here. 7507169689Skan Also do the same thing for RELOAD_OTHER constraints where the 7508169689Skan output is discarded. */ 7509169689Skan if (i < 0 7510169689Skan && ((rld[r].out != 0 7511169689Skan && (REG_P (rld[r].out) 7512169689Skan || (MEM_P (rld[r].out) 7513169689Skan && REG_P (rld[r].out_reg)))) 7514169689Skan || (rld[r].out == 0 && rld[r].out_reg 7515169689Skan && REG_P (rld[r].out_reg)))) 751618334Speter { 7517169689Skan rtx out = ((rld[r].out && REG_P (rld[r].out)) 751890075Sobrien ? rld[r].out : rld[r].out_reg); 751990075Sobrien int nregno = REGNO (out); 752018334Speter if (nregno >= FIRST_PSEUDO_REGISTER) 752152284Sobrien { 752290075Sobrien rtx src_reg, store_insn = NULL_RTX; 752352284Sobrien 752452284Sobrien reg_last_reload_reg[nregno] = 0; 752552284Sobrien 752652284Sobrien /* If we can find a hard register that is stored, record 752752284Sobrien the storing insn so that we may delete this insn with 752852284Sobrien delete_output_reload. */ 752990075Sobrien src_reg = rld[r].reg_rtx; 753052284Sobrien 753152284Sobrien /* If this is an optional reload, try to find the source reg 753252284Sobrien from an input reload. */ 753352284Sobrien if (! src_reg) 753452284Sobrien { 753552284Sobrien rtx set = single_set (insn); 753690075Sobrien if (set && SET_DEST (set) == rld[r].out) 753752284Sobrien { 753852284Sobrien int k; 753952284Sobrien 754052284Sobrien src_reg = SET_SRC (set); 754152284Sobrien store_insn = insn; 754252284Sobrien for (k = 0; k < n_reloads; k++) 754352284Sobrien { 754490075Sobrien if (rld[k].in == src_reg) 754552284Sobrien { 754690075Sobrien src_reg = rld[k].reg_rtx; 754752284Sobrien break; 754852284Sobrien } 754952284Sobrien } 755052284Sobrien } 755152284Sobrien } 755252284Sobrien else 755352284Sobrien store_insn = new_spill_reg_store[REGNO (src_reg)]; 7554169689Skan if (src_reg && REG_P (src_reg) 755552284Sobrien && REGNO (src_reg) < FIRST_PSEUDO_REGISTER) 755652284Sobrien { 755752284Sobrien int src_regno = REGNO (src_reg); 7558169689Skan int nr = hard_regno_nregs[src_regno][rld[r].mode]; 755952284Sobrien /* The place where to find a death note varies with 756052284Sobrien PRESERVE_DEATH_INFO_REGNO_P . The condition is not 756152284Sobrien necessarily checked exactly in the code that moves 756252284Sobrien notes, so just check both locations. */ 756352284Sobrien rtx note = find_regno_note (insn, REG_DEAD, src_regno); 756490075Sobrien if (! note && store_insn) 756552284Sobrien note = find_regno_note (store_insn, REG_DEAD, src_regno); 756652284Sobrien while (nr-- > 0) 756752284Sobrien { 756852284Sobrien spill_reg_store[src_regno + nr] = store_insn; 756952284Sobrien spill_reg_stored_to[src_regno + nr] = out; 757052284Sobrien reg_reloaded_contents[src_regno + nr] = nregno; 757152284Sobrien reg_reloaded_insn[src_regno + nr] = store_insn; 757252284Sobrien CLEAR_HARD_REG_BIT (reg_reloaded_dead, src_regno + nr); 757352284Sobrien SET_HARD_REG_BIT (reg_reloaded_valid, src_regno + nr); 7574132718Skan if (HARD_REGNO_CALL_PART_CLOBBERED (src_regno + nr, 7575132718Skan GET_MODE (src_reg))) 7576132718Skan SET_HARD_REG_BIT (reg_reloaded_call_part_clobbered, 7577132718Skan src_regno + nr); 757852284Sobrien SET_HARD_REG_BIT (reg_is_output_reload, src_regno + nr); 757952284Sobrien if (note) 758052284Sobrien SET_HARD_REG_BIT (reg_reloaded_died, src_regno); 758152284Sobrien else 758252284Sobrien CLEAR_HARD_REG_BIT (reg_reloaded_died, src_regno); 758352284Sobrien } 758452284Sobrien reg_last_reload_reg[nregno] = src_reg; 7585132718Skan /* We have to set reg_has_output_reload here, or else 7586132718Skan forget_old_reloads_1 will clear reg_last_reload_reg 7587132718Skan right away. */ 7588169689Skan SET_REGNO_REG_SET (®_has_output_reload, 7589169689Skan nregno); 759052284Sobrien } 759152284Sobrien } 759218334Speter else 759318334Speter { 7594169689Skan int num_regs = hard_regno_nregs[nregno][GET_MODE (out)]; 759518334Speter 759618334Speter while (num_regs-- > 0) 759718334Speter reg_last_reload_reg[nregno + num_regs] = 0; 759818334Speter } 759918334Speter } 760018334Speter } 760150397Sobrien IOR_HARD_REG_SET (reg_reloaded_dead, reg_reloaded_died); 760218334Speter} 760318334Speter 7604169689Skan/* Go through the motions to emit INSN and test if it is strictly valid. 7605169689Skan Return the emitted insn if valid, else return NULL. */ 7606169689Skan 7607169689Skanstatic rtx 7608169689Skanemit_insn_if_valid_for_reload (rtx insn) 7609169689Skan{ 7610169689Skan rtx last = get_last_insn (); 7611169689Skan int code; 7612169689Skan 7613169689Skan insn = emit_insn (insn); 7614169689Skan code = recog_memoized (insn); 7615169689Skan 7616169689Skan if (code >= 0) 7617169689Skan { 7618169689Skan extract_insn (insn); 7619169689Skan /* We want constrain operands to treat this insn strictly in its 7620169689Skan validity determination, i.e., the way it would after reload has 7621169689Skan completed. */ 7622169689Skan if (constrain_operands (1)) 7623169689Skan return insn; 7624169689Skan } 7625169689Skan 7626169689Skan delete_insns_since (last); 7627169689Skan return NULL; 7628169689Skan} 7629169689Skan 763018334Speter/* Emit code to perform a reload from IN (which may be a reload register) to 763118334Speter OUT (which may also be a reload register). IN or OUT is from operand 763290075Sobrien OPNUM with reload type TYPE. 763318334Speter 763418334Speter Returns first insn emitted. */ 763518334Speter 7636169689Skanstatic rtx 7637132718Skangen_reload (rtx out, rtx in, int opnum, enum reload_type type) 763818334Speter{ 763918334Speter rtx last = get_last_insn (); 764018334Speter rtx tem; 764118334Speter 764218334Speter /* If IN is a paradoxical SUBREG, remove it and try to put the 764318334Speter opposite SUBREG on OUT. Likewise for a paradoxical SUBREG on OUT. */ 764418334Speter if (GET_CODE (in) == SUBREG 764518334Speter && (GET_MODE_SIZE (GET_MODE (in)) 764618334Speter > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 764718334Speter && (tem = gen_lowpart_common (GET_MODE (SUBREG_REG (in)), out)) != 0) 764818334Speter in = SUBREG_REG (in), out = tem; 764918334Speter else if (GET_CODE (out) == SUBREG 765090075Sobrien && (GET_MODE_SIZE (GET_MODE (out)) 765190075Sobrien > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 765290075Sobrien && (tem = gen_lowpart_common (GET_MODE (SUBREG_REG (out)), in)) != 0) 765318334Speter out = SUBREG_REG (out), in = tem; 765418334Speter 765518334Speter /* How to do this reload can get quite tricky. Normally, we are being 765618334Speter asked to reload a simple operand, such as a MEM, a constant, or a pseudo 765718334Speter register that didn't get a hard register. In that case we can just 765818334Speter call emit_move_insn. 765918334Speter 766018334Speter We can also be asked to reload a PLUS that adds a register or a MEM to 766118334Speter another register, constant or MEM. This can occur during frame pointer 766218334Speter elimination and while reloading addresses. This case is handled by 766318334Speter trying to emit a single insn to perform the add. If it is not valid, 766418334Speter we use a two insn sequence. 766518334Speter 7666169689Skan Or we can be asked to reload an unary operand that was a fragment of 7667169689Skan an addressing mode, into a register. If it isn't recognized as-is, 7668169689Skan we try making the unop operand and the reload-register the same: 7669169689Skan (set reg:X (unop:X expr:Y)) 7670169689Skan -> (set reg:Y expr:Y) (set reg:X (unop:X reg:Y)). 7671169689Skan 767218334Speter Finally, we could be called to handle an 'o' constraint by putting 767318334Speter an address into a register. In that case, we first try to do this 767418334Speter with a named pattern of "reload_load_address". If no such pattern 767518334Speter exists, we just emit a SET insn and hope for the best (it will normally 767618334Speter be valid on machines that use 'o'). 767718334Speter 767818334Speter This entire process is made complex because reload will never 767918334Speter process the insns we generate here and so we must ensure that 768018334Speter they will fit their constraints and also by the fact that parts of 768118334Speter IN might be being reloaded separately and replaced with spill registers. 768218334Speter Because of this, we are, in some sense, just guessing the right approach 768318334Speter here. The one listed above seems to work. 768418334Speter 768518334Speter ??? At some point, this whole thing needs to be rethought. */ 768618334Speter 768718334Speter if (GET_CODE (in) == PLUS 7688169689Skan && (REG_P (XEXP (in, 0)) 768950397Sobrien || GET_CODE (XEXP (in, 0)) == SUBREG 7690169689Skan || MEM_P (XEXP (in, 0))) 7691169689Skan && (REG_P (XEXP (in, 1)) 769250397Sobrien || GET_CODE (XEXP (in, 1)) == SUBREG 769318334Speter || CONSTANT_P (XEXP (in, 1)) 7694169689Skan || MEM_P (XEXP (in, 1)))) 769518334Speter { 769618334Speter /* We need to compute the sum of a register or a MEM and another 769718334Speter register, constant, or MEM, and put it into the reload 769818334Speter register. The best possible way of doing this is if the machine 769918334Speter has a three-operand ADD insn that accepts the required operands. 770018334Speter 770118334Speter The simplest approach is to try to generate such an insn and see if it 770218334Speter is recognized and matches its constraints. If so, it can be used. 770318334Speter 770418334Speter It might be better not to actually emit the insn unless it is valid, 770518334Speter but we need to pass the insn as an operand to `recog' and 770652284Sobrien `extract_insn' and it is simpler to emit and then delete the insn if 770718334Speter not valid than to dummy things up. */ 770818334Speter 770918334Speter rtx op0, op1, tem, insn; 771018334Speter int code; 771118334Speter 771218334Speter op0 = find_replacement (&XEXP (in, 0)); 771318334Speter op1 = find_replacement (&XEXP (in, 1)); 771418334Speter 771518334Speter /* Since constraint checking is strict, commutativity won't be 771618334Speter checked, so we need to do that here to avoid spurious failure 771718334Speter if the add instruction is two-address and the second operand 771818334Speter of the add is the same as the reload reg, which is frequently 771918334Speter the case. If the insn would be A = B + A, rearrange it so 772050397Sobrien it will be A = A + B as constrain_operands expects. */ 772118334Speter 7722169689Skan if (REG_P (XEXP (in, 1)) 772318334Speter && REGNO (out) == REGNO (XEXP (in, 1))) 772418334Speter tem = op0, op0 = op1, op1 = tem; 772518334Speter 772618334Speter if (op0 != XEXP (in, 0) || op1 != XEXP (in, 1)) 772750397Sobrien in = gen_rtx_PLUS (GET_MODE (in), op0, op1); 772818334Speter 7729169689Skan insn = emit_insn_if_valid_for_reload (gen_rtx_SET (VOIDmode, out, in)); 7730169689Skan if (insn) 7731169689Skan return insn; 773218334Speter 773318334Speter /* If that failed, we must use a conservative two-insn sequence. 773418334Speter 773590075Sobrien Use a move to copy one operand into the reload register. Prefer 773690075Sobrien to reload a constant, MEM or pseudo since the move patterns can 773790075Sobrien handle an arbitrary operand. If OP1 is not a constant, MEM or 773890075Sobrien pseudo and OP1 is not a valid operand for an add instruction, then 773990075Sobrien reload OP1. 774090075Sobrien 774190075Sobrien After reloading one of the operands into the reload register, add 774290075Sobrien the reload register to the output register. 774390075Sobrien 774418334Speter If there is another way to do this for a specific machine, a 774518334Speter DEFINE_PEEPHOLE should be specified that recognizes the sequence 774618334Speter we emit below. */ 774718334Speter 774852284Sobrien code = (int) add_optab->handlers[(int) GET_MODE (out)].insn_code; 774952284Sobrien 7750169689Skan if (CONSTANT_P (op1) || MEM_P (op1) || GET_CODE (op1) == SUBREG 7751169689Skan || (REG_P (op1) 775290075Sobrien && REGNO (op1) >= FIRST_PSEUDO_REGISTER) 775390075Sobrien || (code != CODE_FOR_nothing 775490075Sobrien && ! ((*insn_data[code].operand[2].predicate) 775590075Sobrien (op1, insn_data[code].operand[2].mode)))) 775618334Speter tem = op0, op0 = op1, op1 = tem; 775718334Speter 775850397Sobrien gen_reload (out, op0, opnum, type); 775918334Speter 776018334Speter /* If OP0 and OP1 are the same, we can use OUT for OP1. 776118334Speter This fixes a problem on the 32K where the stack pointer cannot 776218334Speter be used as an operand of an add insn. */ 776318334Speter 776418334Speter if (rtx_equal_p (op0, op1)) 776518334Speter op1 = out; 776618334Speter 7767169689Skan insn = emit_insn_if_valid_for_reload (gen_add2_insn (out, op1)); 7768169689Skan if (insn) 7769169689Skan { 7770169689Skan /* Add a REG_EQUIV note so that find_equiv_reg can find it. */ 7771169689Skan REG_NOTES (insn) 7772169689Skan = gen_rtx_EXPR_LIST (REG_EQUIV, in, REG_NOTES (insn)); 7773169689Skan return insn; 7774169689Skan } 777518334Speter 777618334Speter /* If that failed, copy the address register to the reload register. 777750397Sobrien Then add the constant to the reload register. */ 777818334Speter 777950397Sobrien gen_reload (out, op1, opnum, type); 778050397Sobrien insn = emit_insn (gen_add2_insn (out, op0)); 778150397Sobrien REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUIV, in, REG_NOTES (insn)); 778218334Speter } 778318334Speter 778418334Speter#ifdef SECONDARY_MEMORY_NEEDED 778518334Speter /* If we need a memory location to do the move, do it that way. */ 7786169689Skan else if ((REG_P (in) || GET_CODE (in) == SUBREG) 7787117395Skan && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER 7788169689Skan && (REG_P (out) || GET_CODE (out) == SUBREG) 7789117395Skan && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER 7790117395Skan && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)), 7791117395Skan REGNO_REG_CLASS (reg_or_subregno (out)), 779218334Speter GET_MODE (out))) 779318334Speter { 779418334Speter /* Get the memory to use and rewrite both registers to its mode. */ 779518334Speter rtx loc = get_secondary_mem (in, GET_MODE (out), opnum, type); 779618334Speter 779718334Speter if (GET_MODE (loc) != GET_MODE (out)) 7798117395Skan out = gen_rtx_REG (GET_MODE (loc), REGNO (out)); 779918334Speter 780018334Speter if (GET_MODE (loc) != GET_MODE (in)) 7801117395Skan in = gen_rtx_REG (GET_MODE (loc), REGNO (in)); 780218334Speter 780350397Sobrien gen_reload (loc, in, opnum, type); 780450397Sobrien gen_reload (out, loc, opnum, type); 780518334Speter } 780618334Speter#endif 7807169689Skan else if (REG_P (out) && UNARY_P (in)) 7808169689Skan { 7809169689Skan rtx insn; 7810169689Skan rtx op1; 7811169689Skan rtx out_moded; 7812169689Skan rtx set; 781318334Speter 7814169689Skan op1 = find_replacement (&XEXP (in, 0)); 7815169689Skan if (op1 != XEXP (in, 0)) 7816169689Skan in = gen_rtx_fmt_e (GET_CODE (in), GET_MODE (in), op1); 7817169689Skan 7818169689Skan /* First, try a plain SET. */ 7819169689Skan set = emit_insn_if_valid_for_reload (gen_rtx_SET (VOIDmode, out, in)); 7820169689Skan if (set) 7821169689Skan return set; 7822169689Skan 7823169689Skan /* If that failed, move the inner operand to the reload 7824169689Skan register, and try the same unop with the inner expression 7825169689Skan replaced with the reload register. */ 7826169689Skan 7827169689Skan if (GET_MODE (op1) != GET_MODE (out)) 7828169689Skan out_moded = gen_rtx_REG (GET_MODE (op1), REGNO (out)); 7829169689Skan else 7830169689Skan out_moded = out; 7831169689Skan 7832169689Skan gen_reload (out_moded, op1, opnum, type); 7833169689Skan 7834169689Skan insn 7835169689Skan = gen_rtx_SET (VOIDmode, out, 7836169689Skan gen_rtx_fmt_e (GET_CODE (in), GET_MODE (in), 7837169689Skan out_moded)); 7838169689Skan insn = emit_insn_if_valid_for_reload (insn); 7839169689Skan if (insn) 7840169689Skan { 7841169689Skan REG_NOTES (insn) 7842169689Skan = gen_rtx_EXPR_LIST (REG_EQUIV, in, REG_NOTES (insn)); 7843169689Skan return insn; 7844169689Skan } 7845169689Skan 7846169689Skan fatal_insn ("Failure trying to reload:", set); 7847169689Skan } 784818334Speter /* If IN is a simple operand, use gen_move_insn. */ 7849169689Skan else if (OBJECT_P (in) || GET_CODE (in) == SUBREG) 7850169689Skan { 7851169689Skan tem = emit_insn (gen_move_insn (out, in)); 7852169689Skan /* IN may contain a LABEL_REF, if so add a REG_LABEL note. */ 7853169689Skan mark_jump_label (in, tem, 0); 7854169689Skan } 785518334Speter 785618334Speter#ifdef HAVE_reload_load_address 785718334Speter else if (HAVE_reload_load_address) 785818334Speter emit_insn (gen_reload_load_address (out, in)); 785918334Speter#endif 786018334Speter 786118334Speter /* Otherwise, just write (set OUT IN) and hope for the best. */ 786218334Speter else 786350397Sobrien emit_insn (gen_rtx_SET (VOIDmode, out, in)); 786418334Speter 786518334Speter /* Return the first insn emitted. 786618334Speter We can not just return get_last_insn, because there may have 786718334Speter been multiple instructions emitted. Also note that gen_move_insn may 786818334Speter emit more than one insn itself, so we can not assume that there is one 786918334Speter insn emitted per emit_insn_before call. */ 787018334Speter 787118334Speter return last ? NEXT_INSN (last) : get_insns (); 787218334Speter} 787318334Speter 787490075Sobrien/* Delete a previously made output-reload whose result we now believe 787590075Sobrien is not needed. First we double-check. 787618334Speter 787718334Speter INSN is the insn now being processed. 787852284Sobrien LAST_RELOAD_REG is the hard register number for which we want to delete 787952284Sobrien the last output reload. 788052284Sobrien J is the reload-number that originally used REG. The caller has made 788152284Sobrien certain that reload J doesn't use REG any longer for input. */ 788218334Speter 788318334Speterstatic void 7884132718Skandelete_output_reload (rtx insn, int j, int last_reload_reg) 788518334Speter{ 788652284Sobrien rtx output_reload_insn = spill_reg_store[last_reload_reg]; 788752284Sobrien rtx reg = spill_reg_stored_to[last_reload_reg]; 788852284Sobrien int k; 788952284Sobrien int n_occurrences; 789052284Sobrien int n_inherited = 0; 789190075Sobrien rtx i1; 789252284Sobrien rtx substed; 789390075Sobrien 7894104752Skan /* It is possible that this reload has been only used to set another reload 7895104752Skan we eliminated earlier and thus deleted this instruction too. */ 7896104752Skan if (INSN_DELETED_P (output_reload_insn)) 7897104752Skan return; 7898104752Skan 789918334Speter /* Get the raw pseudo-register referred to. */ 790018334Speter 790118334Speter while (GET_CODE (reg) == SUBREG) 790218334Speter reg = SUBREG_REG (reg); 790352284Sobrien substed = reg_equiv_memory_loc[REGNO (reg)]; 790418334Speter 790552284Sobrien /* This is unsafe if the operand occurs more often in the current 790652284Sobrien insn than it is inherited. */ 790752284Sobrien for (k = n_reloads - 1; k >= 0; k--) 790852284Sobrien { 790990075Sobrien rtx reg2 = rld[k].in; 791052284Sobrien if (! reg2) 791152284Sobrien continue; 7912169689Skan if (MEM_P (reg2) || reload_override_in[k]) 791390075Sobrien reg2 = rld[k].in_reg; 791452284Sobrien#ifdef AUTO_INC_DEC 791590075Sobrien if (rld[k].out && ! rld[k].out_reg) 791690075Sobrien reg2 = XEXP (rld[k].in_reg, 0); 791752284Sobrien#endif 791852284Sobrien while (GET_CODE (reg2) == SUBREG) 791952284Sobrien reg2 = SUBREG_REG (reg2); 792052284Sobrien if (rtx_equal_p (reg2, reg)) 792152284Sobrien { 792252284Sobrien if (reload_inherited[k] || reload_override_in[k] || k == j) 792352284Sobrien { 792452284Sobrien n_inherited++; 792590075Sobrien reg2 = rld[k].out_reg; 792652284Sobrien if (! reg2) 792752284Sobrien continue; 792852284Sobrien while (GET_CODE (reg2) == SUBREG) 792952284Sobrien reg2 = XEXP (reg2, 0); 793052284Sobrien if (rtx_equal_p (reg2, reg)) 793152284Sobrien n_inherited++; 793252284Sobrien } 793352284Sobrien else 793452284Sobrien return; 793552284Sobrien } 793652284Sobrien } 793790075Sobrien n_occurrences = count_occurrences (PATTERN (insn), reg, 0); 793852284Sobrien if (substed) 793990075Sobrien n_occurrences += count_occurrences (PATTERN (insn), 794090075Sobrien eliminate_regs (substed, 0, 794190075Sobrien NULL_RTX), 0); 7942169689Skan for (i1 = reg_equiv_alt_mem_list [REGNO (reg)]; i1; i1 = XEXP (i1, 1)) 7943169689Skan { 7944169689Skan gcc_assert (!rtx_equal_p (XEXP (i1, 0), substed)); 7945169689Skan n_occurrences += count_occurrences (PATTERN (insn), XEXP (i1, 0), 0); 7946169689Skan } 794752284Sobrien if (n_occurrences > n_inherited) 794852284Sobrien return; 794952284Sobrien 795018334Speter /* If the pseudo-reg we are reloading is no longer referenced 795118334Speter anywhere between the store into it and here, 7952169689Skan and we're within the same basic block, then the value can only 7953169689Skan pass through the reload reg and end up here. 795418334Speter Otherwise, give up--return. */ 795518334Speter for (i1 = NEXT_INSN (output_reload_insn); 795618334Speter i1 != insn; i1 = NEXT_INSN (i1)) 795718334Speter { 7958169689Skan if (NOTE_INSN_BASIC_BLOCK_P (i1)) 795918334Speter return; 7960169689Skan if ((NONJUMP_INSN_P (i1) || CALL_P (i1)) 796118334Speter && reg_mentioned_p (reg, PATTERN (i1))) 796250397Sobrien { 796352284Sobrien /* If this is USE in front of INSN, we only have to check that 796452284Sobrien there are no more references than accounted for by inheritance. */ 7965169689Skan while (NONJUMP_INSN_P (i1) && GET_CODE (PATTERN (i1)) == USE) 796650397Sobrien { 796752284Sobrien n_occurrences += rtx_equal_p (reg, XEXP (PATTERN (i1), 0)) != 0; 796850397Sobrien i1 = NEXT_INSN (i1); 796950397Sobrien } 797052284Sobrien if (n_occurrences <= n_inherited && i1 == insn) 797150397Sobrien break; 797250397Sobrien return; 797350397Sobrien } 797418334Speter } 797518334Speter 797690075Sobrien /* We will be deleting the insn. Remove the spill reg information. */ 7977169689Skan for (k = hard_regno_nregs[last_reload_reg][GET_MODE (reg)]; k-- > 0; ) 797890075Sobrien { 797990075Sobrien spill_reg_store[last_reload_reg + k] = 0; 798090075Sobrien spill_reg_stored_to[last_reload_reg + k] = 0; 798190075Sobrien } 798290075Sobrien 798350397Sobrien /* The caller has already checked that REG dies or is set in INSN. 798490075Sobrien It has also checked that we are optimizing, and thus some 7985132718Skan inaccuracies in the debugging information are acceptable. 798690075Sobrien So we could just delete output_reload_insn. But in some cases 798790075Sobrien we can improve the debugging information without sacrificing 798890075Sobrien optimization - maybe even improving the code: See if the pseudo 798990075Sobrien reg has been completely replaced with reload regs. If so, delete 799090075Sobrien the store insn and forget we had a stack slot for the pseudo. */ 799190075Sobrien if (rld[j].out != rld[j].in 799250397Sobrien && REG_N_DEATHS (REGNO (reg)) == 1 799352284Sobrien && REG_N_SETS (REGNO (reg)) == 1 799450397Sobrien && REG_BASIC_BLOCK (REGNO (reg)) >= 0 799550397Sobrien && find_regno_note (insn, REG_DEAD, REGNO (reg))) 799618334Speter { 799718334Speter rtx i2; 799818334Speter 799990075Sobrien /* We know that it was used only between here and the beginning of 800090075Sobrien the current basic block. (We also know that the last use before 800190075Sobrien INSN was the output reload we are thinking of deleting, but never 800290075Sobrien mind that.) Search that range; see if any ref remains. */ 800318334Speter for (i2 = PREV_INSN (insn); i2; i2 = PREV_INSN (i2)) 800418334Speter { 800518334Speter rtx set = single_set (i2); 800618334Speter 800718334Speter /* Uses which just store in the pseudo don't count, 800818334Speter since if they are the only uses, they are dead. */ 800918334Speter if (set != 0 && SET_DEST (set) == reg) 801018334Speter continue; 8011169689Skan if (LABEL_P (i2) 8012169689Skan || JUMP_P (i2)) 801318334Speter break; 8014169689Skan if ((NONJUMP_INSN_P (i2) || CALL_P (i2)) 801518334Speter && reg_mentioned_p (reg, PATTERN (i2))) 801650397Sobrien { 801750397Sobrien /* Some other ref remains; just delete the output reload we 801850397Sobrien know to be dead. */ 801952284Sobrien delete_address_reloads (output_reload_insn, insn); 802090075Sobrien delete_insn (output_reload_insn); 802150397Sobrien return; 802250397Sobrien } 802318334Speter } 802418334Speter 802590075Sobrien /* Delete the now-dead stores into this pseudo. Note that this 802690075Sobrien loop also takes care of deleting output_reload_insn. */ 802718334Speter for (i2 = PREV_INSN (insn); i2; i2 = PREV_INSN (i2)) 802818334Speter { 802918334Speter rtx set = single_set (i2); 803018334Speter 803118334Speter if (set != 0 && SET_DEST (set) == reg) 803250397Sobrien { 803352284Sobrien delete_address_reloads (i2, insn); 803490075Sobrien delete_insn (i2); 803550397Sobrien } 8036169689Skan if (LABEL_P (i2) 8037169689Skan || JUMP_P (i2)) 803818334Speter break; 803918334Speter } 804018334Speter 804190075Sobrien /* For the debugging info, say the pseudo lives in this reload reg. */ 804290075Sobrien reg_renumber[REGNO (reg)] = REGNO (rld[j].reg_rtx); 804318334Speter alter_reg (REGNO (reg), -1); 804418334Speter } 804590075Sobrien else 804690075Sobrien { 804790075Sobrien delete_address_reloads (output_reload_insn, insn); 804890075Sobrien delete_insn (output_reload_insn); 804990075Sobrien } 805018334Speter} 805152284Sobrien 805252284Sobrien/* We are going to delete DEAD_INSN. Recursively delete loads of 805352284Sobrien reload registers used in DEAD_INSN that are not used till CURRENT_INSN. 805452284Sobrien CURRENT_INSN is being reloaded, so we have to check its reloads too. */ 805552284Sobrienstatic void 8056132718Skandelete_address_reloads (rtx dead_insn, rtx current_insn) 805752284Sobrien{ 805852284Sobrien rtx set = single_set (dead_insn); 805952284Sobrien rtx set2, dst, prev, next; 806052284Sobrien if (set) 806152284Sobrien { 806252284Sobrien rtx dst = SET_DEST (set); 8063169689Skan if (MEM_P (dst)) 806452284Sobrien delete_address_reloads_1 (dead_insn, XEXP (dst, 0), current_insn); 806552284Sobrien } 806652284Sobrien /* If we deleted the store from a reloaded post_{in,de}c expression, 806752284Sobrien we can delete the matching adds. */ 806852284Sobrien prev = PREV_INSN (dead_insn); 806952284Sobrien next = NEXT_INSN (dead_insn); 807052284Sobrien if (! prev || ! next) 807152284Sobrien return; 807252284Sobrien set = single_set (next); 807352284Sobrien set2 = single_set (prev); 807452284Sobrien if (! set || ! set2 807552284Sobrien || GET_CODE (SET_SRC (set)) != PLUS || GET_CODE (SET_SRC (set2)) != PLUS 807652284Sobrien || GET_CODE (XEXP (SET_SRC (set), 1)) != CONST_INT 807752284Sobrien || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT) 807852284Sobrien return; 807952284Sobrien dst = SET_DEST (set); 808052284Sobrien if (! rtx_equal_p (dst, SET_DEST (set2)) 808152284Sobrien || ! rtx_equal_p (dst, XEXP (SET_SRC (set), 0)) 808252284Sobrien || ! rtx_equal_p (dst, XEXP (SET_SRC (set2), 0)) 808352284Sobrien || (INTVAL (XEXP (SET_SRC (set), 1)) 808490075Sobrien != -INTVAL (XEXP (SET_SRC (set2), 1)))) 808552284Sobrien return; 808690075Sobrien delete_related_insns (prev); 808790075Sobrien delete_related_insns (next); 808852284Sobrien} 808952284Sobrien 809052284Sobrien/* Subfunction of delete_address_reloads: process registers found in X. */ 809152284Sobrienstatic void 8092132718Skandelete_address_reloads_1 (rtx dead_insn, rtx x, rtx current_insn) 809352284Sobrien{ 809452284Sobrien rtx prev, set, dst, i2; 809552284Sobrien int i, j; 809652284Sobrien enum rtx_code code = GET_CODE (x); 809752284Sobrien 809852284Sobrien if (code != REG) 809952284Sobrien { 810090075Sobrien const char *fmt = GET_RTX_FORMAT (code); 810152284Sobrien for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 810252284Sobrien { 810352284Sobrien if (fmt[i] == 'e') 810452284Sobrien delete_address_reloads_1 (dead_insn, XEXP (x, i), current_insn); 810552284Sobrien else if (fmt[i] == 'E') 810652284Sobrien { 810790075Sobrien for (j = XVECLEN (x, i) - 1; j >= 0; j--) 810852284Sobrien delete_address_reloads_1 (dead_insn, XVECEXP (x, i, j), 810952284Sobrien current_insn); 811052284Sobrien } 811152284Sobrien } 811252284Sobrien return; 811352284Sobrien } 811452284Sobrien 811552284Sobrien if (spill_reg_order[REGNO (x)] < 0) 811652284Sobrien return; 811752284Sobrien 811852284Sobrien /* Scan backwards for the insn that sets x. This might be a way back due 811952284Sobrien to inheritance. */ 812052284Sobrien for (prev = PREV_INSN (dead_insn); prev; prev = PREV_INSN (prev)) 812152284Sobrien { 812252284Sobrien code = GET_CODE (prev); 812352284Sobrien if (code == CODE_LABEL || code == JUMP_INSN) 812452284Sobrien return; 8125169689Skan if (!INSN_P (prev)) 812652284Sobrien continue; 812752284Sobrien if (reg_set_p (x, PATTERN (prev))) 812852284Sobrien break; 812952284Sobrien if (reg_referenced_p (x, PATTERN (prev))) 813052284Sobrien return; 813152284Sobrien } 813252284Sobrien if (! prev || INSN_UID (prev) < reload_first_uid) 813352284Sobrien return; 813452284Sobrien /* Check that PREV only sets the reload register. */ 813552284Sobrien set = single_set (prev); 813652284Sobrien if (! set) 813752284Sobrien return; 813852284Sobrien dst = SET_DEST (set); 8139169689Skan if (!REG_P (dst) 814052284Sobrien || ! rtx_equal_p (dst, x)) 814152284Sobrien return; 814252284Sobrien if (! reg_set_p (dst, PATTERN (dead_insn))) 814352284Sobrien { 814452284Sobrien /* Check if DST was used in a later insn - 814552284Sobrien it might have been inherited. */ 814652284Sobrien for (i2 = NEXT_INSN (dead_insn); i2; i2 = NEXT_INSN (i2)) 814752284Sobrien { 8148169689Skan if (LABEL_P (i2)) 814952284Sobrien break; 815090075Sobrien if (! INSN_P (i2)) 815152284Sobrien continue; 815252284Sobrien if (reg_referenced_p (dst, PATTERN (i2))) 815352284Sobrien { 815452284Sobrien /* If there is a reference to the register in the current insn, 815552284Sobrien it might be loaded in a non-inherited reload. If no other 815652284Sobrien reload uses it, that means the register is set before 815752284Sobrien referenced. */ 815852284Sobrien if (i2 == current_insn) 815952284Sobrien { 816052284Sobrien for (j = n_reloads - 1; j >= 0; j--) 816190075Sobrien if ((rld[j].reg_rtx == dst && reload_inherited[j]) 816252284Sobrien || reload_override_in[j] == dst) 816352284Sobrien return; 816452284Sobrien for (j = n_reloads - 1; j >= 0; j--) 816590075Sobrien if (rld[j].in && rld[j].reg_rtx == dst) 816652284Sobrien break; 816752284Sobrien if (j >= 0) 816852284Sobrien break; 816952284Sobrien } 817052284Sobrien return; 817152284Sobrien } 8172169689Skan if (JUMP_P (i2)) 817352284Sobrien break; 817452284Sobrien /* If DST is still live at CURRENT_INSN, check if it is used for 817552284Sobrien any reload. Note that even if CURRENT_INSN sets DST, we still 817652284Sobrien have to check the reloads. */ 817752284Sobrien if (i2 == current_insn) 817852284Sobrien { 817952284Sobrien for (j = n_reloads - 1; j >= 0; j--) 818090075Sobrien if ((rld[j].reg_rtx == dst && reload_inherited[j]) 818152284Sobrien || reload_override_in[j] == dst) 818252284Sobrien return; 818352284Sobrien /* ??? We can't finish the loop here, because dst might be 818452284Sobrien allocated to a pseudo in this block if no reload in this 8185132718Skan block needs any of the classes containing DST - see 818652284Sobrien spill_hard_reg. There is no easy way to tell this, so we 818752284Sobrien have to scan till the end of the basic block. */ 818852284Sobrien } 818952284Sobrien if (reg_set_p (dst, PATTERN (i2))) 819052284Sobrien break; 819152284Sobrien } 819252284Sobrien } 819352284Sobrien delete_address_reloads_1 (prev, SET_SRC (set), current_insn); 819452284Sobrien reg_reloaded_contents[REGNO (dst)] = -1; 819590075Sobrien delete_insn (prev); 819652284Sobrien} 819718334Speter 819818334Speter/* Output reload-insns to reload VALUE into RELOADREG. 819918334Speter VALUE is an autoincrement or autodecrement RTX whose operand 820018334Speter is a register or memory location; 820118334Speter so reloading involves incrementing that location. 820252284Sobrien IN is either identical to VALUE, or some cheaper place to reload from. 820318334Speter 820418334Speter INC_AMOUNT is the number to increment or decrement by (always positive). 820552284Sobrien This cannot be deduced from VALUE. 820618334Speter 820752284Sobrien Return the instruction that stores into RELOADREG. */ 820852284Sobrien 820952284Sobrienstatic rtx 8210132718Skaninc_for_reload (rtx reloadreg, rtx in, rtx value, int inc_amount) 821118334Speter{ 821218334Speter /* REG or MEM to be copied and incremented. */ 8213169689Skan rtx incloc = find_replacement (&XEXP (value, 0)); 821418334Speter /* Nonzero if increment after copying. */ 8215169689Skan int post = (GET_CODE (value) == POST_DEC || GET_CODE (value) == POST_INC 8216169689Skan || GET_CODE (value) == POST_MODIFY); 821718334Speter rtx last; 821818334Speter rtx inc; 821918334Speter rtx add_insn; 822018334Speter int code; 822152284Sobrien rtx store; 8222169689Skan rtx real_in = in == value ? incloc : in; 822318334Speter 822418334Speter /* No hard register is equivalent to this register after 8225117395Skan inc/dec operation. If REG_LAST_RELOAD_REG were nonzero, 822618334Speter we could inc/dec that register as well (maybe even using it for 822718334Speter the source), but I'm not sure it's worth worrying about. */ 8228169689Skan if (REG_P (incloc)) 822918334Speter reg_last_reload_reg[REGNO (incloc)] = 0; 823018334Speter 8231169689Skan if (GET_CODE (value) == PRE_MODIFY || GET_CODE (value) == POST_MODIFY) 8232169689Skan { 8233169689Skan gcc_assert (GET_CODE (XEXP (value, 1)) == PLUS); 8234169689Skan inc = find_replacement (&XEXP (XEXP (value, 1), 1)); 8235169689Skan } 8236169689Skan else 8237169689Skan { 8238169689Skan if (GET_CODE (value) == PRE_DEC || GET_CODE (value) == POST_DEC) 8239169689Skan inc_amount = -inc_amount; 824018334Speter 8241169689Skan inc = GEN_INT (inc_amount); 8242169689Skan } 824318334Speter 824418334Speter /* If this is post-increment, first copy the location to the reload reg. */ 824552284Sobrien if (post && real_in != reloadreg) 824652284Sobrien emit_insn (gen_move_insn (reloadreg, real_in)); 824718334Speter 824852284Sobrien if (in == value) 824952284Sobrien { 825052284Sobrien /* See if we can directly increment INCLOC. Use a method similar to 825152284Sobrien that in gen_reload. */ 825218334Speter 825352284Sobrien last = get_last_insn (); 825452284Sobrien add_insn = emit_insn (gen_rtx_SET (VOIDmode, incloc, 825552284Sobrien gen_rtx_PLUS (GET_MODE (incloc), 825652284Sobrien incloc, inc))); 825790075Sobrien 825852284Sobrien code = recog_memoized (add_insn); 825952284Sobrien if (code >= 0) 826018334Speter { 826152284Sobrien extract_insn (add_insn); 826252284Sobrien if (constrain_operands (1)) 826352284Sobrien { 826452284Sobrien /* If this is a pre-increment and we have incremented the value 826552284Sobrien where it lives, copy the incremented value to RELOADREG to 826652284Sobrien be used as an address. */ 826718334Speter 826852284Sobrien if (! post) 826952284Sobrien emit_insn (gen_move_insn (reloadreg, incloc)); 827018334Speter 827152284Sobrien return add_insn; 827252284Sobrien } 827318334Speter } 827452284Sobrien delete_insns_since (last); 827518334Speter } 827618334Speter 827718334Speter /* If couldn't do the increment directly, must increment in RELOADREG. 827818334Speter The way we do this depends on whether this is pre- or post-increment. 827918334Speter For pre-increment, copy INCLOC to the reload register, increment it 828018334Speter there, then save back. */ 828118334Speter 828218334Speter if (! post) 828318334Speter { 828452284Sobrien if (in != reloadreg) 828552284Sobrien emit_insn (gen_move_insn (reloadreg, real_in)); 828618334Speter emit_insn (gen_add2_insn (reloadreg, inc)); 828752284Sobrien store = emit_insn (gen_move_insn (incloc, reloadreg)); 828818334Speter } 828918334Speter else 829018334Speter { 829118334Speter /* Postincrement. 829218334Speter Because this might be a jump insn or a compare, and because RELOADREG 829318334Speter may not be available after the insn in an input reload, we must do 829418334Speter the incrementation before the insn being reloaded for. 829518334Speter 829652284Sobrien We have already copied IN to RELOADREG. Increment the copy in 829718334Speter RELOADREG, save that back, then decrement RELOADREG so it has 829818334Speter the original value. */ 829918334Speter 830018334Speter emit_insn (gen_add2_insn (reloadreg, inc)); 830152284Sobrien store = emit_insn (gen_move_insn (incloc, reloadreg)); 8302169689Skan if (GET_CODE (inc) == CONST_INT) 8303169689Skan emit_insn (gen_add2_insn (reloadreg, GEN_INT (-INTVAL(inc)))); 8304169689Skan else 8305169689Skan emit_insn (gen_sub2_insn (reloadreg, inc)); 830618334Speter } 830718334Speter 830852284Sobrien return store; 830918334Speter} 831018334Speter 831152284Sobrien#ifdef AUTO_INC_DEC 831252284Sobrienstatic void 8313132718Skanadd_auto_inc_notes (rtx insn, rtx x) 831452284Sobrien{ 831552284Sobrien enum rtx_code code = GET_CODE (x); 831690075Sobrien const char *fmt; 831752284Sobrien int i, j; 831852284Sobrien 831952284Sobrien if (code == MEM && auto_inc_p (XEXP (x, 0))) 832052284Sobrien { 832152284Sobrien REG_NOTES (insn) 832252284Sobrien = gen_rtx_EXPR_LIST (REG_INC, XEXP (XEXP (x, 0), 0), REG_NOTES (insn)); 832352284Sobrien return; 832452284Sobrien } 832552284Sobrien 832652284Sobrien /* Scan all the operand sub-expressions. */ 832752284Sobrien fmt = GET_RTX_FORMAT (code); 832852284Sobrien for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 832952284Sobrien { 833052284Sobrien if (fmt[i] == 'e') 833152284Sobrien add_auto_inc_notes (insn, XEXP (x, i)); 833252284Sobrien else if (fmt[i] == 'E') 833352284Sobrien for (j = XVECLEN (x, i) - 1; j >= 0; j--) 833452284Sobrien add_auto_inc_notes (insn, XVECEXP (x, i, j)); 833552284Sobrien } 833652284Sobrien} 833752284Sobrien#endif 833890075Sobrien 833990075Sobrien/* Copy EH notes from an insn to its reloads. */ 834090075Sobrienstatic void 8341132718Skancopy_eh_notes (rtx insn, rtx x) 834290075Sobrien{ 834390075Sobrien rtx eh_note = find_reg_note (insn, REG_EH_REGION, NULL_RTX); 834490075Sobrien if (eh_note) 834590075Sobrien { 834690075Sobrien for (; x != 0; x = NEXT_INSN (x)) 834790075Sobrien { 834890075Sobrien if (may_trap_p (PATTERN (x))) 8349117395Skan REG_NOTES (x) 835090075Sobrien = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (eh_note, 0), 835190075Sobrien REG_NOTES (x)); 835290075Sobrien } 835390075Sobrien } 835490075Sobrien} 835590075Sobrien 835690075Sobrien/* This is used by reload pass, that does emit some instructions after 835790075Sobrien abnormal calls moving basic block end, but in fact it wants to emit 835890075Sobrien them on the edge. Looks for abnormal call edges, find backward the 835990075Sobrien proper call and fix the damage. 8360117395Skan 836190075Sobrien Similar handle instructions throwing exceptions internally. */ 836296263Sobrienvoid 8363132718Skanfixup_abnormal_edges (void) 836490075Sobrien{ 836590075Sobrien bool inserted = false; 8366117395Skan basic_block bb; 836790075Sobrien 8368117395Skan FOR_EACH_BB (bb) 836990075Sobrien { 837090075Sobrien edge e; 8371169689Skan edge_iterator ei; 837290075Sobrien 8373117395Skan /* Look for cases we are interested in - calls or instructions causing 837490075Sobrien exceptions. */ 8375169689Skan FOR_EACH_EDGE (e, ei, bb->succs) 837690075Sobrien { 837790075Sobrien if (e->flags & EDGE_ABNORMAL_CALL) 837890075Sobrien break; 837990075Sobrien if ((e->flags & (EDGE_ABNORMAL | EDGE_EH)) 838090075Sobrien == (EDGE_ABNORMAL | EDGE_EH)) 838190075Sobrien break; 838290075Sobrien } 8383169689Skan if (e && !CALL_P (BB_END (bb)) 8384132718Skan && !can_throw_internal (BB_END (bb))) 838590075Sobrien { 8386169689Skan rtx insn; 8387169689Skan 8388169689Skan /* Get past the new insns generated. Allow notes, as the insns 8389169689Skan may be already deleted. */ 8390169689Skan insn = BB_END (bb); 8391169689Skan while ((NONJUMP_INSN_P (insn) || NOTE_P (insn)) 839290075Sobrien && !can_throw_internal (insn) 8393132718Skan && insn != BB_HEAD (bb)) 839490075Sobrien insn = PREV_INSN (insn); 8395169689Skan 8396169689Skan if (CALL_P (insn) || can_throw_internal (insn)) 839790075Sobrien { 8398169689Skan rtx stop, next; 8399169689Skan 8400169689Skan stop = NEXT_INSN (BB_END (bb)); 8401169689Skan BB_END (bb) = insn; 8402169689Skan insn = NEXT_INSN (insn); 8403169689Skan 8404169689Skan FOR_EACH_EDGE (e, ei, bb->succs) 8405169689Skan if (e->flags & EDGE_FALLTHRU) 8406169689Skan break; 8407169689Skan 8408169689Skan while (insn && insn != stop) 840990075Sobrien { 8410169689Skan next = NEXT_INSN (insn); 8411169689Skan if (INSN_P (insn)) 8412117395Skan { 8413169689Skan delete_insn (insn); 841496263Sobrien 8415169689Skan /* Sometimes there's still the return value USE. 8416169689Skan If it's placed after a trapping call (i.e. that 8417169689Skan call is the last insn anyway), we have no fallthru 8418169689Skan edge. Simply delete this use and don't try to insert 8419169689Skan on the non-existent edge. */ 8420169689Skan if (GET_CODE (PATTERN (insn)) != USE) 8421169689Skan { 8422169689Skan /* We're not deleting it, we're moving it. */ 8423169689Skan INSN_DELETED_P (insn) = 0; 8424169689Skan PREV_INSN (insn) = NULL_RTX; 8425169689Skan NEXT_INSN (insn) = NULL_RTX; 8426169689Skan 8427169689Skan insert_insn_on_edge (insn, e); 8428169689Skan inserted = true; 8429169689Skan } 8430117395Skan } 8431169689Skan insn = next; 843290075Sobrien } 843390075Sobrien } 8434169689Skan 8435169689Skan /* It may be that we don't find any such trapping insn. In this 8436169689Skan case we discovered quite late that the insn that had been 8437169689Skan marked as can_throw_internal in fact couldn't trap at all. 8438169689Skan So we should in fact delete the EH edges out of the block. */ 8439169689Skan else 8440169689Skan purge_dead_edges (bb); 844190075Sobrien } 844290075Sobrien } 8443169689Skan 8444132718Skan /* We've possibly turned single trapping insn into multiple ones. */ 8445132718Skan if (flag_non_call_exceptions) 8446132718Skan { 8447132718Skan sbitmap blocks; 8448132718Skan blocks = sbitmap_alloc (last_basic_block); 8449132718Skan sbitmap_ones (blocks); 8450132718Skan find_many_sub_basic_blocks (blocks); 8451132718Skan } 8452169689Skan 845390075Sobrien if (inserted) 845490075Sobrien commit_edge_insertions (); 8455169689Skan 8456169689Skan#ifdef ENABLE_CHECKING 8457169689Skan /* Verify that we didn't turn one trapping insn into many, and that 8458169689Skan we found and corrected all of the problems wrt fixups on the 8459169689Skan fallthru edge. */ 8460169689Skan verify_flow_info (); 8461169689Skan#endif 846290075Sobrien} 8463