118334Speter/* Compute register class preferences for pseudo-registers. 290075Sobrien Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996 3169689Skan 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 4169689Skan Free Software Foundation, Inc. 518334Speter 690075SobrienThis file is part of GCC. 718334Speter 890075SobrienGCC is free software; you can redistribute it and/or modify it under 990075Sobrienthe terms of the GNU General Public License as published by the Free 1090075SobrienSoftware Foundation; either version 2, or (at your option) any later 1190075Sobrienversion. 1218334Speter 1390075SobrienGCC is distributed in the hope that it will be useful, but WITHOUT ANY 1490075SobrienWARRANTY; without even the implied warranty of MERCHANTABILITY or 1590075SobrienFITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 1690075Sobrienfor more details. 1718334Speter 1818334SpeterYou should have received a copy of the GNU General Public License 1990075Sobrienalong with GCC; see the file COPYING. If not, write to the Free 20169689SkanSoftware Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 21169689Skan02110-1301, USA. */ 2218334Speter 2318334Speter 2418334Speter/* This file contains two passes of the compiler: reg_scan and reg_class. 2518334Speter It also defines some tables of information about the hardware registers 2618334Speter and a function init_reg_sets to initialize the tables. */ 2718334Speter 2818334Speter#include "config.h" 2950397Sobrien#include "system.h" 30132718Skan#include "coretypes.h" 31132718Skan#include "tm.h" 32117395Skan#include "hard-reg-set.h" 3318334Speter#include "rtl.h" 3490075Sobrien#include "expr.h" 3590075Sobrien#include "tm_p.h" 3618334Speter#include "flags.h" 3718334Speter#include "basic-block.h" 3818334Speter#include "regs.h" 39169689Skan#include "addresses.h" 4090075Sobrien#include "function.h" 4118334Speter#include "insn-config.h" 4218334Speter#include "recog.h" 4318334Speter#include "reload.h" 4418334Speter#include "real.h" 4550397Sobrien#include "toplev.h" 4650397Sobrien#include "output.h" 4790075Sobrien#include "ggc.h" 48132718Skan#include "timevar.h" 49146895Skan#include "hashtab.h" 50169689Skan#include "target.h" 5118334Speter 52132718Skanstatic void init_reg_sets_1 (void); 53132718Skanstatic void init_reg_autoinc (void); 5418334Speter 5518334Speter/* If we have auto-increment or auto-decrement and we can have secondary 5618334Speter reloads, we are not allowed to use classes requiring secondary 5718334Speter reloads for pseudos auto-incremented since reload can't handle it. */ 58169689Skan/* We leave it to target hooks to decide if we have secondary reloads, so 59169689Skan assume that we might have them. */ 60169689Skan#if defined(AUTO_INC_DEC) /* */ 6118334Speter#define FORBIDDEN_INC_DEC_CLASSES 6218334Speter#endif 6318334Speter 6418334Speter/* Register tables used by many passes. */ 6518334Speter 6618334Speter/* Indexed by hard register number, contains 1 for registers 6718334Speter that are fixed use (stack pointer, pc, frame pointer, etc.). 6818334Speter These are the registers that cannot be used to allocate 6952284Sobrien a pseudo reg for general use. */ 7018334Speter 7118334Speterchar fixed_regs[FIRST_PSEUDO_REGISTER]; 7218334Speter 7318334Speter/* Same info as a HARD_REG_SET. */ 7418334Speter 7518334SpeterHARD_REG_SET fixed_reg_set; 7618334Speter 7718334Speter/* Data for initializing the above. */ 7818334Speter 7990075Sobrienstatic const char initial_fixed_regs[] = FIXED_REGISTERS; 8018334Speter 8118334Speter/* Indexed by hard register number, contains 1 for registers 8218334Speter that are fixed use or are clobbered by function calls. 8318334Speter These are the registers that cannot be used to allocate 8452284Sobrien a pseudo reg whose life crosses calls unless we are able 8552284Sobrien to save/restore them across the calls. */ 8618334Speter 8718334Speterchar call_used_regs[FIRST_PSEUDO_REGISTER]; 8818334Speter 8918334Speter/* Same info as a HARD_REG_SET. */ 9018334Speter 9118334SpeterHARD_REG_SET call_used_reg_set; 9218334Speter 9350397Sobrien/* HARD_REG_SET of registers we want to avoid caller saving. */ 9450397SobrienHARD_REG_SET losing_caller_save_reg_set; 9550397Sobrien 9618334Speter/* Data for initializing the above. */ 9718334Speter 9890075Sobrienstatic const char initial_call_used_regs[] = CALL_USED_REGISTERS; 9990075Sobrien 10090075Sobrien/* This is much like call_used_regs, except it doesn't have to 10190075Sobrien be a superset of FIXED_REGISTERS. This vector indicates 102117395Skan what is really call clobbered, and is used when defining 10390075Sobrien regs_invalidated_by_call. */ 10490075Sobrien 10590075Sobrien#ifdef CALL_REALLY_USED_REGISTERS 10690075Sobrienchar call_really_used_regs[] = CALL_REALLY_USED_REGISTERS; 10790075Sobrien#endif 108117395Skan 109146895Skan#ifdef CALL_REALLY_USED_REGISTERS 110146895Skan#define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X] 111146895Skan#else 112146895Skan#define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X] 113146895Skan#endif 114146895Skan 115146895Skan 11618334Speter/* Indexed by hard register number, contains 1 for registers that are 11752284Sobrien fixed use or call used registers that cannot hold quantities across 11852284Sobrien calls even if we are willing to save and restore them. call fixed 11952284Sobrien registers are a subset of call used registers. */ 12018334Speter 12118334Speterchar call_fixed_regs[FIRST_PSEUDO_REGISTER]; 12218334Speter 12318334Speter/* The same info as a HARD_REG_SET. */ 12418334Speter 12518334SpeterHARD_REG_SET call_fixed_reg_set; 12618334Speter 12718334Speter/* Indexed by hard register number, contains 1 for registers 12818334Speter that are being used for global register decls. 12918334Speter These must be exempt from ordinary flow analysis 13018334Speter and are also considered fixed. */ 13118334Speter 13218334Speterchar global_regs[FIRST_PSEUDO_REGISTER]; 13390075Sobrien 13490075Sobrien/* Contains 1 for registers that are set or clobbered by calls. */ 13590075Sobrien/* ??? Ideally, this would be just call_used_regs plus global_regs, but 13690075Sobrien for someone's bright idea to have call_used_regs strictly include 13790075Sobrien fixed_regs. Which leaves us guessing as to the set of fixed_regs 13890075Sobrien that are actually preserved. We know for sure that those associated 13990075Sobrien with the local stack frame are safe, but scant others. */ 14090075Sobrien 14190075SobrienHARD_REG_SET regs_invalidated_by_call; 14290075Sobrien 14318334Speter/* Table of register numbers in the order in which to try to use them. */ 14418334Speter#ifdef REG_ALLOC_ORDER 14518334Speterint reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER; 14690075Sobrien 14790075Sobrien/* The inverse of reg_alloc_order. */ 14890075Sobrienint inv_reg_alloc_order[FIRST_PSEUDO_REGISTER]; 14918334Speter#endif 15018334Speter 15118334Speter/* For each reg class, a HARD_REG_SET saying which registers are in it. */ 15218334Speter 15318334SpeterHARD_REG_SET reg_class_contents[N_REG_CLASSES]; 15418334Speter 15518334Speter/* The same information, but as an array of unsigned ints. We copy from 15618334Speter these unsigned ints to the table above. We do this so the tm.h files 15790075Sobrien do not have to be aware of the wordsize for machines with <= 64 regs. 15890075Sobrien Note that we hard-code 32 here, not HOST_BITS_PER_INT. */ 15918334Speter 16018334Speter#define N_REG_INTS \ 16190075Sobrien ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32) 16218334Speter 163117395Skanstatic const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS] 16418334Speter = REG_CLASS_CONTENTS; 16518334Speter 16618334Speter/* For each reg class, number of regs it contains. */ 16718334Speter 16890075Sobrienunsigned int reg_class_size[N_REG_CLASSES]; 16918334Speter 17018334Speter/* For each reg class, table listing all the containing classes. */ 17118334Speter 172169689Skanstatic enum reg_class reg_class_superclasses[N_REG_CLASSES][N_REG_CLASSES]; 17318334Speter 17418334Speter/* For each reg class, table listing all the classes contained in it. */ 17518334Speter 176169689Skanstatic enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES]; 17718334Speter 17818334Speter/* For each pair of reg classes, 17918334Speter a largest reg class contained in their union. */ 18018334Speter 18118334Speterenum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES]; 18218334Speter 18318334Speter/* For each pair of reg classes, 18418334Speter the smallest reg class containing their union. */ 18518334Speter 18618334Speterenum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES]; 18718334Speter 188132718Skan/* Array containing all of the register names. */ 18918334Speter 19090075Sobrienconst char * reg_names[] = REGISTER_NAMES; 19118334Speter 192169689Skan/* Array containing all of the register class names. */ 193169689Skan 194169689Skanconst char * reg_class_names[] = REG_CLASS_NAMES; 195169689Skan 19618334Speter/* For each hard register, the widest mode object that it can contain. 19718334Speter This will be a MODE_INT mode if the register can hold integers. Otherwise 19818334Speter it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the 19918334Speter register. */ 20018334Speter 20118334Speterenum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER]; 20218334Speter 203169689Skan/* 1 if there is a register of given mode. */ 204169689Skan 205169689Skanbool have_regs_of_mode [MAX_MACHINE_MODE]; 206169689Skan 20790075Sobrien/* 1 if class does contain register of given mode. */ 20890075Sobrien 20990075Sobrienstatic char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE]; 21090075Sobrien 21118334Speter/* Maximum cost of moving from a register in one class to a register in 21218334Speter another class. Based on REGISTER_MOVE_COST. */ 21318334Speter 21490075Sobrienstatic int move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][N_REG_CLASSES]; 21518334Speter 21618334Speter/* Similar, but here we don't have to move if the first index is a subset 21718334Speter of the second so in that case the cost is zero. */ 21818334Speter 21990075Sobrienstatic int may_move_in_cost[MAX_MACHINE_MODE][N_REG_CLASSES][N_REG_CLASSES]; 22018334Speter 22190075Sobrien/* Similar, but here we don't have to move if the first index is a superset 22290075Sobrien of the second so in that case the cost is zero. */ 22390075Sobrien 22490075Sobrienstatic int may_move_out_cost[MAX_MACHINE_MODE][N_REG_CLASSES][N_REG_CLASSES]; 22590075Sobrien 22618334Speter#ifdef FORBIDDEN_INC_DEC_CLASSES 22718334Speter 22818334Speter/* These are the classes that regs which are auto-incremented or decremented 22918334Speter cannot be put in. */ 23018334Speter 23118334Speterstatic int forbidden_inc_dec_class[N_REG_CLASSES]; 23218334Speter 233117395Skan/* Indexed by n, is nonzero if (REG n) is used in an auto-inc or auto-dec 23418334Speter context. */ 23518334Speter 23618334Speterstatic char *in_inc_dec; 23718334Speter 23818334Speter#endif /* FORBIDDEN_INC_DEC_CLASSES */ 23918334Speter 24050397Sobrien/* Sample MEM values for use by memory_move_secondary_cost. */ 24150397Sobrien 242117395Skanstatic GTY(()) rtx top_of_stack[MAX_MACHINE_MODE]; 24350397Sobrien 24450397Sobrien/* Linked list of reg_info structures allocated for reg_n_info array. 24550397Sobrien Grouping all of the allocated structures together in one lump 24650397Sobrien means only one call to bzero to clear them, rather than n smaller 24750397Sobrien calls. */ 24850397Sobrienstruct reg_info_data { 24950397Sobrien struct reg_info_data *next; /* next set of reg_info structures */ 25050397Sobrien size_t min_index; /* minimum index # */ 25150397Sobrien size_t max_index; /* maximum index # */ 252117395Skan char used_p; /* nonzero if this has been used previously */ 25350397Sobrien reg_info data[1]; /* beginning of the reg_info data */ 25450397Sobrien}; 25550397Sobrien 25650397Sobrienstatic struct reg_info_data *reg_info_head; 25750397Sobrien 25890075Sobrien/* No more global register variables may be declared; true once 25990075Sobrien regclass has been initialized. */ 26050397Sobrien 26190075Sobrienstatic int no_global_reg_vars = 0; 26290075Sobrien 263169689Skan/* Specify number of hard registers given machine mode occupy. */ 264169689Skanunsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; 26590075Sobrien 26618334Speter/* Function called only once to initialize the above data on reg usage. 26718334Speter Once this is done, various switches may override. */ 26818334Speter 26918334Spetervoid 270132718Skaninit_reg_sets (void) 27118334Speter{ 27290075Sobrien int i, j; 27318334Speter 27418334Speter /* First copy the register information from the initial int form into 27518334Speter the regsets. */ 27618334Speter 27718334Speter for (i = 0; i < N_REG_CLASSES; i++) 27818334Speter { 27918334Speter CLEAR_HARD_REG_SET (reg_class_contents[i]); 28018334Speter 28190075Sobrien /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */ 28218334Speter for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) 28390075Sobrien if (int_reg_class_contents[i][j / 32] 28490075Sobrien & ((unsigned) 1 << (j % 32))) 28518334Speter SET_HARD_REG_BIT (reg_class_contents[i], j); 28618334Speter } 28718334Speter 288169689Skan /* Sanity check: make sure the target macros FIXED_REGISTERS and 289169689Skan CALL_USED_REGISTERS had the right number of initializers. */ 290169689Skan gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs); 291169689Skan gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs); 292169689Skan 29390075Sobrien memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs); 29490075Sobrien memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs); 29590075Sobrien memset (global_regs, 0, sizeof global_regs); 29618334Speter 29790075Sobrien#ifdef REG_ALLOC_ORDER 29890075Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 29990075Sobrien inv_reg_alloc_order[reg_alloc_order[i]] = i; 30090075Sobrien#endif 30152284Sobrien} 30252284Sobrien 30352284Sobrien/* After switches have been processed, which perhaps alter 30452284Sobrien `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */ 30552284Sobrien 30652284Sobrienstatic void 307132718Skaninit_reg_sets_1 (void) 30852284Sobrien{ 30990075Sobrien unsigned int i, j; 31090075Sobrien unsigned int /* enum machine_mode */ m; 31152284Sobrien 31252284Sobrien /* This macro allows the fixed or call-used registers 31352284Sobrien and the register classes to depend on target flags. */ 31452284Sobrien 31552284Sobrien#ifdef CONDITIONAL_REGISTER_USAGE 31652284Sobrien CONDITIONAL_REGISTER_USAGE; 31752284Sobrien#endif 31852284Sobrien 31918334Speter /* Compute number of hard regs in each class. */ 32018334Speter 321132718Skan memset (reg_class_size, 0, sizeof reg_class_size); 32218334Speter for (i = 0; i < N_REG_CLASSES; i++) 32318334Speter for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) 32418334Speter if (TEST_HARD_REG_BIT (reg_class_contents[i], j)) 32518334Speter reg_class_size[i]++; 32618334Speter 32718334Speter /* Initialize the table of subunions. 32818334Speter reg_class_subunion[I][J] gets the largest-numbered reg-class 32918334Speter that is contained in the union of classes I and J. */ 33018334Speter 33118334Speter for (i = 0; i < N_REG_CLASSES; i++) 33218334Speter { 33318334Speter for (j = 0; j < N_REG_CLASSES; j++) 33418334Speter { 335132718Skan HARD_REG_SET c; 33690075Sobrien int k; 33718334Speter 33818334Speter COPY_HARD_REG_SET (c, reg_class_contents[i]); 33918334Speter IOR_HARD_REG_SET (c, reg_class_contents[j]); 34018334Speter for (k = 0; k < N_REG_CLASSES; k++) 34118334Speter { 34218334Speter GO_IF_HARD_REG_SUBSET (reg_class_contents[k], c, 34318334Speter subclass1); 34418334Speter continue; 34518334Speter 34618334Speter subclass1: 347132718Skan /* Keep the largest subclass. */ /* SPEE 900308 */ 34818334Speter GO_IF_HARD_REG_SUBSET (reg_class_contents[k], 34918334Speter reg_class_contents[(int) reg_class_subunion[i][j]], 35018334Speter subclass2); 35118334Speter reg_class_subunion[i][j] = (enum reg_class) k; 35218334Speter subclass2: 35318334Speter ; 35418334Speter } 35518334Speter } 35618334Speter } 35718334Speter 35818334Speter /* Initialize the table of superunions. 35918334Speter reg_class_superunion[I][J] gets the smallest-numbered reg-class 36018334Speter containing the union of classes I and J. */ 36118334Speter 36218334Speter for (i = 0; i < N_REG_CLASSES; i++) 36318334Speter { 36418334Speter for (j = 0; j < N_REG_CLASSES; j++) 36518334Speter { 366132718Skan HARD_REG_SET c; 36790075Sobrien int k; 36818334Speter 36918334Speter COPY_HARD_REG_SET (c, reg_class_contents[i]); 37018334Speter IOR_HARD_REG_SET (c, reg_class_contents[j]); 37118334Speter for (k = 0; k < N_REG_CLASSES; k++) 37218334Speter GO_IF_HARD_REG_SUBSET (c, reg_class_contents[k], superclass); 37318334Speter 37418334Speter superclass: 37518334Speter reg_class_superunion[i][j] = (enum reg_class) k; 37618334Speter } 37718334Speter } 37818334Speter 37918334Speter /* Initialize the tables of subclasses and superclasses of each reg class. 38018334Speter First clear the whole table, then add the elements as they are found. */ 38118334Speter 38218334Speter for (i = 0; i < N_REG_CLASSES; i++) 38318334Speter { 38418334Speter for (j = 0; j < N_REG_CLASSES; j++) 38518334Speter { 38618334Speter reg_class_superclasses[i][j] = LIM_REG_CLASSES; 38718334Speter reg_class_subclasses[i][j] = LIM_REG_CLASSES; 38818334Speter } 38918334Speter } 39018334Speter 39118334Speter for (i = 0; i < N_REG_CLASSES; i++) 39218334Speter { 39318334Speter if (i == (int) NO_REGS) 39418334Speter continue; 39518334Speter 39618334Speter for (j = i + 1; j < N_REG_CLASSES; j++) 39718334Speter { 39818334Speter enum reg_class *p; 39918334Speter 40018334Speter GO_IF_HARD_REG_SUBSET (reg_class_contents[i], reg_class_contents[j], 40118334Speter subclass); 40218334Speter continue; 40318334Speter subclass: 40418334Speter /* Reg class I is a subclass of J. 40518334Speter Add J to the table of superclasses of I. */ 40618334Speter p = ®_class_superclasses[i][0]; 40718334Speter while (*p != LIM_REG_CLASSES) p++; 40818334Speter *p = (enum reg_class) j; 40918334Speter /* Add I to the table of superclasses of J. */ 41018334Speter p = ®_class_subclasses[j][0]; 41118334Speter while (*p != LIM_REG_CLASSES) p++; 41218334Speter *p = (enum reg_class) i; 41318334Speter } 41418334Speter } 41518334Speter 41618334Speter /* Initialize "constant" tables. */ 41718334Speter 41818334Speter CLEAR_HARD_REG_SET (fixed_reg_set); 41918334Speter CLEAR_HARD_REG_SET (call_used_reg_set); 42018334Speter CLEAR_HARD_REG_SET (call_fixed_reg_set); 42190075Sobrien CLEAR_HARD_REG_SET (regs_invalidated_by_call); 42218334Speter 42390075Sobrien memcpy (call_fixed_regs, fixed_regs, sizeof call_fixed_regs); 42418334Speter 42518334Speter for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 42618334Speter { 427169689Skan /* call_used_regs must include fixed_regs. */ 428169689Skan gcc_assert (!fixed_regs[i] || call_used_regs[i]); 429169689Skan#ifdef CALL_REALLY_USED_REGISTERS 430169689Skan /* call_used_regs must include call_really_used_regs. */ 431169689Skan gcc_assert (!call_really_used_regs[i] || call_used_regs[i]); 432169689Skan#endif 433169689Skan 43418334Speter if (fixed_regs[i]) 43518334Speter SET_HARD_REG_BIT (fixed_reg_set, i); 43618334Speter 43718334Speter if (call_used_regs[i]) 43818334Speter SET_HARD_REG_BIT (call_used_reg_set, i); 43918334Speter if (call_fixed_regs[i]) 44018334Speter SET_HARD_REG_BIT (call_fixed_reg_set, i); 44150397Sobrien if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (i))) 44250397Sobrien SET_HARD_REG_BIT (losing_caller_save_reg_set, i); 44390075Sobrien 44490075Sobrien /* There are a couple of fixed registers that we know are safe to 44590075Sobrien exclude from being clobbered by calls: 44690075Sobrien 44790075Sobrien The frame pointer is always preserved across calls. The arg pointer 44890075Sobrien is if it is fixed. The stack pointer usually is, unless 44990075Sobrien RETURN_POPS_ARGS, in which case an explicit CLOBBER will be present. 45090075Sobrien If we are generating PIC code, the PIC offset table register is 45190075Sobrien preserved across calls, though the target can override that. */ 452117395Skan 453146895Skan if (i == STACK_POINTER_REGNUM) 45490075Sobrien ; 455146895Skan else if (global_regs[i]) 456146895Skan SET_HARD_REG_BIT (regs_invalidated_by_call, i); 457146895Skan else if (i == FRAME_POINTER_REGNUM) 458146895Skan ; 45990075Sobrien#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 46090075Sobrien else if (i == HARD_FRAME_POINTER_REGNUM) 46190075Sobrien ; 46290075Sobrien#endif 46390075Sobrien#if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM 46490075Sobrien else if (i == ARG_POINTER_REGNUM && fixed_regs[i]) 46590075Sobrien ; 46690075Sobrien#endif 46790075Sobrien#ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 468132718Skan else if (i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i]) 46990075Sobrien ; 47090075Sobrien#endif 471146895Skan else if (CALL_REALLY_USED_REGNO_P (i)) 47290075Sobrien SET_HARD_REG_BIT (regs_invalidated_by_call, i); 47318334Speter } 47450397Sobrien 475169689Skan memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode)); 47690075Sobrien memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode)); 47790075Sobrien for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++) 47890075Sobrien for (i = 0; i < N_REG_CLASSES; i++) 479117395Skan if ((unsigned) CLASS_MAX_NREGS (i, m) <= reg_class_size[i]) 48090075Sobrien for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) 48190075Sobrien if (!fixed_regs [j] && TEST_HARD_REG_BIT (reg_class_contents[i], j) 48290075Sobrien && HARD_REGNO_MODE_OK (j, m)) 48390075Sobrien { 48490075Sobrien contains_reg_of_mode [i][m] = 1; 485169689Skan have_regs_of_mode [m] = 1; 48690075Sobrien break; 48790075Sobrien } 48890075Sobrien 48950397Sobrien /* Initialize the move cost table. Find every subset of each class 49050397Sobrien and take the maximum cost of moving any subset to any other. */ 49150397Sobrien 49290075Sobrien for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++) 493169689Skan if (have_regs_of_mode [m]) 49450397Sobrien { 49590075Sobrien for (i = 0; i < N_REG_CLASSES; i++) 49690075Sobrien if (contains_reg_of_mode [i][m]) 49790075Sobrien for (j = 0; j < N_REG_CLASSES; j++) 49890075Sobrien { 49990075Sobrien int cost; 50090075Sobrien enum reg_class *p1, *p2; 50150397Sobrien 50290075Sobrien if (!contains_reg_of_mode [j][m]) 50390075Sobrien { 50490075Sobrien move_cost[m][i][j] = 65536; 50590075Sobrien may_move_in_cost[m][i][j] = 65536; 50690075Sobrien may_move_out_cost[m][i][j] = 65536; 50790075Sobrien } 50890075Sobrien else 50990075Sobrien { 51090075Sobrien cost = REGISTER_MOVE_COST (m, i, j); 51150397Sobrien 51290075Sobrien for (p2 = ®_class_subclasses[j][0]; 51390075Sobrien *p2 != LIM_REG_CLASSES; 51490075Sobrien p2++) 51590075Sobrien if (*p2 != i && contains_reg_of_mode [*p2][m]) 51690075Sobrien cost = MAX (cost, move_cost [m][i][*p2]); 51750397Sobrien 51890075Sobrien for (p1 = ®_class_subclasses[i][0]; 51990075Sobrien *p1 != LIM_REG_CLASSES; 52090075Sobrien p1++) 52190075Sobrien if (*p1 != j && contains_reg_of_mode [*p1][m]) 52290075Sobrien cost = MAX (cost, move_cost [m][*p1][j]); 52350397Sobrien 52490075Sobrien move_cost[m][i][j] = cost; 52550397Sobrien 52690075Sobrien if (reg_class_subset_p (i, j)) 52790075Sobrien may_move_in_cost[m][i][j] = 0; 52890075Sobrien else 52990075Sobrien may_move_in_cost[m][i][j] = cost; 53050397Sobrien 53190075Sobrien if (reg_class_subset_p (j, i)) 53290075Sobrien may_move_out_cost[m][i][j] = 0; 53390075Sobrien else 53490075Sobrien may_move_out_cost[m][i][j] = cost; 53590075Sobrien } 53690075Sobrien } 53790075Sobrien else 53890075Sobrien for (j = 0; j < N_REG_CLASSES; j++) 53990075Sobrien { 54090075Sobrien move_cost[m][i][j] = 65536; 54190075Sobrien may_move_in_cost[m][i][j] = 65536; 54290075Sobrien may_move_out_cost[m][i][j] = 65536; 54390075Sobrien } 54450397Sobrien } 54518334Speter} 54618334Speter 54718334Speter/* Compute the table of register modes. 54818334Speter These values are used to record death information for individual registers 54918334Speter (as opposed to a multi-register mode). */ 55018334Speter 551132718Skanvoid 552132718Skaninit_reg_modes_once (void) 55318334Speter{ 554169689Skan int i, j; 55518334Speter 55618334Speter for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 557169689Skan for (j = 0; j < MAX_MACHINE_MODE; j++) 558169689Skan hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j); 559169689Skan 560169689Skan for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 56118334Speter { 562132718Skan reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false); 56318334Speter 56450397Sobrien /* If we couldn't find a valid mode, just use the previous mode. 56518334Speter ??? One situation in which we need to do this is on the mips where 56618334Speter HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like 56718334Speter to use DF mode for the even registers and VOIDmode for the odd 56818334Speter (for the cpu models where the odd ones are inaccessible). */ 56918334Speter if (reg_raw_mode[i] == VOIDmode) 57050397Sobrien reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1]; 57118334Speter } 57218334Speter} 57318334Speter 57418334Speter/* Finish initializing the register sets and 57518334Speter initialize the register modes. */ 57618334Speter 57718334Spetervoid 578132718Skaninit_regs (void) 57918334Speter{ 58018334Speter /* This finishes what was started by init_reg_sets, but couldn't be done 58118334Speter until after register usage was specified. */ 58250397Sobrien init_reg_sets_1 (); 58318334Speter 584117395Skan init_reg_autoinc (); 585117395Skan} 586117395Skan 587117395Skan/* Initialize some fake stack-frame MEM references for use in 588117395Skan memory_move_secondary_cost. */ 589117395Skan 590117395Skanvoid 591132718Skaninit_fake_stack_mems (void) 592117395Skan{ 59350397Sobrien { 59450397Sobrien int i; 59590075Sobrien 59650397Sobrien for (i = 0; i < MAX_MACHINE_MODE; i++) 59750397Sobrien top_of_stack[i] = gen_rtx_MEM (i, stack_pointer_rtx); 59850397Sobrien } 59918334Speter} 60018334Speter 60150397Sobrien 60250397Sobrien/* Compute extra cost of moving registers to/from memory due to reloads. 60350397Sobrien Only needed if secondary reloads are required for memory moves. */ 60450397Sobrien 60550397Sobrienint 606132718Skanmemory_move_secondary_cost (enum machine_mode mode, enum reg_class class, int in) 60750397Sobrien{ 60850397Sobrien enum reg_class altclass; 60950397Sobrien int partial_cost = 0; 61050397Sobrien /* We need a memory reference to feed to SECONDARY... macros. */ 61190075Sobrien /* mem may be unused even if the SECONDARY_ macros are defined. */ 61290075Sobrien rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode]; 61350397Sobrien 61490075Sobrien 615169689Skan altclass = secondary_reload_class (in ? 1 : 0, class, mode, mem); 61650397Sobrien 61750397Sobrien if (altclass == NO_REGS) 61850397Sobrien return 0; 61950397Sobrien 62050397Sobrien if (in) 62190075Sobrien partial_cost = REGISTER_MOVE_COST (mode, altclass, class); 62250397Sobrien else 62390075Sobrien partial_cost = REGISTER_MOVE_COST (mode, class, altclass); 62450397Sobrien 62550397Sobrien if (class == altclass) 62650397Sobrien /* This isn't simply a copy-to-temporary situation. Can't guess 62750397Sobrien what it is, so MEMORY_MOVE_COST really ought not to be calling 62850397Sobrien here in that case. 62950397Sobrien 630169689Skan I'm tempted to put in an assert here, but returning this will 63150397Sobrien probably only give poor estimates, which is what we would've 63250397Sobrien had before this code anyways. */ 63350397Sobrien return partial_cost; 63450397Sobrien 63550397Sobrien /* Check if the secondary reload register will also need a 63650397Sobrien secondary reload. */ 63750397Sobrien return memory_move_secondary_cost (mode, altclass, in) + partial_cost; 63850397Sobrien} 63950397Sobrien 64018334Speter/* Return a machine mode that is legitimate for hard reg REGNO and large 641132718Skan enough to save nregs. If we can't find one, return VOIDmode. 642132718Skan If CALL_SAVED is true, only consider modes that are call saved. */ 64318334Speter 64418334Speterenum machine_mode 645132718Skanchoose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED, 646132718Skan unsigned int nregs, bool call_saved) 64718334Speter{ 64890075Sobrien unsigned int /* enum machine_mode */ m; 64918334Speter enum machine_mode found_mode = VOIDmode, mode; 65018334Speter 65118334Speter /* We first look for the largest integer mode that can be validly 65218334Speter held in REGNO. If none, we look for the largest floating-point mode. 65318334Speter If we still didn't find a valid mode, try CCmode. */ 65418334Speter 65518334Speter for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); 65618334Speter mode != VOIDmode; 65718334Speter mode = GET_MODE_WIDER_MODE (mode)) 658169689Skan if ((unsigned) hard_regno_nregs[regno][mode] == nregs 659132718Skan && HARD_REGNO_MODE_OK (regno, mode) 660132718Skan && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) 66118334Speter found_mode = mode; 66218334Speter 66318334Speter if (found_mode != VOIDmode) 66418334Speter return found_mode; 66518334Speter 66618334Speter for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); 66718334Speter mode != VOIDmode; 66818334Speter mode = GET_MODE_WIDER_MODE (mode)) 669169689Skan if ((unsigned) hard_regno_nregs[regno][mode] == nregs 670132718Skan && HARD_REGNO_MODE_OK (regno, mode) 671132718Skan && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) 67218334Speter found_mode = mode; 67318334Speter 67418334Speter if (found_mode != VOIDmode) 67518334Speter return found_mode; 67618334Speter 67790075Sobrien for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT); 67890075Sobrien mode != VOIDmode; 67990075Sobrien mode = GET_MODE_WIDER_MODE (mode)) 680169689Skan if ((unsigned) hard_regno_nregs[regno][mode] == nregs 681132718Skan && HARD_REGNO_MODE_OK (regno, mode) 682132718Skan && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) 68390075Sobrien found_mode = mode; 68418334Speter 68590075Sobrien if (found_mode != VOIDmode) 68690075Sobrien return found_mode; 68790075Sobrien 68890075Sobrien for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT); 68990075Sobrien mode != VOIDmode; 69090075Sobrien mode = GET_MODE_WIDER_MODE (mode)) 691169689Skan if ((unsigned) hard_regno_nregs[regno][mode] == nregs 692132718Skan && HARD_REGNO_MODE_OK (regno, mode) 693132718Skan && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) 69490075Sobrien found_mode = mode; 69590075Sobrien 69690075Sobrien if (found_mode != VOIDmode) 69790075Sobrien return found_mode; 69890075Sobrien 69990075Sobrien /* Iterate over all of the CCmodes. */ 70090075Sobrien for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m) 70190075Sobrien { 70290075Sobrien mode = (enum machine_mode) m; 703169689Skan if ((unsigned) hard_regno_nregs[regno][mode] == nregs 704132718Skan && HARD_REGNO_MODE_OK (regno, mode) 705132718Skan && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) 70690075Sobrien return mode; 70790075Sobrien } 70890075Sobrien 70918334Speter /* We can't find a mode valid for this register. */ 71018334Speter return VOIDmode; 71118334Speter} 71218334Speter 71318334Speter/* Specify the usage characteristics of the register named NAME. 71418334Speter It should be a fixed register if FIXED and a 71518334Speter call-used register if CALL_USED. */ 71618334Speter 71718334Spetervoid 718132718Skanfix_register (const char *name, int fixed, int call_used) 71918334Speter{ 72018334Speter int i; 72118334Speter 72218334Speter /* Decode the name and update the primary form of 72318334Speter the register info. */ 72418334Speter 72518334Speter if ((i = decode_reg_name (name)) >= 0) 72618334Speter { 72752284Sobrien if ((i == STACK_POINTER_REGNUM 72852284Sobrien#ifdef HARD_FRAME_POINTER_REGNUM 72952284Sobrien || i == HARD_FRAME_POINTER_REGNUM 73052284Sobrien#else 73152284Sobrien || i == FRAME_POINTER_REGNUM 73252284Sobrien#endif 73352284Sobrien ) 73452284Sobrien && (fixed == 0 || call_used == 0)) 73552284Sobrien { 73690075Sobrien static const char * const what_option[2][2] = { 73752284Sobrien { "call-saved", "call-used" }, 73852284Sobrien { "no-such-option", "fixed" }}; 739117395Skan 740117395Skan error ("can't use '%s' as a %s register", name, 74152284Sobrien what_option[fixed][call_used]); 74252284Sobrien } 74352284Sobrien else 74452284Sobrien { 74552284Sobrien fixed_regs[i] = fixed; 74652284Sobrien call_used_regs[i] = call_used; 74790075Sobrien#ifdef CALL_REALLY_USED_REGISTERS 74890075Sobrien if (fixed == 0) 74990075Sobrien call_really_used_regs[i] = call_used; 75090075Sobrien#endif 75152284Sobrien } 75218334Speter } 75318334Speter else 75418334Speter { 755169689Skan warning (0, "unknown register name: %s", name); 75618334Speter } 75718334Speter} 75818334Speter 75918334Speter/* Mark register number I as global. */ 76018334Speter 76118334Spetervoid 762132718Skanglobalize_reg (int i) 76318334Speter{ 76490075Sobrien if (fixed_regs[i] == 0 && no_global_reg_vars) 76590075Sobrien error ("global register variable follows a function definition"); 76690075Sobrien 76718334Speter if (global_regs[i]) 76818334Speter { 769169689Skan warning (0, "register used for two global register variables"); 77018334Speter return; 77118334Speter } 77218334Speter 77318334Speter if (call_used_regs[i] && ! fixed_regs[i]) 774169689Skan warning (0, "call-clobbered register used for global register variable"); 77518334Speter 77618334Speter global_regs[i] = 1; 77718334Speter 778146895Skan /* If we're globalizing the frame pointer, we need to set the 779146895Skan appropriate regs_invalidated_by_call bit, even if it's already 780146895Skan set in fixed_regs. */ 781146895Skan if (i != STACK_POINTER_REGNUM) 782146895Skan SET_HARD_REG_BIT (regs_invalidated_by_call, i); 783146895Skan 78418334Speter /* If already fixed, nothing else to do. */ 78518334Speter if (fixed_regs[i]) 78618334Speter return; 78718334Speter 78818334Speter fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1; 789169689Skan#ifdef CALL_REALLY_USED_REGISTERS 790169689Skan call_really_used_regs[i] = 1; 791169689Skan#endif 79218334Speter 79318334Speter SET_HARD_REG_BIT (fixed_reg_set, i); 79418334Speter SET_HARD_REG_BIT (call_used_reg_set, i); 79518334Speter SET_HARD_REG_BIT (call_fixed_reg_set, i); 79618334Speter} 79718334Speter 79818334Speter/* Now the data and code for the `regclass' pass, which happens 79918334Speter just before local-alloc. */ 80018334Speter 80118334Speter/* The `costs' struct records the cost of using a hard register of each class 80218334Speter and of using memory for each pseudo. We use this data to set up 80318334Speter register class preferences. */ 80418334Speter 80518334Speterstruct costs 80618334Speter{ 80718334Speter int cost[N_REG_CLASSES]; 80818334Speter int mem_cost; 80918334Speter}; 81018334Speter 811132718Skan/* Structure used to record preferences of given pseudo. */ 81290075Sobrienstruct reg_pref 81390075Sobrien{ 814169689Skan /* (enum reg_class) prefclass is the preferred class. May be 815169689Skan NO_REGS if no class is better than memory. */ 81690075Sobrien char prefclass; 81790075Sobrien 81890075Sobrien /* altclass is a register class that we should use for allocating 81990075Sobrien pseudo if no register in the preferred class is available. 82090075Sobrien If no register in this class is available, memory is preferred. 82190075Sobrien 82290075Sobrien It might appear to be more general to have a bitmask of classes here, 82390075Sobrien but since it is recommended that there be a class corresponding to the 82490075Sobrien union of most major pair of classes, that generality is not required. */ 82590075Sobrien char altclass; 82690075Sobrien}; 82790075Sobrien 82818334Speter/* Record the cost of each class for each pseudo. */ 82918334Speter 83018334Speterstatic struct costs *costs; 83118334Speter 83252284Sobrien/* Initialized once, and used to initialize cost values for each insn. */ 83352284Sobrien 83452284Sobrienstatic struct costs init_cost; 83552284Sobrien 836132718Skan/* Record preferences of each pseudo. 83718334Speter This is available after `regclass' is run. */ 83818334Speter 83990075Sobrienstatic struct reg_pref *reg_pref; 84018334Speter 84190075Sobrien/* Allocated buffers for reg_pref. */ 84218334Speter 84390075Sobrienstatic struct reg_pref *reg_pref_buffer; 84418334Speter 84590075Sobrien/* Frequency of executions of current insn. */ 84618334Speter 84790075Sobrienstatic int frequency; 84818334Speter 849132718Skanstatic rtx scan_one_insn (rtx, int); 850132718Skanstatic void record_operand_costs (rtx, struct costs *, struct reg_pref *); 851132718Skanstatic void dump_regclass (FILE *); 852132718Skanstatic void record_reg_classes (int, int, rtx *, enum machine_mode *, 853132718Skan const char **, rtx, struct costs *, 854132718Skan struct reg_pref *); 855169689Skanstatic int copy_cost (rtx, enum machine_mode, enum reg_class, int, 856169689Skan secondary_reload_info *); 857169689Skanstatic void record_address_regs (enum machine_mode, rtx, int, enum rtx_code, 858169689Skan enum rtx_code, int); 85950397Sobrien#ifdef FORBIDDEN_INC_DEC_CLASSES 860132718Skanstatic int auto_inc_dec_reg_p (rtx, enum machine_mode); 86150397Sobrien#endif 862169689Skanstatic void reg_scan_mark_refs (rtx, rtx, int); 86318334Speter 864169689Skan/* Wrapper around REGNO_OK_FOR_INDEX_P, to allow pseudo registers. */ 865169689Skan 866169689Skanstatic inline bool 867169689Skanok_for_index_p_nonstrict (rtx reg) 868169689Skan{ 869169689Skan unsigned regno = REGNO (reg); 870169689Skan return regno >= FIRST_PSEUDO_REGISTER || REGNO_OK_FOR_INDEX_P (regno); 871169689Skan} 872169689Skan 873169689Skan/* A version of regno_ok_for_base_p for use during regclass, when all pseudos 874169689Skan should count as OK. Arguments as for regno_ok_for_base_p. */ 875169689Skan 876169689Skanstatic inline bool 877169689Skanok_for_base_p_nonstrict (rtx reg, enum machine_mode mode, 878169689Skan enum rtx_code outer_code, enum rtx_code index_code) 879169689Skan{ 880169689Skan unsigned regno = REGNO (reg); 881169689Skan if (regno >= FIRST_PSEUDO_REGISTER) 882169689Skan return true; 883169689Skan 884169689Skan return ok_for_base_p_1 (regno, mode, outer_code, index_code); 885169689Skan} 886169689Skan 88718334Speter/* Return the reg_class in which pseudo reg number REGNO is best allocated. 88818334Speter This function is sometimes called before the info has been computed. 88918334Speter When that happens, just return GENERAL_REGS, which is innocuous. */ 89018334Speter 89118334Speterenum reg_class 892132718Skanreg_preferred_class (int regno) 89318334Speter{ 89490075Sobrien if (reg_pref == 0) 89518334Speter return GENERAL_REGS; 89690075Sobrien return (enum reg_class) reg_pref[regno].prefclass; 89718334Speter} 89818334Speter 89918334Speterenum reg_class 900132718Skanreg_alternate_class (int regno) 90118334Speter{ 90290075Sobrien if (reg_pref == 0) 90318334Speter return ALL_REGS; 90418334Speter 90590075Sobrien return (enum reg_class) reg_pref[regno].altclass; 90618334Speter} 90718334Speter 90852284Sobrien/* Initialize some global data for this pass. */ 90918334Speter 91018334Spetervoid 911132718Skanregclass_init (void) 91218334Speter{ 91352284Sobrien int i; 91452284Sobrien 91552284Sobrien init_cost.mem_cost = 10000; 91652284Sobrien for (i = 0; i < N_REG_CLASSES; i++) 91752284Sobrien init_cost.cost[i] = 10000; 91852284Sobrien 91952284Sobrien /* This prevents dump_flow_info from losing if called 92052284Sobrien before regclass is run. */ 92190075Sobrien reg_pref = NULL; 92290075Sobrien 92390075Sobrien /* No more global register variables may be declared. */ 92490075Sobrien no_global_reg_vars = 1; 92518334Speter} 92618334Speter 92790075Sobrien/* Dump register costs. */ 92890075Sobrienstatic void 929132718Skandump_regclass (FILE *dump) 93090075Sobrien{ 93190075Sobrien int i; 93290075Sobrien for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 93390075Sobrien { 93490075Sobrien int /* enum reg_class */ class; 93590075Sobrien if (REG_N_REFS (i)) 93690075Sobrien { 93790075Sobrien fprintf (dump, " Register %i costs:", i); 93890075Sobrien for (class = 0; class < (int) N_REG_CLASSES; class++) 93990075Sobrien if (contains_reg_of_mode [(enum reg_class) class][PSEUDO_REGNO_MODE (i)] 94090075Sobrien#ifdef FORBIDDEN_INC_DEC_CLASSES 94190075Sobrien && (!in_inc_dec[i] 94290075Sobrien || !forbidden_inc_dec_class[(enum reg_class) class]) 94390075Sobrien#endif 944117395Skan#ifdef CANNOT_CHANGE_MODE_CLASS 945117395Skan && ! invalid_mode_change_p (i, (enum reg_class) class, 946117395Skan PSEUDO_REGNO_MODE (i)) 94790075Sobrien#endif 94890075Sobrien ) 94990075Sobrien fprintf (dump, " %s:%i", reg_class_names[class], 95090075Sobrien costs[i].cost[(enum reg_class) class]); 95190075Sobrien fprintf (dump, " MEM:%i\n", costs[i].mem_cost); 95290075Sobrien } 95390075Sobrien } 95490075Sobrien} 95590075Sobrien 95690075Sobrien 95790075Sobrien/* Calculate the costs of insn operands. */ 95890075Sobrien 95990075Sobrienstatic void 960132718Skanrecord_operand_costs (rtx insn, struct costs *op_costs, 961132718Skan struct reg_pref *reg_pref) 96290075Sobrien{ 96390075Sobrien const char *constraints[MAX_RECOG_OPERANDS]; 96490075Sobrien enum machine_mode modes[MAX_RECOG_OPERANDS]; 96590075Sobrien int i; 96690075Sobrien 96790075Sobrien for (i = 0; i < recog_data.n_operands; i++) 96890075Sobrien { 96990075Sobrien constraints[i] = recog_data.constraints[i]; 97090075Sobrien modes[i] = recog_data.operand_mode[i]; 97190075Sobrien } 97290075Sobrien 97390075Sobrien /* If we get here, we are set up to record the costs of all the 97490075Sobrien operands for this insn. Start by initializing the costs. 97590075Sobrien Then handle any address registers. Finally record the desired 97690075Sobrien classes for any pseudos, doing it twice if some pair of 97790075Sobrien operands are commutative. */ 978117395Skan 97990075Sobrien for (i = 0; i < recog_data.n_operands; i++) 98090075Sobrien { 98190075Sobrien op_costs[i] = init_cost; 98290075Sobrien 98390075Sobrien if (GET_CODE (recog_data.operand[i]) == SUBREG) 984117395Skan recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 98590075Sobrien 986169689Skan if (MEM_P (recog_data.operand[i])) 987169689Skan record_address_regs (GET_MODE (recog_data.operand[i]), 988169689Skan XEXP (recog_data.operand[i], 0), 989169689Skan 0, MEM, SCRATCH, frequency * 2); 990117395Skan else if (constraints[i][0] == 'p' 991132718Skan || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i])) 992169689Skan record_address_regs (VOIDmode, recog_data.operand[i], 0, ADDRESS, 993169689Skan SCRATCH, frequency * 2); 99490075Sobrien } 99590075Sobrien 99690075Sobrien /* Check for commutative in a separate loop so everything will 99790075Sobrien have been initialized. We must do this even if one operand 99890075Sobrien is a constant--see addsi3 in m68k.md. */ 99990075Sobrien 100090075Sobrien for (i = 0; i < (int) recog_data.n_operands - 1; i++) 100190075Sobrien if (constraints[i][0] == '%') 100290075Sobrien { 100390075Sobrien const char *xconstraints[MAX_RECOG_OPERANDS]; 100490075Sobrien int j; 100590075Sobrien 100690075Sobrien /* Handle commutative operands by swapping the constraints. 100790075Sobrien We assume the modes are the same. */ 100890075Sobrien 100990075Sobrien for (j = 0; j < recog_data.n_operands; j++) 101090075Sobrien xconstraints[j] = constraints[j]; 101190075Sobrien 101290075Sobrien xconstraints[i] = constraints[i+1]; 101390075Sobrien xconstraints[i+1] = constraints[i]; 101490075Sobrien record_reg_classes (recog_data.n_alternatives, recog_data.n_operands, 1015117395Skan recog_data.operand, modes, 101690075Sobrien xconstraints, insn, op_costs, reg_pref); 101790075Sobrien } 101890075Sobrien 101990075Sobrien record_reg_classes (recog_data.n_alternatives, recog_data.n_operands, 1020117395Skan recog_data.operand, modes, 102190075Sobrien constraints, insn, op_costs, reg_pref); 102290075Sobrien} 102390075Sobrien 102452284Sobrien/* Subroutine of regclass, processes one insn INSN. Scan it and record each 102552284Sobrien time it would save code to put a certain register in a certain class. 102652284Sobrien PASS, when nonzero, inhibits some optimizations which need only be done 102752284Sobrien once. 102852284Sobrien Return the last insn processed, so that the scan can be continued from 102952284Sobrien there. */ 103052284Sobrien 103152284Sobrienstatic rtx 1032132718Skanscan_one_insn (rtx insn, int pass) 103352284Sobrien{ 103452284Sobrien enum rtx_code pat_code; 103552284Sobrien rtx set, note; 103652284Sobrien int i, j; 103790075Sobrien struct costs op_costs[MAX_RECOG_OPERANDS]; 103852284Sobrien 1039169689Skan if (!INSN_P (insn)) 104052284Sobrien return insn; 104152284Sobrien 104252284Sobrien pat_code = GET_CODE (PATTERN (insn)); 104352284Sobrien if (pat_code == USE 104452284Sobrien || pat_code == CLOBBER 104552284Sobrien || pat_code == ASM_INPUT 104652284Sobrien || pat_code == ADDR_VEC 104752284Sobrien || pat_code == ADDR_DIFF_VEC) 104852284Sobrien return insn; 104952284Sobrien 105052284Sobrien set = single_set (insn); 105152284Sobrien extract_insn (insn); 105252284Sobrien 105352284Sobrien /* If this insn loads a parameter from its stack slot, then 105452284Sobrien it represents a savings, rather than a cost, if the 105552284Sobrien parameter is stored in memory. Record this fact. */ 105652284Sobrien 1057169689Skan if (set != 0 && REG_P (SET_DEST (set)) 1058169689Skan && MEM_P (SET_SRC (set)) 105952284Sobrien && (note = find_reg_note (insn, REG_EQUIV, 106052284Sobrien NULL_RTX)) != 0 1061169689Skan && MEM_P (XEXP (note, 0))) 106252284Sobrien { 106352284Sobrien costs[REGNO (SET_DEST (set))].mem_cost 106452284Sobrien -= (MEMORY_MOVE_COST (GET_MODE (SET_DEST (set)), 106552284Sobrien GENERAL_REGS, 1) 106690075Sobrien * frequency); 1067169689Skan record_address_regs (GET_MODE (SET_SRC (set)), XEXP (SET_SRC (set), 0), 1068169689Skan 0, MEM, SCRATCH, frequency * 2); 106952284Sobrien return insn; 107052284Sobrien } 107152284Sobrien 107252284Sobrien /* Improve handling of two-address insns such as 107352284Sobrien (set X (ashift CONST Y)) where CONST must be made to 107452284Sobrien match X. Change it into two insns: (set X CONST) 107552284Sobrien (set X (ashift X Y)). If we left this for reloading, it 107652284Sobrien would probably get three insns because X and Y might go 107752284Sobrien in the same place. This prevents X and Y from receiving 107852284Sobrien the same hard reg. 107952284Sobrien 108052284Sobrien We can only do this if the modes of operands 0 and 1 108152284Sobrien (which might not be the same) are tieable and we only need 108252284Sobrien do this during our first pass. */ 108352284Sobrien 108452284Sobrien if (pass == 0 && optimize 108590075Sobrien && recog_data.n_operands >= 3 108690075Sobrien && recog_data.constraints[1][0] == '0' 108790075Sobrien && recog_data.constraints[1][1] == 0 108890075Sobrien && CONSTANT_P (recog_data.operand[1]) 108990075Sobrien && ! rtx_equal_p (recog_data.operand[0], recog_data.operand[1]) 109090075Sobrien && ! rtx_equal_p (recog_data.operand[0], recog_data.operand[2]) 1091169689Skan && REG_P (recog_data.operand[0]) 109290075Sobrien && MODES_TIEABLE_P (GET_MODE (recog_data.operand[0]), 109390075Sobrien recog_data.operand_mode[1])) 109452284Sobrien { 109552284Sobrien rtx previnsn = prev_real_insn (insn); 109652284Sobrien rtx dest 109790075Sobrien = gen_lowpart (recog_data.operand_mode[1], 109890075Sobrien recog_data.operand[0]); 109952284Sobrien rtx newinsn 110090075Sobrien = emit_insn_before (gen_move_insn (dest, recog_data.operand[1]), insn); 110152284Sobrien 110252284Sobrien /* If this insn was the start of a basic block, 110352284Sobrien include the new insn in that block. 110452284Sobrien We need not check for code_label here; 110552284Sobrien while a basic block can start with a code_label, 110652284Sobrien INSN could not be at the beginning of that block. */ 1107169689Skan if (previnsn == 0 || JUMP_P (previnsn)) 110852284Sobrien { 1109117395Skan basic_block b; 1110117395Skan FOR_EACH_BB (b) 1111132718Skan if (insn == BB_HEAD (b)) 1112132718Skan BB_HEAD (b) = newinsn; 111352284Sobrien } 111452284Sobrien 111552284Sobrien /* This makes one more setting of new insns's dest. */ 111690075Sobrien REG_N_SETS (REGNO (recog_data.operand[0]))++; 111790075Sobrien REG_N_REFS (REGNO (recog_data.operand[0]))++; 111890075Sobrien REG_FREQ (REGNO (recog_data.operand[0])) += frequency; 111952284Sobrien 112090075Sobrien *recog_data.operand_loc[1] = recog_data.operand[0]; 112190075Sobrien REG_N_REFS (REGNO (recog_data.operand[0]))++; 112290075Sobrien REG_FREQ (REGNO (recog_data.operand[0])) += frequency; 112390075Sobrien for (i = recog_data.n_dups - 1; i >= 0; i--) 112490075Sobrien if (recog_data.dup_num[i] == 1) 112590075Sobrien { 112690075Sobrien *recog_data.dup_loc[i] = recog_data.operand[0]; 112790075Sobrien REG_N_REFS (REGNO (recog_data.operand[0]))++; 112890075Sobrien REG_FREQ (REGNO (recog_data.operand[0])) += frequency; 112990075Sobrien } 113052284Sobrien 113152284Sobrien return PREV_INSN (newinsn); 113252284Sobrien } 113352284Sobrien 113490075Sobrien record_operand_costs (insn, op_costs, reg_pref); 113552284Sobrien 113652284Sobrien /* Now add the cost for each operand to the total costs for 113752284Sobrien its register. */ 113852284Sobrien 113990075Sobrien for (i = 0; i < recog_data.n_operands; i++) 1140169689Skan if (REG_P (recog_data.operand[i]) 114190075Sobrien && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER) 114252284Sobrien { 114390075Sobrien int regno = REGNO (recog_data.operand[i]); 114452284Sobrien struct costs *p = &costs[regno], *q = &op_costs[i]; 114552284Sobrien 114690075Sobrien p->mem_cost += q->mem_cost * frequency; 114752284Sobrien for (j = 0; j < N_REG_CLASSES; j++) 114890075Sobrien p->cost[j] += q->cost[j] * frequency; 114952284Sobrien } 115052284Sobrien 115152284Sobrien return insn; 115252284Sobrien} 115352284Sobrien 1154117395Skan/* Initialize information about which register classes can be used for 1155117395Skan pseudos that are auto-incremented or auto-decremented. */ 115618334Speter 1157117395Skanstatic void 1158132718Skaninit_reg_autoinc (void) 115918334Speter{ 1160117395Skan#ifdef FORBIDDEN_INC_DEC_CLASSES 116190075Sobrien int i; 116218334Speter 116318334Speter for (i = 0; i < N_REG_CLASSES; i++) 116418334Speter { 1165117395Skan rtx r = gen_rtx_raw_REG (VOIDmode, 0); 116618334Speter enum machine_mode m; 116790075Sobrien int j; 116818334Speter 116918334Speter for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) 117018334Speter if (TEST_HARD_REG_BIT (reg_class_contents[i], j)) 117118334Speter { 117218334Speter REGNO (r) = j; 117318334Speter 117418334Speter for (m = VOIDmode; (int) m < (int) MAX_MACHINE_MODE; 117518334Speter m = (enum machine_mode) ((int) m + 1)) 117618334Speter if (HARD_REGNO_MODE_OK (j, m)) 117718334Speter { 1178169689Skan /* ??? There are two assumptions here; that the base class does not 1179169689Skan depend on the exact outer code (POST_INC vs. PRE_INC etc.), and 1180169689Skan that it does not depend on the machine mode of the memory 1181169689Skan reference. */ 1182169689Skan enum reg_class base_class 1183169689Skan = base_reg_class (VOIDmode, POST_INC, SCRATCH); 1184169689Skan 118518334Speter PUT_MODE (r, m); 118618334Speter 118718334Speter /* If a register is not directly suitable for an 118818334Speter auto-increment or decrement addressing mode and 118918334Speter requires secondary reloads, disallow its class from 119018334Speter being used in such addresses. */ 119118334Speter 1192169689Skan if ((secondary_reload_class (1, base_class, m, r) 1193169689Skan || secondary_reload_class (1, base_class, m, r)) 119418334Speter && ! auto_inc_dec_reg_p (r, m)) 119518334Speter forbidden_inc_dec_class[i] = 1; 119618334Speter } 119718334Speter } 119818334Speter } 119918334Speter#endif /* FORBIDDEN_INC_DEC_CLASSES */ 1200117395Skan} 120118334Speter 1202117395Skan/* This is a pass of the compiler that scans all instructions 1203117395Skan and calculates the preferred class for each pseudo-register. 1204117395Skan This information can be accessed later by calling `reg_preferred_class'. 1205117395Skan This pass comes just before local register allocation. */ 1206117395Skan 1207117395Skanvoid 1208169689Skanregclass (rtx f, int nregs) 1209117395Skan{ 1210117395Skan rtx insn; 1211117395Skan int i; 1212117395Skan int pass; 1213117395Skan 1214117395Skan init_recog (); 1215117395Skan 1216169689Skan costs = XNEWVEC (struct costs, nregs); 1217117395Skan 1218117395Skan#ifdef FORBIDDEN_INC_DEC_CLASSES 1219117395Skan 1220169689Skan in_inc_dec = XNEWVEC (char, nregs); 1221117395Skan 1222117395Skan#endif /* FORBIDDEN_INC_DEC_CLASSES */ 1223117395Skan 122418334Speter /* Normally we scan the insns once and determine the best class to use for 122518334Speter each register. However, if -fexpensive_optimizations are on, we do so 122618334Speter twice, the second time using the tentative best classes to guide the 122718334Speter selection. */ 122818334Speter 122918334Speter for (pass = 0; pass <= flag_expensive_optimizations; pass++) 123018334Speter { 1231117395Skan basic_block bb; 123290075Sobrien 1233169689Skan if (dump_file) 1234169689Skan fprintf (dump_file, "\n\nPass %i\n\n",pass); 123518334Speter /* Zero out our accumulation of the cost of each class for each reg. */ 123618334Speter 1237132718Skan memset (costs, 0, nregs * sizeof (struct costs)); 123818334Speter 123918334Speter#ifdef FORBIDDEN_INC_DEC_CLASSES 124090075Sobrien memset (in_inc_dec, 0, nregs); 124118334Speter#endif 124218334Speter 124318334Speter /* Scan the instructions and record each time it would 124418334Speter save code to put a certain register in a certain class. */ 124518334Speter 124690075Sobrien if (!optimize) 124718334Speter { 124890075Sobrien frequency = REG_FREQ_MAX; 124990075Sobrien for (insn = f; insn; insn = NEXT_INSN (insn)) 125090075Sobrien insn = scan_one_insn (insn, pass); 125118334Speter } 125290075Sobrien else 1253117395Skan FOR_EACH_BB (bb) 125490075Sobrien { 125590075Sobrien /* Show that an insn inside a loop is likely to be executed three 125690075Sobrien times more than insns outside a loop. This is much more 125790075Sobrien aggressive than the assumptions made elsewhere and is being 125890075Sobrien tried as an experiment. */ 125990075Sobrien frequency = REG_FREQ_FROM_BB (bb); 1260132718Skan for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn)) 126190075Sobrien { 126290075Sobrien insn = scan_one_insn (insn, pass); 1263132718Skan if (insn == BB_END (bb)) 126490075Sobrien break; 126590075Sobrien } 126690075Sobrien } 1267117395Skan 126818334Speter /* Now for each register look at how desirable each class is 126918334Speter and find which class is preferred. Store that in 127090075Sobrien `prefclass'. Record in `altclass' the largest register 127118334Speter class any of whose registers is better than memory. */ 1272117395Skan 127318334Speter if (pass == 0) 127490075Sobrien reg_pref = reg_pref_buffer; 127590075Sobrien 1276169689Skan if (dump_file) 1277117395Skan { 1278169689Skan dump_regclass (dump_file); 1279169689Skan fprintf (dump_file,"\n"); 128018334Speter } 128118334Speter for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++) 128218334Speter { 128390075Sobrien int best_cost = (1 << (HOST_BITS_PER_INT - 2)) - 1; 128418334Speter enum reg_class best = ALL_REGS, alt = NO_REGS; 128518334Speter /* This is an enum reg_class, but we call it an int 128618334Speter to save lots of casts. */ 128790075Sobrien int class; 128890075Sobrien struct costs *p = &costs[i]; 128918334Speter 129090075Sobrien /* In non-optimizing compilation REG_N_REFS is not initialized 129190075Sobrien yet. */ 1292117395Skan if (optimize && !REG_N_REFS (i) && !REG_N_SETS (i)) 129390075Sobrien continue; 129490075Sobrien 129518334Speter for (class = (int) ALL_REGS - 1; class > 0; class--) 129618334Speter { 129718334Speter /* Ignore classes that are too small for this operand or 129890075Sobrien invalid for an operand that was auto-incremented. */ 129990075Sobrien if (!contains_reg_of_mode [class][PSEUDO_REGNO_MODE (i)] 130018334Speter#ifdef FORBIDDEN_INC_DEC_CLASSES 130118334Speter || (in_inc_dec[i] && forbidden_inc_dec_class[class]) 130218334Speter#endif 1303117395Skan#ifdef CANNOT_CHANGE_MODE_CLASS 1304117395Skan || invalid_mode_change_p (i, (enum reg_class) class, 1305117395Skan PSEUDO_REGNO_MODE (i)) 130690075Sobrien#endif 130718334Speter ) 130818334Speter ; 130918334Speter else if (p->cost[class] < best_cost) 131018334Speter { 131118334Speter best_cost = p->cost[class]; 131218334Speter best = (enum reg_class) class; 131318334Speter } 131418334Speter else if (p->cost[class] == best_cost) 131590075Sobrien best = reg_class_subunion[(int) best][class]; 131618334Speter } 131718334Speter 1318169689Skan /* If no register class is better than memory, use memory. */ 1319169689Skan if (p->mem_cost < best_cost) 1320169689Skan best = NO_REGS; 1321169689Skan 132218334Speter /* Record the alternate register class; i.e., a class for which 132318334Speter every register in it is better than using memory. If adding a 132418334Speter class would make a smaller class (i.e., no union of just those 132518334Speter classes exists), skip that class. The major unions of classes 132618334Speter should be provided as a register class. Don't do this if we 132718334Speter will be doing it again later. */ 132818334Speter 1329169689Skan if ((pass == 1 || dump_file) || ! flag_expensive_optimizations) 133018334Speter for (class = 0; class < N_REG_CLASSES; class++) 133118334Speter if (p->cost[class] < p->mem_cost 133218334Speter && (reg_class_size[(int) reg_class_subunion[(int) alt][class]] 133318334Speter > reg_class_size[(int) alt]) 133418334Speter#ifdef FORBIDDEN_INC_DEC_CLASSES 133518334Speter && ! (in_inc_dec[i] && forbidden_inc_dec_class[class]) 133618334Speter#endif 1337117395Skan#ifdef CANNOT_CHANGE_MODE_CLASS 1338117395Skan && ! invalid_mode_change_p (i, (enum reg_class) class, 1339117395Skan PSEUDO_REGNO_MODE (i)) 134090075Sobrien#endif 134118334Speter ) 134218334Speter alt = reg_class_subunion[(int) alt][class]; 1343117395Skan 134418334Speter /* If we don't add any classes, nothing to try. */ 134518334Speter if (alt == best) 134650397Sobrien alt = NO_REGS; 134718334Speter 1348169689Skan if (dump_file 134990075Sobrien && (reg_pref[i].prefclass != (int) best 135090075Sobrien || reg_pref[i].altclass != (int) alt)) 135190075Sobrien { 1352169689Skan fprintf (dump_file, " Register %i", i); 135390075Sobrien if (alt == ALL_REGS || best == ALL_REGS) 1354169689Skan fprintf (dump_file, " pref %s\n", reg_class_names[(int) best]); 135590075Sobrien else if (alt == NO_REGS) 1356169689Skan fprintf (dump_file, " pref %s or none\n", reg_class_names[(int) best]); 135790075Sobrien else 1358169689Skan fprintf (dump_file, " pref %s, else %s\n", 135990075Sobrien reg_class_names[(int) best], 136090075Sobrien reg_class_names[(int) alt]); 136190075Sobrien } 136290075Sobrien 136318334Speter /* We cast to (int) because (char) hits bugs in some compilers. */ 136490075Sobrien reg_pref[i].prefclass = (int) best; 136590075Sobrien reg_pref[i].altclass = (int) alt; 136618334Speter } 136718334Speter } 136852284Sobrien 136990075Sobrien#ifdef FORBIDDEN_INC_DEC_CLASSES 137090075Sobrien free (in_inc_dec); 137190075Sobrien#endif 137252284Sobrien free (costs); 137318334Speter} 137418334Speter 137518334Speter/* Record the cost of using memory or registers of various classes for 137618334Speter the operands in INSN. 137718334Speter 137818334Speter N_ALTS is the number of alternatives. 137918334Speter 138018334Speter N_OPS is the number of operands. 138118334Speter 138218334Speter OPS is an array of the operands. 138318334Speter 138418334Speter MODES are the modes of the operands, in case any are VOIDmode. 138518334Speter 138618334Speter CONSTRAINTS are the constraints to use for the operands. This array 138718334Speter is modified by this procedure. 138818334Speter 138918334Speter This procedure works alternative by alternative. For each alternative 139018334Speter we assume that we will be able to allocate all pseudos to their ideal 139118334Speter register class and calculate the cost of using that alternative. Then 1392117395Skan we compute for each operand that is a pseudo-register, the cost of 139318334Speter having the pseudo allocated to each register class and using it in that 139418334Speter alternative. To this cost is added the cost of the alternative. 139518334Speter 139618334Speter The cost of each class for this insn is its lowest cost among all the 139718334Speter alternatives. */ 139818334Speter 139918334Speterstatic void 1400132718Skanrecord_reg_classes (int n_alts, int n_ops, rtx *ops, 1401132718Skan enum machine_mode *modes, const char **constraints, 1402132718Skan rtx insn, struct costs *op_costs, 1403132718Skan struct reg_pref *reg_pref) 140418334Speter{ 140518334Speter int alt; 140618334Speter int i, j; 140718334Speter rtx set; 140818334Speter 140918334Speter /* Process each alternative, each time minimizing an operand's cost with 141018334Speter the cost for each operand in that alternative. */ 141118334Speter 141218334Speter for (alt = 0; alt < n_alts; alt++) 141318334Speter { 141418334Speter struct costs this_op_costs[MAX_RECOG_OPERANDS]; 141518334Speter int alt_fail = 0; 141618334Speter int alt_cost = 0; 141718334Speter enum reg_class classes[MAX_RECOG_OPERANDS]; 141890075Sobrien int allows_mem[MAX_RECOG_OPERANDS]; 141918334Speter int class; 142018334Speter 142118334Speter for (i = 0; i < n_ops; i++) 142218334Speter { 142352284Sobrien const char *p = constraints[i]; 142418334Speter rtx op = ops[i]; 142518334Speter enum machine_mode mode = modes[i]; 142652284Sobrien int allows_addr = 0; 142718334Speter int win = 0; 142852284Sobrien unsigned char c; 142918334Speter 143052284Sobrien /* Initially show we know nothing about the register class. */ 143152284Sobrien classes[i] = NO_REGS; 143290075Sobrien allows_mem[i] = 0; 143352284Sobrien 1434117395Skan /* If this operand has no constraints at all, we can conclude 143518334Speter nothing about it since anything is valid. */ 143618334Speter 143718334Speter if (*p == 0) 143818334Speter { 1439169689Skan if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER) 1440132718Skan memset (&this_op_costs[i], 0, sizeof this_op_costs[i]); 144118334Speter 144218334Speter continue; 144318334Speter } 144418334Speter 144518334Speter /* If this alternative is only relevant when this operand 144618334Speter matches a previous operand, we do different things depending 144752284Sobrien on whether this operand is a pseudo-reg or not. We must process 144852284Sobrien any modifiers for the operand before we can make this test. */ 144918334Speter 145052284Sobrien while (*p == '%' || *p == '=' || *p == '+' || *p == '&') 145152284Sobrien p++; 145252284Sobrien 145318334Speter if (p[0] >= '0' && p[0] <= '0' + i && (p[1] == ',' || p[1] == 0)) 145418334Speter { 145590075Sobrien /* Copy class and whether memory is allowed from the matching 145690075Sobrien alternative. Then perform any needed cost computations 145790075Sobrien and/or adjustments. */ 145818334Speter j = p[0] - '0'; 145918334Speter classes[i] = classes[j]; 146090075Sobrien allows_mem[i] = allows_mem[j]; 146118334Speter 1462169689Skan if (!REG_P (op) || REGNO (op) < FIRST_PSEUDO_REGISTER) 146318334Speter { 146418334Speter /* If this matches the other operand, we have no added 146518334Speter cost and we win. */ 146618334Speter if (rtx_equal_p (ops[j], op)) 146718334Speter win = 1; 146818334Speter 146918334Speter /* If we can put the other operand into a register, add to 147018334Speter the cost of this alternative the cost to copy this 147118334Speter operand to the register used for the other operand. */ 147218334Speter 147318334Speter else if (classes[j] != NO_REGS) 1474169689Skan { 1475169689Skan alt_cost += copy_cost (op, mode, classes[j], 1, NULL); 1476169689Skan win = 1; 1477169689Skan } 147818334Speter } 1479169689Skan else if (!REG_P (ops[j]) 148018334Speter || REGNO (ops[j]) < FIRST_PSEUDO_REGISTER) 148118334Speter { 148218334Speter /* This op is a pseudo but the one it matches is not. */ 1483117395Skan 148418334Speter /* If we can't put the other operand into a register, this 148518334Speter alternative can't be used. */ 148618334Speter 148718334Speter if (classes[j] == NO_REGS) 148818334Speter alt_fail = 1; 148918334Speter 149018334Speter /* Otherwise, add to the cost of this alternative the cost 149118334Speter to copy the other operand to the register used for this 149218334Speter operand. */ 149318334Speter 149418334Speter else 1495169689Skan alt_cost += copy_cost (ops[j], mode, classes[j], 1, NULL); 149618334Speter } 149718334Speter else 149818334Speter { 149990075Sobrien /* The costs of this operand are not the same as the other 150090075Sobrien operand since move costs are not symmetric. Moreover, 150190075Sobrien if we cannot tie them, this alternative needs to do a 150290075Sobrien copy, which is one instruction. */ 150318334Speter 150490075Sobrien struct costs *pp = &this_op_costs[i]; 150590075Sobrien 150690075Sobrien for (class = 0; class < N_REG_CLASSES; class++) 150790075Sobrien pp->cost[class] 150890075Sobrien = ((recog_data.operand_type[i] != OP_OUT 150990075Sobrien ? may_move_in_cost[mode][class][(int) classes[i]] 151090075Sobrien : 0) 151190075Sobrien + (recog_data.operand_type[i] != OP_IN 151290075Sobrien ? may_move_out_cost[mode][(int) classes[i]][class] 151390075Sobrien : 0)); 1514117395Skan 151590075Sobrien /* If the alternative actually allows memory, make things 151690075Sobrien a bit cheaper since we won't need an extra insn to 151790075Sobrien load it. */ 151890075Sobrien 151990075Sobrien pp->mem_cost 152090075Sobrien = ((recog_data.operand_type[i] != OP_IN 152190075Sobrien ? MEMORY_MOVE_COST (mode, classes[i], 0) 152290075Sobrien : 0) 152390075Sobrien + (recog_data.operand_type[i] != OP_OUT 152490075Sobrien ? MEMORY_MOVE_COST (mode, classes[i], 1) 152590075Sobrien : 0) - allows_mem[i]); 152690075Sobrien 152790075Sobrien /* If we have assigned a class to this register in our 152890075Sobrien first pass, add a cost to this alternative corresponding 152990075Sobrien to what we would add if this register were not in the 153090075Sobrien appropriate class. */ 153190075Sobrien 1532169689Skan if (reg_pref && reg_pref[REGNO (op)].prefclass != NO_REGS) 153390075Sobrien alt_cost 153490075Sobrien += (may_move_in_cost[mode] 153590075Sobrien [(unsigned char) reg_pref[REGNO (op)].prefclass] 153690075Sobrien [(int) classes[i]]); 153790075Sobrien 153818334Speter if (REGNO (ops[i]) != REGNO (ops[j]) 153918334Speter && ! find_reg_note (insn, REG_DEAD, op)) 154018334Speter alt_cost += 2; 154118334Speter 154218334Speter /* This is in place of ordinary cost computation 154318334Speter for this operand, so skip to the end of the 154418334Speter alternative (should be just one character). */ 154518334Speter while (*p && *p++ != ',') 154618334Speter ; 154718334Speter 154818334Speter constraints[i] = p; 154918334Speter continue; 155018334Speter } 155118334Speter } 155218334Speter 155318334Speter /* Scan all the constraint letters. See if the operand matches 155418334Speter any of the constraints. Collect the valid register classes 155518334Speter and see if this operand accepts memory. */ 155618334Speter 1557132718Skan while ((c = *p)) 1558132718Skan { 1559132718Skan switch (c) 1560132718Skan { 1561132718Skan case ',': 1562132718Skan break; 1563132718Skan case '*': 1564132718Skan /* Ignore the next letter for this pass. */ 1565132718Skan c = *++p; 1566132718Skan break; 156718334Speter 1568132718Skan case '?': 1569132718Skan alt_cost += 2; 1570132718Skan case '!': case '#': case '&': 1571132718Skan case '0': case '1': case '2': case '3': case '4': 1572132718Skan case '5': case '6': case '7': case '8': case '9': 1573132718Skan break; 157452284Sobrien 1575132718Skan case 'p': 1576132718Skan allows_addr = 1; 1577132718Skan win = address_operand (op, GET_MODE (op)); 1578132718Skan /* We know this operand is an address, so we want it to be 1579132718Skan allocated to a register that can be the base of an 1580169689Skan address, i.e. BASE_REG_CLASS. */ 1581132718Skan classes[i] 1582132718Skan = reg_class_subunion[(int) classes[i]] 1583169689Skan [(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)]; 1584132718Skan break; 158518334Speter 1586132718Skan case 'm': case 'o': case 'V': 1587132718Skan /* It doesn't seem worth distinguishing between offsettable 1588132718Skan and non-offsettable addresses here. */ 1589132718Skan allows_mem[i] = 1; 1590169689Skan if (MEM_P (op)) 1591132718Skan win = 1; 1592132718Skan break; 159318334Speter 1594132718Skan case '<': 1595169689Skan if (MEM_P (op) 1596132718Skan && (GET_CODE (XEXP (op, 0)) == PRE_DEC 1597132718Skan || GET_CODE (XEXP (op, 0)) == POST_DEC)) 1598132718Skan win = 1; 1599132718Skan break; 160018334Speter 1601132718Skan case '>': 1602169689Skan if (MEM_P (op) 1603132718Skan && (GET_CODE (XEXP (op, 0)) == PRE_INC 1604132718Skan || GET_CODE (XEXP (op, 0)) == POST_INC)) 1605132718Skan win = 1; 1606132718Skan break; 160718334Speter 1608132718Skan case 'E': 1609132718Skan case 'F': 1610132718Skan if (GET_CODE (op) == CONST_DOUBLE 1611132718Skan || (GET_CODE (op) == CONST_VECTOR 1612132718Skan && (GET_MODE_CLASS (GET_MODE (op)) 1613132718Skan == MODE_VECTOR_FLOAT))) 1614132718Skan win = 1; 1615132718Skan break; 161618334Speter 1617132718Skan case 'G': 1618132718Skan case 'H': 1619132718Skan if (GET_CODE (op) == CONST_DOUBLE 1620132718Skan && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op, c, p)) 1621132718Skan win = 1; 1622132718Skan break; 162318334Speter 1624132718Skan case 's': 1625132718Skan if (GET_CODE (op) == CONST_INT 1626132718Skan || (GET_CODE (op) == CONST_DOUBLE 1627132718Skan && GET_MODE (op) == VOIDmode)) 1628132718Skan break; 1629132718Skan case 'i': 1630132718Skan if (CONSTANT_P (op) 1631169689Skan && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op))) 1632132718Skan win = 1; 1633132718Skan break; 163418334Speter 1635132718Skan case 'n': 1636132718Skan if (GET_CODE (op) == CONST_INT 1637132718Skan || (GET_CODE (op) == CONST_DOUBLE 1638132718Skan && GET_MODE (op) == VOIDmode)) 1639132718Skan win = 1; 1640132718Skan break; 164118334Speter 1642132718Skan case 'I': 1643132718Skan case 'J': 1644132718Skan case 'K': 1645132718Skan case 'L': 1646132718Skan case 'M': 1647132718Skan case 'N': 1648132718Skan case 'O': 1649132718Skan case 'P': 1650132718Skan if (GET_CODE (op) == CONST_INT 1651132718Skan && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), c, p)) 1652132718Skan win = 1; 1653132718Skan break; 1654132718Skan 1655132718Skan case 'X': 165618334Speter win = 1; 1657132718Skan break; 165818334Speter 1659132718Skan case 'g': 1660169689Skan if (MEM_P (op) 1661132718Skan || (CONSTANT_P (op) 1662169689Skan && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op)))) 1663132718Skan win = 1; 1664132718Skan allows_mem[i] = 1; 1665132718Skan case 'r': 166690075Sobrien classes[i] 1667132718Skan = reg_class_subunion[(int) classes[i]][(int) GENERAL_REGS]; 1668132718Skan break; 1669117395Skan 1670132718Skan default: 1671132718Skan if (REG_CLASS_FROM_CONSTRAINT (c, p) != NO_REGS) 1672117395Skan classes[i] 1673117395Skan = reg_class_subunion[(int) classes[i]] 1674132718Skan [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]; 1675132718Skan#ifdef EXTRA_CONSTRAINT_STR 1676132718Skan else if (EXTRA_CONSTRAINT_STR (op, c, p)) 1677132718Skan win = 1; 1678132718Skan 1679132718Skan if (EXTRA_MEMORY_CONSTRAINT (c, p)) 1680132718Skan { 1681132718Skan /* Every MEM can be reloaded to fit. */ 1682132718Skan allows_mem[i] = 1; 1683169689Skan if (MEM_P (op)) 1684132718Skan win = 1; 1685132718Skan } 1686132718Skan if (EXTRA_ADDRESS_CONSTRAINT (c, p)) 1687132718Skan { 1688132718Skan /* Every address can be reloaded to fit. */ 1689132718Skan allows_addr = 1; 1690132718Skan if (address_operand (op, GET_MODE (op))) 1691132718Skan win = 1; 1692132718Skan /* We know this operand is an address, so we want it to 1693132718Skan be allocated to a register that can be the base of an 1694169689Skan address, i.e. BASE_REG_CLASS. */ 1695132718Skan classes[i] 1696132718Skan = reg_class_subunion[(int) classes[i]] 1697169689Skan [(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)]; 1698132718Skan } 169990075Sobrien#endif 1700132718Skan break; 1701132718Skan } 1702132718Skan p += CONSTRAINT_LEN (c, p); 1703132718Skan if (c == ',') 170490075Sobrien break; 1705132718Skan } 170618334Speter 170718334Speter constraints[i] = p; 170818334Speter 170918334Speter /* How we account for this operand now depends on whether it is a 171018334Speter pseudo register or not. If it is, we first check if any 171118334Speter register classes are valid. If not, we ignore this alternative, 171218334Speter since we want to assume that all pseudos get allocated for 171318334Speter register preferencing. If some register class is valid, compute 171418334Speter the costs of moving the pseudo into that class. */ 171518334Speter 1716169689Skan if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER) 171718334Speter { 171818334Speter if (classes[i] == NO_REGS) 171952284Sobrien { 172090075Sobrien /* We must always fail if the operand is a REG, but 172190075Sobrien we did not find a suitable class. 1722117395Skan 172390075Sobrien Otherwise we may perform an uninitialized read 172490075Sobrien from this_op_costs after the `continue' statement 172590075Sobrien below. */ 172690075Sobrien alt_fail = 1; 172752284Sobrien } 172818334Speter else 172918334Speter { 173018334Speter struct costs *pp = &this_op_costs[i]; 173118334Speter 173218334Speter for (class = 0; class < N_REG_CLASSES; class++) 173390075Sobrien pp->cost[class] 173490075Sobrien = ((recog_data.operand_type[i] != OP_OUT 173590075Sobrien ? may_move_in_cost[mode][class][(int) classes[i]] 173690075Sobrien : 0) 173790075Sobrien + (recog_data.operand_type[i] != OP_IN 173890075Sobrien ? may_move_out_cost[mode][(int) classes[i]][class] 173990075Sobrien : 0)); 174018334Speter 174118334Speter /* If the alternative actually allows memory, make things 174218334Speter a bit cheaper since we won't need an extra insn to 174318334Speter load it. */ 174418334Speter 174590075Sobrien pp->mem_cost 174690075Sobrien = ((recog_data.operand_type[i] != OP_IN 174790075Sobrien ? MEMORY_MOVE_COST (mode, classes[i], 0) 174890075Sobrien : 0) 174990075Sobrien + (recog_data.operand_type[i] != OP_OUT 175090075Sobrien ? MEMORY_MOVE_COST (mode, classes[i], 1) 175190075Sobrien : 0) - allows_mem[i]); 175218334Speter 175318334Speter /* If we have assigned a class to this register in our 175418334Speter first pass, add a cost to this alternative corresponding 175518334Speter to what we would add if this register were not in the 175618334Speter appropriate class. */ 175718334Speter 1758169689Skan if (reg_pref && reg_pref[REGNO (op)].prefclass != NO_REGS) 175918334Speter alt_cost 176090075Sobrien += (may_move_in_cost[mode] 176190075Sobrien [(unsigned char) reg_pref[REGNO (op)].prefclass] 176290075Sobrien [(int) classes[i]]); 176318334Speter } 176418334Speter } 176518334Speter 176618334Speter /* Otherwise, if this alternative wins, either because we 176718334Speter have already determined that or if we have a hard register of 176818334Speter the proper class, there is no cost for this alternative. */ 176918334Speter 177018334Speter else if (win 1771169689Skan || (REG_P (op) 177218334Speter && reg_fits_class_p (op, classes[i], 0, GET_MODE (op)))) 177318334Speter ; 177418334Speter 177518334Speter /* If registers are valid, the cost of this alternative includes 177618334Speter copying the object to and/or from a register. */ 177718334Speter 177818334Speter else if (classes[i] != NO_REGS) 177918334Speter { 178090075Sobrien if (recog_data.operand_type[i] != OP_OUT) 1781169689Skan alt_cost += copy_cost (op, mode, classes[i], 1, NULL); 178218334Speter 178390075Sobrien if (recog_data.operand_type[i] != OP_IN) 1784169689Skan alt_cost += copy_cost (op, mode, classes[i], 0, NULL); 178518334Speter } 178618334Speter 178718334Speter /* The only other way this alternative can be used is if this is a 178818334Speter constant that could be placed into memory. */ 178918334Speter 179090075Sobrien else if (CONSTANT_P (op) && (allows_addr || allows_mem[i])) 179150397Sobrien alt_cost += MEMORY_MOVE_COST (mode, classes[i], 1); 179218334Speter else 179318334Speter alt_fail = 1; 179418334Speter } 179518334Speter 179618334Speter if (alt_fail) 179718334Speter continue; 179818334Speter 179918334Speter /* Finally, update the costs with the information we've calculated 180018334Speter about this alternative. */ 180118334Speter 180218334Speter for (i = 0; i < n_ops; i++) 1803169689Skan if (REG_P (ops[i]) 180418334Speter && REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER) 180518334Speter { 180618334Speter struct costs *pp = &op_costs[i], *qq = &this_op_costs[i]; 180790075Sobrien int scale = 1 + (recog_data.operand_type[i] == OP_INOUT); 180818334Speter 180918334Speter pp->mem_cost = MIN (pp->mem_cost, 181018334Speter (qq->mem_cost + alt_cost) * scale); 181118334Speter 181218334Speter for (class = 0; class < N_REG_CLASSES; class++) 181318334Speter pp->cost[class] = MIN (pp->cost[class], 181418334Speter (qq->cost[class] + alt_cost) * scale); 181518334Speter } 181618334Speter } 181718334Speter 181818334Speter /* If this insn is a single set copying operand 1 to operand 0 181990075Sobrien and one operand is a pseudo with the other a hard reg or a pseudo 182090075Sobrien that prefers a register that is in its own register class then 182190075Sobrien we may want to adjust the cost of that register class to -1. 1822117395Skan 182390075Sobrien Avoid the adjustment if the source does not die to avoid stressing of 1824132718Skan register allocator by preferrencing two colliding registers into single 182590075Sobrien class. 182618334Speter 182790075Sobrien Also avoid the adjustment if a copy between registers of the class 182890075Sobrien is expensive (ten times the cost of a default copy is considered 182990075Sobrien arbitrarily expensive). This avoids losing when the preferred class 183090075Sobrien is very expensive as the source of a copy instruction. */ 183190075Sobrien 183218334Speter if ((set = single_set (insn)) != 0 183318334Speter && ops[0] == SET_DEST (set) && ops[1] == SET_SRC (set) 1834169689Skan && REG_P (ops[0]) && REG_P (ops[1]) 183590075Sobrien && find_regno_note (insn, REG_DEAD, REGNO (ops[1]))) 183618334Speter for (i = 0; i <= 1; i++) 183718334Speter if (REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER) 183818334Speter { 183990075Sobrien unsigned int regno = REGNO (ops[!i]); 184018334Speter enum machine_mode mode = GET_MODE (ops[!i]); 184118334Speter int class; 184290075Sobrien unsigned int nr; 184318334Speter 1844169689Skan if (regno >= FIRST_PSEUDO_REGISTER && reg_pref != 0 1845169689Skan && reg_pref[regno].prefclass != NO_REGS) 184690075Sobrien { 184790075Sobrien enum reg_class pref = reg_pref[regno].prefclass; 184890075Sobrien 184990075Sobrien if ((reg_class_size[(unsigned char) pref] 1850117395Skan == (unsigned) CLASS_MAX_NREGS (pref, mode)) 185190075Sobrien && REGISTER_MOVE_COST (mode, pref, pref) < 10 * 2) 185290075Sobrien op_costs[i].cost[(unsigned char) pref] = -1; 185390075Sobrien } 185418334Speter else if (regno < FIRST_PSEUDO_REGISTER) 185518334Speter for (class = 0; class < N_REG_CLASSES; class++) 185618334Speter if (TEST_HARD_REG_BIT (reg_class_contents[class], regno) 1857117395Skan && reg_class_size[class] == (unsigned) CLASS_MAX_NREGS (class, mode)) 185818334Speter { 185918334Speter if (reg_class_size[class] == 1) 186018334Speter op_costs[i].cost[class] = -1; 186118334Speter else 186218334Speter { 1863169689Skan for (nr = 0; nr < (unsigned) hard_regno_nregs[regno][mode]; nr++) 186418334Speter { 186590075Sobrien if (! TEST_HARD_REG_BIT (reg_class_contents[class], 186690075Sobrien regno + nr)) 186718334Speter break; 186818334Speter } 186918334Speter 1870169689Skan if (nr == (unsigned) hard_regno_nregs[regno][mode]) 187118334Speter op_costs[i].cost[class] = -1; 187218334Speter } 187318334Speter } 187418334Speter } 187518334Speter} 187618334Speter 1877117395Skan/* Compute the cost of loading X into (if TO_P is nonzero) or from (if 187818334Speter TO_P is zero) a register of class CLASS in mode MODE. 187918334Speter 188018334Speter X must not be a pseudo. */ 188118334Speter 188218334Speterstatic int 1883169689Skancopy_cost (rtx x, enum machine_mode mode, enum reg_class class, int to_p, 1884169689Skan secondary_reload_info *prev_sri) 188518334Speter{ 188618334Speter enum reg_class secondary_class = NO_REGS; 1887169689Skan secondary_reload_info sri; 188818334Speter 188918334Speter /* If X is a SCRATCH, there is actually nothing to move since we are 189018334Speter assuming optimal allocation. */ 189118334Speter 189218334Speter if (GET_CODE (x) == SCRATCH) 189318334Speter return 0; 189418334Speter 189518334Speter /* Get the class we will actually use for a reload. */ 189618334Speter class = PREFERRED_RELOAD_CLASS (x, class); 189718334Speter 1898169689Skan /* If we need a secondary reload for an intermediate, the 189918334Speter cost is that to load the input into the intermediate register, then 1900169689Skan to copy it. */ 190118334Speter 1902169689Skan sri.prev_sri = prev_sri; 1903169689Skan sri.extra_cost = 0; 1904169689Skan secondary_class = targetm.secondary_reload (to_p, x, class, mode, &sri); 190518334Speter 190618334Speter if (secondary_class != NO_REGS) 190790075Sobrien return (move_cost[mode][(int) secondary_class][(int) class] 1908169689Skan + sri.extra_cost 1909169689Skan + copy_cost (x, mode, secondary_class, to_p, &sri)); 191018334Speter 191118334Speter /* For memory, use the memory move cost, for (hard) registers, use the 191218334Speter cost to move between the register classes, and use 2 for everything 191318334Speter else (constants). */ 191418334Speter 1915169689Skan if (MEM_P (x) || class == NO_REGS) 1916169689Skan return sri.extra_cost + MEMORY_MOVE_COST (mode, class, to_p); 191718334Speter 1918169689Skan else if (REG_P (x)) 1919169689Skan return (sri.extra_cost 1920169689Skan + move_cost[mode][(int) REGNO_REG_CLASS (REGNO (x))][(int) class]); 192118334Speter 192218334Speter else 192318334Speter /* If this is a constant, we may eventually want to call rtx_cost here. */ 1924169689Skan return sri.extra_cost + COSTS_N_INSNS (1); 192518334Speter} 192618334Speter 192718334Speter/* Record the pseudo registers we must reload into hard registers 192818334Speter in a subexpression of a memory address, X. 192918334Speter 1930169689Skan If CONTEXT is 0, we are looking at the base part of an address, otherwise we 1931169689Skan are looking at the index part. 193218334Speter 1933169689Skan MODE is the mode of the memory reference; OUTER_CODE and INDEX_CODE 1934169689Skan give the context that the rtx appears in. These three arguments are 1935169689Skan passed down to base_reg_class. 1936169689Skan 193718334Speter SCALE is twice the amount to multiply the cost by (it is twice so we 193818334Speter can represent half-cost adjustments). */ 193918334Speter 194018334Speterstatic void 1941169689Skanrecord_address_regs (enum machine_mode mode, rtx x, int context, 1942169689Skan enum rtx_code outer_code, enum rtx_code index_code, 1943169689Skan int scale) 194418334Speter{ 194590075Sobrien enum rtx_code code = GET_CODE (x); 1946169689Skan enum reg_class class; 194718334Speter 1948169689Skan if (context == 1) 1949169689Skan class = INDEX_REG_CLASS; 1950169689Skan else 1951169689Skan class = base_reg_class (mode, outer_code, index_code); 1952169689Skan 195318334Speter switch (code) 195418334Speter { 195518334Speter case CONST_INT: 195618334Speter case CONST: 195718334Speter case CC0: 195818334Speter case PC: 195918334Speter case SYMBOL_REF: 196018334Speter case LABEL_REF: 196118334Speter return; 196218334Speter 196318334Speter case PLUS: 196418334Speter /* When we have an address that is a sum, 196518334Speter we must determine whether registers are "base" or "index" regs. 196618334Speter If there is a sum of two registers, we must choose one to be 196790075Sobrien the "base". Luckily, we can use the REG_POINTER to make a good 196890075Sobrien choice most of the time. We only need to do this on machines 196990075Sobrien that can have two registers in an address and where the base 197090075Sobrien and index register classes are different. 197118334Speter 197218334Speter ??? This code used to set REGNO_POINTER_FLAG in some cases, but 197318334Speter that seems bogus since it should only be set when we are sure 197418334Speter the register is being used as a pointer. */ 197518334Speter 197618334Speter { 197718334Speter rtx arg0 = XEXP (x, 0); 197818334Speter rtx arg1 = XEXP (x, 1); 197990075Sobrien enum rtx_code code0 = GET_CODE (arg0); 198090075Sobrien enum rtx_code code1 = GET_CODE (arg1); 198118334Speter 198218334Speter /* Look inside subregs. */ 198318334Speter if (code0 == SUBREG) 198418334Speter arg0 = SUBREG_REG (arg0), code0 = GET_CODE (arg0); 198518334Speter if (code1 == SUBREG) 198618334Speter arg1 = SUBREG_REG (arg1), code1 = GET_CODE (arg1); 198718334Speter 198818334Speter /* If this machine only allows one register per address, it must 198918334Speter be in the first operand. */ 199018334Speter 199118334Speter if (MAX_REGS_PER_ADDRESS == 1) 1992169689Skan record_address_regs (mode, arg0, 0, PLUS, code1, scale); 199318334Speter 199418334Speter /* If index and base registers are the same on this machine, just 199518334Speter record registers in any non-constant operands. We assume here, 1996117395Skan as well as in the tests below, that all addresses are in 199718334Speter canonical form. */ 199818334Speter 1999169689Skan else if (INDEX_REG_CLASS == base_reg_class (VOIDmode, PLUS, SCRATCH)) 200018334Speter { 2001169689Skan record_address_regs (mode, arg0, context, PLUS, code1, scale); 200218334Speter if (! CONSTANT_P (arg1)) 2003169689Skan record_address_regs (mode, arg1, context, PLUS, code0, scale); 200418334Speter } 200518334Speter 200618334Speter /* If the second operand is a constant integer, it doesn't change 200718334Speter what class the first operand must be. */ 200818334Speter 200918334Speter else if (code1 == CONST_INT || code1 == CONST_DOUBLE) 2010169689Skan record_address_regs (mode, arg0, context, PLUS, code1, scale); 201118334Speter 201218334Speter /* If the second operand is a symbolic constant, the first operand 201318334Speter must be an index register. */ 201418334Speter 201518334Speter else if (code1 == SYMBOL_REF || code1 == CONST || code1 == LABEL_REF) 2016169689Skan record_address_regs (mode, arg0, 1, PLUS, code1, scale); 201718334Speter 201850397Sobrien /* If both operands are registers but one is already a hard register 2019169689Skan of index or reg-base class, give the other the class that the 2020169689Skan hard register is not. */ 202118334Speter 202218334Speter else if (code0 == REG && code1 == REG 202350397Sobrien && REGNO (arg0) < FIRST_PSEUDO_REGISTER 2024169689Skan && (ok_for_base_p_nonstrict (arg0, mode, PLUS, REG) 2025169689Skan || ok_for_index_p_nonstrict (arg0))) 2026169689Skan record_address_regs (mode, arg1, 2027169689Skan ok_for_base_p_nonstrict (arg0, mode, PLUS, REG) 2028169689Skan ? 1 : 0, 2029169689Skan PLUS, REG, scale); 203050397Sobrien else if (code0 == REG && code1 == REG 203150397Sobrien && REGNO (arg1) < FIRST_PSEUDO_REGISTER 2032169689Skan && (ok_for_base_p_nonstrict (arg1, mode, PLUS, REG) 2033169689Skan || ok_for_index_p_nonstrict (arg1))) 2034169689Skan record_address_regs (mode, arg0, 2035169689Skan ok_for_base_p_nonstrict (arg1, mode, PLUS, REG) 2036169689Skan ? 1 : 0, 2037169689Skan PLUS, REG, scale); 203850397Sobrien 203950397Sobrien /* If one operand is known to be a pointer, it must be the base 204050397Sobrien with the other operand the index. Likewise if the other operand 204150397Sobrien is a MULT. */ 204250397Sobrien 204390075Sobrien else if ((code0 == REG && REG_POINTER (arg0)) 204450397Sobrien || code1 == MULT) 204518334Speter { 2046169689Skan record_address_regs (mode, arg0, 0, PLUS, code1, scale); 2047169689Skan record_address_regs (mode, arg1, 1, PLUS, code0, scale); 204818334Speter } 204990075Sobrien else if ((code1 == REG && REG_POINTER (arg1)) 205050397Sobrien || code0 == MULT) 205150397Sobrien { 2052169689Skan record_address_regs (mode, arg0, 1, PLUS, code1, scale); 2053169689Skan record_address_regs (mode, arg1, 0, PLUS, code0, scale); 205450397Sobrien } 205518334Speter 205650397Sobrien /* Otherwise, count equal chances that each might be a base 205718334Speter or index register. This case should be rare. */ 205818334Speter 205950397Sobrien else 206018334Speter { 2061169689Skan record_address_regs (mode, arg0, 0, PLUS, code1, scale / 2); 2062169689Skan record_address_regs (mode, arg0, 1, PLUS, code1, scale / 2); 2063169689Skan record_address_regs (mode, arg1, 0, PLUS, code0, scale / 2); 2064169689Skan record_address_regs (mode, arg1, 1, PLUS, code0, scale / 2); 206518334Speter } 206618334Speter } 206718334Speter break; 206818334Speter 206990075Sobrien /* Double the importance of a pseudo register that is incremented 207090075Sobrien or decremented, since it would take two extra insns 207190075Sobrien if it ends up in the wrong place. */ 207290075Sobrien case POST_MODIFY: 207390075Sobrien case PRE_MODIFY: 2074169689Skan record_address_regs (mode, XEXP (x, 0), 0, code, 2075169689Skan GET_CODE (XEXP (XEXP (x, 1), 1)), 2 * scale); 207690075Sobrien if (REG_P (XEXP (XEXP (x, 1), 1))) 2077169689Skan record_address_regs (mode, XEXP (XEXP (x, 1), 1), 1, code, REG, 2078169689Skan 2 * scale); 207990075Sobrien break; 208090075Sobrien 208118334Speter case POST_INC: 208218334Speter case PRE_INC: 208318334Speter case POST_DEC: 208418334Speter case PRE_DEC: 208518334Speter /* Double the importance of a pseudo register that is incremented 208618334Speter or decremented, since it would take two extra insns 208718334Speter if it ends up in the wrong place. If the operand is a pseudo, 208818334Speter show it is being used in an INC_DEC context. */ 208918334Speter 209018334Speter#ifdef FORBIDDEN_INC_DEC_CLASSES 2091169689Skan if (REG_P (XEXP (x, 0)) 209218334Speter && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER) 209318334Speter in_inc_dec[REGNO (XEXP (x, 0))] = 1; 209418334Speter#endif 209518334Speter 2096169689Skan record_address_regs (mode, XEXP (x, 0), 0, code, SCRATCH, 2 * scale); 209718334Speter break; 209818334Speter 209918334Speter case REG: 210018334Speter { 210190075Sobrien struct costs *pp = &costs[REGNO (x)]; 210290075Sobrien int i; 210318334Speter 210450397Sobrien pp->mem_cost += (MEMORY_MOVE_COST (Pmode, class, 1) * scale) / 2; 210518334Speter 210618334Speter for (i = 0; i < N_REG_CLASSES; i++) 210790075Sobrien pp->cost[i] += (may_move_in_cost[Pmode][i][(int) class] * scale) / 2; 210818334Speter } 210918334Speter break; 211018334Speter 211118334Speter default: 211218334Speter { 211390075Sobrien const char *fmt = GET_RTX_FORMAT (code); 211490075Sobrien int i; 211518334Speter for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 211618334Speter if (fmt[i] == 'e') 2117169689Skan record_address_regs (mode, XEXP (x, i), context, code, SCRATCH, 2118169689Skan scale); 211918334Speter } 212018334Speter } 212118334Speter} 212218334Speter 212318334Speter#ifdef FORBIDDEN_INC_DEC_CLASSES 212418334Speter 212518334Speter/* Return 1 if REG is valid as an auto-increment memory reference 212618334Speter to an object of MODE. */ 212718334Speter 212850397Sobrienstatic int 2129132718Skanauto_inc_dec_reg_p (rtx reg, enum machine_mode mode) 213018334Speter{ 213152284Sobrien if (HAVE_POST_INCREMENT 213252284Sobrien && memory_address_p (mode, gen_rtx_POST_INC (Pmode, reg))) 213318334Speter return 1; 213418334Speter 213552284Sobrien if (HAVE_POST_DECREMENT 213652284Sobrien && memory_address_p (mode, gen_rtx_POST_DEC (Pmode, reg))) 213718334Speter return 1; 213818334Speter 213952284Sobrien if (HAVE_PRE_INCREMENT 214052284Sobrien && memory_address_p (mode, gen_rtx_PRE_INC (Pmode, reg))) 214118334Speter return 1; 214218334Speter 214352284Sobrien if (HAVE_PRE_DECREMENT 214452284Sobrien && memory_address_p (mode, gen_rtx_PRE_DEC (Pmode, reg))) 214518334Speter return 1; 214618334Speter 214718334Speter return 0; 214818334Speter} 214918334Speter#endif 215018334Speter 215190075Sobrienstatic short *renumber; 215290075Sobrienstatic size_t regno_allocated; 215390075Sobrienstatic unsigned int reg_n_max; 215452284Sobrien 215550397Sobrien/* Allocate enough space to hold NUM_REGS registers for the tables used for 215650397Sobrien reg_scan and flow_analysis that are indexed by the register number. If 2157117395Skan NEW_P is nonzero, initialize all of the registers, otherwise only 215850397Sobrien initialize the new registers allocated. The same table is kept from 215950397Sobrien function to function, only reallocating it when we need more room. If 2160117395Skan RENUMBER_P is nonzero, allocate the reg_renumber array also. */ 216118334Speter 216250397Sobrienvoid 2163132718Skanallocate_reg_info (size_t num_regs, int new_p, int renumber_p) 216450397Sobrien{ 216550397Sobrien size_t size_info; 216650397Sobrien size_t size_renumber; 216750397Sobrien size_t min = (new_p) ? 0 : reg_n_max; 216850397Sobrien struct reg_info_data *reg_data; 216918334Speter 217050397Sobrien if (num_regs > regno_allocated) 217150397Sobrien { 217250397Sobrien size_t old_allocated = regno_allocated; 217318334Speter 2174132718Skan regno_allocated = num_regs + (num_regs / 20); /* Add some slop space. */ 217550397Sobrien size_renumber = regno_allocated * sizeof (short); 217618334Speter 217750397Sobrien if (!reg_n_info) 217850397Sobrien { 2179169689Skan reg_n_info = VEC_alloc (reg_info_p, heap, regno_allocated); 2180169689Skan VEC_safe_grow (reg_info_p, heap, reg_n_info, regno_allocated); 2181169689Skan memset (VEC_address (reg_info_p, reg_n_info), 0, 2182169689Skan sizeof (reg_info_p) * regno_allocated); 2183132718Skan renumber = xmalloc (size_renumber); 2184169689Skan reg_pref_buffer = XNEWVEC (struct reg_pref, regno_allocated); 218550397Sobrien } 218650397Sobrien else 218750397Sobrien { 2188169689Skan size_t old_length = VEC_length (reg_info_p, reg_n_info); 2189169689Skan if (old_length < regno_allocated) 2190169689Skan { 2191169689Skan reg_info_p *addr; 2192169689Skan VEC_safe_grow (reg_info_p, heap, reg_n_info, regno_allocated); 2193169689Skan addr = VEC_address (reg_info_p, reg_n_info); 2194169689Skan memset (&addr[old_length], 0, 2195169689Skan sizeof (reg_info_p) * (regno_allocated - old_length)); 2196169689Skan } 2197169689Skan else if (regno_allocated < old_length) 2198169689Skan { 2199169689Skan VEC_truncate (reg_info_p, reg_n_info, regno_allocated); 2200169689Skan } 220118334Speter 2202132718Skan if (new_p) /* If we're zapping everything, no need to realloc. */ 220350397Sobrien { 220490075Sobrien free ((char *) renumber); 220590075Sobrien free ((char *) reg_pref); 2206132718Skan renumber = xmalloc (size_renumber); 2207169689Skan reg_pref_buffer = XNEWVEC (struct reg_pref, regno_allocated); 220850397Sobrien } 220918334Speter 221050397Sobrien else 221150397Sobrien { 2212132718Skan renumber = xrealloc (renumber, size_renumber); 2213169689Skan reg_pref_buffer = (struct reg_pref *) xrealloc (reg_pref_buffer, 2214132718Skan regno_allocated 2215132718Skan * sizeof (struct reg_pref)); 221650397Sobrien } 221750397Sobrien } 221818334Speter 221950397Sobrien size_info = (regno_allocated - old_allocated) * sizeof (reg_info) 222050397Sobrien + sizeof (struct reg_info_data) - sizeof (reg_info); 2221132718Skan reg_data = xcalloc (size_info, 1); 222250397Sobrien reg_data->min_index = old_allocated; 222350397Sobrien reg_data->max_index = regno_allocated - 1; 222450397Sobrien reg_data->next = reg_info_head; 222550397Sobrien reg_info_head = reg_data; 222650397Sobrien } 222750397Sobrien 222850397Sobrien reg_n_max = num_regs; 222950397Sobrien if (min < num_regs) 223050397Sobrien { 223150397Sobrien /* Loop through each of the segments allocated for the actual 223250397Sobrien reg_info pages, and set up the pointers, zero the pages, etc. */ 2233117395Skan for (reg_data = reg_info_head; 223490075Sobrien reg_data && reg_data->max_index >= min; 223590075Sobrien reg_data = reg_data->next) 223650397Sobrien { 223750397Sobrien size_t min_index = reg_data->min_index; 223850397Sobrien size_t max_index = reg_data->max_index; 223990075Sobrien size_t max = MIN (max_index, num_regs); 224090075Sobrien size_t local_min = min - min_index; 224190075Sobrien size_t i; 224250397Sobrien 224390075Sobrien if (reg_data->min_index > num_regs) 224490075Sobrien continue; 224552284Sobrien 224690075Sobrien if (min < min_index) 224790075Sobrien local_min = 0; 224890075Sobrien if (!reg_data->used_p) /* page just allocated with calloc */ 224990075Sobrien reg_data->used_p = 1; /* no need to zero */ 225090075Sobrien else 2251132718Skan memset (®_data->data[local_min], 0, 2252132718Skan sizeof (reg_info) * (max - min_index - local_min + 1)); 225350397Sobrien 225490075Sobrien for (i = min_index+local_min; i <= max; i++) 225590075Sobrien { 2256169689Skan VEC_replace (reg_info_p, reg_n_info, i, 2257169689Skan ®_data->data[i-min_index]); 225890075Sobrien REG_BASIC_BLOCK (i) = REG_BLOCK_UNKNOWN; 225990075Sobrien renumber[i] = -1; 226090075Sobrien reg_pref_buffer[i].prefclass = (char) NO_REGS; 226190075Sobrien reg_pref_buffer[i].altclass = (char) NO_REGS; 226250397Sobrien } 226350397Sobrien } 226450397Sobrien } 226550397Sobrien 226650397Sobrien /* If {pref,alt}class have already been allocated, update the pointers to 226750397Sobrien the newly realloced ones. */ 226890075Sobrien if (reg_pref) 226990075Sobrien reg_pref = reg_pref_buffer; 227050397Sobrien 227150397Sobrien if (renumber_p) 227250397Sobrien reg_renumber = renumber; 227350397Sobrien} 227450397Sobrien 227552284Sobrien/* Free up the space allocated by allocate_reg_info. */ 227652284Sobrienvoid 2277132718Skanfree_reg_info (void) 227852284Sobrien{ 227952284Sobrien if (reg_n_info) 228052284Sobrien { 228152284Sobrien struct reg_info_data *reg_data; 228252284Sobrien struct reg_info_data *reg_next; 228352284Sobrien 2284169689Skan VEC_free (reg_info_p, heap, reg_n_info); 228552284Sobrien for (reg_data = reg_info_head; reg_data; reg_data = reg_next) 228652284Sobrien { 228752284Sobrien reg_next = reg_data->next; 228890075Sobrien free ((char *) reg_data); 228952284Sobrien } 229052284Sobrien 229190075Sobrien free (reg_pref_buffer); 229290075Sobrien reg_pref_buffer = (struct reg_pref *) 0; 229390075Sobrien reg_info_head = (struct reg_info_data *) 0; 229490075Sobrien renumber = (short *) 0; 229552284Sobrien } 229652284Sobrien regno_allocated = 0; 229752284Sobrien reg_n_max = 0; 229852284Sobrien} 229950397Sobrien 230050397Sobrien/* This is the `regscan' pass of the compiler, run just before cse 230150397Sobrien and again just before loop. 230250397Sobrien 230350397Sobrien It finds the first and last use of each pseudo-register 230450397Sobrien and records them in the vectors regno_first_uid, regno_last_uid 230550397Sobrien and counts the number of sets in the vector reg_n_sets. 230650397Sobrien 230750397Sobrien REPEAT is nonzero the second time this is called. */ 230850397Sobrien 230918334Speter/* Maximum number of parallel sets and clobbers in any insn in this fn. 231018334Speter Always at least 3, since the combiner could put that many together 231190075Sobrien and we want this to remain correct for all the remaining passes. 231290075Sobrien This corresponds to the maximum number of times note_stores will call 231390075Sobrien a function for any insn. */ 231418334Speter 231518334Speterint max_parallel; 231618334Speter 2317117395Skan/* Used as a temporary to record the largest number of registers in 231890075Sobrien PARALLEL in a SET_DEST. This is added to max_parallel. */ 231990075Sobrien 232090075Sobrienstatic int max_set_parallel; 232190075Sobrien 232218334Spetervoid 2323169689Skanreg_scan (rtx f, unsigned int nregs) 232418334Speter{ 232590075Sobrien rtx insn; 232618334Speter 2327132718Skan timevar_push (TV_REG_SCAN); 2328132718Skan 232950397Sobrien allocate_reg_info (nregs, TRUE, FALSE); 233018334Speter max_parallel = 3; 233190075Sobrien max_set_parallel = 0; 233218334Speter 233318334Speter for (insn = f; insn; insn = NEXT_INSN (insn)) 2334132718Skan if (INSN_P (insn)) 233518334Speter { 2336132718Skan rtx pat = PATTERN (insn); 2337132718Skan if (GET_CODE (pat) == PARALLEL 2338132718Skan && XVECLEN (pat, 0) > max_parallel) 2339132718Skan max_parallel = XVECLEN (pat, 0); 2340169689Skan reg_scan_mark_refs (pat, insn, 0); 234118334Speter 234218334Speter if (REG_NOTES (insn)) 2343169689Skan reg_scan_mark_refs (REG_NOTES (insn), insn, 1); 234418334Speter } 234590075Sobrien 234690075Sobrien max_parallel += max_set_parallel; 2347132718Skan 2348132718Skan timevar_pop (TV_REG_SCAN); 234918334Speter} 235018334Speter 235118334Speter/* X is the expression to scan. INSN is the insn it appears in. 2352169689Skan NOTE_FLAG is nonzero if X is from INSN's notes rather than its body. */ 235318334Speter 235418334Speterstatic void 2355169689Skanreg_scan_mark_refs (rtx x, rtx insn, int note_flag) 235618334Speter{ 235790075Sobrien enum rtx_code code; 235890075Sobrien rtx dest; 235990075Sobrien rtx note; 236018334Speter 2361117395Skan if (!x) 2362117395Skan return; 236350397Sobrien code = GET_CODE (x); 236418334Speter switch (code) 236518334Speter { 236652284Sobrien case CONST: 236718334Speter case CONST_INT: 236818334Speter case CONST_DOUBLE: 236996263Sobrien case CONST_VECTOR: 237018334Speter case CC0: 237118334Speter case PC: 237218334Speter case SYMBOL_REF: 237318334Speter case LABEL_REF: 237418334Speter case ADDR_VEC: 237518334Speter case ADDR_DIFF_VEC: 237618334Speter return; 237718334Speter 237818334Speter case REG: 237918334Speter { 238090075Sobrien unsigned int regno = REGNO (x); 238118334Speter 2382169689Skan if (!note_flag) 2383169689Skan REGNO_LAST_UID (regno) = INSN_UID (insn); 2384169689Skan if (REGNO_FIRST_UID (regno) == 0) 2385169689Skan REGNO_FIRST_UID (regno) = INSN_UID (insn); 238618334Speter } 238718334Speter break; 238818334Speter 238918334Speter case EXPR_LIST: 239018334Speter if (XEXP (x, 0)) 2391169689Skan reg_scan_mark_refs (XEXP (x, 0), insn, note_flag); 239218334Speter if (XEXP (x, 1)) 2393169689Skan reg_scan_mark_refs (XEXP (x, 1), insn, note_flag); 239418334Speter break; 239518334Speter 239618334Speter case INSN_LIST: 239718334Speter if (XEXP (x, 1)) 2398169689Skan reg_scan_mark_refs (XEXP (x, 1), insn, note_flag); 239918334Speter break; 240018334Speter 2401117395Skan case CLOBBER: 2402117395Skan { 2403117395Skan rtx reg = XEXP (x, 0); 2404169689Skan if (REG_P (reg)) 2405117395Skan { 2406117395Skan REG_N_SETS (REGNO (reg))++; 2407117395Skan REG_N_REFS (REGNO (reg))++; 2408117395Skan } 2409169689Skan else if (MEM_P (reg)) 2410169689Skan reg_scan_mark_refs (XEXP (reg, 0), insn, note_flag); 2411117395Skan } 2412117395Skan break; 2413117395Skan 241418334Speter case SET: 241518334Speter /* Count a set of the destination if it is a register. */ 241618334Speter for (dest = SET_DEST (x); 241718334Speter GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART 241818334Speter || GET_CODE (dest) == ZERO_EXTEND; 241918334Speter dest = XEXP (dest, 0)) 242018334Speter ; 242118334Speter 242290075Sobrien /* For a PARALLEL, record the number of things (less the usual one for a 242390075Sobrien SET) that are set. */ 242490075Sobrien if (GET_CODE (dest) == PARALLEL) 242590075Sobrien max_set_parallel = MAX (max_set_parallel, XVECLEN (dest, 0) - 1); 242690075Sobrien 2427169689Skan if (REG_P (dest)) 242890075Sobrien { 242990075Sobrien REG_N_SETS (REGNO (dest))++; 243090075Sobrien REG_N_REFS (REGNO (dest))++; 243190075Sobrien } 243218334Speter 243318334Speter /* If this is setting a pseudo from another pseudo or the sum of a 243418334Speter pseudo and a constant integer and the other pseudo is known to be 243518334Speter a pointer, set the destination to be a pointer as well. 243618334Speter 243718334Speter Likewise if it is setting the destination from an address or from a 243818334Speter value equivalent to an address or to the sum of an address and 243918334Speter something else. 2440117395Skan 244118334Speter But don't do any of this if the pseudo corresponds to a user 244218334Speter variable since it should have already been set as a pointer based 244318334Speter on the type. */ 244418334Speter 2445169689Skan if (REG_P (SET_DEST (x)) 244618334Speter && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER 244750397Sobrien /* If the destination pseudo is set more than once, then other 244850397Sobrien sets might not be to a pointer value (consider access to a 2449132718Skan union in two threads of control in the presence of global 245090075Sobrien optimizations). So only set REG_POINTER on the destination 245150397Sobrien pseudo if this is the only set of that pseudo. */ 245250397Sobrien && REG_N_SETS (REGNO (SET_DEST (x))) == 1 245318334Speter && ! REG_USERVAR_P (SET_DEST (x)) 245490075Sobrien && ! REG_POINTER (SET_DEST (x)) 2455169689Skan && ((REG_P (SET_SRC (x)) 245690075Sobrien && REG_POINTER (SET_SRC (x))) 245718334Speter || ((GET_CODE (SET_SRC (x)) == PLUS 245818334Speter || GET_CODE (SET_SRC (x)) == LO_SUM) 245918334Speter && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT 2460169689Skan && REG_P (XEXP (SET_SRC (x), 0)) 246190075Sobrien && REG_POINTER (XEXP (SET_SRC (x), 0))) 246218334Speter || GET_CODE (SET_SRC (x)) == CONST 246318334Speter || GET_CODE (SET_SRC (x)) == SYMBOL_REF 246418334Speter || GET_CODE (SET_SRC (x)) == LABEL_REF 246518334Speter || (GET_CODE (SET_SRC (x)) == HIGH 246618334Speter && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST 246718334Speter || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF 246818334Speter || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF)) 246918334Speter || ((GET_CODE (SET_SRC (x)) == PLUS 247018334Speter || GET_CODE (SET_SRC (x)) == LO_SUM) 247118334Speter && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST 247218334Speter || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF 247318334Speter || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF)) 247418334Speter || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0 247518334Speter && (GET_CODE (XEXP (note, 0)) == CONST 247618334Speter || GET_CODE (XEXP (note, 0)) == SYMBOL_REF 247718334Speter || GET_CODE (XEXP (note, 0)) == LABEL_REF)))) 247890075Sobrien REG_POINTER (SET_DEST (x)) = 1; 247918334Speter 248090075Sobrien /* If this is setting a register from a register or from a simple 2481132718Skan conversion of a register, propagate REG_EXPR. */ 2482169689Skan if (REG_P (dest)) 248390075Sobrien { 248490075Sobrien rtx src = SET_SRC (x); 248590075Sobrien 248690075Sobrien while (GET_CODE (src) == SIGN_EXTEND 248790075Sobrien || GET_CODE (src) == ZERO_EXTEND 248890075Sobrien || GET_CODE (src) == TRUNCATE 248990075Sobrien || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src))) 249090075Sobrien src = XEXP (src, 0); 249190075Sobrien 2492132718Skan if (!REG_ATTRS (dest) && REG_P (src)) 2493132718Skan REG_ATTRS (dest) = REG_ATTRS (src); 2494169689Skan if (!REG_ATTRS (dest) && MEM_P (src)) 2495132718Skan set_reg_attrs_from_mem (dest, src); 249690075Sobrien } 249790075Sobrien 249850397Sobrien /* ... fall through ... */ 249918334Speter 250018334Speter default: 250118334Speter { 250290075Sobrien const char *fmt = GET_RTX_FORMAT (code); 250390075Sobrien int i; 250418334Speter for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 250518334Speter { 250618334Speter if (fmt[i] == 'e') 2507169689Skan reg_scan_mark_refs (XEXP (x, i), insn, note_flag); 250818334Speter else if (fmt[i] == 'E' && XVEC (x, i) != 0) 250918334Speter { 251090075Sobrien int j; 251118334Speter for (j = XVECLEN (x, i) - 1; j >= 0; j--) 2512169689Skan reg_scan_mark_refs (XVECEXP (x, i, j), insn, note_flag); 251318334Speter } 251418334Speter } 251518334Speter } 251618334Speter } 251718334Speter} 251818334Speter 251918334Speter/* Return nonzero if C1 is a subset of C2, i.e., if every register in C1 252018334Speter is also in C2. */ 252118334Speter 252218334Speterint 2523132718Skanreg_class_subset_p (enum reg_class c1, enum reg_class c2) 252418334Speter{ 252518334Speter if (c1 == c2) return 1; 252618334Speter 252718334Speter if (c2 == ALL_REGS) 252818334Speter win: 252918334Speter return 1; 253090075Sobrien GO_IF_HARD_REG_SUBSET (reg_class_contents[(int) c1], 253190075Sobrien reg_class_contents[(int) c2], 253218334Speter win); 253318334Speter return 0; 253418334Speter} 253518334Speter 253618334Speter/* Return nonzero if there is a register that is in both C1 and C2. */ 253718334Speter 253818334Speterint 2539132718Skanreg_classes_intersect_p (enum reg_class c1, enum reg_class c2) 254018334Speter{ 2541132718Skan HARD_REG_SET c; 254218334Speter 254318334Speter if (c1 == c2) return 1; 254418334Speter 254518334Speter if (c1 == ALL_REGS || c2 == ALL_REGS) 254618334Speter return 1; 254718334Speter 254818334Speter COPY_HARD_REG_SET (c, reg_class_contents[(int) c1]); 254918334Speter AND_HARD_REG_SET (c, reg_class_contents[(int) c2]); 255018334Speter 255118334Speter GO_IF_HARD_REG_SUBSET (c, reg_class_contents[(int) NO_REGS], lose); 255218334Speter return 1; 255318334Speter 255418334Speter lose: 255518334Speter return 0; 255618334Speter} 255718334Speter 2558117395Skan#ifdef CANNOT_CHANGE_MODE_CLASS 2559146895Skan 2560146895Skanstruct subregs_of_mode_node 2561146895Skan{ 2562146895Skan unsigned int block; 2563146895Skan unsigned char modes[MAX_MACHINE_MODE]; 2564146895Skan}; 2565146895Skan 2566146895Skanstatic htab_t subregs_of_mode; 2567146895Skan 2568146895Skanstatic hashval_t 2569146895Skansom_hash (const void *x) 2570146895Skan{ 2571146895Skan const struct subregs_of_mode_node *a = x; 2572146895Skan return a->block; 2573146895Skan} 2574146895Skan 2575146895Skanstatic int 2576146895Skansom_eq (const void *x, const void *y) 2577146895Skan{ 2578146895Skan const struct subregs_of_mode_node *a = x; 2579146895Skan const struct subregs_of_mode_node *b = y; 2580146895Skan return a->block == b->block; 2581146895Skan} 2582146895Skan 2583146895Skanvoid 2584146895Skaninit_subregs_of_mode (void) 2585146895Skan{ 2586146895Skan if (subregs_of_mode) 2587146895Skan htab_empty (subregs_of_mode); 2588146895Skan else 2589146895Skan subregs_of_mode = htab_create (100, som_hash, som_eq, free); 2590146895Skan} 2591146895Skan 2592146895Skanvoid 2593146895Skanrecord_subregs_of_mode (rtx subreg) 2594146895Skan{ 2595146895Skan struct subregs_of_mode_node dummy, *node; 2596146895Skan enum machine_mode mode; 2597146895Skan unsigned int regno; 2598146895Skan void **slot; 2599146895Skan 2600146895Skan if (!REG_P (SUBREG_REG (subreg))) 2601146895Skan return; 2602146895Skan 2603146895Skan regno = REGNO (SUBREG_REG (subreg)); 2604146895Skan mode = GET_MODE (subreg); 2605146895Skan 2606146895Skan if (regno < FIRST_PSEUDO_REGISTER) 2607146895Skan return; 2608146895Skan 2609146895Skan dummy.block = regno & -8; 2610146895Skan slot = htab_find_slot_with_hash (subregs_of_mode, &dummy, 2611146895Skan dummy.block, INSERT); 2612146895Skan node = *slot; 2613146895Skan if (node == NULL) 2614146895Skan { 2615169689Skan node = XCNEW (struct subregs_of_mode_node); 2616146895Skan node->block = regno & -8; 2617146895Skan *slot = node; 2618146895Skan } 2619146895Skan 2620146895Skan node->modes[mode] |= 1 << (regno & 7); 2621146895Skan} 2622146895Skan 2623117395Skan/* Set bits in *USED which correspond to registers which can't change 2624117395Skan their mode from FROM to any mode in which REGNO was encountered. */ 2625117395Skan 2626117395Skanvoid 2627132718Skancannot_change_mode_set_regs (HARD_REG_SET *used, enum machine_mode from, 2628132718Skan unsigned int regno) 2629117395Skan{ 2630146895Skan struct subregs_of_mode_node dummy, *node; 2631117395Skan enum machine_mode to; 2632146895Skan unsigned char mask; 2633146895Skan unsigned int i; 2634117395Skan 2635146895Skan dummy.block = regno & -8; 2636146895Skan node = htab_find_with_hash (subregs_of_mode, &dummy, dummy.block); 2637146895Skan if (node == NULL) 2638146895Skan return; 2639146895Skan 2640146895Skan mask = 1 << (regno & 7); 2641146895Skan for (to = VOIDmode; to < NUM_MACHINE_MODES; to++) 2642146895Skan if (node->modes[to] & mask) 2643146895Skan for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 2644146895Skan if (!TEST_HARD_REG_BIT (*used, i) 2645146895Skan && REG_CANNOT_CHANGE_MODE_P (i, from, to)) 2646146895Skan SET_HARD_REG_BIT (*used, i); 2647117395Skan} 2648117395Skan 2649117395Skan/* Return 1 if REGNO has had an invalid mode change in CLASS from FROM 2650117395Skan mode. */ 2651117395Skan 2652117395Skanbool 2653132718Skaninvalid_mode_change_p (unsigned int regno, enum reg_class class, 2654146895Skan enum machine_mode from) 2655117395Skan{ 2656146895Skan struct subregs_of_mode_node dummy, *node; 2657146895Skan enum machine_mode to; 2658146895Skan unsigned char mask; 2659117395Skan 2660146895Skan dummy.block = regno & -8; 2661146895Skan node = htab_find_with_hash (subregs_of_mode, &dummy, dummy.block); 2662146895Skan if (node == NULL) 2663146895Skan return false; 2664146895Skan 2665146895Skan mask = 1 << (regno & 7); 2666146895Skan for (to = VOIDmode; to < NUM_MACHINE_MODES; to++) 2667146895Skan if (node->modes[to] & mask) 2668146895Skan if (CANNOT_CHANGE_MODE_CLASS (from, to, class)) 2669146895Skan return true; 2670146895Skan 2671146895Skan return false; 2672117395Skan} 2673117395Skan#endif /* CANNOT_CHANGE_MODE_CLASS */ 2674117395Skan 2675117395Skan#include "gt-regclass.h" 2676