sparc.h revision 161651
150397Sobrien/* Definitions of target machine for GNU compiler, for Sun SPARC. 290075Sobrien Copyright (C) 1987, 1988, 1989, 1992, 1994, 1995, 1996, 1997, 1998, 1999 3132718Skan 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. 450397Sobrien Contributed by Michael Tiemann (tiemann@cygnus.com). 5132718Skan 64-bit SPARC-V9 support by Michael Tiemann, Jim Wilson, and Doug Evans, 650397Sobrien at Cygnus Support. 750397Sobrien 8132718SkanThis file is part of GCC. 950397Sobrien 10132718SkanGCC is free software; you can redistribute it and/or modify 1150397Sobrienit under the terms of the GNU General Public License as published by 1250397Sobrienthe Free Software Foundation; either version 2, or (at your option) 1350397Sobrienany later version. 1450397Sobrien 15132718SkanGCC is distributed in the hope that it will be useful, 1650397Sobrienbut WITHOUT ANY WARRANTY; without even the implied warranty of 1750397SobrienMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1850397SobrienGNU General Public License for more details. 1950397Sobrien 2050397SobrienYou should have received a copy of the GNU General Public License 21132718Skanalong with GCC; see the file COPYING. If not, write to 2250397Sobrienthe Free Software Foundation, 59 Temple Place - Suite 330, 2350397SobrienBoston, MA 02111-1307, USA. */ 2450397Sobrien 2550397Sobrien/* Note that some other tm.h files include this one and then override 2650397Sobrien whatever definitions are necessary. */ 2750397Sobrien 28132718Skan/* Target CPU builtins. FIXME: Defining sparc is for the benefit of 29132718Skan Solaris only; otherwise just define __sparc__. Sadly the headers 30132718Skan are such a mess there is no Solaris-specific header. */ 31132718Skan#define TARGET_CPU_CPP_BUILTINS() \ 32132718Skan do \ 33132718Skan { \ 34132718Skan builtin_define_std ("sparc"); \ 35132718Skan if (TARGET_64BIT) \ 36132718Skan { \ 37132718Skan builtin_assert ("cpu=sparc64"); \ 38132718Skan builtin_assert ("machine=sparc64"); \ 39132718Skan } \ 40132718Skan else \ 41132718Skan { \ 42132718Skan builtin_assert ("cpu=sparc"); \ 43132718Skan builtin_assert ("machine=sparc"); \ 44132718Skan } \ 45132718Skan } \ 46132718Skan while (0) 47132718Skan 4850397Sobrien/* Specify this in a cover file to provide bi-architecture (32/64) support. */ 4950397Sobrien/* #define SPARC_BI_ARCH */ 5050397Sobrien 5150397Sobrien/* Macro used later in this file to determine default architecture. */ 5250397Sobrien#define DEFAULT_ARCH32_P ((TARGET_DEFAULT & MASK_64BIT) == 0) 5350397Sobrien 5450397Sobrien/* TARGET_ARCH{32,64} are the main macros to decide which of the two 5550397Sobrien architectures to compile for. We allow targets to choose compile time or 5650397Sobrien runtime selection. */ 5752284Sobrien#ifdef IN_LIBGCC2 5890075Sobrien#if defined(__sparcv9) || defined(__arch64__) 5952284Sobrien#define TARGET_ARCH32 0 6052284Sobrien#else 6152284Sobrien#define TARGET_ARCH32 1 6290075Sobrien#endif /* sparc64 */ 6352284Sobrien#else 6490075Sobrien#ifdef SPARC_BI_ARCH 6550397Sobrien#define TARGET_ARCH32 (! TARGET_64BIT) 6650397Sobrien#else 6750397Sobrien#define TARGET_ARCH32 (DEFAULT_ARCH32_P) 6852284Sobrien#endif /* SPARC_BI_ARCH */ 6990075Sobrien#endif /* IN_LIBGCC2 */ 7050397Sobrien#define TARGET_ARCH64 (! TARGET_ARCH32) 7150397Sobrien 72132718Skan/* Code model selection in 64-bit environment. 7350397Sobrien 74132718Skan The machine mode used for addresses is 32-bit wide: 7550397Sobrien 76132718Skan TARGET_CM_32: 32-bit address space. 77132718Skan It is the code model used when generating 32-bit code. 7850397Sobrien 79132718Skan The machine mode used for addresses is 64-bit wide: 8050397Sobrien 81132718Skan TARGET_CM_MEDLOW: 32-bit address space. 82132718Skan The executable must be in the low 32 bits of memory. 83132718Skan This avoids generating %uhi and %ulo terms. Programs 84132718Skan can be statically or dynamically linked. 8550397Sobrien 86132718Skan TARGET_CM_MEDMID: 44-bit address space. 87132718Skan The executable must be in the low 44 bits of memory, 88132718Skan and the %[hml]44 terms are used. The text and data 89132718Skan segments have a maximum size of 2GB (31-bit span). 90132718Skan The maximum offset from any instruction to the label 91132718Skan _GLOBAL_OFFSET_TABLE_ is 2GB (31-bit span). 9250397Sobrien 93132718Skan TARGET_CM_MEDANY: 64-bit address space. 94132718Skan The text and data segments have a maximum size of 2GB 95132718Skan (31-bit span) and may be located anywhere in memory. 96132718Skan The maximum offset from any instruction to the label 97132718Skan _GLOBAL_OFFSET_TABLE_ is 2GB (31-bit span). 98132718Skan 99132718Skan TARGET_CM_EMBMEDANY: 64-bit address space. 100132718Skan The text and data segments have a maximum size of 2GB 101132718Skan (31-bit span) and may be located anywhere in memory. 102132718Skan The global register %g4 contains the start address of 103132718Skan the data segment. Programs are statically linked and 104132718Skan PIC is not supported. 105132718Skan 106132718Skan Different code models are not supported in 32-bit environment. */ 107132718Skan 10850397Sobrienenum cmodel { 10950397Sobrien CM_32, 11050397Sobrien CM_MEDLOW, 11150397Sobrien CM_MEDMID, 11250397Sobrien CM_MEDANY, 11350397Sobrien CM_EMBMEDANY 11450397Sobrien}; 11550397Sobrien 11650397Sobrien/* Value of -mcmodel specified by user. */ 11752284Sobrienextern const char *sparc_cmodel_string; 11850397Sobrien/* One of CM_FOO. */ 11950397Sobrienextern enum cmodel sparc_cmodel; 12050397Sobrien 12150397Sobrien/* V9 code model selection. */ 12250397Sobrien#define TARGET_CM_MEDLOW (sparc_cmodel == CM_MEDLOW) 12350397Sobrien#define TARGET_CM_MEDMID (sparc_cmodel == CM_MEDMID) 12450397Sobrien#define TARGET_CM_MEDANY (sparc_cmodel == CM_MEDANY) 12550397Sobrien#define TARGET_CM_EMBMEDANY (sparc_cmodel == CM_EMBMEDANY) 12650397Sobrien 12790075Sobrien#define SPARC_DEFAULT_CMODEL CM_32 12850397Sobrien 12950397Sobrien/* This is call-clobbered in the normal ABI, but is reserved in the 13050397Sobrien home grown (aka upward compatible) embedded ABI. */ 13150397Sobrien#define EMBMEDANY_BASE_REG "%g4" 13250397Sobrien 13350397Sobrien/* Values of TARGET_CPU_DEFAULT, set via -D in the Makefile, 13450397Sobrien and specified by the user via --with-cpu=foo. 13550397Sobrien This specifies the cpu implementation, not the architecture size. */ 136117395Skan/* Note that TARGET_CPU_v9 is assumed to start the list of 64-bit 13752284Sobrien capable cpu's. */ 13850397Sobrien#define TARGET_CPU_sparc 0 13950397Sobrien#define TARGET_CPU_v7 0 /* alias for previous */ 14050397Sobrien#define TARGET_CPU_sparclet 1 14150397Sobrien#define TARGET_CPU_sparclite 2 14250397Sobrien#define TARGET_CPU_v8 3 /* generic v8 implementation */ 14350397Sobrien#define TARGET_CPU_supersparc 4 14452284Sobrien#define TARGET_CPU_hypersparc 5 14552284Sobrien#define TARGET_CPU_sparc86x 6 14652284Sobrien#define TARGET_CPU_sparclite86x 6 14752284Sobrien#define TARGET_CPU_v9 7 /* generic v9 implementation */ 14852284Sobrien#define TARGET_CPU_sparcv9 7 /* alias */ 14952284Sobrien#define TARGET_CPU_sparc64 7 /* alias */ 15052284Sobrien#define TARGET_CPU_ultrasparc 8 151117395Skan#define TARGET_CPU_ultrasparc3 9 15250397Sobrien 15352284Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_v9 \ 154117395Skan || TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc \ 155117395Skan || TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3 15652284Sobrien 15752284Sobrien#define CPP_CPU32_DEFAULT_SPEC "" 15852284Sobrien#define ASM_CPU32_DEFAULT_SPEC "" 15952284Sobrien 16050397Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_v9 16150397Sobrien/* ??? What does Sun's CC pass? */ 16252284Sobrien#define CPP_CPU64_DEFAULT_SPEC "-D__sparc_v9__" 16350397Sobrien/* ??? It's not clear how other assemblers will handle this, so by default 16450397Sobrien use GAS. Sun's Solaris assembler recognizes -xarch=v8plus, but this case 16550397Sobrien is handled in sol2.h. */ 16652284Sobrien#define ASM_CPU64_DEFAULT_SPEC "-Av9" 16750397Sobrien#endif 16850397Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc 16952284Sobrien#define CPP_CPU64_DEFAULT_SPEC "-D__sparc_v9__" 17052284Sobrien#define ASM_CPU64_DEFAULT_SPEC "-Av9a" 17150397Sobrien#endif 172117395Skan#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3 173117395Skan#define CPP_CPU64_DEFAULT_SPEC "-D__sparc_v9__" 174117395Skan#define ASM_CPU64_DEFAULT_SPEC "-Av9b" 175117395Skan#endif 17652284Sobrien 17752284Sobrien#else 17852284Sobrien 17952284Sobrien#define CPP_CPU64_DEFAULT_SPEC "" 18052284Sobrien#define ASM_CPU64_DEFAULT_SPEC "" 18152284Sobrien 18252284Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_sparc \ 18352284Sobrien || TARGET_CPU_DEFAULT == TARGET_CPU_v8 18452284Sobrien#define CPP_CPU32_DEFAULT_SPEC "" 18552284Sobrien#define ASM_CPU32_DEFAULT_SPEC "" 18652284Sobrien#endif 18752284Sobrien 18852284Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_sparclet 18952284Sobrien#define CPP_CPU32_DEFAULT_SPEC "-D__sparclet__" 19052284Sobrien#define ASM_CPU32_DEFAULT_SPEC "-Asparclet" 19152284Sobrien#endif 19252284Sobrien 19352284Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_sparclite 19452284Sobrien#define CPP_CPU32_DEFAULT_SPEC "-D__sparclite__" 19552284Sobrien#define ASM_CPU32_DEFAULT_SPEC "-Asparclite" 19652284Sobrien#endif 19752284Sobrien 19852284Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_supersparc 19952284Sobrien#define CPP_CPU32_DEFAULT_SPEC "-D__supersparc__ -D__sparc_v8__" 20052284Sobrien#define ASM_CPU32_DEFAULT_SPEC "" 20152284Sobrien#endif 20252284Sobrien 20352284Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_hypersparc 20452284Sobrien#define CPP_CPU32_DEFAULT_SPEC "-D__hypersparc__ -D__sparc_v8__" 20552284Sobrien#define ASM_CPU32_DEFAULT_SPEC "" 20652284Sobrien#endif 20752284Sobrien 20852284Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_sparclite86x 20990075Sobrien#define CPP_CPU32_DEFAULT_SPEC "-D__sparclite86x__" 21090075Sobrien#define ASM_CPU32_DEFAULT_SPEC "-Asparclite" 21152284Sobrien#endif 21252284Sobrien 21352284Sobrien#endif 21452284Sobrien 21552284Sobrien#if !defined(CPP_CPU32_DEFAULT_SPEC) || !defined(CPP_CPU64_DEFAULT_SPEC) 216117395Skan #error Unrecognized value in TARGET_CPU_DEFAULT. 21750397Sobrien#endif 21850397Sobrien 21952284Sobrien#ifdef SPARC_BI_ARCH 22052284Sobrien 22152284Sobrien#define CPP_CPU_DEFAULT_SPEC \ 22252284Sobrien(DEFAULT_ARCH32_P ? "\ 22352284Sobrien%{m64:" CPP_CPU64_DEFAULT_SPEC "} \ 22452284Sobrien%{!m64:" CPP_CPU32_DEFAULT_SPEC "} \ 22552284Sobrien" : "\ 22652284Sobrien%{m32:" CPP_CPU32_DEFAULT_SPEC "} \ 22752284Sobrien%{!m32:" CPP_CPU64_DEFAULT_SPEC "} \ 22852284Sobrien") 22952284Sobrien#define ASM_CPU_DEFAULT_SPEC \ 23052284Sobrien(DEFAULT_ARCH32_P ? "\ 23152284Sobrien%{m64:" ASM_CPU64_DEFAULT_SPEC "} \ 23252284Sobrien%{!m64:" ASM_CPU32_DEFAULT_SPEC "} \ 23352284Sobrien" : "\ 23452284Sobrien%{m32:" ASM_CPU32_DEFAULT_SPEC "} \ 23552284Sobrien%{!m32:" ASM_CPU64_DEFAULT_SPEC "} \ 23652284Sobrien") 23752284Sobrien 23852284Sobrien#else /* !SPARC_BI_ARCH */ 23952284Sobrien 24052284Sobrien#define CPP_CPU_DEFAULT_SPEC (DEFAULT_ARCH32_P ? CPP_CPU32_DEFAULT_SPEC : CPP_CPU64_DEFAULT_SPEC) 24152284Sobrien#define ASM_CPU_DEFAULT_SPEC (DEFAULT_ARCH32_P ? ASM_CPU32_DEFAULT_SPEC : ASM_CPU64_DEFAULT_SPEC) 24252284Sobrien 24352284Sobrien#endif /* !SPARC_BI_ARCH */ 24452284Sobrien 24550397Sobrien/* Define macros to distinguish architectures. */ 24650397Sobrien 24750397Sobrien/* Common CPP definitions used by CPP_SPEC amongst the various targets 24850397Sobrien for handling -mcpu=xxx switches. */ 24950397Sobrien#define CPP_CPU_SPEC "\ 25090075Sobrien%{msoft-float:-D_SOFT_FLOAT} \ 25150397Sobrien%{mcypress:} \ 25250397Sobrien%{msparclite:-D__sparclite__} \ 25350397Sobrien%{mf930:-D__sparclite__} %{mf934:-D__sparclite__} \ 25450397Sobrien%{mv8:-D__sparc_v8__} \ 25550397Sobrien%{msupersparc:-D__supersparc__ -D__sparc_v8__} \ 25650397Sobrien%{mcpu=sparclet:-D__sparclet__} %{mcpu=tsc701:-D__sparclet__} \ 25750397Sobrien%{mcpu=sparclite:-D__sparclite__} \ 25850397Sobrien%{mcpu=f930:-D__sparclite__} %{mcpu=f934:-D__sparclite__} \ 25950397Sobrien%{mcpu=v8:-D__sparc_v8__} \ 26050397Sobrien%{mcpu=supersparc:-D__supersparc__ -D__sparc_v8__} \ 26152284Sobrien%{mcpu=hypersparc:-D__hypersparc__ -D__sparc_v8__} \ 26290075Sobrien%{mcpu=sparclite86x:-D__sparclite86x__} \ 26350397Sobrien%{mcpu=v9:-D__sparc_v9__} \ 26450397Sobrien%{mcpu=ultrasparc:-D__sparc_v9__} \ 265117395Skan%{mcpu=ultrasparc3:-D__sparc_v9__} \ 26650397Sobrien%{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:%(cpp_cpu_default)}}}}}}} \ 26750397Sobrien" 268132718Skan#define CPP_ARCH32_SPEC "" 269132718Skan#define CPP_ARCH64_SPEC "-D__arch64__" 27050397Sobrien 27150397Sobrien#define CPP_ARCH_DEFAULT_SPEC \ 27250397Sobrien(DEFAULT_ARCH32_P ? CPP_ARCH32_SPEC : CPP_ARCH64_SPEC) 27350397Sobrien 27450397Sobrien#define CPP_ARCH_SPEC "\ 27550397Sobrien%{m32:%(cpp_arch32)} \ 27650397Sobrien%{m64:%(cpp_arch64)} \ 27750397Sobrien%{!m32:%{!m64:%(cpp_arch_default)}} \ 27850397Sobrien" 27950397Sobrien 28050397Sobrien/* Macros to distinguish endianness. */ 28152284Sobrien#define CPP_ENDIAN_SPEC "\ 28252284Sobrien%{mlittle-endian:-D__LITTLE_ENDIAN__} \ 28352284Sobrien%{mlittle-endian-data:-D__LITTLE_ENDIAN_DATA__}" 28450397Sobrien 28550397Sobrien/* Macros to distinguish the particular subtarget. */ 28650397Sobrien#define CPP_SUBTARGET_SPEC "" 28750397Sobrien 28850397Sobrien#define CPP_SPEC "%(cpp_cpu) %(cpp_arch) %(cpp_endian) %(cpp_subtarget)" 28950397Sobrien 29050397Sobrien/* Prevent error on `-sun4' and `-target sun4' options. */ 29150397Sobrien/* This used to translate -dalign to -malign, but that is no good 29250397Sobrien because it can't turn off the usual meaning of making debugging dumps. */ 29350397Sobrien/* Translate old style -m<cpu> into new style -mcpu=<cpu>. 29450397Sobrien ??? Delete support for -m<cpu> for 2.9. */ 29550397Sobrien 29650397Sobrien#define CC1_SPEC "\ 29750397Sobrien%{sun4:} %{target:} \ 29850397Sobrien%{mcypress:-mcpu=cypress} \ 29950397Sobrien%{msparclite:-mcpu=sparclite} %{mf930:-mcpu=f930} %{mf934:-mcpu=f934} \ 30050397Sobrien%{mv8:-mcpu=v8} %{msupersparc:-mcpu=supersparc} \ 30150397Sobrien" 30250397Sobrien 30350397Sobrien/* Override in target specific files. */ 30450397Sobrien#define ASM_CPU_SPEC "\ 30550397Sobrien%{mcpu=sparclet:-Asparclet} %{mcpu=tsc701:-Asparclet} \ 30650397Sobrien%{msparclite:-Asparclite} \ 30750397Sobrien%{mf930:-Asparclite} %{mf934:-Asparclite} \ 30850397Sobrien%{mcpu=sparclite:-Asparclite} \ 30990075Sobrien%{mcpu=sparclite86x:-Asparclite} \ 31050397Sobrien%{mcpu=f930:-Asparclite} %{mcpu=f934:-Asparclite} \ 31150397Sobrien%{mv8plus:-Av8plus} \ 31250397Sobrien%{mcpu=v9:-Av9} \ 31350397Sobrien%{mcpu=ultrasparc:%{!mv8plus:-Av9a}} \ 314117395Skan%{mcpu=ultrasparc3:%{!mv8plus:-Av9b}} \ 31550397Sobrien%{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:%(asm_cpu_default)}}}}}}} \ 31650397Sobrien" 31750397Sobrien 31850397Sobrien/* Word size selection, among other things. 31950397Sobrien This is what GAS uses. Add %(asm_arch) to ASM_SPEC to enable. */ 32050397Sobrien 32150397Sobrien#define ASM_ARCH32_SPEC "-32" 32290075Sobrien#ifdef HAVE_AS_REGISTER_PSEUDO_OP 32390075Sobrien#define ASM_ARCH64_SPEC "-64 -no-undeclared-regs" 32490075Sobrien#else 32550397Sobrien#define ASM_ARCH64_SPEC "-64" 32690075Sobrien#endif 32750397Sobrien#define ASM_ARCH_DEFAULT_SPEC \ 32850397Sobrien(DEFAULT_ARCH32_P ? ASM_ARCH32_SPEC : ASM_ARCH64_SPEC) 32950397Sobrien 33050397Sobrien#define ASM_ARCH_SPEC "\ 33150397Sobrien%{m32:%(asm_arch32)} \ 33250397Sobrien%{m64:%(asm_arch64)} \ 33350397Sobrien%{!m32:%{!m64:%(asm_arch_default)}} \ 33450397Sobrien" 33550397Sobrien 33690075Sobrien#ifdef HAVE_AS_RELAX_OPTION 33790075Sobrien#define ASM_RELAX_SPEC "%{!mno-relax:-relax}" 33890075Sobrien#else 33990075Sobrien#define ASM_RELAX_SPEC "" 34090075Sobrien#endif 34190075Sobrien 34250397Sobrien/* Special flags to the Sun-4 assembler when using pipe for input. */ 34350397Sobrien 34450397Sobrien#define ASM_SPEC "\ 345132718Skan%{R} %{!pg:%{!p:%{fpic|fPIC|fpie|fPIE:-k}}} %{keep-local-as-symbols:-L} \ 34690075Sobrien%(asm_cpu) %(asm_relax)" 34750397Sobrien 348132718Skan#define AS_NEEDS_DASH_FOR_PIPED_INPUT 349132718Skan 35050397Sobrien/* This macro defines names of additional specifications to put in the specs 35150397Sobrien that can be used in various specifications like CC1_SPEC. Its definition 35250397Sobrien is an initializer with a subgrouping for each command option. 35350397Sobrien 35450397Sobrien Each subgrouping contains a string constant, that defines the 355132718Skan specification name, and a string constant that used by the GCC driver 35650397Sobrien program. 35750397Sobrien 35850397Sobrien Do not define this macro if it does not need to do anything. */ 35950397Sobrien 36050397Sobrien#define EXTRA_SPECS \ 36152284Sobrien { "cpp_cpu", CPP_CPU_SPEC }, \ 36252284Sobrien { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \ 36352284Sobrien { "cpp_arch32", CPP_ARCH32_SPEC }, \ 36452284Sobrien { "cpp_arch64", CPP_ARCH64_SPEC }, \ 36552284Sobrien { "cpp_arch_default", CPP_ARCH_DEFAULT_SPEC },\ 36652284Sobrien { "cpp_arch", CPP_ARCH_SPEC }, \ 36752284Sobrien { "cpp_endian", CPP_ENDIAN_SPEC }, \ 36852284Sobrien { "cpp_subtarget", CPP_SUBTARGET_SPEC }, \ 36952284Sobrien { "asm_cpu", ASM_CPU_SPEC }, \ 37052284Sobrien { "asm_cpu_default", ASM_CPU_DEFAULT_SPEC }, \ 37152284Sobrien { "asm_arch32", ASM_ARCH32_SPEC }, \ 37252284Sobrien { "asm_arch64", ASM_ARCH64_SPEC }, \ 37390075Sobrien { "asm_relax", ASM_RELAX_SPEC }, \ 37452284Sobrien { "asm_arch_default", ASM_ARCH_DEFAULT_SPEC },\ 37552284Sobrien { "asm_arch", ASM_ARCH_SPEC }, \ 37650397Sobrien SUBTARGET_EXTRA_SPECS 37750397Sobrien 37850397Sobrien#define SUBTARGET_EXTRA_SPECS 37996263Sobrien 38096263Sobrien/* Because libgcc can generate references back to libc (via .umul etc.) we have 38196263Sobrien to list libc again after the second libgcc. */ 38296263Sobrien#define LINK_GCC_C_SEQUENCE_SPEC "%G %L %G %L" 38396263Sobrien 38450397Sobrien 38550397Sobrien#define PTRDIFF_TYPE (TARGET_ARCH64 ? "long int" : "int") 38650397Sobrien#define SIZE_TYPE (TARGET_ARCH64 ? "long unsigned int" : "unsigned int") 38750397Sobrien 38850397Sobrien/* ??? This should be 32 bits for v9 but what can we do? */ 38950397Sobrien#define WCHAR_TYPE "short unsigned int" 39050397Sobrien#define WCHAR_TYPE_SIZE 16 39150397Sobrien 39250397Sobrien/* Show we can debug even without a frame pointer. */ 39350397Sobrien#define CAN_DEBUG_WITHOUT_FP 39450397Sobrien 39596263Sobrien#define OVERRIDE_OPTIONS sparc_override_options () 39650397Sobrien 39750397Sobrien/* Generate DBX debugging information. */ 39850397Sobrien 399117395Skan#define DBX_DEBUGGING_INFO 1 40050397Sobrien 40150397Sobrien/* Run-time compilation parameters selecting different hardware subsets. */ 40250397Sobrien 40350397Sobrienextern int target_flags; 40450397Sobrien 40550397Sobrien/* Nonzero if we should generate code to use the fpu. */ 40650397Sobrien#define MASK_FPU 1 40750397Sobrien#define TARGET_FPU (target_flags & MASK_FPU) 40850397Sobrien 40950397Sobrien/* Nonzero if we should assume that double pointers might be unaligned. 41050397Sobrien This can happen when linking gcc compiled code with other compilers, 41150397Sobrien because the ABI only guarantees 4 byte alignment. */ 41250397Sobrien#define MASK_UNALIGNED_DOUBLES 4 41350397Sobrien#define TARGET_UNALIGNED_DOUBLES (target_flags & MASK_UNALIGNED_DOUBLES) 41450397Sobrien 41550397Sobrien/* Nonzero means that we should generate code for a v8 sparc. */ 41650397Sobrien#define MASK_V8 0x8 41750397Sobrien#define TARGET_V8 (target_flags & MASK_V8) 41850397Sobrien 41950397Sobrien/* Nonzero means that we should generate code for a sparclite. 42050397Sobrien This enables the sparclite specific instructions, but does not affect 42150397Sobrien whether FPU instructions are emitted. */ 42250397Sobrien#define MASK_SPARCLITE 0x10 42350397Sobrien#define TARGET_SPARCLITE (target_flags & MASK_SPARCLITE) 42450397Sobrien 42550397Sobrien/* Nonzero if we're compiling for the sparclet. */ 42650397Sobrien#define MASK_SPARCLET 0x20 42750397Sobrien#define TARGET_SPARCLET (target_flags & MASK_SPARCLET) 42850397Sobrien 42950397Sobrien/* Nonzero if we're compiling for v9 sparc. 43050397Sobrien Note that v9's can run in 32 bit mode so this doesn't necessarily mean 43150397Sobrien the word size is 64. */ 43250397Sobrien#define MASK_V9 0x40 43350397Sobrien#define TARGET_V9 (target_flags & MASK_V9) 43450397Sobrien 435117395Skan/* Nonzero to generate code that uses the instructions deprecated in 43650397Sobrien the v9 architecture. This option only applies to v9 systems. */ 43750397Sobrien/* ??? This isn't user selectable yet. It's used to enable such insns 43850397Sobrien on 32 bit v9 systems and for the moment they're permanently disabled 43950397Sobrien on 64 bit v9 systems. */ 44050397Sobrien#define MASK_DEPRECATED_V8_INSNS 0x80 44150397Sobrien#define TARGET_DEPRECATED_V8_INSNS (target_flags & MASK_DEPRECATED_V8_INSNS) 44250397Sobrien 44350397Sobrien/* Mask of all CPU selection flags. */ 44450397Sobrien#define MASK_ISA \ 44550397Sobrien(MASK_V8 + MASK_SPARCLITE + MASK_SPARCLET + MASK_V9 + MASK_DEPRECATED_V8_INSNS) 44650397Sobrien 447117395Skan/* Nonzero means don't pass `-assert pure-text' to the linker. */ 44850397Sobrien#define MASK_IMPURE_TEXT 0x100 44950397Sobrien#define TARGET_IMPURE_TEXT (target_flags & MASK_IMPURE_TEXT) 45050397Sobrien 45150397Sobrien/* Nonzero means that we should generate code using a flat register window 45250397Sobrien model, i.e. no save/restore instructions are generated, which is 45350397Sobrien compatible with normal sparc code. 45450397Sobrien The frame pointer is %i7 instead of %fp. */ 45550397Sobrien#define MASK_FLAT 0x200 45650397Sobrien#define TARGET_FLAT (target_flags & MASK_FLAT) 45750397Sobrien 458117395Skan/* Nonzero means use the registers that the SPARC ABI reserves for 45950397Sobrien application software. This must be the default to coincide with the 46050397Sobrien setting in FIXED_REGISTERS. */ 46150397Sobrien#define MASK_APP_REGS 0x400 46250397Sobrien#define TARGET_APP_REGS (target_flags & MASK_APP_REGS) 46350397Sobrien 46450397Sobrien/* Option to select how quad word floating point is implemented. 46550397Sobrien When TARGET_HARD_QUAD is true, we use the hardware quad instructions. 46650397Sobrien Otherwise, we use the SPARC ABI quad library functions. */ 46750397Sobrien#define MASK_HARD_QUAD 0x800 46850397Sobrien#define TARGET_HARD_QUAD (target_flags & MASK_HARD_QUAD) 46950397Sobrien 470117395Skan/* Nonzero on little-endian machines. */ 47150397Sobrien/* ??? Little endian support currently only exists for sparclet-aout and 47250397Sobrien sparc64-elf configurations. May eventually want to expand the support 47350397Sobrien to all targets, but for now it's kept local to only those two. */ 47450397Sobrien#define MASK_LITTLE_ENDIAN 0x1000 47550397Sobrien#define TARGET_LITTLE_ENDIAN (target_flags & MASK_LITTLE_ENDIAN) 47650397Sobrien 47750397Sobrien/* 0x2000, 0x4000 are unused */ 47850397Sobrien 47990075Sobrien/* Nonzero if pointers are 64 bits. */ 48050397Sobrien#define MASK_PTR64 0x8000 48150397Sobrien#define TARGET_PTR64 (target_flags & MASK_PTR64) 48250397Sobrien 48350397Sobrien/* Nonzero if generating code to run in a 64 bit environment. 48450397Sobrien This is intended to only be used by TARGET_ARCH{32,64} as they are the 48550397Sobrien mechanism used to control compile time or run time selection. */ 48650397Sobrien#define MASK_64BIT 0x10000 48750397Sobrien#define TARGET_64BIT (target_flags & MASK_64BIT) 48850397Sobrien 48950397Sobrien/* 0x20000,0x40000 unused */ 49050397Sobrien 491117395Skan/* Nonzero means use a stack bias of 2047. Stack offsets are obtained by 49250397Sobrien adding 2047 to %sp. This option is for v9 only and is the default. */ 49350397Sobrien#define MASK_STACK_BIAS 0x80000 49450397Sobrien#define TARGET_STACK_BIAS (target_flags & MASK_STACK_BIAS) 49550397Sobrien 49690075Sobrien/* 0x100000,0x200000 unused */ 49750397Sobrien 498117395Skan/* Nonzero means -m{,no-}fpu was passed on the command line. */ 49950397Sobrien#define MASK_FPU_SET 0x400000 50050397Sobrien#define TARGET_FPU_SET (target_flags & MASK_FPU_SET) 50150397Sobrien 50250397Sobrien/* Use the UltraSPARC Visual Instruction Set extensions. */ 503117395Skan#define MASK_VIS 0x1000000 50450397Sobrien#define TARGET_VIS (target_flags & MASK_VIS) 50550397Sobrien 50650397Sobrien/* Compile for Solaris V8+. 32 bit Solaris preserves the high bits of 50790075Sobrien the current out and global registers and Linux 2.2+ as well. */ 50890075Sobrien#define MASK_V8PLUS 0x2000000 509117395Skan#define TARGET_V8PLUS (target_flags & MASK_V8PLUS) 51050397Sobrien 51190075Sobrien/* Force a the fastest alignment on structures to take advantage of 51290075Sobrien faster copies. */ 51390075Sobrien#define MASK_FASTER_STRUCTS 0x4000000 51490075Sobrien#define TARGET_FASTER_STRUCTS (target_flags & MASK_FASTER_STRUCTS) 51590075Sobrien 51690075Sobrien/* Use IEEE quad long double. */ 51790075Sobrien#define MASK_LONG_DOUBLE_128 0x8000000 51890075Sobrien#define TARGET_LONG_DOUBLE_128 (target_flags & MASK_LONG_DOUBLE_128) 51990075Sobrien 52050397Sobrien/* TARGET_HARD_MUL: Use hardware multiply instructions but not %y. 52150397Sobrien TARGET_HARD_MUL32: Use hardware multiply instructions with rd %y 52250397Sobrien to get high 32 bits. False in V8+ or V9 because multiply stores 52350397Sobrien a 64 bit result in a register. */ 52450397Sobrien 52550397Sobrien#define TARGET_HARD_MUL32 \ 52650397Sobrien ((TARGET_V8 || TARGET_SPARCLITE \ 52750397Sobrien || TARGET_SPARCLET || TARGET_DEPRECATED_V8_INSNS) \ 52890075Sobrien && ! TARGET_V8PLUS && TARGET_ARCH32) 52950397Sobrien 53050397Sobrien#define TARGET_HARD_MUL \ 53150397Sobrien (TARGET_V8 || TARGET_SPARCLITE || TARGET_SPARCLET \ 532117395Skan || TARGET_DEPRECATED_V8_INSNS || TARGET_V8PLUS) 53350397Sobrien 53450397Sobrien 53550397Sobrien/* Macro to define tables used to set the flags. 53650397Sobrien This is a list in braces of pairs in braces, 53750397Sobrien each pair being { "NAME", VALUE } 53850397Sobrien where VALUE is the bits to set or minus the bits to clear. 53950397Sobrien An empty string NAME is used to identify the default VALUE. */ 54050397Sobrien 54150397Sobrien#define TARGET_SWITCHES \ 54290075Sobrien { {"fpu", MASK_FPU | MASK_FPU_SET, \ 54390075Sobrien N_("Use hardware fp") }, \ 54490075Sobrien {"no-fpu", -MASK_FPU, \ 54590075Sobrien N_("Do not use hardware fp") }, \ 54690075Sobrien {"no-fpu", MASK_FPU_SET, NULL, }, \ 54790075Sobrien {"hard-float", MASK_FPU | MASK_FPU_SET, \ 54890075Sobrien N_("Use hardware fp") }, \ 54990075Sobrien {"soft-float", -MASK_FPU, \ 55090075Sobrien N_("Do not use hardware fp") }, \ 55190075Sobrien {"soft-float", MASK_FPU_SET, NULL }, \ 55290075Sobrien {"unaligned-doubles", MASK_UNALIGNED_DOUBLES, \ 55390075Sobrien N_("Assume possible double misalignment") }, \ 55490075Sobrien {"no-unaligned-doubles", -MASK_UNALIGNED_DOUBLES, \ 55590075Sobrien N_("Assume all doubles are aligned") }, \ 55690075Sobrien {"impure-text", MASK_IMPURE_TEXT, \ 55790075Sobrien N_("Pass -assert pure-text to linker") }, \ 55890075Sobrien {"no-impure-text", -MASK_IMPURE_TEXT, \ 55990075Sobrien N_("Do not pass -assert pure-text to linker") }, \ 56090075Sobrien {"flat", MASK_FLAT, \ 56190075Sobrien N_("Use flat register window model") }, \ 56290075Sobrien {"no-flat", -MASK_FLAT, \ 56390075Sobrien N_("Do not use flat register window model") }, \ 56490075Sobrien {"app-regs", MASK_APP_REGS, \ 56590075Sobrien N_("Use ABI reserved registers") }, \ 56690075Sobrien {"no-app-regs", -MASK_APP_REGS, \ 56790075Sobrien N_("Do not use ABI reserved registers") }, \ 56890075Sobrien {"hard-quad-float", MASK_HARD_QUAD, \ 56990075Sobrien N_("Use hardware quad fp instructions") }, \ 57090075Sobrien {"soft-quad-float", -MASK_HARD_QUAD, \ 57190075Sobrien N_("Do not use hardware quad fp instructions") }, \ 57290075Sobrien {"v8plus", MASK_V8PLUS, \ 57390075Sobrien N_("Compile for v8plus ABI") }, \ 57490075Sobrien {"no-v8plus", -MASK_V8PLUS, \ 57590075Sobrien N_("Do not compile for v8plus ABI") }, \ 57690075Sobrien {"vis", MASK_VIS, \ 57790075Sobrien N_("Utilize Visual Instruction Set") }, \ 57890075Sobrien {"no-vis", -MASK_VIS, \ 57990075Sobrien N_("Do not utilize Visual Instruction Set") }, \ 58050397Sobrien /* ??? These are deprecated, coerced to -mcpu=. Delete in 2.9. */ \ 58190075Sobrien {"cypress", 0, \ 58290075Sobrien N_("Optimize for Cypress processors") }, \ 58390075Sobrien {"sparclite", 0, \ 584117395Skan N_("Optimize for SPARCLite processors") }, \ 58590075Sobrien {"f930", 0, \ 58690075Sobrien N_("Optimize for F930 processors") }, \ 58790075Sobrien {"f934", 0, \ 58890075Sobrien N_("Optimize for F934 processors") }, \ 58990075Sobrien {"v8", 0, \ 590117395Skan N_("Use V8 SPARC ISA") }, \ 59190075Sobrien {"supersparc", 0, \ 592117395Skan N_("Optimize for SuperSPARC processors") }, \ 59390075Sobrien /* End of deprecated options. */ \ 59490075Sobrien {"ptr64", MASK_PTR64, \ 59590075Sobrien N_("Pointers are 64-bit") }, \ 59690075Sobrien {"ptr32", -MASK_PTR64, \ 59790075Sobrien N_("Pointers are 32-bit") }, \ 59890075Sobrien {"32", -MASK_64BIT, \ 59990075Sobrien N_("Use 32-bit ABI") }, \ 60090075Sobrien {"64", MASK_64BIT, \ 60190075Sobrien N_("Use 64-bit ABI") }, \ 60290075Sobrien {"stack-bias", MASK_STACK_BIAS, \ 60390075Sobrien N_("Use stack bias") }, \ 60490075Sobrien {"no-stack-bias", -MASK_STACK_BIAS, \ 60590075Sobrien N_("Do not use stack bias") }, \ 60690075Sobrien {"faster-structs", MASK_FASTER_STRUCTS, \ 60790075Sobrien N_("Use structs on stronger alignment for double-word copies") }, \ 60890075Sobrien {"no-faster-structs", -MASK_FASTER_STRUCTS, \ 60990075Sobrien N_("Do not use structs on stronger alignment for double-word copies") }, \ 61090075Sobrien {"relax", 0, \ 61190075Sobrien N_("Optimize tail call instructions in assembler and linker") }, \ 61290075Sobrien {"no-relax", 0, \ 61390075Sobrien N_("Do not optimize tail call instructions in assembler or linker") }, \ 61450397Sobrien SUBTARGET_SWITCHES \ 61552284Sobrien { "", TARGET_DEFAULT, ""}} 61650397Sobrien 61750397Sobrien/* MASK_APP_REGS must always be the default because that's what 61850397Sobrien FIXED_REGISTERS is set to and -ffixed- is processed before 61950397Sobrien CONDITIONAL_REGISTER_USAGE is called (where we process -mno-app-regs). */ 62096263Sobrien#define TARGET_DEFAULT (MASK_APP_REGS + MASK_FPU) 62150397Sobrien 62250397Sobrien/* This is meant to be redefined in target specific files. */ 62350397Sobrien#define SUBTARGET_SWITCHES 62450397Sobrien 62550397Sobrien/* Processor type. 62650397Sobrien These must match the values for the cpu attribute in sparc.md. */ 62750397Sobrienenum processor_type { 62850397Sobrien PROCESSOR_V7, 62950397Sobrien PROCESSOR_CYPRESS, 63050397Sobrien PROCESSOR_V8, 63150397Sobrien PROCESSOR_SUPERSPARC, 63250397Sobrien PROCESSOR_SPARCLITE, 63350397Sobrien PROCESSOR_F930, 63450397Sobrien PROCESSOR_F934, 63552284Sobrien PROCESSOR_HYPERSPARC, 63652284Sobrien PROCESSOR_SPARCLITE86X, 63750397Sobrien PROCESSOR_SPARCLET, 63850397Sobrien PROCESSOR_TSC701, 63950397Sobrien PROCESSOR_V9, 640117395Skan PROCESSOR_ULTRASPARC, 641117395Skan PROCESSOR_ULTRASPARC3 64250397Sobrien}; 64350397Sobrien 64450397Sobrien/* This is set from -m{cpu,tune}=xxx. */ 64550397Sobrienextern enum processor_type sparc_cpu; 64650397Sobrien 64750397Sobrien/* Recast the cpu class to be the cpu attribute. 64850397Sobrien Every file includes us, but not every file includes insn-attr.h. */ 64950397Sobrien#define sparc_cpu_attr ((enum attr_cpu) sparc_cpu) 65050397Sobrien 65150397Sobrien#define TARGET_OPTIONS \ 65290075Sobrien{ \ 65390075Sobrien { "cpu=", &sparc_select[1].string, \ 654132718Skan N_("Use features of and schedule code for given CPU"), 0}, \ 65590075Sobrien { "tune=", &sparc_select[2].string, \ 656132718Skan N_("Schedule code for given CPU"), 0}, \ 65790075Sobrien { "cmodel=", &sparc_cmodel_string, \ 658132718Skan N_("Use given SPARC code model"), 0}, \ 65990075Sobrien SUBTARGET_OPTIONS \ 66050397Sobrien} 66150397Sobrien 66250397Sobrien/* This is meant to be redefined in target specific files. */ 66350397Sobrien#define SUBTARGET_OPTIONS 66450397Sobrien 665132718Skan/* Support for a compile-time default CPU, et cetera. The rules are: 666132718Skan --with-cpu is ignored if -mcpu is specified. 667132718Skan --with-tune is ignored if -mtune is specified. 668132718Skan --with-float is ignored if -mhard-float, -msoft-float, -mfpu, or -mno-fpu 669132718Skan are specified. */ 670132718Skan#define OPTION_DEFAULT_SPECS \ 671132718Skan {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \ 672132718Skan {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \ 673132718Skan {"float", "%{!msoft-float:%{!mhard-float:%{!fpu:%{!no-fpu:-m%(VALUE)-float}}}}" } 674132718Skan 67550397Sobrien/* sparc_select[0] is reserved for the default cpu. */ 67650397Sobrienstruct sparc_cpu_select 67750397Sobrien{ 67852284Sobrien const char *string; 67990075Sobrien const char *const name; 68090075Sobrien const int set_tune_p; 68190075Sobrien const int set_arch_p; 68250397Sobrien}; 68350397Sobrien 68450397Sobrienextern struct sparc_cpu_select sparc_select[]; 68550397Sobrien 68650397Sobrien/* target machine storage layout */ 68750397Sobrien 68850397Sobrien/* Define this if most significant bit is lowest numbered 68950397Sobrien in instructions that operate on numbered bit-fields. */ 69050397Sobrien#define BITS_BIG_ENDIAN 1 69150397Sobrien 69250397Sobrien/* Define this if most significant byte of a word is the lowest numbered. */ 69350397Sobrien#define BYTES_BIG_ENDIAN 1 69450397Sobrien 69550397Sobrien/* Define this if most significant word of a multiword number is the lowest 69650397Sobrien numbered. */ 69750397Sobrien#define WORDS_BIG_ENDIAN 1 69850397Sobrien 69950397Sobrien/* Define this to set the endianness to use in libgcc2.c, which can 70050397Sobrien not depend on target_flags. */ 70152284Sobrien#if defined (__LITTLE_ENDIAN__) || defined(__LITTLE_ENDIAN_DATA__) 70250397Sobrien#define LIBGCC2_WORDS_BIG_ENDIAN 0 70350397Sobrien#else 70450397Sobrien#define LIBGCC2_WORDS_BIG_ENDIAN 1 70550397Sobrien#endif 70650397Sobrien 70750397Sobrien#define MAX_BITS_PER_WORD 64 70850397Sobrien 70950397Sobrien/* Width of a word, in units (bytes). */ 71050397Sobrien#define UNITS_PER_WORD (TARGET_ARCH64 ? 8 : 4) 71196263Sobrien#ifdef IN_LIBGCC2 71296263Sobrien#define MIN_UNITS_PER_WORD UNITS_PER_WORD 71396263Sobrien#else 71450397Sobrien#define MIN_UNITS_PER_WORD 4 71596263Sobrien#endif 71650397Sobrien 71750397Sobrien/* Now define the sizes of the C data types. */ 71850397Sobrien 71950397Sobrien#define SHORT_TYPE_SIZE 16 72050397Sobrien#define INT_TYPE_SIZE 32 72150397Sobrien#define LONG_TYPE_SIZE (TARGET_ARCH64 ? 64 : 32) 72250397Sobrien#define LONG_LONG_TYPE_SIZE 64 72350397Sobrien#define FLOAT_TYPE_SIZE 32 72450397Sobrien#define DOUBLE_TYPE_SIZE 64 72550397Sobrien 72690075Sobrien#ifdef SPARC_BI_ARCH 72750397Sobrien#define MAX_LONG_TYPE_SIZE 64 72850397Sobrien#endif 72950397Sobrien 73050397Sobrien#if 0 73150397Sobrien/* ??? This does not work in SunOS 4.x, so it is not enabled here. 73250397Sobrien Instead, it is enabled in sol2.h, because it does work under Solaris. */ 733117395Skan/* Define for support of TFmode long double. 734117395Skan SPARC ABI says that long double is 4 words. */ 73550397Sobrien#define LONG_DOUBLE_TYPE_SIZE 128 73650397Sobrien#endif 73750397Sobrien 73850397Sobrien/* Width in bits of a pointer. 73950397Sobrien See also the macro `Pmode' defined below. */ 74050397Sobrien#define POINTER_SIZE (TARGET_PTR64 ? 64 : 32) 74150397Sobrien 74290075Sobrien/* If we have to extend pointers (only when TARGET_ARCH64 and not 74390075Sobrien TARGET_PTR64), we want to do it unsigned. This macro does nothing 74490075Sobrien if ptr_mode and Pmode are the same. */ 74590075Sobrien#define POINTERS_EXTEND_UNSIGNED 1 74690075Sobrien 74750397Sobrien/* A macro to update MODE and UNSIGNEDP when an object whose type 74850397Sobrien is TYPE and which has the specified mode and signedness is to be 74950397Sobrien stored in a register. This macro is only called when TYPE is a 75050397Sobrien scalar type. */ 75150397Sobrien#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ 75250397Sobrienif (TARGET_ARCH64 \ 75350397Sobrien && GET_MODE_CLASS (MODE) == MODE_INT \ 75450397Sobrien && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ 75590075Sobrien (MODE) = DImode; 75650397Sobrien 75750397Sobrien/* Define this macro if the promotion described by PROMOTE_MODE 75850397Sobrien should also be done for outgoing function arguments. */ 75950397Sobrien/* This is only needed for TARGET_ARCH64, but since PROMOTE_MODE is a no-op 76050397Sobrien for TARGET_ARCH32 this is ok. Otherwise we'd need to add a runtime test 76150397Sobrien for this value. */ 76250397Sobrien#define PROMOTE_FUNCTION_ARGS 76350397Sobrien 76450397Sobrien/* Define this macro if the promotion described by PROMOTE_MODE 76550397Sobrien should also be done for the return value of functions. 76650397Sobrien If this macro is defined, FUNCTION_VALUE must perform the same 76750397Sobrien promotions done by PROMOTE_MODE. */ 76850397Sobrien/* This is only needed for TARGET_ARCH64, but since PROMOTE_MODE is a no-op 76950397Sobrien for TARGET_ARCH32 this is ok. Otherwise we'd need to add a runtime test 77050397Sobrien for this value. */ 77150397Sobrien#define PROMOTE_FUNCTION_RETURN 77250397Sobrien 77390075Sobrien/* Define this macro if the promotion described by PROMOTE_MODE 77490075Sobrien should _only_ be performed for outgoing function arguments or 77590075Sobrien function return values, as specified by PROMOTE_FUNCTION_ARGS 77690075Sobrien and PROMOTE_FUNCTION_RETURN, respectively. */ 77790075Sobrien/* This is only needed for TARGET_ARCH64, but since PROMOTE_MODE is a no-op 77890075Sobrien for TARGET_ARCH32 this is ok. Otherwise we'd need to add a runtime test 77990075Sobrien for this value. For TARGET_ARCH64 we need it, as we don't have instructions 78090075Sobrien for arithmetic operations which do zero/sign extension at the same time, 78190075Sobrien so without this we end up with a srl/sra after every assignment to an 78290075Sobrien user variable, which means very very bad code. */ 78390075Sobrien#define PROMOTE_FOR_CALL_ONLY 78490075Sobrien 78550397Sobrien/* Allocation boundary (in *bits*) for storing arguments in argument list. */ 78650397Sobrien#define PARM_BOUNDARY (TARGET_ARCH64 ? 64 : 32) 78750397Sobrien 78850397Sobrien/* Boundary (in *bits*) on which stack pointer should be aligned. */ 789132718Skan/* FIXME, this is wrong when TARGET_ARCH64 and TARGET_STACK_BIAS, because 790132718Skan then sp+2047 is 128-bit aligned so sp is really only byte-aligned. */ 79150397Sobrien#define STACK_BOUNDARY (TARGET_ARCH64 ? 128 : 64) 792132718Skan/* Temporary hack until the FIXME above is fixed. This macro is used 793132718Skan only in pad_to_arg_alignment in function.c; see the comment there 794132718Skan for details about what it does. */ 795132718Skan#define SPARC_STACK_BOUNDARY_HACK (TARGET_ARCH64 && TARGET_STACK_BIAS) 79650397Sobrien 79750397Sobrien/* ALIGN FRAMES on double word boundaries */ 79850397Sobrien 79950397Sobrien#define SPARC_STACK_ALIGN(LOC) \ 80050397Sobrien (TARGET_ARCH64 ? (((LOC)+15) & ~15) : (((LOC)+7) & ~7)) 80150397Sobrien 80250397Sobrien/* Allocation boundary (in *bits*) for the code of a function. */ 80390075Sobrien#define FUNCTION_BOUNDARY 32 80450397Sobrien 80550397Sobrien/* Alignment of field after `int : 0' in a structure. */ 80650397Sobrien#define EMPTY_FIELD_BOUNDARY (TARGET_ARCH64 ? 64 : 32) 80750397Sobrien 80850397Sobrien/* Every structure's size must be a multiple of this. */ 80950397Sobrien#define STRUCTURE_SIZE_BOUNDARY 8 81050397Sobrien 811117395Skan/* A bit-field declared as `int' forces `int' alignment for the struct. */ 81250397Sobrien#define PCC_BITFIELD_TYPE_MATTERS 1 81350397Sobrien 81450397Sobrien/* No data type wants to be aligned rounder than this. */ 81550397Sobrien#define BIGGEST_ALIGNMENT (TARGET_ARCH64 ? 128 : 64) 81650397Sobrien 81750397Sobrien/* The best alignment to use in cases where we have a choice. */ 81850397Sobrien#define FASTEST_ALIGNMENT 64 81950397Sobrien 82090075Sobrien/* Define this macro as an expression for the alignment of a structure 82190075Sobrien (given by STRUCT as a tree node) if the alignment computed in the 82290075Sobrien usual way is COMPUTED and the alignment explicitly specified was 82390075Sobrien SPECIFIED. 82490075Sobrien 82590075Sobrien The default is to use SPECIFIED if it is larger; otherwise, use 82690075Sobrien the smaller of COMPUTED and `BIGGEST_ALIGNMENT' */ 82790075Sobrien#define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) \ 82890075Sobrien (TARGET_FASTER_STRUCTS ? \ 82990075Sobrien ((TREE_CODE (STRUCT) == RECORD_TYPE \ 83090075Sobrien || TREE_CODE (STRUCT) == UNION_TYPE \ 83190075Sobrien || TREE_CODE (STRUCT) == QUAL_UNION_TYPE) \ 83290075Sobrien && TYPE_FIELDS (STRUCT) != 0 \ 83390075Sobrien ? MAX (MAX ((COMPUTED), (SPECIFIED)), BIGGEST_ALIGNMENT) \ 83490075Sobrien : MAX ((COMPUTED), (SPECIFIED))) \ 83590075Sobrien : MAX ((COMPUTED), (SPECIFIED))) 83690075Sobrien 83750397Sobrien/* Make strings word-aligned so strcpy from constants will be faster. */ 83850397Sobrien#define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 83950397Sobrien ((TREE_CODE (EXP) == STRING_CST \ 84050397Sobrien && (ALIGN) < FASTEST_ALIGNMENT) \ 84150397Sobrien ? FASTEST_ALIGNMENT : (ALIGN)) 84250397Sobrien 84350397Sobrien/* Make arrays of chars word-aligned for the same reasons. */ 84450397Sobrien#define DATA_ALIGNMENT(TYPE, ALIGN) \ 84550397Sobrien (TREE_CODE (TYPE) == ARRAY_TYPE \ 84650397Sobrien && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 84750397Sobrien && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN)) 84850397Sobrien 84950397Sobrien/* Set this nonzero if move instructions will actually fail to work 85050397Sobrien when given unaligned data. */ 85150397Sobrien#define STRICT_ALIGNMENT 1 85250397Sobrien 85350397Sobrien/* Things that must be doubleword aligned cannot go in the text section, 85450397Sobrien because the linker fails to align the text section enough! 85550397Sobrien Put them in the data section. This macro is only used in this file. */ 85650397Sobrien#define MAX_TEXT_ALIGN 32 85750397Sobrien 85850397Sobrien/* This forces all variables and constants to the data section when PIC. 85950397Sobrien This is because the SunOS 4 shared library scheme thinks everything in 86050397Sobrien text is a function, and patches the address to point to a loader stub. */ 86150397Sobrien/* This is defined to zero for every system which doesn't use the a.out object 86250397Sobrien file format. */ 86350397Sobrien#ifndef SUNOS4_SHARED_LIBRARIES 86450397Sobrien#define SUNOS4_SHARED_LIBRARIES 0 86550397Sobrien#endif 86650397Sobrien 86750397Sobrien/* Standard register usage. */ 86850397Sobrien 86950397Sobrien/* Number of actual hardware registers. 87050397Sobrien The hardware registers are assigned numbers for the compiler 87150397Sobrien from 0 to just below FIRST_PSEUDO_REGISTER. 87250397Sobrien All registers that the compiler knows about must be given numbers, 87350397Sobrien even those that are not normally considered general registers. 87450397Sobrien 87550397Sobrien SPARC has 32 integer registers and 32 floating point registers. 87650397Sobrien 64 bit SPARC has 32 additional fp regs, but the odd numbered ones are not 87750397Sobrien accessible. We still account for them to simplify register computations 87850397Sobrien (eg: in CLASS_MAX_NREGS). There are also 4 fp condition code registers, so 87950397Sobrien 32+32+32+4 == 100. 88096263Sobrien Register 100 is used as the integer condition code register. 88196263Sobrien Register 101 is used as the soft frame pointer register. */ 88250397Sobrien 88396263Sobrien#define FIRST_PSEUDO_REGISTER 102 88450397Sobrien 88550397Sobrien#define SPARC_FIRST_FP_REG 32 88650397Sobrien/* Additional V9 fp regs. */ 88750397Sobrien#define SPARC_FIRST_V9_FP_REG 64 88850397Sobrien#define SPARC_LAST_V9_FP_REG 95 88950397Sobrien/* V9 %fcc[0123]. V8 uses (figuratively) %fcc0. */ 89050397Sobrien#define SPARC_FIRST_V9_FCC_REG 96 89150397Sobrien#define SPARC_LAST_V9_FCC_REG 99 89250397Sobrien/* V8 fcc reg. */ 89350397Sobrien#define SPARC_FCC_REG 96 89450397Sobrien/* Integer CC reg. We don't distinguish %icc from %xcc. */ 89550397Sobrien#define SPARC_ICC_REG 100 89650397Sobrien 89750397Sobrien/* Nonzero if REGNO is an fp reg. */ 89850397Sobrien#define SPARC_FP_REG_P(REGNO) \ 89950397Sobrien((REGNO) >= SPARC_FIRST_FP_REG && (REGNO) <= SPARC_LAST_V9_FP_REG) 90050397Sobrien 90150397Sobrien/* Argument passing regs. */ 90250397Sobrien#define SPARC_OUTGOING_INT_ARG_FIRST 8 90350397Sobrien#define SPARC_INCOMING_INT_ARG_FIRST (TARGET_FLAT ? 8 : 24) 90450397Sobrien#define SPARC_FP_ARG_FIRST 32 90550397Sobrien 90650397Sobrien/* 1 for registers that have pervasive standard uses 90750397Sobrien and are not available for the register allocator. 90850397Sobrien 90950397Sobrien On non-v9 systems: 91050397Sobrien g1 is free to use as temporary. 91150397Sobrien g2-g4 are reserved for applications. Gcc normally uses them as 91250397Sobrien temporaries, but this can be disabled via the -mno-app-regs option. 91350397Sobrien g5 through g7 are reserved for the operating system. 91450397Sobrien 91550397Sobrien On v9 systems: 91650397Sobrien g1,g5 are free to use as temporaries, and are free to use between calls 91750397Sobrien if the call is to an external function via the PLT. 91850397Sobrien g4 is free to use as a temporary in the non-embedded case. 91950397Sobrien g4 is reserved in the embedded case. 92050397Sobrien g2-g3 are reserved for applications. Gcc normally uses them as 92150397Sobrien temporaries, but this can be disabled via the -mno-app-regs option. 92250397Sobrien g6-g7 are reserved for the operating system (or application in 92350397Sobrien embedded case). 92450397Sobrien ??? Register 1 is used as a temporary by the 64 bit sethi pattern, so must 92550397Sobrien currently be a fixed register until this pattern is rewritten. 92650397Sobrien Register 1 is also used when restoring call-preserved registers in large 92750397Sobrien stack frames. 92850397Sobrien 92950397Sobrien Registers fixed in arch32 and not arch64 (or vice-versa) are marked in 93050397Sobrien CONDITIONAL_REGISTER_USAGE in order to properly handle -ffixed-. 93150397Sobrien*/ 93250397Sobrien 93350397Sobrien#define FIXED_REGISTERS \ 93490075Sobrien {1, 0, 2, 2, 2, 2, 1, 1, \ 93550397Sobrien 0, 0, 0, 0, 0, 0, 1, 0, \ 93650397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 93750397Sobrien 0, 0, 0, 0, 0, 0, 1, 1, \ 93850397Sobrien \ 93950397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 94050397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 94150397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 94250397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 94350397Sobrien \ 94450397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 94550397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 94650397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 94750397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 94850397Sobrien \ 94996263Sobrien 0, 0, 0, 0, 0, 1} 95050397Sobrien 95150397Sobrien/* 1 for registers not available across function calls. 95250397Sobrien These must include the FIXED_REGISTERS and also any 95350397Sobrien registers that can be used without being saved. 95450397Sobrien The latter must include the registers where values are returned 95550397Sobrien and the register where structure-value addresses are passed. 95650397Sobrien Aside from that, you can include as many other registers as you like. */ 95750397Sobrien 95850397Sobrien#define CALL_USED_REGISTERS \ 95950397Sobrien {1, 1, 1, 1, 1, 1, 1, 1, \ 96050397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 96150397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 96250397Sobrien 0, 0, 0, 0, 0, 0, 1, 1, \ 96350397Sobrien \ 96450397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 96550397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 96650397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 96750397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 96850397Sobrien \ 96950397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 97050397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 97150397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 97250397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 97350397Sobrien \ 97496263Sobrien 1, 1, 1, 1, 1, 1} 97550397Sobrien 97650397Sobrien/* If !TARGET_FPU, then make the fp registers and fp cc regs fixed so that 97750397Sobrien they won't be allocated. */ 97850397Sobrien 97950397Sobrien#define CONDITIONAL_REGISTER_USAGE \ 98050397Sobriendo \ 98150397Sobrien { \ 98296263Sobrien if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \ 98352284Sobrien { \ 98452284Sobrien fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 98552284Sobrien call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 98652284Sobrien } \ 98790075Sobrien /* If the user has passed -f{fixed,call-{used,saved}}-g5 */ \ 988117395Skan /* then honor it. */ \ 98990075Sobrien if (TARGET_ARCH32 && fixed_regs[5]) \ 99090075Sobrien fixed_regs[5] = 1; \ 99190075Sobrien else if (TARGET_ARCH64 && fixed_regs[5] == 2) \ 99290075Sobrien fixed_regs[5] = 0; \ 99350397Sobrien if (! TARGET_V9) \ 99450397Sobrien { \ 99550397Sobrien int regno; \ 99650397Sobrien for (regno = SPARC_FIRST_V9_FP_REG; \ 99750397Sobrien regno <= SPARC_LAST_V9_FP_REG; \ 99850397Sobrien regno++) \ 99950397Sobrien fixed_regs[regno] = 1; \ 100050397Sobrien /* %fcc0 is used by v8 and v9. */ \ 100150397Sobrien for (regno = SPARC_FIRST_V9_FCC_REG + 1; \ 100250397Sobrien regno <= SPARC_LAST_V9_FCC_REG; \ 100350397Sobrien regno++) \ 100450397Sobrien fixed_regs[regno] = 1; \ 100550397Sobrien } \ 100650397Sobrien if (! TARGET_FPU) \ 100750397Sobrien { \ 100850397Sobrien int regno; \ 100950397Sobrien for (regno = 32; regno < SPARC_LAST_V9_FCC_REG; regno++) \ 101050397Sobrien fixed_regs[regno] = 1; \ 101150397Sobrien } \ 101290075Sobrien /* If the user has passed -f{fixed,call-{used,saved}}-g2 */ \ 1013117395Skan /* then honor it. Likewise with g3 and g4. */ \ 101490075Sobrien if (fixed_regs[2] == 2) \ 101590075Sobrien fixed_regs[2] = ! TARGET_APP_REGS; \ 101690075Sobrien if (fixed_regs[3] == 2) \ 101790075Sobrien fixed_regs[3] = ! TARGET_APP_REGS; \ 101890075Sobrien if (TARGET_ARCH32 && fixed_regs[4] == 2) \ 101990075Sobrien fixed_regs[4] = ! TARGET_APP_REGS; \ 102090075Sobrien else if (TARGET_CM_EMBMEDANY) \ 102190075Sobrien fixed_regs[4] = 1; \ 102290075Sobrien else if (fixed_regs[4] == 2) \ 102390075Sobrien fixed_regs[4] = 0; \ 102450397Sobrien if (TARGET_FLAT) \ 102550397Sobrien { \ 102696263Sobrien int regno; \ 102750397Sobrien /* Let the compiler believe the frame pointer is still \ 102850397Sobrien %fp, but output it as %i7. */ \ 102950397Sobrien fixed_regs[31] = 1; \ 103096263Sobrien reg_names[HARD_FRAME_POINTER_REGNUM] = "%i7"; \ 103190075Sobrien /* Disable leaf functions */ \ 103290075Sobrien memset (sparc_leaf_regs, 0, FIRST_PSEUDO_REGISTER); \ 103396263Sobrien /* Make LEAF_REG_REMAP a noop. */ \ 103496263Sobrien for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \ 103596263Sobrien leaf_reg_remap [regno] = regno; \ 103650397Sobrien } \ 103750397Sobrien } \ 103850397Sobrienwhile (0) 103950397Sobrien 104050397Sobrien/* Return number of consecutive hard regs needed starting at reg REGNO 104150397Sobrien to hold something of mode MODE. 104250397Sobrien This is ordinarily the length in words of a value of mode MODE 104350397Sobrien but can be less for certain modes in special long registers. 104450397Sobrien 104550397Sobrien On SPARC, ordinary registers hold 32 bits worth; 104650397Sobrien this means both integer and floating point registers. 104750397Sobrien On v9, integer regs hold 64 bits worth; floating point regs hold 104850397Sobrien 32 bits worth (this includes the new fp regs as even the odd ones are 104950397Sobrien included in the hard register count). */ 105050397Sobrien 105150397Sobrien#define HARD_REGNO_NREGS(REGNO, MODE) \ 105250397Sobrien (TARGET_ARCH64 \ 105396263Sobrien ? ((REGNO) < 32 || (REGNO) == FRAME_POINTER_REGNUM \ 105496263Sobrien ? (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD \ 105596263Sobrien : (GET_MODE_SIZE (MODE) + 3) / 4) \ 105650397Sobrien : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 105750397Sobrien 1058132718Skan/* Due to the ARCH64 discrepancy above we must override this next 105990075Sobrien macro too. */ 106090075Sobrien#define REGMODE_NATURAL_SIZE(MODE) \ 106190075Sobrien ((TARGET_ARCH64 && FLOAT_MODE_P (MODE)) ? 4 : UNITS_PER_WORD) 106250397Sobrien 106350397Sobrien/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 106450397Sobrien See sparc.c for how we initialize this. */ 106590075Sobrienextern const int *hard_regno_mode_classes; 106650397Sobrienextern int sparc_mode_class[]; 106790075Sobrien 106890075Sobrien/* ??? Because of the funny way we pass parameters we should allow certain 106990075Sobrien ??? types of float/complex values to be in integer registers during 107090075Sobrien ??? RTL generation. This only matters on arch32. */ 107150397Sobrien#define HARD_REGNO_MODE_OK(REGNO, MODE) \ 107250397Sobrien ((hard_regno_mode_classes[REGNO] & sparc_mode_class[MODE]) != 0) 107350397Sobrien 107450397Sobrien/* Value is 1 if it is a good idea to tie two pseudo registers 107550397Sobrien when one has mode MODE1 and one has mode MODE2. 107650397Sobrien If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 107750397Sobrien for any hard reg, then this must be 0 for correct output. 107850397Sobrien 107950397Sobrien For V9: SFmode can't be combined with other float modes, because they can't 108050397Sobrien be allocated to the %d registers. Also, DFmode won't fit in odd %f 108150397Sobrien registers, but SFmode will. */ 108250397Sobrien#define MODES_TIEABLE_P(MODE1, MODE2) \ 108350397Sobrien ((MODE1) == (MODE2) \ 108450397Sobrien || (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2) \ 108550397Sobrien && (! TARGET_V9 \ 108650397Sobrien || (GET_MODE_CLASS (MODE1) != MODE_FLOAT \ 108750397Sobrien || (MODE1 != SFmode && MODE2 != SFmode))))) 108850397Sobrien 108950397Sobrien/* Specify the registers used for certain standard purposes. 109050397Sobrien The values of these macros are register numbers. */ 109150397Sobrien 109250397Sobrien/* SPARC pc isn't overloaded on a register that the compiler knows about. */ 109350397Sobrien/* #define PC_REGNUM */ 109450397Sobrien 109550397Sobrien/* Register to use for pushing function arguments. */ 109650397Sobrien#define STACK_POINTER_REGNUM 14 109750397Sobrien 109896263Sobrien/* The stack bias (amount by which the hardware register is offset by). */ 109996263Sobrien#define SPARC_STACK_BIAS ((TARGET_ARCH64 && TARGET_STACK_BIAS) ? 2047 : 0) 110096263Sobrien 110150397Sobrien/* Actual top-of-stack address is 92/176 greater than the contents of the 110250397Sobrien stack pointer register for !v9/v9. That is: 110350397Sobrien - !v9: 64 bytes for the in and local registers, 4 bytes for structure return 110450397Sobrien address, and 6*4 bytes for the 6 register parameters. 110550397Sobrien - v9: 128 bytes for the in and local registers + 6*8 bytes for the integer 110650397Sobrien parameter regs. */ 110796263Sobrien#define STACK_POINTER_OFFSET (FIRST_PARM_OFFSET(0) + SPARC_STACK_BIAS) 110850397Sobrien 110996263Sobrien/* Base register for access to local variables of the function. */ 111096263Sobrien#define HARD_FRAME_POINTER_REGNUM 30 111150397Sobrien 111296263Sobrien/* The soft frame pointer does not have the stack bias applied. */ 111396263Sobrien#define FRAME_POINTER_REGNUM 101 111450397Sobrien 111596263Sobrien/* Given the stack bias, the stack pointer isn't actually aligned. */ 111696263Sobrien#define INIT_EXPANDERS \ 111796263Sobrien do { \ 111896263Sobrien if (cfun && cfun->emit->regno_pointer_align && SPARC_STACK_BIAS) \ 111996263Sobrien { \ 112096263Sobrien REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = BITS_PER_UNIT; \ 112196263Sobrien REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = BITS_PER_UNIT; \ 112296263Sobrien } \ 112396263Sobrien } while (0) 112450397Sobrien 112550397Sobrien/* Value should be nonzero if functions must have frame pointers. 112650397Sobrien Zero means the frame pointer need not be set up (and parms 112750397Sobrien may be accessed via the stack pointer) in functions that seem suitable. 112850397Sobrien This is computed in `reload', in reload1.c. 112950397Sobrien Used in flow.c, global.c, and reload1.c. 113050397Sobrien 113150397Sobrien Being a non-leaf function does not mean a frame pointer is needed in the 113250397Sobrien flat window model. However, the debugger won't be able to backtrace through 113350397Sobrien us with out it. */ 113496263Sobrien#define FRAME_POINTER_REQUIRED \ 113596263Sobrien (TARGET_FLAT \ 113696263Sobrien ? (current_function_calls_alloca \ 113796263Sobrien || !leaf_function_p ()) \ 113850397Sobrien : ! (leaf_function_p () && only_leaf_regs_used ())) 113950397Sobrien 114050397Sobrien/* Base register for access to arguments of the function. */ 114150397Sobrien#define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM 114250397Sobrien 114350397Sobrien/* Register in which static-chain is passed to a function. This must 114450397Sobrien not be a register used by the prologue. */ 114550397Sobrien#define STATIC_CHAIN_REGNUM (TARGET_ARCH64 ? 5 : 2) 114650397Sobrien 114750397Sobrien/* Register which holds offset table for position-independent 114850397Sobrien data references. */ 114950397Sobrien 115096263Sobrien#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 23 : INVALID_REGNUM) 115150397Sobrien 115250397Sobrien/* Pick a default value we can notice from override_options: 115350397Sobrien !v9: Default is on. 115450397Sobrien v9: Default is off. */ 115550397Sobrien 115650397Sobrien#define DEFAULT_PCC_STRUCT_RETURN -1 115750397Sobrien 1158117395Skan/* SPARC ABI says that quad-precision floats and all structures are returned 115950397Sobrien in memory. 116050397Sobrien For v9: unions <= 32 bytes in size are returned in int regs, 116150397Sobrien structures up to 32 bytes are returned in int and fp regs. */ 116250397Sobrien 116350397Sobrien#define RETURN_IN_MEMORY(TYPE) \ 116450397Sobrien(TARGET_ARCH32 \ 116550397Sobrien ? (TYPE_MODE (TYPE) == BLKmode \ 1166132718Skan || TYPE_MODE (TYPE) == TFmode) \ 116750397Sobrien : (TYPE_MODE (TYPE) == BLKmode \ 116890075Sobrien && (unsigned HOST_WIDE_INT) int_size_in_bytes (TYPE) > 32)) 116950397Sobrien 117050397Sobrien/* Functions which return large structures get the address 117150397Sobrien to place the wanted value at offset 64 from the frame. 117250397Sobrien Must reserve 64 bytes for the in and local registers. 117350397Sobrien v9: Functions which return large structures get the address to place the 117450397Sobrien wanted value from an invisible first argument. */ 117550397Sobrien/* Used only in other #defines in this file. */ 117650397Sobrien#define STRUCT_VALUE_OFFSET 64 117750397Sobrien 117850397Sobrien#define STRUCT_VALUE \ 117950397Sobrien (TARGET_ARCH64 \ 118050397Sobrien ? 0 \ 118190075Sobrien : gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \ 118290075Sobrien STRUCT_VALUE_OFFSET))) 118390075Sobrien 118450397Sobrien#define STRUCT_VALUE_INCOMING \ 118590075Sobrien (TARGET_ARCH64 \ 118690075Sobrien ? 0 \ 118790075Sobrien : gen_rtx_MEM (Pmode, plus_constant (frame_pointer_rtx, \ 118890075Sobrien STRUCT_VALUE_OFFSET))) 118950397Sobrien 119050397Sobrien/* Define the classes of registers for register constraints in the 119150397Sobrien machine description. Also define ranges of constants. 119250397Sobrien 119350397Sobrien One of the classes must always be named ALL_REGS and include all hard regs. 119450397Sobrien If there is more than one class, another class must be named NO_REGS 119550397Sobrien and contain no registers. 119650397Sobrien 119750397Sobrien The name GENERAL_REGS must be the name of a class (or an alias for 119850397Sobrien another name such as ALL_REGS). This is the class of registers 119950397Sobrien that is allowed by "g" or "r" in a register constraint. 120050397Sobrien Also, registers outside this class are allocated only when 120150397Sobrien instructions express preferences for them. 120250397Sobrien 120350397Sobrien The classes must be numbered in nondecreasing order; that is, 120450397Sobrien a larger-numbered class must never be contained completely 120550397Sobrien in a smaller-numbered class. 120650397Sobrien 120750397Sobrien For any two classes, it is very desirable that there be another 120850397Sobrien class that represents their union. */ 120950397Sobrien 121050397Sobrien/* The SPARC has various kinds of registers: general, floating point, 121150397Sobrien and condition codes [well, it has others as well, but none that we 121250397Sobrien care directly about]. 121350397Sobrien 121450397Sobrien For v9 we must distinguish between the upper and lower floating point 121550397Sobrien registers because the upper ones can't hold SFmode values. 121650397Sobrien HARD_REGNO_MODE_OK won't help here because reload assumes that register(s) 121750397Sobrien satisfying a group need for a class will also satisfy a single need for 121850397Sobrien that class. EXTRA_FP_REGS is a bit of a misnomer as it covers all 64 fp 121950397Sobrien regs. 122050397Sobrien 122150397Sobrien It is important that one class contains all the general and all the standard 122250397Sobrien fp regs. Otherwise find_reg() won't properly allocate int regs for moves, 122350397Sobrien because reg_class_record() will bias the selection in favor of fp regs, 122450397Sobrien because reg_class_subunion[GENERAL_REGS][FP_REGS] will yield FP_REGS, 122550397Sobrien because FP_REGS > GENERAL_REGS. 122650397Sobrien 122750397Sobrien It is also important that one class contain all the general and all the 122850397Sobrien fp regs. Otherwise when spilling a DFmode reg, it may be from EXTRA_FP_REGS 122950397Sobrien but find_reloads() may use class GENERAL_OR_FP_REGS. This will cause 123050397Sobrien allocate_reload_reg() to bypass it causing an abort because the compiler 123150397Sobrien thinks it doesn't have a spill reg when in fact it does. 123250397Sobrien 123350397Sobrien v9 also has 4 floating point condition code registers. Since we don't 123450397Sobrien have a class that is the union of FPCC_REGS with either of the others, 123550397Sobrien it is important that it appear first. Otherwise the compiler will die 123650397Sobrien trying to compile _fixunsdfsi because fix_truncdfsi2 won't match its 123750397Sobrien constraints. 123850397Sobrien 123950397Sobrien It is important that SPARC_ICC_REG have class NO_REGS. Otherwise combine 124050397Sobrien may try to use it to hold an SImode value. See register_operand. 124150397Sobrien ??? Should %fcc[0123] be handled similarly? 124250397Sobrien*/ 124350397Sobrien 124450397Sobrienenum reg_class { NO_REGS, FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS, 124550397Sobrien EXTRA_FP_REGS, GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, 124650397Sobrien ALL_REGS, LIM_REG_CLASSES }; 124750397Sobrien 124850397Sobrien#define N_REG_CLASSES (int) LIM_REG_CLASSES 124950397Sobrien 125090075Sobrien/* Give names of register classes as strings for dump file. */ 125150397Sobrien 125250397Sobrien#define REG_CLASS_NAMES \ 125350397Sobrien { "NO_REGS", "FPCC_REGS", "I64_REGS", "GENERAL_REGS", "FP_REGS", \ 125450397Sobrien "EXTRA_FP_REGS", "GENERAL_OR_FP_REGS", "GENERAL_OR_EXTRA_FP_REGS", \ 125550397Sobrien "ALL_REGS" } 125650397Sobrien 125750397Sobrien/* Define which registers fit in which classes. 125850397Sobrien This is an initializer for a vector of HARD_REG_SET 125950397Sobrien of length N_REG_CLASSES. */ 126050397Sobrien 126196263Sobrien#define REG_CLASS_CONTENTS \ 126296263Sobrien {{0, 0, 0, 0}, /* NO_REGS */ \ 126396263Sobrien {0, 0, 0, 0xf}, /* FPCC_REGS */ \ 126496263Sobrien {0xffff, 0, 0, 0}, /* I64_REGS */ \ 126596263Sobrien {-1, 0, 0, 0x20}, /* GENERAL_REGS */ \ 126696263Sobrien {0, -1, 0, 0}, /* FP_REGS */ \ 126796263Sobrien {0, -1, -1, 0}, /* EXTRA_FP_REGS */ \ 126896263Sobrien {-1, -1, 0, 0x20}, /* GENERAL_OR_FP_REGS */ \ 126996263Sobrien {-1, -1, -1, 0x20}, /* GENERAL_OR_EXTRA_FP_REGS */ \ 127096263Sobrien {-1, -1, -1, 0x3f}} /* ALL_REGS */ 127150397Sobrien 1272132718Skan/* Defines invalid mode changes. Borrowed from pa64-regs.h. 1273132718Skan 1274132718Skan SImode loads to floating-point registers are not zero-extended. 1275132718Skan The definition for LOAD_EXTEND_OP specifies that integer loads 1276132718Skan narrower than BITS_PER_WORD will be zero-extended. As a result, 1277132718Skan we inhibit changes from SImode unless they are to a mode that is 1278132718Skan identical in size. */ 1279132718Skan 1280132718Skan#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ 1281132718Skan (TARGET_ARCH64 \ 1282132718Skan && (FROM) == SImode \ 1283132718Skan && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ 1284132718Skan ? reg_classes_intersect_p (CLASS, FP_REGS) : 0) 1285132718Skan 128650397Sobrien/* The same information, inverted: 128750397Sobrien Return the class number of the smallest class containing 128850397Sobrien reg number REGNO. This could be a conditional expression 128950397Sobrien or could index an array. */ 129050397Sobrien 129190075Sobrienextern enum reg_class sparc_regno_reg_class[FIRST_PSEUDO_REGISTER]; 129250397Sobrien 129350397Sobrien#define REGNO_REG_CLASS(REGNO) sparc_regno_reg_class[(REGNO)] 129450397Sobrien 1295117395Skan/* This is the order in which to allocate registers normally. 1296117395Skan 1297117395Skan We put %f0-%f7 last among the float registers, so as to make it more 129850397Sobrien likely that a pseudo-register which dies in the float return register 1299117395Skan area will get allocated to the float return register, thus saving a move 1300117395Skan instruction at the end of the function. 130150397Sobrien 1302117395Skan Similarly for integer return value registers. 1303117395Skan 1304117395Skan We know in this case that we will not end up with a leaf function. 1305117395Skan 1306132718Skan The register allocator is given the global and out registers first 1307117395Skan because these registers are call clobbered and thus less useful to 1308117395Skan global register allocation. 1309117395Skan 1310117395Skan Next we list the local and in registers. They are not call clobbered 1311117395Skan and thus very useful for global register allocation. We list the input 1312117395Skan registers before the locals so that it is more likely the incoming 1313117395Skan arguments received in those registers can just stay there and not be 1314117395Skan reloaded. */ 1315117395Skan 131650397Sobrien#define REG_ALLOC_ORDER \ 1317117395Skan{ 1, 2, 3, 4, 5, 6, 7, /* %g1-%g7 */ \ 1318117395Skan 13, 12, 11, 10, 9, 8, /* %o5-%o0 */ \ 1319117395Skan 15, /* %o7 */ \ 1320117395Skan 16, 17, 18, 19, 20, 21, 22, 23, /* %l0-%l7 */ \ 1321117395Skan 29, 28, 27, 26, 25, 24, 31, /* %i5-%i0,%i7 */\ 132250397Sobrien 40, 41, 42, 43, 44, 45, 46, 47, /* %f8-%f15 */ \ 132350397Sobrien 48, 49, 50, 51, 52, 53, 54, 55, /* %f16-%f23 */ \ 132450397Sobrien 56, 57, 58, 59, 60, 61, 62, 63, /* %f24-%f31 */ \ 132550397Sobrien 64, 65, 66, 67, 68, 69, 70, 71, /* %f32-%f39 */ \ 132650397Sobrien 72, 73, 74, 75, 76, 77, 78, 79, /* %f40-%f47 */ \ 132750397Sobrien 80, 81, 82, 83, 84, 85, 86, 87, /* %f48-%f55 */ \ 132850397Sobrien 88, 89, 90, 91, 92, 93, 94, 95, /* %f56-%f63 */ \ 1329117395Skan 39, 38, 37, 36, 35, 34, 33, 32, /* %f7-%f0 */ \ 1330117395Skan 96, 97, 98, 99, /* %fcc0-3 */ \ 1331117395Skan 100, 0, 14, 30, 101} /* %icc, %g0, %o6, %i6, %sfp */ 133250397Sobrien 133350397Sobrien/* This is the order in which to allocate registers for 1334117395Skan leaf functions. If all registers can fit in the global and 1335117395Skan output registers, then we have the possibility of having a leaf 1336117395Skan function. 133750397Sobrien 1338117395Skan The macro actually mentioned the input registers first, 1339117395Skan because they get renumbered into the output registers once 1340117395Skan we know really do have a leaf function. 1341117395Skan 1342117395Skan To be more precise, this register allocation order is used 1343117395Skan when %o7 is found to not be clobbered right before register 1344117395Skan allocation. Normally, the reason %o7 would be clobbered is 1345117395Skan due to a call which could not be transformed into a sibling 1346117395Skan call. 1347117395Skan 1348117395Skan As a consequence, it is possible to use the leaf register 1349117395Skan allocation order and not end up with a leaf function. We will 1350117395Skan not get suboptimal register allocation in that case because by 1351117395Skan definition of being potentially leaf, there were no function 1352117395Skan calls. Therefore, allocation order within the local register 1353117395Skan window is not critical like it is when we do have function calls. */ 1354117395Skan 135550397Sobrien#define REG_LEAF_ALLOC_ORDER \ 1356117395Skan{ 1, 2, 3, 4, 5, 6, 7, /* %g1-%g7 */ \ 1357117395Skan 29, 28, 27, 26, 25, 24, /* %i5-%i0 */ \ 1358117395Skan 15, /* %o7 */ \ 1359117395Skan 13, 12, 11, 10, 9, 8, /* %o5-%o0 */ \ 1360117395Skan 16, 17, 18, 19, 20, 21, 22, 23, /* %l0-%l7 */ \ 1361117395Skan 40, 41, 42, 43, 44, 45, 46, 47, /* %f8-%f15 */ \ 1362117395Skan 48, 49, 50, 51, 52, 53, 54, 55, /* %f16-%f23 */ \ 1363117395Skan 56, 57, 58, 59, 60, 61, 62, 63, /* %f24-%f31 */ \ 1364117395Skan 64, 65, 66, 67, 68, 69, 70, 71, /* %f32-%f39 */ \ 1365117395Skan 72, 73, 74, 75, 76, 77, 78, 79, /* %f40-%f47 */ \ 1366117395Skan 80, 81, 82, 83, 84, 85, 86, 87, /* %f48-%f55 */ \ 1367117395Skan 88, 89, 90, 91, 92, 93, 94, 95, /* %f56-%f63 */ \ 1368117395Skan 39, 38, 37, 36, 35, 34, 33, 32, /* %f7-%f0 */ \ 1369117395Skan 96, 97, 98, 99, /* %fcc0-3 */ \ 1370117395Skan 100, 0, 14, 30, 31, 101} /* %icc, %g0, %o6, %i6, %i7, %sfp */ 1371117395Skan 137250397Sobrien#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc () 137350397Sobrien 137490075Sobrienextern char sparc_leaf_regs[]; 137590075Sobrien#define LEAF_REGISTERS sparc_leaf_regs 137650397Sobrien 137796263Sobrienextern char leaf_reg_remap[]; 137850397Sobrien#define LEAF_REG_REMAP(REGNO) (leaf_reg_remap[REGNO]) 137950397Sobrien 138050397Sobrien/* The class value for index registers, and the one for base regs. */ 138150397Sobrien#define INDEX_REG_CLASS GENERAL_REGS 138250397Sobrien#define BASE_REG_CLASS GENERAL_REGS 138350397Sobrien 138450397Sobrien/* Local macro to handle the two v9 classes of FP regs. */ 138550397Sobrien#define FP_REG_CLASS_P(CLASS) ((CLASS) == FP_REGS || (CLASS) == EXTRA_FP_REGS) 138650397Sobrien 138750397Sobrien/* Get reg_class from a letter such as appears in the machine description. 138850397Sobrien In the not-v9 case, coerce v9's 'e' class to 'f', so we can use 'e' in the 138950397Sobrien .md file for v8 and v9. 139050397Sobrien 'd' and 'b' are used for single and double precision VIS operations, 139150397Sobrien if TARGET_VIS. 139290075Sobrien 'h' is used for V8+ 64 bit global and out registers. */ 139350397Sobrien 139450397Sobrien#define REG_CLASS_FROM_LETTER(C) \ 139550397Sobrien(TARGET_V9 \ 139650397Sobrien ? ((C) == 'f' ? FP_REGS \ 139750397Sobrien : (C) == 'e' ? EXTRA_FP_REGS \ 139850397Sobrien : (C) == 'c' ? FPCC_REGS \ 139950397Sobrien : ((C) == 'd' && TARGET_VIS) ? FP_REGS\ 140050397Sobrien : ((C) == 'b' && TARGET_VIS) ? EXTRA_FP_REGS\ 140150397Sobrien : ((C) == 'h' && TARGET_V8PLUS) ? I64_REGS\ 140250397Sobrien : NO_REGS) \ 140350397Sobrien : ((C) == 'f' ? FP_REGS \ 140450397Sobrien : (C) == 'e' ? FP_REGS \ 140550397Sobrien : (C) == 'c' ? FPCC_REGS \ 140650397Sobrien : NO_REGS)) 140750397Sobrien 140850397Sobrien/* The letters I, J, K, L and M in a register constraint string 140950397Sobrien can be used to stand for particular ranges of immediate operands. 141050397Sobrien This macro defines what the ranges are. 141150397Sobrien C is the letter, and VALUE is a constant value. 141250397Sobrien Return 1 if VALUE is in the range specified by C. 141350397Sobrien 141450397Sobrien `I' is used for the range of constants an insn can actually contain. 141550397Sobrien `J' is used for the range which is just zero (since that is R0). 141650397Sobrien `K' is used for constants which can be loaded with a single sethi insn. 141750397Sobrien `L' is used for the range of constants supported by the movcc insns. 141896263Sobrien `M' is used for the range of constants supported by the movrcc insns. 1419117395Skan `N' is like K, but for constants wider than 32 bits. 1420117395Skan `O' is used for the range which is just 4096. */ 142150397Sobrien 142250397Sobrien#define SPARC_SIMM10_P(X) ((unsigned HOST_WIDE_INT) (X) + 0x200 < 0x400) 142350397Sobrien#define SPARC_SIMM11_P(X) ((unsigned HOST_WIDE_INT) (X) + 0x400 < 0x800) 142450397Sobrien#define SPARC_SIMM13_P(X) ((unsigned HOST_WIDE_INT) (X) + 0x1000 < 0x2000) 142550397Sobrien/* 10 and 11 bit immediates are only used for a few specific insns. 142650397Sobrien SMALL_INT is used throughout the port so we continue to use it. */ 142750397Sobrien#define SMALL_INT(X) (SPARC_SIMM13_P (INTVAL (X))) 142850397Sobrien/* 13 bit immediate, considering only the low 32 bits */ 142996263Sobrien#define SMALL_INT32(X) (SPARC_SIMM13_P (trunc_int_for_mode \ 143096263Sobrien (INTVAL (X), SImode))) 143150397Sobrien#define SPARC_SETHI_P(X) \ 143296263Sobrien (((unsigned HOST_WIDE_INT) (X) \ 143396263Sobrien & ((unsigned HOST_WIDE_INT) 0x3ff - GET_MODE_MASK (SImode) - 1)) == 0) 143496263Sobrien#define SPARC_SETHI32_P(X) \ 143596263Sobrien (SPARC_SETHI_P ((unsigned HOST_WIDE_INT) (X) & GET_MODE_MASK (SImode))) 143650397Sobrien 143750397Sobrien#define CONST_OK_FOR_LETTER_P(VALUE, C) \ 143850397Sobrien ((C) == 'I' ? SPARC_SIMM13_P (VALUE) \ 143950397Sobrien : (C) == 'J' ? (VALUE) == 0 \ 144096263Sobrien : (C) == 'K' ? SPARC_SETHI32_P (VALUE) \ 144150397Sobrien : (C) == 'L' ? SPARC_SIMM11_P (VALUE) \ 144250397Sobrien : (C) == 'M' ? SPARC_SIMM10_P (VALUE) \ 144396263Sobrien : (C) == 'N' ? SPARC_SETHI_P (VALUE) \ 1444117395Skan : (C) == 'O' ? (VALUE) == 4096 \ 144550397Sobrien : 0) 144650397Sobrien 144750397Sobrien/* Similar, but for floating constants, and defining letters G and H. 144850397Sobrien Here VALUE is the CONST_DOUBLE rtx itself. */ 144950397Sobrien 145050397Sobrien#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 145190075Sobrien ((C) == 'G' ? fp_zero_operand (VALUE, GET_MODE (VALUE)) \ 145290075Sobrien : (C) == 'H' ? arith_double_operand (VALUE, DImode) \ 1453117395Skan : (C) == 'O' ? arith_double_4096_operand (VALUE, DImode) \ 145450397Sobrien : 0) 145550397Sobrien 145650397Sobrien/* Given an rtx X being reloaded into a reg required to be 145750397Sobrien in class CLASS, return the class of reg to actually use. 145850397Sobrien In general this is just CLASS; but on some machines 145950397Sobrien in some cases it is preferable to use a more restrictive class. */ 146090075Sobrien/* - We can't load constants into FP registers. 146190075Sobrien - We can't load FP constants into integer registers when soft-float, 146290075Sobrien because there is no soft-float pattern with a r/F constraint. 146390075Sobrien - We can't load FP constants into integer registers for TFmode unless 146490075Sobrien it is 0.0L, because there is no movtf pattern with a r/F constraint. 146552284Sobrien - Try and reload integer constants (symbolic or otherwise) back into 146652284Sobrien registers directly, rather than having them dumped to memory. */ 146752284Sobrien 146850397Sobrien#define PREFERRED_RELOAD_CLASS(X,CLASS) \ 146950397Sobrien (CONSTANT_P (X) \ 147052284Sobrien ? ((FP_REG_CLASS_P (CLASS) \ 1471102780Skan || (CLASS) == GENERAL_OR_FP_REGS \ 1472102780Skan || (CLASS) == GENERAL_OR_EXTRA_FP_REGS \ 147350397Sobrien || (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ 147490075Sobrien && ! TARGET_FPU) \ 147590075Sobrien || (GET_MODE (X) == TFmode \ 147690075Sobrien && ! fp_zero_operand (X, TFmode))) \ 147752284Sobrien ? NO_REGS \ 147852284Sobrien : (!FP_REG_CLASS_P (CLASS) \ 147952284Sobrien && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \ 148052284Sobrien ? GENERAL_REGS \ 148152284Sobrien : (CLASS)) \ 148252284Sobrien : (CLASS)) 148350397Sobrien 148450397Sobrien/* Return the register class of a scratch register needed to load IN into 148550397Sobrien a register of class CLASS in MODE. 148650397Sobrien 148752284Sobrien We need a temporary when loading/storing a HImode/QImode value 148850397Sobrien between memory and the FPU registers. This can happen when combine puts 148996263Sobrien a paradoxical subreg in a float/fix conversion insn. 149050397Sobrien 149196263Sobrien We need a temporary when loading/storing a DFmode value between 149296263Sobrien unaligned memory and the upper FPU registers. */ 149396263Sobrien 149450397Sobrien#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \ 149552284Sobrien ((FP_REG_CLASS_P (CLASS) \ 149652284Sobrien && ((MODE) == HImode || (MODE) == QImode) \ 149750397Sobrien && (GET_CODE (IN) == MEM \ 149852284Sobrien || ((GET_CODE (IN) == REG || GET_CODE (IN) == SUBREG) \ 149952284Sobrien && true_regnum (IN) == -1))) \ 150052284Sobrien ? GENERAL_REGS \ 150196263Sobrien : ((CLASS) == EXTRA_FP_REGS && (MODE) == DFmode \ 150296263Sobrien && GET_CODE (IN) == MEM && TARGET_ARCH32 \ 150396263Sobrien && ! mem_min_alignment ((IN), 8)) \ 150496263Sobrien ? FP_REGS \ 150596263Sobrien : (((TARGET_CM_MEDANY \ 150696263Sobrien && symbolic_operand ((IN), (MODE))) \ 150796263Sobrien || (TARGET_CM_EMBMEDANY \ 150896263Sobrien && text_segment_operand ((IN), (MODE)))) \ 150996263Sobrien && !flag_pic) \ 151096263Sobrien ? GENERAL_REGS \ 151196263Sobrien : NO_REGS) 151250397Sobrien 151350397Sobrien#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, IN) \ 151496263Sobrien ((FP_REG_CLASS_P (CLASS) \ 151552284Sobrien && ((MODE) == HImode || (MODE) == QImode) \ 151652284Sobrien && (GET_CODE (IN) == MEM \ 151752284Sobrien || ((GET_CODE (IN) == REG || GET_CODE (IN) == SUBREG) \ 151852284Sobrien && true_regnum (IN) == -1))) \ 151996263Sobrien ? GENERAL_REGS \ 152096263Sobrien : ((CLASS) == EXTRA_FP_REGS && (MODE) == DFmode \ 152196263Sobrien && GET_CODE (IN) == MEM && TARGET_ARCH32 \ 152296263Sobrien && ! mem_min_alignment ((IN), 8)) \ 152396263Sobrien ? FP_REGS \ 152496263Sobrien : (((TARGET_CM_MEDANY \ 152596263Sobrien && symbolic_operand ((IN), (MODE))) \ 152696263Sobrien || (TARGET_CM_EMBMEDANY \ 152796263Sobrien && text_segment_operand ((IN), (MODE)))) \ 152896263Sobrien && !flag_pic) \ 152996263Sobrien ? GENERAL_REGS \ 153096263Sobrien : NO_REGS) 153150397Sobrien 1532117395Skan/* On SPARC it is not possible to directly move data between 153350397Sobrien GENERAL_REGS and FP_REGS. */ 153450397Sobrien#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ 153550397Sobrien (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2)) 153650397Sobrien 153750397Sobrien/* Return the stack location to use for secondary memory needed reloads. 153850397Sobrien We want to use the reserved location just below the frame pointer. 153950397Sobrien However, we must ensure that there is a frame, so use assign_stack_local 154050397Sobrien if the frame size is zero. */ 154150397Sobrien#define SECONDARY_MEMORY_NEEDED_RTX(MODE) \ 154250397Sobrien (get_frame_size () == 0 \ 154350397Sobrien ? assign_stack_local (MODE, GET_MODE_SIZE (MODE), 0) \ 154490075Sobrien : gen_rtx_MEM (MODE, plus_constant (frame_pointer_rtx, \ 154590075Sobrien STARTING_FRAME_OFFSET))) 154650397Sobrien 154750397Sobrien/* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on v9 154850397Sobrien because the movsi and movsf patterns don't handle r/f moves. 154950397Sobrien For v8 we copy the default definition. */ 155050397Sobrien#define SECONDARY_MEMORY_NEEDED_MODE(MODE) \ 155150397Sobrien (TARGET_ARCH64 \ 155250397Sobrien ? (GET_MODE_BITSIZE (MODE) < 32 \ 155350397Sobrien ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \ 155450397Sobrien : MODE) \ 155550397Sobrien : (GET_MODE_BITSIZE (MODE) < BITS_PER_WORD \ 155650397Sobrien ? mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0) \ 155750397Sobrien : MODE)) 155850397Sobrien 155950397Sobrien/* Return the maximum number of consecutive registers 156050397Sobrien needed to represent mode MODE in a register of class CLASS. */ 156150397Sobrien/* On SPARC, this is the size of MODE in words. */ 156250397Sobrien#define CLASS_MAX_NREGS(CLASS, MODE) \ 156350397Sobrien (FP_REG_CLASS_P (CLASS) ? (GET_MODE_SIZE (MODE) + 3) / 4 \ 156450397Sobrien : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 156550397Sobrien 156650397Sobrien/* Stack layout; function entry, exit and calling. */ 156750397Sobrien 156850397Sobrien/* Define the number of register that can hold parameters. 156950397Sobrien This macro is only used in other macro definitions below and in sparc.c. 157050397Sobrien MODE is the mode of the argument. 157150397Sobrien !v9: All args are passed in %o0-%o5. 157250397Sobrien v9: %o0-%o5 and %f0-%f31 are cumulatively used to pass values. 157350397Sobrien See the description in sparc.c. */ 157450397Sobrien#define NPARM_REGS(MODE) \ 157550397Sobrien(TARGET_ARCH64 \ 157650397Sobrien ? (GET_MODE_CLASS (MODE) == MODE_FLOAT ? 32 : 6) \ 157750397Sobrien : 6) 157850397Sobrien 157950397Sobrien/* Define this if pushing a word on the stack 158050397Sobrien makes the stack pointer a smaller address. */ 158150397Sobrien#define STACK_GROWS_DOWNWARD 158250397Sobrien 158350397Sobrien/* Define this if the nominal address of the stack frame 158450397Sobrien is at the high-address end of the local variables; 158550397Sobrien that is, each additional local variable allocated 158650397Sobrien goes at a more negative offset in the frame. */ 158750397Sobrien#define FRAME_GROWS_DOWNWARD 158850397Sobrien 158950397Sobrien/* Offset within stack frame to start allocating local variables at. 159050397Sobrien If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 159150397Sobrien first local allocated. Otherwise, it is the offset to the BEGINNING 159250397Sobrien of the first local allocated. */ 159350397Sobrien/* This allows space for one TFmode floating point value. */ 159450397Sobrien#define STARTING_FRAME_OFFSET \ 159596263Sobrien (TARGET_ARCH64 ? -16 \ 159650397Sobrien : (-SPARC_STACK_ALIGN (LONG_DOUBLE_TYPE_SIZE / BITS_PER_UNIT))) 159750397Sobrien 159850397Sobrien/* If we generate an insn to push BYTES bytes, 159950397Sobrien this says how many the stack pointer really advances by. 160050397Sobrien On SPARC, don't define this because there are no push insns. */ 160150397Sobrien/* #define PUSH_ROUNDING(BYTES) */ 160250397Sobrien 160350397Sobrien/* Offset of first parameter from the argument pointer register value. 160450397Sobrien !v9: This is 64 for the ins and locals, plus 4 for the struct-return reg 160550397Sobrien even if this function isn't going to use it. 160650397Sobrien v9: This is 128 for the ins and locals. */ 160750397Sobrien#define FIRST_PARM_OFFSET(FNDECL) \ 160896263Sobrien (TARGET_ARCH64 ? 16 * UNITS_PER_WORD : STRUCT_VALUE_OFFSET + UNITS_PER_WORD) 160950397Sobrien 161090075Sobrien/* Offset from the argument pointer register value to the CFA. 161190075Sobrien This is different from FIRST_PARM_OFFSET because the register window 161290075Sobrien comes between the CFA and the arguments. */ 161396263Sobrien#define ARG_POINTER_CFA_OFFSET(FNDECL) 0 161452284Sobrien 161550397Sobrien/* When a parameter is passed in a register, stack space is still 161650397Sobrien allocated for it. 161750397Sobrien !v9: All 6 possible integer registers have backing store allocated. 161890075Sobrien v9: Only space for the arguments passed is allocated. */ 161950397Sobrien/* ??? Ideally, we'd use zero here (as the minimum), but zero has special 162050397Sobrien meaning to the backend. Further, we need to be able to detect if a 162150397Sobrien varargs/unprototyped function is called, as they may want to spill more 162250397Sobrien registers than we've provided space. Ugly, ugly. So for now we retain 162350397Sobrien all 6 slots even for v9. */ 162450397Sobrien#define REG_PARM_STACK_SPACE(DECL) (6 * UNITS_PER_WORD) 162550397Sobrien 162696263Sobrien/* Definitions for register elimination. */ 162796263Sobrien/* ??? In TARGET_FLAT mode we needn't have a hard frame pointer. */ 1628117395Skan 162996263Sobrien#define ELIMINABLE_REGS \ 163096263Sobrien {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 163196263Sobrien { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM} } 163296263Sobrien 163396263Sobrien/* The way this is structured, we can't eliminate SFP in favor of SP 163496263Sobrien if the frame pointer is required: we want to use the SFP->HFP elimination 163596263Sobrien in that case. But the test in update_eliminables doesn't know we are 163696263Sobrien assuming below that we only do the former elimination. */ 163796263Sobrien#define CAN_ELIMINATE(FROM, TO) \ 163896263Sobrien ((TO) == HARD_FRAME_POINTER_REGNUM || !FRAME_POINTER_REQUIRED) 163996263Sobrien 164096263Sobrien#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 164196263Sobrien do { \ 164296263Sobrien (OFFSET) = 0; \ 164396263Sobrien if ((TO) == STACK_POINTER_REGNUM) \ 164496263Sobrien { \ 164596263Sobrien /* Note, we always pretend that this is a leaf function \ 164696263Sobrien because if it's not, there's no point in trying to \ 164796263Sobrien eliminate the frame pointer. If it is a leaf \ 164896263Sobrien function, we guessed right! */ \ 164996263Sobrien if (TARGET_FLAT) \ 165096263Sobrien (OFFSET) = \ 165196263Sobrien sparc_flat_compute_frame_size (get_frame_size ()); \ 165296263Sobrien else \ 165396263Sobrien (OFFSET) = compute_frame_size (get_frame_size (), 1); \ 165496263Sobrien } \ 165596263Sobrien (OFFSET) += SPARC_STACK_BIAS; \ 165696263Sobrien } while (0) 165796263Sobrien 165850397Sobrien/* Keep the stack pointer constant throughout the function. 165950397Sobrien This is both an optimization and a necessity: longjmp 166050397Sobrien doesn't behave itself when the stack pointer moves within 166150397Sobrien the function! */ 166290075Sobrien#define ACCUMULATE_OUTGOING_ARGS 1 166350397Sobrien 166450397Sobrien/* Value is the number of bytes of arguments automatically 166550397Sobrien popped when returning from a subroutine call. 166650397Sobrien FUNDECL is the declaration node of the function (as a tree), 166750397Sobrien FUNTYPE is the data type of the function (as a tree), 166850397Sobrien or for a library call it is an identifier node for the subroutine name. 166950397Sobrien SIZE is the number of bytes of arguments passed on the stack. */ 167050397Sobrien 167150397Sobrien#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 167250397Sobrien 167350397Sobrien/* Some subroutine macros specific to this machine. 167450397Sobrien When !TARGET_FPU, put float return values in the general registers, 167550397Sobrien since we don't have any fp registers. */ 167650397Sobrien#define BASE_RETURN_VALUE_REG(MODE) \ 167750397Sobrien (TARGET_ARCH64 \ 167850397Sobrien ? (TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 : 8) \ 1679132718Skan : (TARGET_FPU && FLOAT_MODE_P (MODE) && (MODE) != TFmode ? 32 : 8)) 168050397Sobrien 168150397Sobrien#define BASE_OUTGOING_VALUE_REG(MODE) \ 168250397Sobrien (TARGET_ARCH64 \ 168350397Sobrien ? (TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 \ 168450397Sobrien : TARGET_FLAT ? 8 : 24) \ 1685132718Skan : (TARGET_FPU && FLOAT_MODE_P (MODE) && (MODE) != TFmode ? 32\ 168650397Sobrien : (TARGET_FLAT ? 8 : 24))) 168750397Sobrien 168850397Sobrien#define BASE_PASSING_ARG_REG(MODE) \ 168950397Sobrien (TARGET_ARCH64 \ 169050397Sobrien ? (TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 : 8) \ 169150397Sobrien : 8) 169250397Sobrien 169390075Sobrien/* ??? FIXME -- seems wrong for v9 structure passing... */ 169450397Sobrien#define BASE_INCOMING_ARG_REG(MODE) \ 169550397Sobrien (TARGET_ARCH64 \ 169650397Sobrien ? (TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 \ 169750397Sobrien : TARGET_FLAT ? 8 : 24) \ 169850397Sobrien : (TARGET_FLAT ? 8 : 24)) 169950397Sobrien 170050397Sobrien/* Define this macro if the target machine has "register windows". This 170150397Sobrien C expression returns the register number as seen by the called function 170250397Sobrien corresponding to register number OUT as seen by the calling function. 170350397Sobrien Return OUT if register number OUT is not an outbound register. */ 170450397Sobrien 170550397Sobrien#define INCOMING_REGNO(OUT) \ 170650397Sobrien ((TARGET_FLAT || (OUT) < 8 || (OUT) > 15) ? (OUT) : (OUT) + 16) 170750397Sobrien 170850397Sobrien/* Define this macro if the target machine has "register windows". This 170950397Sobrien C expression returns the register number as seen by the calling function 171050397Sobrien corresponding to register number IN as seen by the called function. 171150397Sobrien Return IN if register number IN is not an inbound register. */ 171250397Sobrien 171350397Sobrien#define OUTGOING_REGNO(IN) \ 171450397Sobrien ((TARGET_FLAT || (IN) < 24 || (IN) > 31) ? (IN) : (IN) - 16) 171550397Sobrien 171690075Sobrien/* Define this macro if the target machine has register windows. This 171790075Sobrien C expression returns true if the register is call-saved but is in the 171890075Sobrien register window. */ 171990075Sobrien 172090075Sobrien#define LOCAL_REGNO(REGNO) \ 172190075Sobrien (TARGET_FLAT ? 0 : (REGNO) >= 16 && (REGNO) <= 31) 172290075Sobrien 172350397Sobrien/* Define how to find the value returned by a function. 172450397Sobrien VALTYPE is the data type of the value (as a tree). 172550397Sobrien If the precise function being called is known, FUNC is its FUNCTION_DECL; 172650397Sobrien otherwise, FUNC is 0. */ 172750397Sobrien 172850397Sobrien/* On SPARC the value is found in the first "output" register. */ 172950397Sobrien 173050397Sobrien#define FUNCTION_VALUE(VALTYPE, FUNC) \ 173150397Sobrien function_value ((VALTYPE), TYPE_MODE (VALTYPE), 1) 173250397Sobrien 173350397Sobrien/* But the called function leaves it in the first "input" register. */ 173450397Sobrien 173550397Sobrien#define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \ 173650397Sobrien function_value ((VALTYPE), TYPE_MODE (VALTYPE), 0) 173750397Sobrien 173850397Sobrien/* Define how to find the value returned by a library function 173950397Sobrien assuming the value has mode MODE. */ 174050397Sobrien 174150397Sobrien#define LIBCALL_VALUE(MODE) \ 174250397Sobrien function_value (NULL_TREE, (MODE), 1) 174350397Sobrien 174450397Sobrien/* 1 if N is a possible register number for a function value 174550397Sobrien as seen by the caller. 174650397Sobrien On SPARC, the first "output" reg is used for integer values, 174750397Sobrien and the first floating point register is used for floating point values. */ 174850397Sobrien 174950397Sobrien#define FUNCTION_VALUE_REGNO_P(N) ((N) == 8 || (N) == 32) 175050397Sobrien 175150397Sobrien/* Define the size of space to allocate for the return value of an 175250397Sobrien untyped_call. */ 175350397Sobrien 175450397Sobrien#define APPLY_RESULT_SIZE 16 175550397Sobrien 175650397Sobrien/* 1 if N is a possible register number for function argument passing. 175750397Sobrien On SPARC, these are the "output" registers. v9 also uses %f0-%f31. */ 175850397Sobrien 175950397Sobrien#define FUNCTION_ARG_REGNO_P(N) \ 176050397Sobrien(TARGET_ARCH64 \ 176150397Sobrien ? (((N) >= 8 && (N) <= 13) || ((N) >= 32 && (N) <= 63)) \ 176250397Sobrien : ((N) >= 8 && (N) <= 13)) 176350397Sobrien 176450397Sobrien/* Define a data type for recording info about an argument list 176550397Sobrien during the scan of that argument list. This data type should 176650397Sobrien hold all necessary information about the function itself 176750397Sobrien and about the args processed so far, enough to enable macros 176850397Sobrien such as FUNCTION_ARG to determine where the next arg should go. 176950397Sobrien 177050397Sobrien On SPARC (!v9), this is a single integer, which is a number of words 177150397Sobrien of arguments scanned so far (including the invisible argument, 177250397Sobrien if any, which holds the structure-value-address). 177350397Sobrien Thus 7 or more means all following args should go on the stack. 177450397Sobrien 177550397Sobrien For v9, we also need to know whether a prototype is present. */ 177650397Sobrien 177750397Sobrienstruct sparc_args { 177850397Sobrien int words; /* number of words passed so far */ 1779117395Skan int prototype_p; /* nonzero if a prototype is present */ 1780117395Skan int libcall_p; /* nonzero if a library call */ 178150397Sobrien}; 178250397Sobrien#define CUMULATIVE_ARGS struct sparc_args 178350397Sobrien 178450397Sobrien/* Initialize a variable CUM of type CUMULATIVE_ARGS 178550397Sobrien for a call to a function whose data type is FNTYPE. 178650397Sobrien For a library call, FNTYPE is 0. */ 178750397Sobrien 1788132718Skan#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 1789132718Skaninit_cumulative_args (& (CUM), (FNTYPE), (LIBNAME), (FNDECL)); 179050397Sobrien 179150397Sobrien/* Update the data in CUM to advance over an argument 179250397Sobrien of mode MODE and data type TYPE. 179350397Sobrien TYPE is null for libcalls where that information may not be available. */ 179450397Sobrien 179550397Sobrien#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 179650397Sobrienfunction_arg_advance (& (CUM), (MODE), (TYPE), (NAMED)) 179750397Sobrien 179890075Sobrien/* Nonzero if we do not know how to pass TYPE solely in registers. */ 179990075Sobrien 180090075Sobrien#define MUST_PASS_IN_STACK(MODE,TYPE) \ 180190075Sobrien ((TYPE) != 0 \ 180290075Sobrien && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \ 180390075Sobrien || TREE_ADDRESSABLE (TYPE))) 180490075Sobrien 180550397Sobrien/* Determine where to put an argument to a function. 180650397Sobrien Value is zero to push the argument on the stack, 180750397Sobrien or a hard register in which to store the argument. 180850397Sobrien 180950397Sobrien MODE is the argument's machine mode. 181050397Sobrien TYPE is the data type of the argument (as a tree). 181150397Sobrien This is null for libcalls where that information may 181250397Sobrien not be available. 181350397Sobrien CUM is a variable of type CUMULATIVE_ARGS which gives info about 181450397Sobrien the preceding args and about the function being called. 181550397Sobrien NAMED is nonzero if this argument is a named parameter 181650397Sobrien (otherwise it is an extra parameter matching an ellipsis). */ 181750397Sobrien 181850397Sobrien#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 181950397Sobrienfunction_arg (& (CUM), (MODE), (TYPE), (NAMED), 0) 182050397Sobrien 182150397Sobrien/* Define where a function finds its arguments. 182250397Sobrien This is different from FUNCTION_ARG because of register windows. */ 182350397Sobrien 182450397Sobrien#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ 182550397Sobrienfunction_arg (& (CUM), (MODE), (TYPE), (NAMED), 1) 182650397Sobrien 182750397Sobrien/* For an arg passed partly in registers and partly in memory, 182850397Sobrien this is the number of registers used. 182950397Sobrien For args passed entirely in registers or entirely in memory, zero. */ 183050397Sobrien 183150397Sobrien#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 183250397Sobrienfunction_arg_partial_nregs (& (CUM), (MODE), (TYPE), (NAMED)) 183350397Sobrien 183450397Sobrien/* A C expression that indicates when an argument must be passed by reference. 183550397Sobrien If nonzero for an argument, a copy of that argument is made in memory and a 183650397Sobrien pointer to the argument is passed instead of the argument itself. 183750397Sobrien The pointer is passed in whatever way is appropriate for passing a pointer 183850397Sobrien to that type. */ 183950397Sobrien 184050397Sobrien#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ 184150397Sobrienfunction_arg_pass_by_reference (& (CUM), (MODE), (TYPE), (NAMED)) 184250397Sobrien 184350397Sobrien/* If defined, a C expression which determines whether, and in which direction, 184450397Sobrien to pad out an argument with extra space. The value should be of type 184550397Sobrien `enum direction': either `upward' to pad above the argument, 184650397Sobrien `downward' to pad below, or `none' to inhibit padding. */ 184750397Sobrien 184850397Sobrien#define FUNCTION_ARG_PADDING(MODE, TYPE) \ 184950397Sobrienfunction_arg_padding ((MODE), (TYPE)) 185050397Sobrien 185150397Sobrien/* If defined, a C expression that gives the alignment boundary, in bits, 185250397Sobrien of an argument with the specified mode and type. If it is not defined, 185350397Sobrien PARM_BOUNDARY is used for all arguments. 185450397Sobrien For sparc64, objects requiring 16 byte alignment are passed that way. */ 185550397Sobrien 185650397Sobrien#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 185750397Sobrien((TARGET_ARCH64 \ 185850397Sobrien && (GET_MODE_ALIGNMENT (MODE) == 128 \ 185950397Sobrien || ((TYPE) && TYPE_ALIGN (TYPE) == 128))) \ 186050397Sobrien ? 128 : PARM_BOUNDARY) 186150397Sobrien 186250397Sobrien/* Define the information needed to generate branch and scc insns. This is 186350397Sobrien stored from the compare operation. Note that we can't use "rtx" here 186450397Sobrien since it hasn't been defined! */ 186550397Sobrien 1866117395Skanextern GTY(()) rtx sparc_compare_op0; 1867117395Skanextern GTY(()) rtx sparc_compare_op1; 186850397Sobrien 186950397Sobrien 187050397Sobrien/* Generate the special assembly code needed to tell the assembler whatever 187150397Sobrien it might need to know about the return value of a function. 187250397Sobrien 1873117395Skan For SPARC assemblers, we need to output a .proc pseudo-op which conveys 187450397Sobrien information to the assembler relating to peephole optimization (done in 187550397Sobrien the assembler). */ 187650397Sobrien 187750397Sobrien#define ASM_DECLARE_RESULT(FILE, RESULT) \ 187850397Sobrien fprintf ((FILE), "\t.proc\t0%lo\n", sparc_type_code (TREE_TYPE (RESULT))) 187950397Sobrien 188090075Sobrien/* Output the special assembly code needed to tell the assembler some 1881117395Skan register is used as global register variable. 188250397Sobrien 188390075Sobrien SPARC 64bit psABI declares registers %g2 and %g3 as application 188490075Sobrien registers and %g6 and %g7 as OS registers. Any object using them 188590075Sobrien should declare (for %g2/%g3 has to, for %g6/%g7 can) that it uses them 188690075Sobrien and how they are used (scratch or some global variable). 188790075Sobrien Linker will then refuse to link together objects which use those 188890075Sobrien registers incompatibly. 188950397Sobrien 189090075Sobrien Unless the registers are used for scratch, two different global 189190075Sobrien registers cannot be declared to the same name, so in the unlikely 189290075Sobrien case of a global register variable occupying more than one register 189390075Sobrien we prefix the second and following registers with .gnu.part1. etc. */ 189450397Sobrien 1895161651Skanextern GTY(()) char sparc_hard_reg_printed[8]; 189650397Sobrien 189790075Sobrien#ifdef HAVE_AS_REGISTER_PSEUDO_OP 189890075Sobrien#define ASM_DECLARE_REGISTER_GLOBAL(FILE, DECL, REGNO, NAME) \ 189990075Sobriendo { \ 190090075Sobrien if (TARGET_ARCH64) \ 190190075Sobrien { \ 190290075Sobrien int end = HARD_REGNO_NREGS ((REGNO), DECL_MODE (decl)) + (REGNO); \ 190390075Sobrien int reg; \ 190490075Sobrien for (reg = (REGNO); reg < 8 && reg < end; reg++) \ 190590075Sobrien if ((reg & ~1) == 2 || (reg & ~1) == 6) \ 190690075Sobrien { \ 190790075Sobrien if (reg == (REGNO)) \ 190890075Sobrien fprintf ((FILE), "\t.register\t%%g%d, %s\n", reg, (NAME)); \ 190990075Sobrien else \ 191090075Sobrien fprintf ((FILE), "\t.register\t%%g%d, .gnu.part%d.%s\n", \ 191190075Sobrien reg, reg - (REGNO), (NAME)); \ 191290075Sobrien sparc_hard_reg_printed[reg] = 1; \ 191390075Sobrien } \ 191490075Sobrien } \ 191590075Sobrien} while (0) 191690075Sobrien#endif 191750397Sobrien 191850397Sobrien 191996263Sobrien/* Emit rtl for profiling. */ 192096263Sobrien#define PROFILE_HOOK(LABEL) sparc_profile_hook (LABEL) 192150397Sobrien 192296263Sobrien/* All the work done in PROFILE_HOOK, but still required. */ 192396263Sobrien#define FUNCTION_PROFILER(FILE, LABELNO) do { } while (0) 192450397Sobrien 192552284Sobrien/* Set the name of the mcount function for the system. */ 192652284Sobrien#define MCOUNT_FUNCTION "*mcount" 192750397Sobrien 192850397Sobrien/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 192950397Sobrien the stack pointer does not matter. The value is tested only in 193050397Sobrien functions that have frame pointers. 193150397Sobrien No definition is equivalent to always zero. */ 193250397Sobrien 193350397Sobrien#define EXIT_IGNORE_STACK \ 193450397Sobrien (get_frame_size () != 0 \ 193550397Sobrien || current_function_calls_alloca || current_function_outgoing_args_size) 193650397Sobrien 193750397Sobrien#define DELAY_SLOTS_FOR_EPILOGUE \ 193850397Sobrien (TARGET_FLAT ? sparc_flat_epilogue_delay_slots () : 1) 193950397Sobrien#define ELIGIBLE_FOR_EPILOGUE_DELAY(trial, slots_filled) \ 194050397Sobrien (TARGET_FLAT ? sparc_flat_eligible_for_epilogue_delay (trial, slots_filled) \ 194150397Sobrien : eligible_for_epilogue_delay (trial, slots_filled)) 194250397Sobrien 194350397Sobrien/* Define registers used by the epilogue and return instruction. */ 194450397Sobrien#define EPILOGUE_USES(REGNO) \ 194550397Sobrien (!TARGET_FLAT && REGNO == 31) 194650397Sobrien 194750397Sobrien/* Length in units of the trampoline for entering a nested function. */ 194850397Sobrien 194950397Sobrien#define TRAMPOLINE_SIZE (TARGET_ARCH64 ? 32 : 16) 195050397Sobrien 195150397Sobrien#define TRAMPOLINE_ALIGNMENT 128 /* 16 bytes */ 195250397Sobrien 195350397Sobrien/* Emit RTL insns to initialize the variable parts of a trampoline. 195450397Sobrien FNADDR is an RTX for the address of the function's pure code. 195550397Sobrien CXT is an RTX for the static chain value for the function. */ 195650397Sobrien 195750397Sobrien#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 195850397Sobrien if (TARGET_ARCH64) \ 195950397Sobrien sparc64_initialize_trampoline (TRAMP, FNADDR, CXT); \ 196050397Sobrien else \ 196150397Sobrien sparc_initialize_trampoline (TRAMP, FNADDR, CXT) 196250397Sobrien 196390075Sobrien/* Generate necessary RTL for __builtin_saveregs(). */ 196450397Sobrien 196590075Sobrien#define EXPAND_BUILTIN_SAVEREGS() sparc_builtin_saveregs () 196650397Sobrien 196790075Sobrien/* Implement `va_start' for varargs and stdarg. */ 1968117395Skan#define EXPAND_BUILTIN_VA_START(valist, nextarg) \ 1969117395Skan sparc_va_start (valist, nextarg) 197090075Sobrien 197190075Sobrien/* Implement `va_arg'. */ 197290075Sobrien#define EXPAND_BUILTIN_VA_ARG(valist, type) \ 197390075Sobrien sparc_va_arg (valist, type) 197490075Sobrien 197550397Sobrien/* Define this macro if the location where a function argument is passed 197650397Sobrien depends on whether or not it is a named argument. 197750397Sobrien 197850397Sobrien This macro controls how the NAMED argument to FUNCTION_ARG 197950397Sobrien is set for varargs and stdarg functions. With this macro defined, 198050397Sobrien the NAMED argument is always true for named arguments, and false for 198150397Sobrien unnamed arguments. If this is not defined, but SETUP_INCOMING_VARARGS 198250397Sobrien is defined, then all arguments are treated as named. Otherwise, all named 198350397Sobrien arguments except the last are treated as named. 198450397Sobrien For the v9 we want NAMED to mean what it says it means. */ 198550397Sobrien 198650397Sobrien#define STRICT_ARGUMENT_NAMING TARGET_V9 198750397Sobrien 198850397Sobrien/* Generate RTL to flush the register windows so as to make arbitrary frames 198950397Sobrien available. */ 199050397Sobrien#define SETUP_FRAME_ADDRESSES() \ 199150397Sobrien emit_insn (gen_flush_register_windows ()) 199250397Sobrien 199350397Sobrien/* Given an rtx for the address of a frame, 199450397Sobrien return an rtx for the address of the word in the frame 199550397Sobrien that holds the dynamic chain--the previous frame's address. 199650397Sobrien ??? -mflat support? */ 1997102780Skan#define DYNAMIC_CHAIN_ADDRESS(frame) \ 1998102780Skan plus_constant (frame, 14 * UNITS_PER_WORD + SPARC_STACK_BIAS) 199950397Sobrien 200050397Sobrien/* The return address isn't on the stack, it is in a register, so we can't 200150397Sobrien access it from the current frame pointer. We can access it from the 200250397Sobrien previous frame pointer though by reading a value from the register window 200350397Sobrien save area. */ 200450397Sobrien#define RETURN_ADDR_IN_PREVIOUS_FRAME 200550397Sobrien 200650397Sobrien/* This is the offset of the return address to the true next instruction to be 200790075Sobrien executed for the current function. */ 200850397Sobrien#define RETURN_ADDR_OFFSET \ 200950397Sobrien (8 + 4 * (! TARGET_ARCH64 && current_function_returns_struct)) 201050397Sobrien 201150397Sobrien/* The current return address is in %i7. The return address of anything 201250397Sobrien farther back is in the register window save area at [%fp+60]. */ 201350397Sobrien/* ??? This ignores the fact that the actual return address is +8 for normal 201450397Sobrien returns, and +12 for structure returns. */ 201550397Sobrien#define RETURN_ADDR_RTX(count, frame) \ 201650397Sobrien ((count == -1) \ 201750397Sobrien ? gen_rtx_REG (Pmode, 31) \ 201850397Sobrien : gen_rtx_MEM (Pmode, \ 201990075Sobrien memory_address (Pmode, plus_constant (frame, \ 202096263Sobrien 15 * UNITS_PER_WORD \ 202196263Sobrien + SPARC_STACK_BIAS)))) 202250397Sobrien 202350397Sobrien/* Before the prologue, the return address is %o7 + 8. OK, sometimes it's 202450397Sobrien +12, but always using +8 is close enough for frame unwind purposes. 202550397Sobrien Actually, just using %o7 is close enough for unwinding, but %o7+8 202650397Sobrien is something you can return to. */ 202750397Sobrien#define INCOMING_RETURN_ADDR_RTX \ 202890075Sobrien plus_constant (gen_rtx_REG (word_mode, 15), 8) 202990075Sobrien#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (15) 203050397Sobrien 203150397Sobrien/* The offset from the incoming value of %sp to the top of the stack frame 203250397Sobrien for the current function. On sparc64, we have to account for the stack 203350397Sobrien bias if present. */ 203450397Sobrien#define INCOMING_FRAME_SP_OFFSET SPARC_STACK_BIAS 203550397Sobrien 203690075Sobrien/* Describe how we implement __builtin_eh_return. */ 203790075Sobrien#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 24 : INVALID_REGNUM) 203890075Sobrien#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 1) /* %g1 */ 203990075Sobrien#define EH_RETURN_HANDLER_RTX gen_rtx_REG (Pmode, 31) /* %i7 */ 204090075Sobrien 204190075Sobrien/* Select a format to encode pointers in exception handling data. CODE 204290075Sobrien is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is 204390075Sobrien true if the symbol may be affected by dynamic relocations. 204490075Sobrien 204590075Sobrien If assembler and linker properly support .uaword %r_disp32(foo), 204690075Sobrien then use PC relative 32-bit relocations instead of absolute relocs 204790075Sobrien for shared libraries. On sparc64, use pc relative 32-bit relocs even 204896263Sobrien for binaries, to save memory. 204996263Sobrien 205096263Sobrien binutils 2.12 would emit a R_SPARC_DISP32 dynamic relocation if the 205196263Sobrien symbol %r_disp32() is against was not local, but .hidden. In that 205296263Sobrien case, we have to use DW_EH_PE_absptr for pic personality. */ 205390075Sobrien#ifdef HAVE_AS_SPARC_UA_PCREL 205496263Sobrien#ifdef HAVE_AS_SPARC_UA_PCREL_HIDDEN 205590075Sobrien#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \ 205690075Sobrien (flag_pic \ 205790075Sobrien ? (GLOBAL ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4\ 205890075Sobrien : ((TARGET_ARCH64 && ! GLOBAL) \ 205990075Sobrien ? (DW_EH_PE_pcrel | DW_EH_PE_sdata4) \ 206090075Sobrien : DW_EH_PE_absptr)) 206196263Sobrien#else 206296263Sobrien#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \ 206396263Sobrien (flag_pic \ 206496263Sobrien ? (GLOBAL ? DW_EH_PE_absptr : (DW_EH_PE_pcrel | DW_EH_PE_sdata4)) \ 206596263Sobrien : ((TARGET_ARCH64 && ! GLOBAL) \ 206696263Sobrien ? (DW_EH_PE_pcrel | DW_EH_PE_sdata4) \ 206796263Sobrien : DW_EH_PE_absptr)) 206896263Sobrien#endif 206990075Sobrien 207090075Sobrien/* Emit a PC-relative relocation. */ 207190075Sobrien#define ASM_OUTPUT_DWARF_PCREL(FILE, SIZE, LABEL) \ 207290075Sobrien do { \ 207390075Sobrien fputs (integer_asm_op (SIZE, FALSE), FILE); \ 207490075Sobrien fprintf (FILE, "%%r_disp%d(", SIZE * 8); \ 207590075Sobrien assemble_name (FILE, LABEL); \ 207690075Sobrien fputc (')', FILE); \ 207790075Sobrien } while (0) 207890075Sobrien#endif 207950397Sobrien 208050397Sobrien/* Addressing modes, and classification of registers for them. */ 208150397Sobrien 208250397Sobrien/* Macros to check register numbers against specific register classes. */ 208350397Sobrien 208450397Sobrien/* These assume that REGNO is a hard or pseudo reg number. 208550397Sobrien They give nonzero only if REGNO is a hard reg of the suitable class 208650397Sobrien or a pseudo reg currently allocated to a suitable hard reg. 208750397Sobrien Since they use reg_renumber, they are safe only once reg_renumber 208850397Sobrien has been allocated, which happens in local-alloc.c. */ 208950397Sobrien 209050397Sobrien#define REGNO_OK_FOR_INDEX_P(REGNO) \ 209196263Sobrien((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < (unsigned)32 \ 209296263Sobrien || (REGNO) == FRAME_POINTER_REGNUM \ 209396263Sobrien || reg_renumber[REGNO] == FRAME_POINTER_REGNUM) 209496263Sobrien 209596263Sobrien#define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO) 209696263Sobrien 209750397Sobrien#define REGNO_OK_FOR_FP_P(REGNO) \ 209850397Sobrien (((unsigned) (REGNO) - 32 < (TARGET_V9 ? (unsigned)64 : (unsigned)32)) \ 209950397Sobrien || ((unsigned) reg_renumber[REGNO] - 32 < (TARGET_V9 ? (unsigned)64 : (unsigned)32))) 210050397Sobrien#define REGNO_OK_FOR_CCFP_P(REGNO) \ 210150397Sobrien (TARGET_V9 \ 210250397Sobrien && (((unsigned) (REGNO) - 96 < (unsigned)4) \ 210350397Sobrien || ((unsigned) reg_renumber[REGNO] - 96 < (unsigned)4))) 210450397Sobrien 210550397Sobrien/* Now macros that check whether X is a register and also, 210650397Sobrien strictly, whether it is in a specified class. 210750397Sobrien 210850397Sobrien These macros are specific to the SPARC, and may be used only 210950397Sobrien in code for printing assembler insns and in conditions for 211050397Sobrien define_optimization. */ 211150397Sobrien 211250397Sobrien/* 1 if X is an fp register. */ 211350397Sobrien 211450397Sobrien#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X))) 211550397Sobrien 211650397Sobrien/* Is X, a REG, an in or global register? i.e. is regno 0..7 or 24..31 */ 211750397Sobrien#define IN_OR_GLOBAL_P(X) (REGNO (X) < 8 || (REGNO (X) >= 24 && REGNO (X) <= 31)) 211850397Sobrien 211950397Sobrien/* Maximum number of registers that can appear in a valid memory address. */ 212050397Sobrien 212150397Sobrien#define MAX_REGS_PER_ADDRESS 2 212250397Sobrien 212350397Sobrien/* Recognize any constant value that is a valid address. 212450397Sobrien When PIC, we do not accept an address that would require a scratch reg 212550397Sobrien to load into a register. */ 212650397Sobrien 2127132718Skan#define CONSTANT_ADDRESS_P(X) constant_address_p (X) 212850397Sobrien 212950397Sobrien/* Define this, so that when PIC, reload won't try to reload invalid 213050397Sobrien addresses which require two reload registers. */ 213150397Sobrien 2132132718Skan#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X) 213350397Sobrien 213450397Sobrien/* Nonzero if the constant value X is a legitimate general operand. 213552284Sobrien Anything can be made to work except floating point constants. 213652284Sobrien If TARGET_VIS, 0.0 can be made to work as well. */ 213750397Sobrien 2138132718Skan#define LEGITIMATE_CONSTANT_P(X) legitimate_constant_p (X) 213950397Sobrien 214050397Sobrien/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 214150397Sobrien and check its validity for a certain class. 214250397Sobrien We have two alternate definitions for each of them. 214350397Sobrien The usual definition accepts all pseudo regs; the other rejects 214450397Sobrien them unless they have been allocated suitable hard regs. 214550397Sobrien The symbol REG_OK_STRICT causes the latter definition to be used. 214650397Sobrien 214750397Sobrien Most source files want to accept pseudo regs in the hope that 214850397Sobrien they will get allocated to the class that the insn wants them to be in. 214950397Sobrien Source files for reload pass need to be strict. 215050397Sobrien After reload, it makes no difference, since pseudo regs have 215150397Sobrien been eliminated by then. */ 215250397Sobrien 215352284Sobrien/* Optional extra constraints for this machine. 215450397Sobrien 215590075Sobrien 'Q' handles floating point constants which can be moved into 215690075Sobrien an integer register with a single sethi instruction. 215790075Sobrien 215890075Sobrien 'R' handles floating point constants which can be moved into 215990075Sobrien an integer register with a single mov instruction. 216090075Sobrien 216190075Sobrien 'S' handles floating point constants which can be moved into 216290075Sobrien an integer register using a high/lo_sum sequence. 216390075Sobrien 216452284Sobrien 'T' handles memory addresses where the alignment is known to 216552284Sobrien be at least 8 bytes. 216650397Sobrien 216752284Sobrien `U' handles all pseudo registers or a hard even numbered 216896263Sobrien integer register, needed for ldd/std instructions. 216950397Sobrien 217096263Sobrien 'W' handles the memory operand when moving operands in/out 217196263Sobrien of 'e' constraint floating point registers. */ 217290075Sobrien 217350397Sobrien#ifndef REG_OK_STRICT 217450397Sobrien 217550397Sobrien/* Nonzero if X is a hard reg that can be used as an index 217650397Sobrien or if it is a pseudo reg. */ 217750397Sobrien#define REG_OK_FOR_INDEX_P(X) \ 217896263Sobrien (REGNO (X) < 32 \ 217996263Sobrien || REGNO (X) == FRAME_POINTER_REGNUM \ 218096263Sobrien || REGNO (X) >= FIRST_PSEUDO_REGISTER) 218196263Sobrien 218250397Sobrien/* Nonzero if X is a hard reg that can be used as a base reg 218350397Sobrien or if it is a pseudo reg. */ 218496263Sobrien#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P (X) 218550397Sobrien 218696263Sobrien/* 'T', 'U' are for aligned memory loads which aren't needed for arch64. 218796263Sobrien 'W' is like 'T' but is assumed true on arch64. 218850397Sobrien 218996263Sobrien Remember to accept pseudo-registers for memory constraints if reload is 219096263Sobrien in progress. */ 219190075Sobrien 219296263Sobrien#define EXTRA_CONSTRAINT(OP, C) \ 219396263Sobrien sparc_extra_constraint_check(OP, C, 0) 219496263Sobrien 219550397Sobrien#else 219650397Sobrien 219750397Sobrien/* Nonzero if X is a hard reg that can be used as an index. */ 219850397Sobrien#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 219950397Sobrien/* Nonzero if X is a hard reg that can be used as a base reg. */ 220050397Sobrien#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 220150397Sobrien 220296263Sobrien#define EXTRA_CONSTRAINT(OP, C) \ 220396263Sobrien sparc_extra_constraint_check(OP, C, 1) 220490075Sobrien 220550397Sobrien#endif 220650397Sobrien 220790075Sobrien/* Should gcc use [%reg+%lo(xx)+offset] addresses? */ 220890075Sobrien 220990075Sobrien#ifdef HAVE_AS_OFFSETABLE_LO10 221090075Sobrien#define USE_AS_OFFSETABLE_LO10 1 221190075Sobrien#else 221290075Sobrien#define USE_AS_OFFSETABLE_LO10 0 221390075Sobrien#endif 221490075Sobrien 221550397Sobrien/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 221650397Sobrien that is a valid memory address for an instruction. 221750397Sobrien The MODE argument is the machine mode for the MEM expression 221850397Sobrien that wants to use this address. 221950397Sobrien 222050397Sobrien On SPARC, the actual legitimate addresses must be REG+REG or REG+SMALLINT 222150397Sobrien ordinarily. This changes a bit when generating PIC. 222250397Sobrien 222350397Sobrien If you change this, execute "rm explow.o recog.o reload.o". */ 222450397Sobrien 2225117395Skan#define SYMBOLIC_CONST(X) symbolic_operand (X, VOIDmode) 2226117395Skan 222750397Sobrien#define RTX_OK_FOR_BASE_P(X) \ 222850397Sobrien ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ 222950397Sobrien || (GET_CODE (X) == SUBREG \ 223050397Sobrien && GET_CODE (SUBREG_REG (X)) == REG \ 223150397Sobrien && REG_OK_FOR_BASE_P (SUBREG_REG (X)))) 223250397Sobrien 223350397Sobrien#define RTX_OK_FOR_INDEX_P(X) \ 223450397Sobrien ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \ 223550397Sobrien || (GET_CODE (X) == SUBREG \ 223650397Sobrien && GET_CODE (SUBREG_REG (X)) == REG \ 223750397Sobrien && REG_OK_FOR_INDEX_P (SUBREG_REG (X)))) 223850397Sobrien 223950397Sobrien#define RTX_OK_FOR_OFFSET_P(X) \ 224090075Sobrien (GET_CODE (X) == CONST_INT && INTVAL (X) >= -0x1000 && INTVAL (X) < 0x1000 - 8) 2241117395Skan 224290075Sobrien#define RTX_OK_FOR_OLO10_P(X) \ 224390075Sobrien (GET_CODE (X) == CONST_INT && INTVAL (X) >= -0x1000 && INTVAL (X) < 0xc00 - 8) 224450397Sobrien 2245132718Skan#ifdef REG_OK_STRICT 224650397Sobrien#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 2247132718Skan{ \ 2248132718Skan if (legitimate_address_p (MODE, X, 1)) \ 224950397Sobrien goto ADDR; \ 2250132718Skan} 2251132718Skan#else 2252132718Skan#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 2253132718Skan{ \ 2254132718Skan if (legitimate_address_p (MODE, X, 0)) \ 225550397Sobrien goto ADDR; \ 225650397Sobrien} 2257132718Skan#endif 2258117395Skan 2259117395Skan/* Go to LABEL if ADDR (a legitimate address expression) 2260117395Skan has an effect that depends on the machine mode it is used for. 2261117395Skan 2262117395Skan In PIC mode, 2263117395Skan 2264117395Skan (mem:HI [%l7+a]) 2265117395Skan 2266117395Skan is not equivalent to 2267117395Skan 2268117395Skan (mem:QI [%l7+a]) (mem:QI [%l7+a+1]) 2269117395Skan 2270117395Skan because [%l7+a+1] is interpreted as the address of (a+1). */ 2271117395Skan 2272117395Skan#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ 2273117395Skan{ \ 2274117395Skan if (flag_pic == 1) \ 2275117395Skan { \ 2276117395Skan if (GET_CODE (ADDR) == PLUS) \ 2277117395Skan { \ 2278117395Skan rtx op0 = XEXP (ADDR, 0); \ 2279117395Skan rtx op1 = XEXP (ADDR, 1); \ 2280117395Skan if (op0 == pic_offset_table_rtx \ 2281117395Skan && SYMBOLIC_CONST (op1)) \ 2282117395Skan goto LABEL; \ 2283117395Skan } \ 2284117395Skan } \ 2285117395Skan} 228650397Sobrien 228750397Sobrien/* Try machine-dependent ways of modifying an illegitimate address 228850397Sobrien to be legitimate. If we find one, return the new, valid address. 228950397Sobrien This macro is used in only one place: `memory_address' in explow.c. 229050397Sobrien 229150397Sobrien OLDX is the address as it was before break_out_memory_refs was called. 229250397Sobrien In some cases it is useful to look at this to decide what needs to be done. 229350397Sobrien 229450397Sobrien MODE and WIN are passed so that this macro can use 229550397Sobrien GO_IF_LEGITIMATE_ADDRESS. 229650397Sobrien 229750397Sobrien It is always safe for this macro to do nothing. It exists to recognize 229850397Sobrien opportunities to optimize the output. */ 229950397Sobrien 230050397Sobrien/* On SPARC, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */ 230150397Sobrien#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 2302132718Skan{ \ 2303132718Skan (X) = legitimize_address (X, OLDX, MODE); \ 2304132718Skan if (memory_address_p (MODE, X)) \ 2305132718Skan goto WIN; \ 2306132718Skan} 230750397Sobrien 230852284Sobrien/* Try a machine-dependent way of reloading an illegitimate address 230952284Sobrien operand. If we find one, push the reload and jump to WIN. This 231052284Sobrien macro is used in only one place: `find_reloads_address' in reload.c. 231152284Sobrien 2312117395Skan For SPARC 32, we wish to handle addresses by splitting them into 2313117395Skan HIGH+LO_SUM pairs, retaining the LO_SUM in the memory reference. 231452284Sobrien This cuts the number of extra insns by one. 231552284Sobrien 231652284Sobrien Do nothing when generating PIC code and the address is a 231752284Sobrien symbolic operand or requires a scratch register. */ 231852284Sobrien 231952284Sobrien#define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_LEVELS,WIN) \ 232052284Sobriendo { \ 232152284Sobrien /* Decompose SImode constants into hi+lo_sum. We do have to \ 232252284Sobrien rerecognize what we produce, so be careful. */ \ 232352284Sobrien if (CONSTANT_P (X) \ 232496263Sobrien && (MODE != TFmode || TARGET_ARCH64) \ 232552284Sobrien && GET_MODE (X) == SImode \ 232652284Sobrien && GET_CODE (X) != LO_SUM && GET_CODE (X) != HIGH \ 232752284Sobrien && ! (flag_pic \ 232852284Sobrien && (symbolic_operand (X, Pmode) \ 232996263Sobrien || pic_address_needs_scratch (X))) \ 233096263Sobrien && sparc_cmodel <= CM_MEDLOW) \ 233152284Sobrien { \ 233252284Sobrien X = gen_rtx_LO_SUM (GET_MODE (X), \ 233352284Sobrien gen_rtx_HIGH (GET_MODE (X), X), X); \ 233490075Sobrien push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL, \ 233552284Sobrien BASE_REG_CLASS, GET_MODE (X), VOIDmode, 0, 0, \ 233652284Sobrien OPNUM, TYPE); \ 233752284Sobrien goto WIN; \ 233852284Sobrien } \ 233952284Sobrien /* ??? 64-bit reloads. */ \ 234052284Sobrien} while (0) 234150397Sobrien 234250397Sobrien/* Specify the machine mode that this machine uses 234350397Sobrien for the index in the tablejump instruction. */ 234452284Sobrien/* If we ever implement any of the full models (such as CM_FULLANY), 234552284Sobrien this has to be DImode in that case */ 234652284Sobrien#ifdef HAVE_GAS_SUBSECTION_ORDERING 234752284Sobrien#define CASE_VECTOR_MODE \ 234852284Sobrien(! TARGET_PTR64 ? SImode : flag_pic ? SImode : TARGET_CM_MEDLOW ? SImode : DImode) 234952284Sobrien#else 235052284Sobrien/* If assembler does not have working .subsection -1, we use DImode for pic, as otherwise 235190075Sobrien we have to sign extend which slows things down. */ 235252284Sobrien#define CASE_VECTOR_MODE \ 235352284Sobrien(! TARGET_PTR64 ? SImode : flag_pic ? DImode : TARGET_CM_MEDLOW ? SImode : DImode) 235452284Sobrien#endif 235550397Sobrien 235650397Sobrien/* Define as C expression which evaluates to nonzero if the tablejump 235750397Sobrien instruction expects the table to contain offsets from the address of the 235850397Sobrien table. 235990075Sobrien Do not define this if the table should contain absolute addresses. */ 236050397Sobrien/* #define CASE_VECTOR_PC_RELATIVE 1 */ 236150397Sobrien 236250397Sobrien/* Define this as 1 if `char' should by default be signed; else as 0. */ 236350397Sobrien#define DEFAULT_SIGNED_CHAR 1 236450397Sobrien 236550397Sobrien/* Max number of bytes we can move from memory to memory 236650397Sobrien in one reasonably fast instruction. */ 236750397Sobrien#define MOVE_MAX 8 236850397Sobrien 236950397Sobrien#if 0 /* Sun 4 has matherr, so this is no good. */ 237050397Sobrien/* This is the value of the error code EDOM for this machine, 237150397Sobrien used by the sqrt instruction. */ 237250397Sobrien#define TARGET_EDOM 33 237350397Sobrien 237450397Sobrien/* This is how to refer to the variable errno. */ 237550397Sobrien#define GEN_ERRNO_RTX \ 237650397Sobrien gen_rtx_MEM (SImode, gen_rtx_SYMBOL_REF (Pmode, "errno")) 237750397Sobrien#endif /* 0 */ 237850397Sobrien 237950397Sobrien/* Define if operations between registers always perform the operation 238050397Sobrien on the full register even if a narrower mode is specified. */ 238150397Sobrien#define WORD_REGISTER_OPERATIONS 238250397Sobrien 238350397Sobrien/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 238450397Sobrien will either zero-extend or sign-extend. The value of this macro should 238550397Sobrien be the code that says which one of the two operations is implicitly 238650397Sobrien done, NIL if none. */ 238750397Sobrien#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 238850397Sobrien 238950397Sobrien/* Nonzero if access to memory by bytes is slow and undesirable. 239050397Sobrien For RISC chips, it means that access to memory by bytes is no 239150397Sobrien better than access by words when possible, so grab a whole word 239250397Sobrien and maybe make use of that. */ 239350397Sobrien#define SLOW_BYTE_ACCESS 1 239450397Sobrien 239550397Sobrien/* When a prototype says `char' or `short', really pass an `int'. */ 239690075Sobrien#define PROMOTE_PROTOTYPES (TARGET_ARCH32) 239750397Sobrien 239850397Sobrien/* Define this to be nonzero if shift instructions ignore all but the low-order 239990075Sobrien few bits. */ 240050397Sobrien#define SHIFT_COUNT_TRUNCATED 1 240150397Sobrien 240250397Sobrien/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 240350397Sobrien is done just by pretending it is already truncated. */ 240450397Sobrien#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 240550397Sobrien 2406132718Skan/* Specify the machine mode used for addresses. */ 240790075Sobrien#define Pmode (TARGET_ARCH64 ? DImode : SImode) 240850397Sobrien 240950397Sobrien/* Generate calls to memcpy, memcmp and memset. */ 241050397Sobrien#define TARGET_MEM_FUNCTIONS 241150397Sobrien 241250397Sobrien/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, 241350397Sobrien return the mode to be used for the comparison. For floating-point, 241490075Sobrien CCFP[E]mode is used. CC_NOOVmode should be used when the first operand 241590075Sobrien is a PLUS, MINUS, NEG, or ASHIFT. CCmode should be used when no special 241650397Sobrien processing is needed. */ 241790075Sobrien#define SELECT_CC_MODE(OP,X,Y) select_cc_mode ((OP), (X), (Y)) 241850397Sobrien 2419117395Skan/* Return nonzero if MODE implies a floating point inequality can be 2420117395Skan reversed. For SPARC this is always true because we have a full 242190075Sobrien compliment of ordered and unordered comparisons, but until generic 242290075Sobrien code knows how to reverse it correctly we keep the old definition. */ 242390075Sobrien#define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPEmode && (MODE) != CCFPmode) 242450397Sobrien 242590075Sobrien/* A function address in a call instruction for indexing purposes. */ 242690075Sobrien#define FUNCTION_MODE Pmode 242750397Sobrien 242850397Sobrien/* Define this if addresses of constant functions 242950397Sobrien shouldn't be put through pseudo regs where they can be cse'd. 243050397Sobrien Desirable on machines where ordinary constants are expensive 243150397Sobrien but a CALL with constant address is cheap. */ 243250397Sobrien#define NO_FUNCTION_CSE 243350397Sobrien 243450397Sobrien/* alloca should avoid clobbering the old register save area. */ 243550397Sobrien#define SETJMP_VIA_SAVE_AREA 243650397Sobrien 2437132718Skan/* The _Q_* comparison libcalls return booleans. */ 2438132718Skan#define FLOAT_LIB_COMPARE_RETURNS_BOOL(MODE, COMPARISON) ((MODE) == TFmode) 243950397Sobrien 2440102780Skan/* Assume by default that the _Qp_* 64-bit libcalls are implemented such 2441102780Skan that the inputs are fully consumed before the output memory is clobbered. */ 2442102780Skan 2443102780Skan#define TARGET_BUGGY_QP_LIB 0 2444102780Skan 2445132718Skan/* Assume by default that we do not have the Solaris-specific conversion 2446132718Skan routines nor 64-bit integer multiply and divide routines. */ 244750397Sobrien 2448132718Skan#define SUN_CONVERSION_LIBFUNCS 0 2449132718Skan#define DITF_CONVERSION_LIBFUNCS 0 2450132718Skan#define SUN_INTEGER_MULTIPLY_64 0 245150397Sobrien 245250397Sobrien/* Compute extra cost of moving data between one register class 245350397Sobrien and another. */ 245450397Sobrien#define GENERAL_OR_I64(C) ((C) == GENERAL_REGS || (C) == I64_REGS) 245590075Sobrien#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 245650397Sobrien (((FP_REG_CLASS_P (CLASS1) && GENERAL_OR_I64 (CLASS2)) \ 245750397Sobrien || (GENERAL_OR_I64 (CLASS1) && FP_REG_CLASS_P (CLASS2)) \ 245850397Sobrien || (CLASS1) == FPCC_REGS || (CLASS2) == FPCC_REGS) \ 2459117395Skan ? ((sparc_cpu == PROCESSOR_ULTRASPARC \ 2460117395Skan || sparc_cpu == PROCESSOR_ULTRASPARC3) ? 12 : 6) : 2) 246150397Sobrien 246296263Sobrien/* Provide the cost of a branch. For pre-v9 processors we use 246396263Sobrien a value of 3 to take into account the potential annulling of 246496263Sobrien the delay slot (which ends up being a bubble in the pipeline slot) 246596263Sobrien plus a cycle to take into consideration the instruction cache 246696263Sobrien effects. 246796263Sobrien 246896263Sobrien On v9 and later, which have branch prediction facilities, we set 246996263Sobrien it to the depth of the pipeline as that is the cost of a 2470117395Skan mispredicted branch. */ 247196263Sobrien 247296263Sobrien#define BRANCH_COST \ 247396263Sobrien ((sparc_cpu == PROCESSOR_V9 \ 247496263Sobrien || sparc_cpu == PROCESSOR_ULTRASPARC) \ 2475117395Skan ? 7 \ 2476117395Skan : (sparc_cpu == PROCESSOR_ULTRASPARC3 \ 2477117395Skan ? 9 : 3)) 247896263Sobrien 247996263Sobrien#define PREFETCH_BLOCK \ 2480117395Skan ((sparc_cpu == PROCESSOR_ULTRASPARC \ 2481117395Skan || sparc_cpu == PROCESSOR_ULTRASPARC3) \ 2482117395Skan ? 64 : 32) 248396263Sobrien 248496263Sobrien#define SIMULTANEOUS_PREFETCHES \ 2485117395Skan ((sparc_cpu == PROCESSOR_ULTRASPARC) \ 2486117395Skan ? 2 \ 2487117395Skan : (sparc_cpu == PROCESSOR_ULTRASPARC3 \ 2488117395Skan ? 8 : 3)) 248950397Sobrien 249050397Sobrien/* Control the assembler format that we output. */ 249150397Sobrien 249250397Sobrien/* A C string constant describing how to begin a comment in the target 249350397Sobrien assembler language. The compiler assumes that the comment will end at 249450397Sobrien the end of the line. */ 249550397Sobrien 249650397Sobrien#define ASM_COMMENT_START "!" 249750397Sobrien 249850397Sobrien/* Output to assembler file text saying following lines 249950397Sobrien may contain character constants, extra white space, comments, etc. */ 250050397Sobrien 250150397Sobrien#define ASM_APP_ON "" 250250397Sobrien 250350397Sobrien/* Output to assembler file text saying following lines 250450397Sobrien no longer contain unusual constructs. */ 250550397Sobrien 250650397Sobrien#define ASM_APP_OFF "" 250750397Sobrien 250850397Sobrien/* ??? Try to make the style consistent here (_OP?). */ 250950397Sobrien 251050397Sobrien#define ASM_FLOAT ".single" 251150397Sobrien#define ASM_DOUBLE ".double" 251290075Sobrien#define ASM_LONGDOUBLE ".xxx" /* ??? Not known (or used yet). */ 251350397Sobrien 251450397Sobrien/* How to refer to registers in assembler output. 251550397Sobrien This sequence is indexed by compiler's hard-register-number (see above). */ 251650397Sobrien 251750397Sobrien#define REGISTER_NAMES \ 251850397Sobrien{"%g0", "%g1", "%g2", "%g3", "%g4", "%g5", "%g6", "%g7", \ 251950397Sobrien "%o0", "%o1", "%o2", "%o3", "%o4", "%o5", "%sp", "%o7", \ 252050397Sobrien "%l0", "%l1", "%l2", "%l3", "%l4", "%l5", "%l6", "%l7", \ 252150397Sobrien "%i0", "%i1", "%i2", "%i3", "%i4", "%i5", "%fp", "%i7", \ 252250397Sobrien "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", \ 252350397Sobrien "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", \ 252450397Sobrien "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", \ 252550397Sobrien "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31", \ 252650397Sobrien "%f32", "%f33", "%f34", "%f35", "%f36", "%f37", "%f38", "%f39", \ 252750397Sobrien "%f40", "%f41", "%f42", "%f43", "%f44", "%f45", "%f46", "%f47", \ 252850397Sobrien "%f48", "%f49", "%f50", "%f51", "%f52", "%f53", "%f54", "%f55", \ 252950397Sobrien "%f56", "%f57", "%f58", "%f59", "%f60", "%f61", "%f62", "%f63", \ 253096263Sobrien "%fcc0", "%fcc1", "%fcc2", "%fcc3", "%icc", "%sfp" } 253150397Sobrien 253250397Sobrien/* Define additional names for use in asm clobbers and asm declarations. */ 253350397Sobrien 253450397Sobrien#define ADDITIONAL_REGISTER_NAMES \ 253550397Sobrien{{"ccr", SPARC_ICC_REG}, {"cc", SPARC_ICC_REG}} 253650397Sobrien 253750397Sobrien/* On Sun 4, this limit is 2048. We use 1000 to be safe, since the length 253850397Sobrien can run past this up to a continuation point. Once we used 1500, but 253950397Sobrien a single entry in C++ can run more than 500 bytes, due to the length of 254050397Sobrien mangled symbol names. dbxout.c should really be fixed to do 254150397Sobrien continuations when they are actually needed instead of trying to 254250397Sobrien guess... */ 254350397Sobrien#define DBX_CONTIN_LENGTH 1000 254450397Sobrien 254550397Sobrien/* This is how to output a command to make the user-level label named NAME 254650397Sobrien defined for reference from other files. */ 254750397Sobrien 2548117395Skan/* Globalizing directive for a label. */ 2549117395Skan#define GLOBAL_ASM_OP "\t.global " 255050397Sobrien 255190075Sobrien/* The prefix to add to user-visible assembler symbols. */ 255250397Sobrien 255350397Sobrien#define USER_LABEL_PREFIX "_" 255450397Sobrien 255550397Sobrien/* This is how to store into the string LABEL 255650397Sobrien the symbol_ref name of an internal numbered label where 255750397Sobrien PREFIX is the class of label and NUM is the number within the class. 255850397Sobrien This is suitable for output with `assemble_name'. */ 255950397Sobrien 256050397Sobrien#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 256150397Sobrien sprintf ((LABEL), "*%s%ld", (PREFIX), (long)(NUM)) 256250397Sobrien 256352284Sobrien/* This is how we hook in and defer the case-vector until the end of 256452284Sobrien the function. */ 256552284Sobrien#define ASM_OUTPUT_ADDR_VEC(LAB,VEC) \ 256652284Sobrien sparc_defer_case_vector ((LAB),(VEC), 0) 256752284Sobrien 256852284Sobrien#define ASM_OUTPUT_ADDR_DIFF_VEC(LAB,VEC) \ 256952284Sobrien sparc_defer_case_vector ((LAB),(VEC), 1) 257052284Sobrien 257150397Sobrien/* This is how to output an element of a case-vector that is absolute. */ 257250397Sobrien 257350397Sobrien#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 257450397Sobriendo { \ 257550397Sobrien char label[30]; \ 257650397Sobrien ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \ 257752284Sobrien if (CASE_VECTOR_MODE == SImode) \ 257850397Sobrien fprintf (FILE, "\t.word\t"); \ 257950397Sobrien else \ 258050397Sobrien fprintf (FILE, "\t.xword\t"); \ 258150397Sobrien assemble_name (FILE, label); \ 258250397Sobrien fputc ('\n', FILE); \ 258350397Sobrien} while (0) 258450397Sobrien 258550397Sobrien/* This is how to output an element of a case-vector that is relative. 258650397Sobrien (SPARC uses such vectors only when generating PIC.) */ 258750397Sobrien 258850397Sobrien#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 258950397Sobriendo { \ 259050397Sobrien char label[30]; \ 259152284Sobrien ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE)); \ 259252284Sobrien if (CASE_VECTOR_MODE == SImode) \ 259350397Sobrien fprintf (FILE, "\t.word\t"); \ 259450397Sobrien else \ 259550397Sobrien fprintf (FILE, "\t.xword\t"); \ 259650397Sobrien assemble_name (FILE, label); \ 259750397Sobrien ASM_GENERATE_INTERNAL_LABEL (label, "L", (REL)); \ 259850397Sobrien fputc ('-', FILE); \ 259950397Sobrien assemble_name (FILE, label); \ 260050397Sobrien fputc ('\n', FILE); \ 260150397Sobrien} while (0) 260250397Sobrien 260352284Sobrien/* This is what to output before and after case-vector (both 260452284Sobrien relative and absolute). If .subsection -1 works, we put case-vectors 260552284Sobrien at the beginning of the current section. */ 260652284Sobrien 260752284Sobrien#ifdef HAVE_GAS_SUBSECTION_ORDERING 260852284Sobrien 260952284Sobrien#define ASM_OUTPUT_ADDR_VEC_START(FILE) \ 261052284Sobrien fprintf(FILE, "\t.subsection\t-1\n") 261152284Sobrien 261252284Sobrien#define ASM_OUTPUT_ADDR_VEC_END(FILE) \ 261352284Sobrien fprintf(FILE, "\t.previous\n") 261452284Sobrien 261552284Sobrien#endif 261652284Sobrien 261750397Sobrien/* This is how to output an assembler line 261850397Sobrien that says to advance the location counter 261950397Sobrien to a multiple of 2**LOG bytes. */ 262050397Sobrien 262150397Sobrien#define ASM_OUTPUT_ALIGN(FILE,LOG) \ 262250397Sobrien if ((LOG) != 0) \ 262350397Sobrien fprintf (FILE, "\t.align %d\n", (1<<(LOG))) 262450397Sobrien 2625117395Skan/* This is how to output an assembler line that says to advance 2626117395Skan the location counter to a multiple of 2**LOG bytes using the 2627117395Skan "nop" instruction as padding. */ 2628117395Skan#define ASM_OUTPUT_ALIGN_WITH_NOP(FILE,LOG) \ 2629117395Skan if ((LOG) != 0) \ 2630117395Skan fprintf (FILE, "\t.align %d,0x1000000\n", (1<<(LOG))) 2631117395Skan 263250397Sobrien#define ASM_OUTPUT_SKIP(FILE,SIZE) \ 2633132718Skan fprintf (FILE, "\t.skip "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)) 263450397Sobrien 263550397Sobrien/* This says how to output an assembler line 263650397Sobrien to define a global common symbol. */ 263750397Sobrien 263850397Sobrien#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 263950397Sobrien( fputs ("\t.common ", (FILE)), \ 264050397Sobrien assemble_name ((FILE), (NAME)), \ 2641132718Skan fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",\"bss\"\n", (SIZE))) 264250397Sobrien 264350397Sobrien/* This says how to output an assembler line to define a local common 264450397Sobrien symbol. */ 264550397Sobrien 264650397Sobrien#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \ 264750397Sobrien( fputs ("\t.reserve ", (FILE)), \ 264850397Sobrien assemble_name ((FILE), (NAME)), \ 2649132718Skan fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",\"bss\",%u\n", \ 265050397Sobrien (SIZE), ((ALIGNED) / BITS_PER_UNIT))) 265150397Sobrien 265250397Sobrien/* A C statement (sans semicolon) to output to the stdio stream 265350397Sobrien FILE the assembler definition of uninitialized global DECL named 265450397Sobrien NAME whose size is SIZE bytes and alignment is ALIGN bytes. 265550397Sobrien Try to use asm_output_aligned_bss to implement this macro. */ 265650397Sobrien 265750397Sobrien#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ 265850397Sobrien do { \ 265950397Sobrien ASM_OUTPUT_ALIGNED_LOCAL (FILE, NAME, SIZE, ALIGN); \ 266050397Sobrien } while (0) 266150397Sobrien 266290075Sobrien#define IDENT_ASM_OP "\t.ident\t" 266350397Sobrien 266450397Sobrien/* Output #ident as a .ident. */ 266550397Sobrien 266650397Sobrien#define ASM_OUTPUT_IDENT(FILE, NAME) \ 266790075Sobrien fprintf (FILE, "%s\"%s\"\n", IDENT_ASM_OP, NAME); 266850397Sobrien 2669132718Skan/* Emit a dtp-relative reference to a TLS variable. */ 2670132718Skan 2671132718Skan#ifdef HAVE_AS_TLS 2672132718Skan#define ASM_OUTPUT_DWARF_DTPREL(FILE, SIZE, X) \ 2673132718Skan sparc_output_dwarf_dtprel (FILE, SIZE, X) 2674132718Skan#endif 2675132718Skan 267650397Sobrien#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ 2677132718Skan ((CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^' \ 2678132718Skan || (CHAR) == '(' || (CHAR) == '_' || (CHAR) == '&') 267950397Sobrien 268050397Sobrien/* Print operand X (an rtx) in assembler syntax to file FILE. 268150397Sobrien CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 268250397Sobrien For `%' followed by punctuation, CODE is the punctuation and X is null. */ 268350397Sobrien 268450397Sobrien#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 268550397Sobrien 268650397Sobrien/* Print a memory address as an operand to reference that memory location. */ 268750397Sobrien 268850397Sobrien#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 268950397Sobrien{ register rtx base, index = 0; \ 269050397Sobrien int offset = 0; \ 269150397Sobrien register rtx addr = ADDR; \ 269250397Sobrien if (GET_CODE (addr) == REG) \ 269350397Sobrien fputs (reg_names[REGNO (addr)], FILE); \ 269450397Sobrien else if (GET_CODE (addr) == PLUS) \ 269550397Sobrien { \ 269650397Sobrien if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \ 269750397Sobrien offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);\ 269850397Sobrien else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \ 269950397Sobrien offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);\ 270050397Sobrien else \ 270150397Sobrien base = XEXP (addr, 0), index = XEXP (addr, 1); \ 270290075Sobrien if (GET_CODE (base) == LO_SUM) \ 270390075Sobrien { \ 270490075Sobrien if (! USE_AS_OFFSETABLE_LO10 \ 270590075Sobrien || TARGET_ARCH32 \ 270690075Sobrien || TARGET_CM_MEDMID) \ 270790075Sobrien abort (); \ 270890075Sobrien output_operand (XEXP (base, 0), 0); \ 270990075Sobrien fputs ("+%lo(", FILE); \ 271090075Sobrien output_address (XEXP (base, 1)); \ 271190075Sobrien fprintf (FILE, ")+%d", offset); \ 271290075Sobrien } \ 271390075Sobrien else \ 271490075Sobrien { \ 271590075Sobrien fputs (reg_names[REGNO (base)], FILE); \ 271690075Sobrien if (index == 0) \ 271790075Sobrien fprintf (FILE, "%+d", offset); \ 271890075Sobrien else if (GET_CODE (index) == REG) \ 271990075Sobrien fprintf (FILE, "+%s", reg_names[REGNO (index)]); \ 272090075Sobrien else if (GET_CODE (index) == SYMBOL_REF \ 272190075Sobrien || GET_CODE (index) == CONST) \ 272290075Sobrien fputc ('+', FILE), output_addr_const (FILE, index); \ 272390075Sobrien else abort (); \ 272490075Sobrien } \ 272550397Sobrien } \ 272650397Sobrien else if (GET_CODE (addr) == MINUS \ 272750397Sobrien && GET_CODE (XEXP (addr, 1)) == LABEL_REF) \ 272850397Sobrien { \ 272950397Sobrien output_addr_const (FILE, XEXP (addr, 0)); \ 273050397Sobrien fputs ("-(", FILE); \ 273150397Sobrien output_addr_const (FILE, XEXP (addr, 1)); \ 273250397Sobrien fputs ("-.)", FILE); \ 273350397Sobrien } \ 273450397Sobrien else if (GET_CODE (addr) == LO_SUM) \ 273550397Sobrien { \ 273650397Sobrien output_operand (XEXP (addr, 0), 0); \ 273752284Sobrien if (TARGET_CM_MEDMID) \ 273852284Sobrien fputs ("+%l44(", FILE); \ 273952284Sobrien else \ 274052284Sobrien fputs ("+%lo(", FILE); \ 274150397Sobrien output_address (XEXP (addr, 1)); \ 274250397Sobrien fputc (')', FILE); \ 274350397Sobrien } \ 274450397Sobrien else if (flag_pic && GET_CODE (addr) == CONST \ 274550397Sobrien && GET_CODE (XEXP (addr, 0)) == MINUS \ 274650397Sobrien && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST \ 274750397Sobrien && GET_CODE (XEXP (XEXP (XEXP (addr, 0), 1), 0)) == MINUS \ 274850397Sobrien && XEXP (XEXP (XEXP (XEXP (addr, 0), 1), 0), 1) == pc_rtx) \ 274950397Sobrien { \ 275050397Sobrien addr = XEXP (addr, 0); \ 275150397Sobrien output_addr_const (FILE, XEXP (addr, 0)); \ 275250397Sobrien /* Group the args of the second CONST in parenthesis. */ \ 275350397Sobrien fputs ("-(", FILE); \ 275450397Sobrien /* Skip past the second CONST--it does nothing for us. */\ 275550397Sobrien output_addr_const (FILE, XEXP (XEXP (addr, 1), 0)); \ 275650397Sobrien /* Close the parenthesis. */ \ 275750397Sobrien fputc (')', FILE); \ 275850397Sobrien } \ 275950397Sobrien else \ 276050397Sobrien { \ 276150397Sobrien output_addr_const (FILE, addr); \ 276250397Sobrien } \ 276350397Sobrien} 276450397Sobrien 2765132718Skan#ifdef HAVE_AS_TLS 2766132718Skan#define TARGET_TLS 1 2767132718Skan#else 2768132718Skan#define TARGET_TLS 0 2769132718Skan#endif 2770132718Skan#define TARGET_SUN_TLS TARGET_TLS 2771132718Skan#define TARGET_GNU_TLS 0 2772132718Skan 277350397Sobrien/* Define the codes that are matched by predicates in sparc.c. */ 277450397Sobrien 277552284Sobrien#define PREDICATE_CODES \ 277652284Sobrien{"reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ 2777117395Skan{"const1_operand", {CONST_INT}}, \ 277852284Sobrien{"fp_zero_operand", {CONST_DOUBLE}}, \ 277996263Sobrien{"fp_register_operand", {SUBREG, REG}}, \ 278052284Sobrien{"intreg_operand", {SUBREG, REG}}, \ 278152284Sobrien{"fcc_reg_operand", {REG}}, \ 278296263Sobrien{"fcc0_reg_operand", {REG}}, \ 278352284Sobrien{"icc_or_fcc_reg_operand", {REG}}, \ 278452284Sobrien{"restore_operand", {REG}}, \ 278552284Sobrien{"call_operand", {MEM}}, \ 278652284Sobrien{"call_operand_address", {SYMBOL_REF, LABEL_REF, CONST, CONST_DOUBLE, \ 278752284Sobrien ADDRESSOF, SUBREG, REG, PLUS, LO_SUM, CONST_INT}}, \ 278890075Sobrien{"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \ 278952284Sobrien{"symbolic_memory_operand", {SUBREG, MEM}}, \ 279052284Sobrien{"label_ref_operand", {LABEL_REF}}, \ 279152284Sobrien{"sp64_medium_pic_operand", {CONST}}, \ 279252284Sobrien{"data_segment_operand", {SYMBOL_REF, PLUS, CONST}}, \ 279352284Sobrien{"text_segment_operand", {LABEL_REF, SYMBOL_REF, PLUS, CONST}}, \ 279452284Sobrien{"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \ 279552284Sobrien{"splittable_symbolic_memory_operand", {MEM}}, \ 279652284Sobrien{"splittable_immediate_memory_operand", {MEM}}, \ 279752284Sobrien{"eq_or_neq", {EQ, NE}}, \ 279852284Sobrien{"normal_comp_operator", {GE, GT, LE, LT, GTU, LEU}}, \ 279952284Sobrien{"noov_compare_op", {NE, EQ, GE, GT, LE, LT, GEU, GTU, LEU, LTU}}, \ 280096263Sobrien{"noov_compare64_op", {NE, EQ, GE, GT, LE, LT, GEU, GTU, LEU, LTU}}, \ 280152284Sobrien{"v9_regcmp_op", {EQ, NE, GE, LT, LE, GT}}, \ 280252284Sobrien{"extend_op", {SIGN_EXTEND, ZERO_EXTEND}}, \ 280352284Sobrien{"cc_arithop", {AND, IOR, XOR}}, \ 280452284Sobrien{"cc_arithopn", {AND, IOR}}, \ 280552284Sobrien{"arith_operand", {SUBREG, REG, CONST_INT}}, \ 280652284Sobrien{"arith_add_operand", {SUBREG, REG, CONST_INT}}, \ 280752284Sobrien{"arith11_operand", {SUBREG, REG, CONST_INT}}, \ 280852284Sobrien{"arith10_operand", {SUBREG, REG, CONST_INT}}, \ 280952284Sobrien{"arith_double_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ 281052284Sobrien{"arith_double_add_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ 281152284Sobrien{"arith11_double_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ 281252284Sobrien{"arith10_double_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ 281352284Sobrien{"small_int", {CONST_INT}}, \ 281452284Sobrien{"small_int_or_double", {CONST_INT, CONST_DOUBLE}}, \ 281552284Sobrien{"uns_small_int", {CONST_INT}}, \ 281652284Sobrien{"uns_arith_operand", {SUBREG, REG, CONST_INT}}, \ 281752284Sobrien{"clobbered_register", {REG}}, \ 281852284Sobrien{"input_operand", {SUBREG, REG, CONST_INT, MEM, CONST}}, \ 2819132718Skan{"compare_operand", {SUBREG, REG, ZERO_EXTRACT}}, \ 282052284Sobrien{"const64_operand", {CONST_INT, CONST_DOUBLE}}, \ 2821132718Skan{"const64_high_operand", {CONST_INT, CONST_DOUBLE}}, \ 2822132718Skan{"tgd_symbolic_operand", {SYMBOL_REF}}, \ 2823132718Skan{"tld_symbolic_operand", {SYMBOL_REF}}, \ 2824132718Skan{"tie_symbolic_operand", {SYMBOL_REF}}, \ 2825132718Skan{"tle_symbolic_operand", {SYMBOL_REF}}, 282650397Sobrien 282750397Sobrien/* The number of Pmode words for the setjmp buffer. */ 282850397Sobrien#define JMP_BUF_SIZE 12 282950397Sobrien 283050397Sobrien#define DONT_ACCESS_GBLS_AFTER_EPILOGUE (flag_pic) 2831