150397Sobrien/* Definitions of target machine for GNU compiler, for Sun SPARC. 290075Sobrien Copyright (C) 1987, 1988, 1989, 1992, 1994, 1995, 1996, 1997, 1998, 1999 3169689Skan 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. 450397Sobrien Contributed by Michael Tiemann (tiemann@cygnus.com). 5132718Skan 64-bit SPARC-V9 support by Michael Tiemann, Jim Wilson, and Doug Evans, 650397Sobrien at Cygnus Support. 750397Sobrien 8132718SkanThis file is part of GCC. 950397Sobrien 10132718SkanGCC is free software; you can redistribute it and/or modify 1150397Sobrienit under the terms of the GNU General Public License as published by 1250397Sobrienthe Free Software Foundation; either version 2, or (at your option) 1350397Sobrienany later version. 1450397Sobrien 15132718SkanGCC is distributed in the hope that it will be useful, 1650397Sobrienbut WITHOUT ANY WARRANTY; without even the implied warranty of 1750397SobrienMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1850397SobrienGNU General Public License for more details. 1950397Sobrien 2050397SobrienYou should have received a copy of the GNU General Public License 21132718Skanalong with GCC; see the file COPYING. If not, write to 22169689Skanthe Free Software Foundation, 51 Franklin Street, Fifth Floor, 23169689SkanBoston, MA 02110-1301, USA. */ 2450397Sobrien 2550397Sobrien/* Note that some other tm.h files include this one and then override 2650397Sobrien whatever definitions are necessary. */ 2750397Sobrien 28169689Skan/* Define the specific costs for a given cpu */ 29169689Skan 30169689Skanstruct processor_costs { 31169689Skan /* Integer load */ 32169689Skan const int int_load; 33169689Skan 34169689Skan /* Integer signed load */ 35169689Skan const int int_sload; 36169689Skan 37169689Skan /* Integer zeroed load */ 38169689Skan const int int_zload; 39169689Skan 40169689Skan /* Float load */ 41169689Skan const int float_load; 42169689Skan 43169689Skan /* fmov, fneg, fabs */ 44169689Skan const int float_move; 45169689Skan 46169689Skan /* fadd, fsub */ 47169689Skan const int float_plusminus; 48169689Skan 49169689Skan /* fcmp */ 50169689Skan const int float_cmp; 51169689Skan 52169689Skan /* fmov, fmovr */ 53169689Skan const int float_cmove; 54169689Skan 55169689Skan /* fmul */ 56169689Skan const int float_mul; 57169689Skan 58169689Skan /* fdivs */ 59169689Skan const int float_div_sf; 60169689Skan 61169689Skan /* fdivd */ 62169689Skan const int float_div_df; 63169689Skan 64169689Skan /* fsqrts */ 65169689Skan const int float_sqrt_sf; 66169689Skan 67169689Skan /* fsqrtd */ 68169689Skan const int float_sqrt_df; 69169689Skan 70169689Skan /* umul/smul */ 71169689Skan const int int_mul; 72169689Skan 73169689Skan /* mulX */ 74169689Skan const int int_mulX; 75169689Skan 76169689Skan /* integer multiply cost for each bit set past the most 77169689Skan significant 3, so the formula for multiply cost becomes: 78169689Skan 79169689Skan if (rs1 < 0) 80169689Skan highest_bit = highest_clear_bit(rs1); 81169689Skan else 82169689Skan highest_bit = highest_set_bit(rs1); 83169689Skan if (highest_bit < 3) 84169689Skan highest_bit = 3; 85169689Skan cost = int_mul{,X} + ((highest_bit - 3) / int_mul_bit_factor); 86169689Skan 87169689Skan A value of zero indicates that the multiply costs is fixed, 88169689Skan and not variable. */ 89169689Skan const int int_mul_bit_factor; 90169689Skan 91169689Skan /* udiv/sdiv */ 92169689Skan const int int_div; 93169689Skan 94169689Skan /* divX */ 95169689Skan const int int_divX; 96169689Skan 97169689Skan /* movcc, movr */ 98169689Skan const int int_cmove; 99169689Skan 100169689Skan /* penalty for shifts, due to scheduling rules etc. */ 101169689Skan const int shift_penalty; 102169689Skan}; 103169689Skan 104169689Skanextern const struct processor_costs *sparc_costs; 105169689Skan 106132718Skan/* Target CPU builtins. FIXME: Defining sparc is for the benefit of 107132718Skan Solaris only; otherwise just define __sparc__. Sadly the headers 108132718Skan are such a mess there is no Solaris-specific header. */ 109132718Skan#define TARGET_CPU_CPP_BUILTINS() \ 110132718Skan do \ 111132718Skan { \ 112132718Skan builtin_define_std ("sparc"); \ 113132718Skan if (TARGET_64BIT) \ 114132718Skan { \ 115132718Skan builtin_assert ("cpu=sparc64"); \ 116132718Skan builtin_assert ("machine=sparc64"); \ 117132718Skan } \ 118132718Skan else \ 119132718Skan { \ 120132718Skan builtin_assert ("cpu=sparc"); \ 121132718Skan builtin_assert ("machine=sparc"); \ 122132718Skan } \ 123132718Skan } \ 124132718Skan while (0) 125132718Skan 12650397Sobrien/* Specify this in a cover file to provide bi-architecture (32/64) support. */ 12750397Sobrien/* #define SPARC_BI_ARCH */ 12850397Sobrien 12950397Sobrien/* Macro used later in this file to determine default architecture. */ 13050397Sobrien#define DEFAULT_ARCH32_P ((TARGET_DEFAULT & MASK_64BIT) == 0) 13150397Sobrien 13250397Sobrien/* TARGET_ARCH{32,64} are the main macros to decide which of the two 13350397Sobrien architectures to compile for. We allow targets to choose compile time or 13450397Sobrien runtime selection. */ 13552284Sobrien#ifdef IN_LIBGCC2 13690075Sobrien#if defined(__sparcv9) || defined(__arch64__) 13752284Sobrien#define TARGET_ARCH32 0 13852284Sobrien#else 13952284Sobrien#define TARGET_ARCH32 1 14090075Sobrien#endif /* sparc64 */ 14152284Sobrien#else 14290075Sobrien#ifdef SPARC_BI_ARCH 14350397Sobrien#define TARGET_ARCH32 (! TARGET_64BIT) 14450397Sobrien#else 14550397Sobrien#define TARGET_ARCH32 (DEFAULT_ARCH32_P) 14652284Sobrien#endif /* SPARC_BI_ARCH */ 14790075Sobrien#endif /* IN_LIBGCC2 */ 14850397Sobrien#define TARGET_ARCH64 (! TARGET_ARCH32) 14950397Sobrien 150132718Skan/* Code model selection in 64-bit environment. 15150397Sobrien 152132718Skan The machine mode used for addresses is 32-bit wide: 15350397Sobrien 154132718Skan TARGET_CM_32: 32-bit address space. 155132718Skan It is the code model used when generating 32-bit code. 15650397Sobrien 157132718Skan The machine mode used for addresses is 64-bit wide: 15850397Sobrien 159132718Skan TARGET_CM_MEDLOW: 32-bit address space. 160132718Skan The executable must be in the low 32 bits of memory. 161132718Skan This avoids generating %uhi and %ulo terms. Programs 162132718Skan can be statically or dynamically linked. 16350397Sobrien 164132718Skan TARGET_CM_MEDMID: 44-bit address space. 165132718Skan The executable must be in the low 44 bits of memory, 166132718Skan and the %[hml]44 terms are used. The text and data 167132718Skan segments have a maximum size of 2GB (31-bit span). 168132718Skan The maximum offset from any instruction to the label 169132718Skan _GLOBAL_OFFSET_TABLE_ is 2GB (31-bit span). 17050397Sobrien 171132718Skan TARGET_CM_MEDANY: 64-bit address space. 172132718Skan The text and data segments have a maximum size of 2GB 173132718Skan (31-bit span) and may be located anywhere in memory. 174132718Skan The maximum offset from any instruction to the label 175132718Skan _GLOBAL_OFFSET_TABLE_ is 2GB (31-bit span). 176132718Skan 177132718Skan TARGET_CM_EMBMEDANY: 64-bit address space. 178132718Skan The text and data segments have a maximum size of 2GB 179132718Skan (31-bit span) and may be located anywhere in memory. 180132718Skan The global register %g4 contains the start address of 181132718Skan the data segment. Programs are statically linked and 182132718Skan PIC is not supported. 183132718Skan 184132718Skan Different code models are not supported in 32-bit environment. */ 185132718Skan 18650397Sobrienenum cmodel { 18750397Sobrien CM_32, 18850397Sobrien CM_MEDLOW, 18950397Sobrien CM_MEDMID, 19050397Sobrien CM_MEDANY, 19150397Sobrien CM_EMBMEDANY 19250397Sobrien}; 19350397Sobrien 19450397Sobrien/* One of CM_FOO. */ 19550397Sobrienextern enum cmodel sparc_cmodel; 19650397Sobrien 19750397Sobrien/* V9 code model selection. */ 19850397Sobrien#define TARGET_CM_MEDLOW (sparc_cmodel == CM_MEDLOW) 19950397Sobrien#define TARGET_CM_MEDMID (sparc_cmodel == CM_MEDMID) 20050397Sobrien#define TARGET_CM_MEDANY (sparc_cmodel == CM_MEDANY) 20150397Sobrien#define TARGET_CM_EMBMEDANY (sparc_cmodel == CM_EMBMEDANY) 20250397Sobrien 20390075Sobrien#define SPARC_DEFAULT_CMODEL CM_32 20450397Sobrien 205169689Skan/* The SPARC-V9 architecture defines a relaxed memory ordering model (RMO) 206169689Skan which requires the following macro to be true if enabled. Prior to V9, 207169689Skan there are no instructions to even talk about memory synchronization. 208169689Skan Note that the UltraSPARC III processors don't implement RMO, unlike the 209169689Skan UltraSPARC II processors. Niagara does not implement RMO either. 210169689Skan 211169689Skan Default to false; for example, Solaris never enables RMO, only ever uses 212169689Skan total memory ordering (TMO). */ 213169689Skan#define SPARC_RELAXED_ORDERING false 214169689Skan 215169689Skan/* Do not use the .note.GNU-stack convention by default. */ 216169689Skan#define NEED_INDICATE_EXEC_STACK 0 217169689Skan 21850397Sobrien/* This is call-clobbered in the normal ABI, but is reserved in the 21950397Sobrien home grown (aka upward compatible) embedded ABI. */ 22050397Sobrien#define EMBMEDANY_BASE_REG "%g4" 22150397Sobrien 22250397Sobrien/* Values of TARGET_CPU_DEFAULT, set via -D in the Makefile, 22350397Sobrien and specified by the user via --with-cpu=foo. 22450397Sobrien This specifies the cpu implementation, not the architecture size. */ 225117395Skan/* Note that TARGET_CPU_v9 is assumed to start the list of 64-bit 22652284Sobrien capable cpu's. */ 22750397Sobrien#define TARGET_CPU_sparc 0 22850397Sobrien#define TARGET_CPU_v7 0 /* alias for previous */ 22950397Sobrien#define TARGET_CPU_sparclet 1 23050397Sobrien#define TARGET_CPU_sparclite 2 23150397Sobrien#define TARGET_CPU_v8 3 /* generic v8 implementation */ 23250397Sobrien#define TARGET_CPU_supersparc 4 23352284Sobrien#define TARGET_CPU_hypersparc 5 23452284Sobrien#define TARGET_CPU_sparc86x 6 23552284Sobrien#define TARGET_CPU_sparclite86x 6 23652284Sobrien#define TARGET_CPU_v9 7 /* generic v9 implementation */ 23752284Sobrien#define TARGET_CPU_sparcv9 7 /* alias */ 23852284Sobrien#define TARGET_CPU_sparc64 7 /* alias */ 23952284Sobrien#define TARGET_CPU_ultrasparc 8 240117395Skan#define TARGET_CPU_ultrasparc3 9 241169689Skan#define TARGET_CPU_niagara 10 24250397Sobrien 24352284Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_v9 \ 244117395Skan || TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc \ 245169689Skan || TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3 \ 246169689Skan || TARGET_CPU_DEFAULT == TARGET_CPU_niagara 24752284Sobrien 24852284Sobrien#define CPP_CPU32_DEFAULT_SPEC "" 24952284Sobrien#define ASM_CPU32_DEFAULT_SPEC "" 25052284Sobrien 25150397Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_v9 25250397Sobrien/* ??? What does Sun's CC pass? */ 25352284Sobrien#define CPP_CPU64_DEFAULT_SPEC "-D__sparc_v9__" 25450397Sobrien/* ??? It's not clear how other assemblers will handle this, so by default 25550397Sobrien use GAS. Sun's Solaris assembler recognizes -xarch=v8plus, but this case 25650397Sobrien is handled in sol2.h. */ 25752284Sobrien#define ASM_CPU64_DEFAULT_SPEC "-Av9" 25850397Sobrien#endif 25950397Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc 26052284Sobrien#define CPP_CPU64_DEFAULT_SPEC "-D__sparc_v9__" 26152284Sobrien#define ASM_CPU64_DEFAULT_SPEC "-Av9a" 26250397Sobrien#endif 263117395Skan#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3 264117395Skan#define CPP_CPU64_DEFAULT_SPEC "-D__sparc_v9__" 265117395Skan#define ASM_CPU64_DEFAULT_SPEC "-Av9b" 266117395Skan#endif 267169689Skan#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara 268169689Skan#define CPP_CPU64_DEFAULT_SPEC "-D__sparc_v9__" 269169689Skan#define ASM_CPU64_DEFAULT_SPEC "-Av9b" 270169689Skan#endif 27152284Sobrien 27252284Sobrien#else 27352284Sobrien 27452284Sobrien#define CPP_CPU64_DEFAULT_SPEC "" 27552284Sobrien#define ASM_CPU64_DEFAULT_SPEC "" 27652284Sobrien 27752284Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_sparc \ 27852284Sobrien || TARGET_CPU_DEFAULT == TARGET_CPU_v8 27952284Sobrien#define CPP_CPU32_DEFAULT_SPEC "" 28052284Sobrien#define ASM_CPU32_DEFAULT_SPEC "" 28152284Sobrien#endif 28252284Sobrien 28352284Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_sparclet 28452284Sobrien#define CPP_CPU32_DEFAULT_SPEC "-D__sparclet__" 28552284Sobrien#define ASM_CPU32_DEFAULT_SPEC "-Asparclet" 28652284Sobrien#endif 28752284Sobrien 28852284Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_sparclite 28952284Sobrien#define CPP_CPU32_DEFAULT_SPEC "-D__sparclite__" 29052284Sobrien#define ASM_CPU32_DEFAULT_SPEC "-Asparclite" 29152284Sobrien#endif 29252284Sobrien 29352284Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_supersparc 29452284Sobrien#define CPP_CPU32_DEFAULT_SPEC "-D__supersparc__ -D__sparc_v8__" 29552284Sobrien#define ASM_CPU32_DEFAULT_SPEC "" 29652284Sobrien#endif 29752284Sobrien 29852284Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_hypersparc 29952284Sobrien#define CPP_CPU32_DEFAULT_SPEC "-D__hypersparc__ -D__sparc_v8__" 30052284Sobrien#define ASM_CPU32_DEFAULT_SPEC "" 30152284Sobrien#endif 30252284Sobrien 30352284Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_sparclite86x 30490075Sobrien#define CPP_CPU32_DEFAULT_SPEC "-D__sparclite86x__" 30590075Sobrien#define ASM_CPU32_DEFAULT_SPEC "-Asparclite" 30652284Sobrien#endif 30752284Sobrien 30852284Sobrien#endif 30952284Sobrien 31052284Sobrien#if !defined(CPP_CPU32_DEFAULT_SPEC) || !defined(CPP_CPU64_DEFAULT_SPEC) 311117395Skan #error Unrecognized value in TARGET_CPU_DEFAULT. 31250397Sobrien#endif 31350397Sobrien 31452284Sobrien#ifdef SPARC_BI_ARCH 31552284Sobrien 31652284Sobrien#define CPP_CPU_DEFAULT_SPEC \ 31752284Sobrien(DEFAULT_ARCH32_P ? "\ 31852284Sobrien%{m64:" CPP_CPU64_DEFAULT_SPEC "} \ 31952284Sobrien%{!m64:" CPP_CPU32_DEFAULT_SPEC "} \ 32052284Sobrien" : "\ 32152284Sobrien%{m32:" CPP_CPU32_DEFAULT_SPEC "} \ 32252284Sobrien%{!m32:" CPP_CPU64_DEFAULT_SPEC "} \ 32352284Sobrien") 32452284Sobrien#define ASM_CPU_DEFAULT_SPEC \ 32552284Sobrien(DEFAULT_ARCH32_P ? "\ 32652284Sobrien%{m64:" ASM_CPU64_DEFAULT_SPEC "} \ 32752284Sobrien%{!m64:" ASM_CPU32_DEFAULT_SPEC "} \ 32852284Sobrien" : "\ 32952284Sobrien%{m32:" ASM_CPU32_DEFAULT_SPEC "} \ 33052284Sobrien%{!m32:" ASM_CPU64_DEFAULT_SPEC "} \ 33152284Sobrien") 33252284Sobrien 33352284Sobrien#else /* !SPARC_BI_ARCH */ 33452284Sobrien 33552284Sobrien#define CPP_CPU_DEFAULT_SPEC (DEFAULT_ARCH32_P ? CPP_CPU32_DEFAULT_SPEC : CPP_CPU64_DEFAULT_SPEC) 33652284Sobrien#define ASM_CPU_DEFAULT_SPEC (DEFAULT_ARCH32_P ? ASM_CPU32_DEFAULT_SPEC : ASM_CPU64_DEFAULT_SPEC) 33752284Sobrien 33852284Sobrien#endif /* !SPARC_BI_ARCH */ 33952284Sobrien 34050397Sobrien/* Define macros to distinguish architectures. */ 34150397Sobrien 34250397Sobrien/* Common CPP definitions used by CPP_SPEC amongst the various targets 34350397Sobrien for handling -mcpu=xxx switches. */ 34450397Sobrien#define CPP_CPU_SPEC "\ 34590075Sobrien%{msoft-float:-D_SOFT_FLOAT} \ 34650397Sobrien%{mcypress:} \ 34750397Sobrien%{msparclite:-D__sparclite__} \ 34850397Sobrien%{mf930:-D__sparclite__} %{mf934:-D__sparclite__} \ 34950397Sobrien%{mv8:-D__sparc_v8__} \ 35050397Sobrien%{msupersparc:-D__supersparc__ -D__sparc_v8__} \ 35150397Sobrien%{mcpu=sparclet:-D__sparclet__} %{mcpu=tsc701:-D__sparclet__} \ 35250397Sobrien%{mcpu=sparclite:-D__sparclite__} \ 35350397Sobrien%{mcpu=f930:-D__sparclite__} %{mcpu=f934:-D__sparclite__} \ 35450397Sobrien%{mcpu=v8:-D__sparc_v8__} \ 35550397Sobrien%{mcpu=supersparc:-D__supersparc__ -D__sparc_v8__} \ 35652284Sobrien%{mcpu=hypersparc:-D__hypersparc__ -D__sparc_v8__} \ 35790075Sobrien%{mcpu=sparclite86x:-D__sparclite86x__} \ 35850397Sobrien%{mcpu=v9:-D__sparc_v9__} \ 35950397Sobrien%{mcpu=ultrasparc:-D__sparc_v9__} \ 360117395Skan%{mcpu=ultrasparc3:-D__sparc_v9__} \ 361169689Skan%{mcpu=niagara:-D__sparc_v9__} \ 36250397Sobrien%{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:%(cpp_cpu_default)}}}}}}} \ 36350397Sobrien" 364132718Skan#define CPP_ARCH32_SPEC "" 365132718Skan#define CPP_ARCH64_SPEC "-D__arch64__" 36650397Sobrien 36750397Sobrien#define CPP_ARCH_DEFAULT_SPEC \ 36850397Sobrien(DEFAULT_ARCH32_P ? CPP_ARCH32_SPEC : CPP_ARCH64_SPEC) 36950397Sobrien 37050397Sobrien#define CPP_ARCH_SPEC "\ 37150397Sobrien%{m32:%(cpp_arch32)} \ 37250397Sobrien%{m64:%(cpp_arch64)} \ 37350397Sobrien%{!m32:%{!m64:%(cpp_arch_default)}} \ 37450397Sobrien" 37550397Sobrien 37650397Sobrien/* Macros to distinguish endianness. */ 37752284Sobrien#define CPP_ENDIAN_SPEC "\ 37852284Sobrien%{mlittle-endian:-D__LITTLE_ENDIAN__} \ 37952284Sobrien%{mlittle-endian-data:-D__LITTLE_ENDIAN_DATA__}" 38050397Sobrien 38150397Sobrien/* Macros to distinguish the particular subtarget. */ 38250397Sobrien#define CPP_SUBTARGET_SPEC "" 38350397Sobrien 38450397Sobrien#define CPP_SPEC "%(cpp_cpu) %(cpp_arch) %(cpp_endian) %(cpp_subtarget)" 38550397Sobrien 38650397Sobrien/* Prevent error on `-sun4' and `-target sun4' options. */ 38750397Sobrien/* This used to translate -dalign to -malign, but that is no good 38850397Sobrien because it can't turn off the usual meaning of making debugging dumps. */ 38950397Sobrien/* Translate old style -m<cpu> into new style -mcpu=<cpu>. 39050397Sobrien ??? Delete support for -m<cpu> for 2.9. */ 39150397Sobrien 39250397Sobrien#define CC1_SPEC "\ 39350397Sobrien%{sun4:} %{target:} \ 39450397Sobrien%{mcypress:-mcpu=cypress} \ 39550397Sobrien%{msparclite:-mcpu=sparclite} %{mf930:-mcpu=f930} %{mf934:-mcpu=f934} \ 39650397Sobrien%{mv8:-mcpu=v8} %{msupersparc:-mcpu=supersparc} \ 39750397Sobrien" 39850397Sobrien 39950397Sobrien/* Override in target specific files. */ 40050397Sobrien#define ASM_CPU_SPEC "\ 40150397Sobrien%{mcpu=sparclet:-Asparclet} %{mcpu=tsc701:-Asparclet} \ 40250397Sobrien%{msparclite:-Asparclite} \ 40350397Sobrien%{mf930:-Asparclite} %{mf934:-Asparclite} \ 40450397Sobrien%{mcpu=sparclite:-Asparclite} \ 40590075Sobrien%{mcpu=sparclite86x:-Asparclite} \ 40650397Sobrien%{mcpu=f930:-Asparclite} %{mcpu=f934:-Asparclite} \ 40750397Sobrien%{mv8plus:-Av8plus} \ 40850397Sobrien%{mcpu=v9:-Av9} \ 40950397Sobrien%{mcpu=ultrasparc:%{!mv8plus:-Av9a}} \ 410117395Skan%{mcpu=ultrasparc3:%{!mv8plus:-Av9b}} \ 411169689Skan%{mcpu=niagara:%{!mv8plus:-Av9b}} \ 41250397Sobrien%{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:%(asm_cpu_default)}}}}}}} \ 41350397Sobrien" 41450397Sobrien 41550397Sobrien/* Word size selection, among other things. 41650397Sobrien This is what GAS uses. Add %(asm_arch) to ASM_SPEC to enable. */ 41750397Sobrien 41850397Sobrien#define ASM_ARCH32_SPEC "-32" 41990075Sobrien#ifdef HAVE_AS_REGISTER_PSEUDO_OP 42090075Sobrien#define ASM_ARCH64_SPEC "-64 -no-undeclared-regs" 42190075Sobrien#else 42250397Sobrien#define ASM_ARCH64_SPEC "-64" 42390075Sobrien#endif 42450397Sobrien#define ASM_ARCH_DEFAULT_SPEC \ 42550397Sobrien(DEFAULT_ARCH32_P ? ASM_ARCH32_SPEC : ASM_ARCH64_SPEC) 42650397Sobrien 42750397Sobrien#define ASM_ARCH_SPEC "\ 42850397Sobrien%{m32:%(asm_arch32)} \ 42950397Sobrien%{m64:%(asm_arch64)} \ 43050397Sobrien%{!m32:%{!m64:%(asm_arch_default)}} \ 43150397Sobrien" 43250397Sobrien 43390075Sobrien#ifdef HAVE_AS_RELAX_OPTION 43490075Sobrien#define ASM_RELAX_SPEC "%{!mno-relax:-relax}" 43590075Sobrien#else 43690075Sobrien#define ASM_RELAX_SPEC "" 43790075Sobrien#endif 43890075Sobrien 43950397Sobrien/* Special flags to the Sun-4 assembler when using pipe for input. */ 44050397Sobrien 44150397Sobrien#define ASM_SPEC "\ 442132718Skan%{R} %{!pg:%{!p:%{fpic|fPIC|fpie|fPIE:-k}}} %{keep-local-as-symbols:-L} \ 44390075Sobrien%(asm_cpu) %(asm_relax)" 44450397Sobrien 445132718Skan#define AS_NEEDS_DASH_FOR_PIPED_INPUT 446132718Skan 44750397Sobrien/* This macro defines names of additional specifications to put in the specs 44850397Sobrien that can be used in various specifications like CC1_SPEC. Its definition 44950397Sobrien is an initializer with a subgrouping for each command option. 45050397Sobrien 45150397Sobrien Each subgrouping contains a string constant, that defines the 452132718Skan specification name, and a string constant that used by the GCC driver 45350397Sobrien program. 45450397Sobrien 45550397Sobrien Do not define this macro if it does not need to do anything. */ 45650397Sobrien 45750397Sobrien#define EXTRA_SPECS \ 45852284Sobrien { "cpp_cpu", CPP_CPU_SPEC }, \ 45952284Sobrien { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \ 46052284Sobrien { "cpp_arch32", CPP_ARCH32_SPEC }, \ 46152284Sobrien { "cpp_arch64", CPP_ARCH64_SPEC }, \ 46252284Sobrien { "cpp_arch_default", CPP_ARCH_DEFAULT_SPEC },\ 46352284Sobrien { "cpp_arch", CPP_ARCH_SPEC }, \ 46452284Sobrien { "cpp_endian", CPP_ENDIAN_SPEC }, \ 46552284Sobrien { "cpp_subtarget", CPP_SUBTARGET_SPEC }, \ 46652284Sobrien { "asm_cpu", ASM_CPU_SPEC }, \ 46752284Sobrien { "asm_cpu_default", ASM_CPU_DEFAULT_SPEC }, \ 46852284Sobrien { "asm_arch32", ASM_ARCH32_SPEC }, \ 46952284Sobrien { "asm_arch64", ASM_ARCH64_SPEC }, \ 47090075Sobrien { "asm_relax", ASM_RELAX_SPEC }, \ 47152284Sobrien { "asm_arch_default", ASM_ARCH_DEFAULT_SPEC },\ 47252284Sobrien { "asm_arch", ASM_ARCH_SPEC }, \ 47350397Sobrien SUBTARGET_EXTRA_SPECS 47450397Sobrien 47550397Sobrien#define SUBTARGET_EXTRA_SPECS 47696263Sobrien 47796263Sobrien/* Because libgcc can generate references back to libc (via .umul etc.) we have 47896263Sobrien to list libc again after the second libgcc. */ 47996263Sobrien#define LINK_GCC_C_SEQUENCE_SPEC "%G %L %G %L" 48096263Sobrien 48150397Sobrien 48250397Sobrien#define PTRDIFF_TYPE (TARGET_ARCH64 ? "long int" : "int") 48350397Sobrien#define SIZE_TYPE (TARGET_ARCH64 ? "long unsigned int" : "unsigned int") 48450397Sobrien 48550397Sobrien/* ??? This should be 32 bits for v9 but what can we do? */ 48650397Sobrien#define WCHAR_TYPE "short unsigned int" 48750397Sobrien#define WCHAR_TYPE_SIZE 16 48850397Sobrien 48950397Sobrien/* Show we can debug even without a frame pointer. */ 49050397Sobrien#define CAN_DEBUG_WITHOUT_FP 49150397Sobrien 492169689Skan/* Option handling. */ 493169689Skan 49496263Sobrien#define OVERRIDE_OPTIONS sparc_override_options () 49550397Sobrien 49650397Sobrien/* Mask of all CPU selection flags. */ 49750397Sobrien#define MASK_ISA \ 49850397Sobrien(MASK_V8 + MASK_SPARCLITE + MASK_SPARCLET + MASK_V9 + MASK_DEPRECATED_V8_INSNS) 49950397Sobrien 50050397Sobrien/* TARGET_HARD_MUL: Use hardware multiply instructions but not %y. 50150397Sobrien TARGET_HARD_MUL32: Use hardware multiply instructions with rd %y 50250397Sobrien to get high 32 bits. False in V8+ or V9 because multiply stores 50350397Sobrien a 64 bit result in a register. */ 50450397Sobrien 50550397Sobrien#define TARGET_HARD_MUL32 \ 50650397Sobrien ((TARGET_V8 || TARGET_SPARCLITE \ 50750397Sobrien || TARGET_SPARCLET || TARGET_DEPRECATED_V8_INSNS) \ 50890075Sobrien && ! TARGET_V8PLUS && TARGET_ARCH32) 50950397Sobrien 51050397Sobrien#define TARGET_HARD_MUL \ 51150397Sobrien (TARGET_V8 || TARGET_SPARCLITE || TARGET_SPARCLET \ 512117395Skan || TARGET_DEPRECATED_V8_INSNS || TARGET_V8PLUS) 51350397Sobrien 51450397Sobrien/* MASK_APP_REGS must always be the default because that's what 51550397Sobrien FIXED_REGISTERS is set to and -ffixed- is processed before 51650397Sobrien CONDITIONAL_REGISTER_USAGE is called (where we process -mno-app-regs). */ 51796263Sobrien#define TARGET_DEFAULT (MASK_APP_REGS + MASK_FPU) 51850397Sobrien 51950397Sobrien/* Processor type. 52050397Sobrien These must match the values for the cpu attribute in sparc.md. */ 52150397Sobrienenum processor_type { 52250397Sobrien PROCESSOR_V7, 52350397Sobrien PROCESSOR_CYPRESS, 52450397Sobrien PROCESSOR_V8, 52550397Sobrien PROCESSOR_SUPERSPARC, 52650397Sobrien PROCESSOR_SPARCLITE, 52750397Sobrien PROCESSOR_F930, 52850397Sobrien PROCESSOR_F934, 52952284Sobrien PROCESSOR_HYPERSPARC, 53052284Sobrien PROCESSOR_SPARCLITE86X, 53150397Sobrien PROCESSOR_SPARCLET, 53250397Sobrien PROCESSOR_TSC701, 53350397Sobrien PROCESSOR_V9, 534117395Skan PROCESSOR_ULTRASPARC, 535169689Skan PROCESSOR_ULTRASPARC3, 536169689Skan PROCESSOR_NIAGARA 53750397Sobrien}; 53850397Sobrien 53950397Sobrien/* This is set from -m{cpu,tune}=xxx. */ 54050397Sobrienextern enum processor_type sparc_cpu; 54150397Sobrien 54250397Sobrien/* Recast the cpu class to be the cpu attribute. 54350397Sobrien Every file includes us, but not every file includes insn-attr.h. */ 54450397Sobrien#define sparc_cpu_attr ((enum attr_cpu) sparc_cpu) 54550397Sobrien 546132718Skan/* Support for a compile-time default CPU, et cetera. The rules are: 547132718Skan --with-cpu is ignored if -mcpu is specified. 548132718Skan --with-tune is ignored if -mtune is specified. 549132718Skan --with-float is ignored if -mhard-float, -msoft-float, -mfpu, or -mno-fpu 550132718Skan are specified. */ 551132718Skan#define OPTION_DEFAULT_SPECS \ 552132718Skan {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \ 553132718Skan {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \ 554132718Skan {"float", "%{!msoft-float:%{!mhard-float:%{!fpu:%{!no-fpu:-m%(VALUE)-float}}}}" } 555132718Skan 55650397Sobrien/* sparc_select[0] is reserved for the default cpu. */ 55750397Sobrienstruct sparc_cpu_select 55850397Sobrien{ 55952284Sobrien const char *string; 56090075Sobrien const char *const name; 56190075Sobrien const int set_tune_p; 56290075Sobrien const int set_arch_p; 56350397Sobrien}; 56450397Sobrien 56550397Sobrienextern struct sparc_cpu_select sparc_select[]; 56650397Sobrien 56750397Sobrien/* target machine storage layout */ 56850397Sobrien 56950397Sobrien/* Define this if most significant bit is lowest numbered 57050397Sobrien in instructions that operate on numbered bit-fields. */ 57150397Sobrien#define BITS_BIG_ENDIAN 1 57250397Sobrien 57350397Sobrien/* Define this if most significant byte of a word is the lowest numbered. */ 57450397Sobrien#define BYTES_BIG_ENDIAN 1 57550397Sobrien 57650397Sobrien/* Define this if most significant word of a multiword number is the lowest 57750397Sobrien numbered. */ 57850397Sobrien#define WORDS_BIG_ENDIAN 1 57950397Sobrien 58050397Sobrien/* Define this to set the endianness to use in libgcc2.c, which can 58150397Sobrien not depend on target_flags. */ 58252284Sobrien#if defined (__LITTLE_ENDIAN__) || defined(__LITTLE_ENDIAN_DATA__) 58350397Sobrien#define LIBGCC2_WORDS_BIG_ENDIAN 0 58450397Sobrien#else 58550397Sobrien#define LIBGCC2_WORDS_BIG_ENDIAN 1 58650397Sobrien#endif 58750397Sobrien 58850397Sobrien#define MAX_BITS_PER_WORD 64 58950397Sobrien 59050397Sobrien/* Width of a word, in units (bytes). */ 59150397Sobrien#define UNITS_PER_WORD (TARGET_ARCH64 ? 8 : 4) 59296263Sobrien#ifdef IN_LIBGCC2 59396263Sobrien#define MIN_UNITS_PER_WORD UNITS_PER_WORD 59496263Sobrien#else 59550397Sobrien#define MIN_UNITS_PER_WORD 4 59696263Sobrien#endif 59750397Sobrien 598169689Skan#define UNITS_PER_SIMD_WORD (TARGET_VIS ? 8 : UNITS_PER_WORD) 599169689Skan 60050397Sobrien/* Now define the sizes of the C data types. */ 60150397Sobrien 60250397Sobrien#define SHORT_TYPE_SIZE 16 60350397Sobrien#define INT_TYPE_SIZE 32 60450397Sobrien#define LONG_TYPE_SIZE (TARGET_ARCH64 ? 64 : 32) 60550397Sobrien#define LONG_LONG_TYPE_SIZE 64 60650397Sobrien#define FLOAT_TYPE_SIZE 32 60750397Sobrien#define DOUBLE_TYPE_SIZE 64 608169689Skan/* LONG_DOUBLE_TYPE_SIZE is defined per OS even though the 609169689Skan SPARC ABI says that it is 128-bit wide. */ 610169689Skan/* #define LONG_DOUBLE_TYPE_SIZE 128 */ 61150397Sobrien 61250397Sobrien/* Width in bits of a pointer. 61350397Sobrien See also the macro `Pmode' defined below. */ 61450397Sobrien#define POINTER_SIZE (TARGET_PTR64 ? 64 : 32) 61550397Sobrien 61690075Sobrien/* If we have to extend pointers (only when TARGET_ARCH64 and not 61790075Sobrien TARGET_PTR64), we want to do it unsigned. This macro does nothing 61890075Sobrien if ptr_mode and Pmode are the same. */ 61990075Sobrien#define POINTERS_EXTEND_UNSIGNED 1 62090075Sobrien 621169689Skan/* For TARGET_ARCH64 we need this, as we don't have instructions 622169689Skan for arithmetic operations which do zero/sign extension at the same time, 623169689Skan so without this we end up with a srl/sra after every assignment to an 624169689Skan user variable, which means very very bad code. */ 625169689Skan#define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE) \ 62650397Sobrienif (TARGET_ARCH64 \ 62750397Sobrien && GET_MODE_CLASS (MODE) == MODE_INT \ 62850397Sobrien && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ 629169689Skan (MODE) = word_mode; 63050397Sobrien 63150397Sobrien/* Allocation boundary (in *bits*) for storing arguments in argument list. */ 63250397Sobrien#define PARM_BOUNDARY (TARGET_ARCH64 ? 64 : 32) 63350397Sobrien 63450397Sobrien/* Boundary (in *bits*) on which stack pointer should be aligned. */ 635132718Skan/* FIXME, this is wrong when TARGET_ARCH64 and TARGET_STACK_BIAS, because 636169689Skan then %sp+2047 is 128-bit aligned so %sp is really only byte-aligned. */ 63750397Sobrien#define STACK_BOUNDARY (TARGET_ARCH64 ? 128 : 64) 638169689Skan/* Temporary hack until the FIXME above is fixed. */ 639132718Skan#define SPARC_STACK_BOUNDARY_HACK (TARGET_ARCH64 && TARGET_STACK_BIAS) 64050397Sobrien 64150397Sobrien/* ALIGN FRAMES on double word boundaries */ 64250397Sobrien 64350397Sobrien#define SPARC_STACK_ALIGN(LOC) \ 64450397Sobrien (TARGET_ARCH64 ? (((LOC)+15) & ~15) : (((LOC)+7) & ~7)) 64550397Sobrien 64650397Sobrien/* Allocation boundary (in *bits*) for the code of a function. */ 64790075Sobrien#define FUNCTION_BOUNDARY 32 64850397Sobrien 64950397Sobrien/* Alignment of field after `int : 0' in a structure. */ 65050397Sobrien#define EMPTY_FIELD_BOUNDARY (TARGET_ARCH64 ? 64 : 32) 65150397Sobrien 65250397Sobrien/* Every structure's size must be a multiple of this. */ 65350397Sobrien#define STRUCTURE_SIZE_BOUNDARY 8 65450397Sobrien 655117395Skan/* A bit-field declared as `int' forces `int' alignment for the struct. */ 65650397Sobrien#define PCC_BITFIELD_TYPE_MATTERS 1 65750397Sobrien 65850397Sobrien/* No data type wants to be aligned rounder than this. */ 65950397Sobrien#define BIGGEST_ALIGNMENT (TARGET_ARCH64 ? 128 : 64) 66050397Sobrien 66150397Sobrien/* The best alignment to use in cases where we have a choice. */ 66250397Sobrien#define FASTEST_ALIGNMENT 64 66350397Sobrien 66490075Sobrien/* Define this macro as an expression for the alignment of a structure 66590075Sobrien (given by STRUCT as a tree node) if the alignment computed in the 66690075Sobrien usual way is COMPUTED and the alignment explicitly specified was 66790075Sobrien SPECIFIED. 66890075Sobrien 66990075Sobrien The default is to use SPECIFIED if it is larger; otherwise, use 67090075Sobrien the smaller of COMPUTED and `BIGGEST_ALIGNMENT' */ 67190075Sobrien#define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) \ 67290075Sobrien (TARGET_FASTER_STRUCTS ? \ 67390075Sobrien ((TREE_CODE (STRUCT) == RECORD_TYPE \ 67490075Sobrien || TREE_CODE (STRUCT) == UNION_TYPE \ 67590075Sobrien || TREE_CODE (STRUCT) == QUAL_UNION_TYPE) \ 67690075Sobrien && TYPE_FIELDS (STRUCT) != 0 \ 67790075Sobrien ? MAX (MAX ((COMPUTED), (SPECIFIED)), BIGGEST_ALIGNMENT) \ 67890075Sobrien : MAX ((COMPUTED), (SPECIFIED))) \ 67990075Sobrien : MAX ((COMPUTED), (SPECIFIED))) 68090075Sobrien 68150397Sobrien/* Make strings word-aligned so strcpy from constants will be faster. */ 68250397Sobrien#define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 68350397Sobrien ((TREE_CODE (EXP) == STRING_CST \ 68450397Sobrien && (ALIGN) < FASTEST_ALIGNMENT) \ 68550397Sobrien ? FASTEST_ALIGNMENT : (ALIGN)) 68650397Sobrien 68750397Sobrien/* Make arrays of chars word-aligned for the same reasons. */ 68850397Sobrien#define DATA_ALIGNMENT(TYPE, ALIGN) \ 68950397Sobrien (TREE_CODE (TYPE) == ARRAY_TYPE \ 69050397Sobrien && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 69150397Sobrien && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN)) 69250397Sobrien 69350397Sobrien/* Set this nonzero if move instructions will actually fail to work 69450397Sobrien when given unaligned data. */ 69550397Sobrien#define STRICT_ALIGNMENT 1 69650397Sobrien 69750397Sobrien/* Things that must be doubleword aligned cannot go in the text section, 69850397Sobrien because the linker fails to align the text section enough! 69950397Sobrien Put them in the data section. This macro is only used in this file. */ 70050397Sobrien#define MAX_TEXT_ALIGN 32 70150397Sobrien 70250397Sobrien/* Standard register usage. */ 70350397Sobrien 70450397Sobrien/* Number of actual hardware registers. 70550397Sobrien The hardware registers are assigned numbers for the compiler 70650397Sobrien from 0 to just below FIRST_PSEUDO_REGISTER. 70750397Sobrien All registers that the compiler knows about must be given numbers, 70850397Sobrien even those that are not normally considered general registers. 70950397Sobrien 71050397Sobrien SPARC has 32 integer registers and 32 floating point registers. 71150397Sobrien 64 bit SPARC has 32 additional fp regs, but the odd numbered ones are not 71250397Sobrien accessible. We still account for them to simplify register computations 713169689Skan (e.g.: in CLASS_MAX_NREGS). There are also 4 fp condition code registers, so 71450397Sobrien 32+32+32+4 == 100. 71596263Sobrien Register 100 is used as the integer condition code register. 71696263Sobrien Register 101 is used as the soft frame pointer register. */ 71750397Sobrien 71896263Sobrien#define FIRST_PSEUDO_REGISTER 102 71950397Sobrien 72050397Sobrien#define SPARC_FIRST_FP_REG 32 72150397Sobrien/* Additional V9 fp regs. */ 72250397Sobrien#define SPARC_FIRST_V9_FP_REG 64 72350397Sobrien#define SPARC_LAST_V9_FP_REG 95 72450397Sobrien/* V9 %fcc[0123]. V8 uses (figuratively) %fcc0. */ 72550397Sobrien#define SPARC_FIRST_V9_FCC_REG 96 72650397Sobrien#define SPARC_LAST_V9_FCC_REG 99 72750397Sobrien/* V8 fcc reg. */ 72850397Sobrien#define SPARC_FCC_REG 96 72950397Sobrien/* Integer CC reg. We don't distinguish %icc from %xcc. */ 73050397Sobrien#define SPARC_ICC_REG 100 73150397Sobrien 73250397Sobrien/* Nonzero if REGNO is an fp reg. */ 73350397Sobrien#define SPARC_FP_REG_P(REGNO) \ 73450397Sobrien((REGNO) >= SPARC_FIRST_FP_REG && (REGNO) <= SPARC_LAST_V9_FP_REG) 73550397Sobrien 73650397Sobrien/* Argument passing regs. */ 73750397Sobrien#define SPARC_OUTGOING_INT_ARG_FIRST 8 738169689Skan#define SPARC_INCOMING_INT_ARG_FIRST 24 73950397Sobrien#define SPARC_FP_ARG_FIRST 32 74050397Sobrien 74150397Sobrien/* 1 for registers that have pervasive standard uses 74250397Sobrien and are not available for the register allocator. 74350397Sobrien 74450397Sobrien On non-v9 systems: 74550397Sobrien g1 is free to use as temporary. 74650397Sobrien g2-g4 are reserved for applications. Gcc normally uses them as 74750397Sobrien temporaries, but this can be disabled via the -mno-app-regs option. 74850397Sobrien g5 through g7 are reserved for the operating system. 74950397Sobrien 75050397Sobrien On v9 systems: 75150397Sobrien g1,g5 are free to use as temporaries, and are free to use between calls 75250397Sobrien if the call is to an external function via the PLT. 75350397Sobrien g4 is free to use as a temporary in the non-embedded case. 75450397Sobrien g4 is reserved in the embedded case. 75550397Sobrien g2-g3 are reserved for applications. Gcc normally uses them as 75650397Sobrien temporaries, but this can be disabled via the -mno-app-regs option. 75750397Sobrien g6-g7 are reserved for the operating system (or application in 75850397Sobrien embedded case). 75950397Sobrien ??? Register 1 is used as a temporary by the 64 bit sethi pattern, so must 76050397Sobrien currently be a fixed register until this pattern is rewritten. 76150397Sobrien Register 1 is also used when restoring call-preserved registers in large 76250397Sobrien stack frames. 76350397Sobrien 76450397Sobrien Registers fixed in arch32 and not arch64 (or vice-versa) are marked in 76550397Sobrien CONDITIONAL_REGISTER_USAGE in order to properly handle -ffixed-. 76650397Sobrien*/ 76750397Sobrien 76850397Sobrien#define FIXED_REGISTERS \ 76990075Sobrien {1, 0, 2, 2, 2, 2, 1, 1, \ 77050397Sobrien 0, 0, 0, 0, 0, 0, 1, 0, \ 77150397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 77250397Sobrien 0, 0, 0, 0, 0, 0, 1, 1, \ 77350397Sobrien \ 77450397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 77550397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 77650397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 77750397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 77850397Sobrien \ 77950397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 78050397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 78150397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 78250397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 78350397Sobrien \ 78496263Sobrien 0, 0, 0, 0, 0, 1} 78550397Sobrien 78650397Sobrien/* 1 for registers not available across function calls. 78750397Sobrien These must include the FIXED_REGISTERS and also any 78850397Sobrien registers that can be used without being saved. 78950397Sobrien The latter must include the registers where values are returned 79050397Sobrien and the register where structure-value addresses are passed. 79150397Sobrien Aside from that, you can include as many other registers as you like. */ 79250397Sobrien 79350397Sobrien#define CALL_USED_REGISTERS \ 79450397Sobrien {1, 1, 1, 1, 1, 1, 1, 1, \ 79550397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 79650397Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 79750397Sobrien 0, 0, 0, 0, 0, 0, 1, 1, \ 79850397Sobrien \ 79950397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 80050397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 80150397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 80250397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 80350397Sobrien \ 80450397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 80550397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 80650397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 80750397Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 80850397Sobrien \ 80996263Sobrien 1, 1, 1, 1, 1, 1} 81050397Sobrien 81150397Sobrien/* If !TARGET_FPU, then make the fp registers and fp cc regs fixed so that 81250397Sobrien they won't be allocated. */ 81350397Sobrien 81450397Sobrien#define CONDITIONAL_REGISTER_USAGE \ 81550397Sobriendo \ 81650397Sobrien { \ 81796263Sobrien if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \ 81852284Sobrien { \ 81952284Sobrien fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 82052284Sobrien call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 82152284Sobrien } \ 82290075Sobrien /* If the user has passed -f{fixed,call-{used,saved}}-g5 */ \ 823117395Skan /* then honor it. */ \ 82490075Sobrien if (TARGET_ARCH32 && fixed_regs[5]) \ 82590075Sobrien fixed_regs[5] = 1; \ 82690075Sobrien else if (TARGET_ARCH64 && fixed_regs[5] == 2) \ 82790075Sobrien fixed_regs[5] = 0; \ 82850397Sobrien if (! TARGET_V9) \ 82950397Sobrien { \ 83050397Sobrien int regno; \ 83150397Sobrien for (regno = SPARC_FIRST_V9_FP_REG; \ 83250397Sobrien regno <= SPARC_LAST_V9_FP_REG; \ 83350397Sobrien regno++) \ 83450397Sobrien fixed_regs[regno] = 1; \ 83550397Sobrien /* %fcc0 is used by v8 and v9. */ \ 83650397Sobrien for (regno = SPARC_FIRST_V9_FCC_REG + 1; \ 83750397Sobrien regno <= SPARC_LAST_V9_FCC_REG; \ 83850397Sobrien regno++) \ 83950397Sobrien fixed_regs[regno] = 1; \ 84050397Sobrien } \ 84150397Sobrien if (! TARGET_FPU) \ 84250397Sobrien { \ 84350397Sobrien int regno; \ 84450397Sobrien for (regno = 32; regno < SPARC_LAST_V9_FCC_REG; regno++) \ 84550397Sobrien fixed_regs[regno] = 1; \ 84650397Sobrien } \ 84790075Sobrien /* If the user has passed -f{fixed,call-{used,saved}}-g2 */ \ 848117395Skan /* then honor it. Likewise with g3 and g4. */ \ 84990075Sobrien if (fixed_regs[2] == 2) \ 85090075Sobrien fixed_regs[2] = ! TARGET_APP_REGS; \ 85190075Sobrien if (fixed_regs[3] == 2) \ 85290075Sobrien fixed_regs[3] = ! TARGET_APP_REGS; \ 85390075Sobrien if (TARGET_ARCH32 && fixed_regs[4] == 2) \ 85490075Sobrien fixed_regs[4] = ! TARGET_APP_REGS; \ 85590075Sobrien else if (TARGET_CM_EMBMEDANY) \ 85690075Sobrien fixed_regs[4] = 1; \ 85790075Sobrien else if (fixed_regs[4] == 2) \ 85890075Sobrien fixed_regs[4] = 0; \ 85950397Sobrien } \ 86050397Sobrienwhile (0) 86150397Sobrien 86250397Sobrien/* Return number of consecutive hard regs needed starting at reg REGNO 86350397Sobrien to hold something of mode MODE. 86450397Sobrien This is ordinarily the length in words of a value of mode MODE 86550397Sobrien but can be less for certain modes in special long registers. 86650397Sobrien 86750397Sobrien On SPARC, ordinary registers hold 32 bits worth; 86850397Sobrien this means both integer and floating point registers. 86950397Sobrien On v9, integer regs hold 64 bits worth; floating point regs hold 87050397Sobrien 32 bits worth (this includes the new fp regs as even the odd ones are 87150397Sobrien included in the hard register count). */ 87250397Sobrien 87350397Sobrien#define HARD_REGNO_NREGS(REGNO, MODE) \ 87450397Sobrien (TARGET_ARCH64 \ 87596263Sobrien ? ((REGNO) < 32 || (REGNO) == FRAME_POINTER_REGNUM \ 87696263Sobrien ? (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD \ 87796263Sobrien : (GET_MODE_SIZE (MODE) + 3) / 4) \ 87850397Sobrien : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 87950397Sobrien 880132718Skan/* Due to the ARCH64 discrepancy above we must override this next 88190075Sobrien macro too. */ 88290075Sobrien#define REGMODE_NATURAL_SIZE(MODE) \ 88390075Sobrien ((TARGET_ARCH64 && FLOAT_MODE_P (MODE)) ? 4 : UNITS_PER_WORD) 88450397Sobrien 88550397Sobrien/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 88650397Sobrien See sparc.c for how we initialize this. */ 88790075Sobrienextern const int *hard_regno_mode_classes; 88850397Sobrienextern int sparc_mode_class[]; 88990075Sobrien 89090075Sobrien/* ??? Because of the funny way we pass parameters we should allow certain 89190075Sobrien ??? types of float/complex values to be in integer registers during 89290075Sobrien ??? RTL generation. This only matters on arch32. */ 89350397Sobrien#define HARD_REGNO_MODE_OK(REGNO, MODE) \ 89450397Sobrien ((hard_regno_mode_classes[REGNO] & sparc_mode_class[MODE]) != 0) 89550397Sobrien 896169689Skan/* Value is 1 if it is OK to rename a hard register FROM to another hard 897169689Skan register TO. We cannot rename %g1 as it may be used before the save 898169689Skan register window instruction in the prologue. */ 899169689Skan#define HARD_REGNO_RENAME_OK(FROM, TO) ((FROM) != 1) 900169689Skan 90150397Sobrien/* Value is 1 if it is a good idea to tie two pseudo registers 90250397Sobrien when one has mode MODE1 and one has mode MODE2. 90350397Sobrien If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 90450397Sobrien for any hard reg, then this must be 0 for correct output. 90550397Sobrien 90650397Sobrien For V9: SFmode can't be combined with other float modes, because they can't 90750397Sobrien be allocated to the %d registers. Also, DFmode won't fit in odd %f 90850397Sobrien registers, but SFmode will. */ 90950397Sobrien#define MODES_TIEABLE_P(MODE1, MODE2) \ 91050397Sobrien ((MODE1) == (MODE2) \ 91150397Sobrien || (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2) \ 91250397Sobrien && (! TARGET_V9 \ 91350397Sobrien || (GET_MODE_CLASS (MODE1) != MODE_FLOAT \ 91450397Sobrien || (MODE1 != SFmode && MODE2 != SFmode))))) 91550397Sobrien 91650397Sobrien/* Specify the registers used for certain standard purposes. 91750397Sobrien The values of these macros are register numbers. */ 91850397Sobrien 91950397Sobrien/* Register to use for pushing function arguments. */ 92050397Sobrien#define STACK_POINTER_REGNUM 14 92150397Sobrien 92296263Sobrien/* The stack bias (amount by which the hardware register is offset by). */ 92396263Sobrien#define SPARC_STACK_BIAS ((TARGET_ARCH64 && TARGET_STACK_BIAS) ? 2047 : 0) 92496263Sobrien 92550397Sobrien/* Actual top-of-stack address is 92/176 greater than the contents of the 92650397Sobrien stack pointer register for !v9/v9. That is: 92750397Sobrien - !v9: 64 bytes for the in and local registers, 4 bytes for structure return 92850397Sobrien address, and 6*4 bytes for the 6 register parameters. 92950397Sobrien - v9: 128 bytes for the in and local registers + 6*8 bytes for the integer 93050397Sobrien parameter regs. */ 93196263Sobrien#define STACK_POINTER_OFFSET (FIRST_PARM_OFFSET(0) + SPARC_STACK_BIAS) 93250397Sobrien 93396263Sobrien/* Base register for access to local variables of the function. */ 93496263Sobrien#define HARD_FRAME_POINTER_REGNUM 30 93550397Sobrien 93696263Sobrien/* The soft frame pointer does not have the stack bias applied. */ 93796263Sobrien#define FRAME_POINTER_REGNUM 101 93850397Sobrien 93996263Sobrien/* Given the stack bias, the stack pointer isn't actually aligned. */ 94096263Sobrien#define INIT_EXPANDERS \ 94196263Sobrien do { \ 94296263Sobrien if (cfun && cfun->emit->regno_pointer_align && SPARC_STACK_BIAS) \ 94396263Sobrien { \ 94496263Sobrien REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = BITS_PER_UNIT; \ 94596263Sobrien REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = BITS_PER_UNIT; \ 94696263Sobrien } \ 94796263Sobrien } while (0) 94850397Sobrien 94950397Sobrien/* Value should be nonzero if functions must have frame pointers. 95050397Sobrien Zero means the frame pointer need not be set up (and parms 95150397Sobrien may be accessed via the stack pointer) in functions that seem suitable. 952169689Skan Used in flow.c, global.c, ra.c and reload1.c. */ 953169689Skan#define FRAME_POINTER_REQUIRED \ 954169689Skan (! (leaf_function_p () && only_leaf_regs_used ())) 95550397Sobrien 95650397Sobrien/* Base register for access to arguments of the function. */ 95750397Sobrien#define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM 95850397Sobrien 95950397Sobrien/* Register in which static-chain is passed to a function. This must 96050397Sobrien not be a register used by the prologue. */ 96150397Sobrien#define STATIC_CHAIN_REGNUM (TARGET_ARCH64 ? 5 : 2) 96250397Sobrien 96350397Sobrien/* Register which holds offset table for position-independent 96450397Sobrien data references. */ 96550397Sobrien 96696263Sobrien#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 23 : INVALID_REGNUM) 96750397Sobrien 96850397Sobrien/* Pick a default value we can notice from override_options: 96950397Sobrien !v9: Default is on. 97050397Sobrien v9: Default is off. */ 97150397Sobrien 97250397Sobrien#define DEFAULT_PCC_STRUCT_RETURN -1 97350397Sobrien 97450397Sobrien/* Functions which return large structures get the address 97550397Sobrien to place the wanted value at offset 64 from the frame. 97650397Sobrien Must reserve 64 bytes for the in and local registers. 97750397Sobrien v9: Functions which return large structures get the address to place the 97850397Sobrien wanted value from an invisible first argument. */ 97950397Sobrien#define STRUCT_VALUE_OFFSET 64 98050397Sobrien 98150397Sobrien/* Define the classes of registers for register constraints in the 98250397Sobrien machine description. Also define ranges of constants. 98350397Sobrien 98450397Sobrien One of the classes must always be named ALL_REGS and include all hard regs. 98550397Sobrien If there is more than one class, another class must be named NO_REGS 98650397Sobrien and contain no registers. 98750397Sobrien 98850397Sobrien The name GENERAL_REGS must be the name of a class (or an alias for 98950397Sobrien another name such as ALL_REGS). This is the class of registers 99050397Sobrien that is allowed by "g" or "r" in a register constraint. 99150397Sobrien Also, registers outside this class are allocated only when 99250397Sobrien instructions express preferences for them. 99350397Sobrien 99450397Sobrien The classes must be numbered in nondecreasing order; that is, 99550397Sobrien a larger-numbered class must never be contained completely 99650397Sobrien in a smaller-numbered class. 99750397Sobrien 99850397Sobrien For any two classes, it is very desirable that there be another 99950397Sobrien class that represents their union. */ 100050397Sobrien 100150397Sobrien/* The SPARC has various kinds of registers: general, floating point, 100250397Sobrien and condition codes [well, it has others as well, but none that we 100350397Sobrien care directly about]. 100450397Sobrien 100550397Sobrien For v9 we must distinguish between the upper and lower floating point 100650397Sobrien registers because the upper ones can't hold SFmode values. 100750397Sobrien HARD_REGNO_MODE_OK won't help here because reload assumes that register(s) 100850397Sobrien satisfying a group need for a class will also satisfy a single need for 100950397Sobrien that class. EXTRA_FP_REGS is a bit of a misnomer as it covers all 64 fp 101050397Sobrien regs. 101150397Sobrien 101250397Sobrien It is important that one class contains all the general and all the standard 101350397Sobrien fp regs. Otherwise find_reg() won't properly allocate int regs for moves, 101450397Sobrien because reg_class_record() will bias the selection in favor of fp regs, 101550397Sobrien because reg_class_subunion[GENERAL_REGS][FP_REGS] will yield FP_REGS, 101650397Sobrien because FP_REGS > GENERAL_REGS. 101750397Sobrien 1018169689Skan It is also important that one class contain all the general and all 1019169689Skan the fp regs. Otherwise when spilling a DFmode reg, it may be from 1020169689Skan EXTRA_FP_REGS but find_reloads() may use class 1021169689Skan GENERAL_OR_FP_REGS. This will cause allocate_reload_reg() to die 1022169689Skan because the compiler thinks it doesn't have a spill reg when in 1023169689Skan fact it does. 102450397Sobrien 102550397Sobrien v9 also has 4 floating point condition code registers. Since we don't 102650397Sobrien have a class that is the union of FPCC_REGS with either of the others, 102750397Sobrien it is important that it appear first. Otherwise the compiler will die 102850397Sobrien trying to compile _fixunsdfsi because fix_truncdfsi2 won't match its 102950397Sobrien constraints. 103050397Sobrien 103150397Sobrien It is important that SPARC_ICC_REG have class NO_REGS. Otherwise combine 103250397Sobrien may try to use it to hold an SImode value. See register_operand. 103350397Sobrien ??? Should %fcc[0123] be handled similarly? 103450397Sobrien*/ 103550397Sobrien 103650397Sobrienenum reg_class { NO_REGS, FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS, 103750397Sobrien EXTRA_FP_REGS, GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, 103850397Sobrien ALL_REGS, LIM_REG_CLASSES }; 103950397Sobrien 104050397Sobrien#define N_REG_CLASSES (int) LIM_REG_CLASSES 104150397Sobrien 104290075Sobrien/* Give names of register classes as strings for dump file. */ 104350397Sobrien 104450397Sobrien#define REG_CLASS_NAMES \ 104550397Sobrien { "NO_REGS", "FPCC_REGS", "I64_REGS", "GENERAL_REGS", "FP_REGS", \ 104650397Sobrien "EXTRA_FP_REGS", "GENERAL_OR_FP_REGS", "GENERAL_OR_EXTRA_FP_REGS", \ 104750397Sobrien "ALL_REGS" } 104850397Sobrien 104950397Sobrien/* Define which registers fit in which classes. 105050397Sobrien This is an initializer for a vector of HARD_REG_SET 105150397Sobrien of length N_REG_CLASSES. */ 105250397Sobrien 105396263Sobrien#define REG_CLASS_CONTENTS \ 105496263Sobrien {{0, 0, 0, 0}, /* NO_REGS */ \ 105596263Sobrien {0, 0, 0, 0xf}, /* FPCC_REGS */ \ 105696263Sobrien {0xffff, 0, 0, 0}, /* I64_REGS */ \ 105796263Sobrien {-1, 0, 0, 0x20}, /* GENERAL_REGS */ \ 105896263Sobrien {0, -1, 0, 0}, /* FP_REGS */ \ 105996263Sobrien {0, -1, -1, 0}, /* EXTRA_FP_REGS */ \ 106096263Sobrien {-1, -1, 0, 0x20}, /* GENERAL_OR_FP_REGS */ \ 106196263Sobrien {-1, -1, -1, 0x20}, /* GENERAL_OR_EXTRA_FP_REGS */ \ 106296263Sobrien {-1, -1, -1, 0x3f}} /* ALL_REGS */ 106350397Sobrien 1064132718Skan/* Defines invalid mode changes. Borrowed from pa64-regs.h. 1065132718Skan 1066132718Skan SImode loads to floating-point registers are not zero-extended. 1067132718Skan The definition for LOAD_EXTEND_OP specifies that integer loads 1068132718Skan narrower than BITS_PER_WORD will be zero-extended. As a result, 1069132718Skan we inhibit changes from SImode unless they are to a mode that is 1070132718Skan identical in size. */ 1071132718Skan 1072132718Skan#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ 1073132718Skan (TARGET_ARCH64 \ 1074132718Skan && (FROM) == SImode \ 1075132718Skan && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ 1076132718Skan ? reg_classes_intersect_p (CLASS, FP_REGS) : 0) 1077132718Skan 107850397Sobrien/* The same information, inverted: 107950397Sobrien Return the class number of the smallest class containing 108050397Sobrien reg number REGNO. This could be a conditional expression 108150397Sobrien or could index an array. */ 108250397Sobrien 108390075Sobrienextern enum reg_class sparc_regno_reg_class[FIRST_PSEUDO_REGISTER]; 108450397Sobrien 108550397Sobrien#define REGNO_REG_CLASS(REGNO) sparc_regno_reg_class[(REGNO)] 108650397Sobrien 1087117395Skan/* This is the order in which to allocate registers normally. 1088117395Skan 1089117395Skan We put %f0-%f7 last among the float registers, so as to make it more 109050397Sobrien likely that a pseudo-register which dies in the float return register 1091117395Skan area will get allocated to the float return register, thus saving a move 1092117395Skan instruction at the end of the function. 109350397Sobrien 1094117395Skan Similarly for integer return value registers. 1095117395Skan 1096117395Skan We know in this case that we will not end up with a leaf function. 1097117395Skan 1098132718Skan The register allocator is given the global and out registers first 1099117395Skan because these registers are call clobbered and thus less useful to 1100117395Skan global register allocation. 1101117395Skan 1102117395Skan Next we list the local and in registers. They are not call clobbered 1103117395Skan and thus very useful for global register allocation. We list the input 1104117395Skan registers before the locals so that it is more likely the incoming 1105117395Skan arguments received in those registers can just stay there and not be 1106117395Skan reloaded. */ 1107117395Skan 110850397Sobrien#define REG_ALLOC_ORDER \ 1109117395Skan{ 1, 2, 3, 4, 5, 6, 7, /* %g1-%g7 */ \ 1110117395Skan 13, 12, 11, 10, 9, 8, /* %o5-%o0 */ \ 1111117395Skan 15, /* %o7 */ \ 1112117395Skan 16, 17, 18, 19, 20, 21, 22, 23, /* %l0-%l7 */ \ 1113117395Skan 29, 28, 27, 26, 25, 24, 31, /* %i5-%i0,%i7 */\ 111450397Sobrien 40, 41, 42, 43, 44, 45, 46, 47, /* %f8-%f15 */ \ 111550397Sobrien 48, 49, 50, 51, 52, 53, 54, 55, /* %f16-%f23 */ \ 111650397Sobrien 56, 57, 58, 59, 60, 61, 62, 63, /* %f24-%f31 */ \ 111750397Sobrien 64, 65, 66, 67, 68, 69, 70, 71, /* %f32-%f39 */ \ 111850397Sobrien 72, 73, 74, 75, 76, 77, 78, 79, /* %f40-%f47 */ \ 111950397Sobrien 80, 81, 82, 83, 84, 85, 86, 87, /* %f48-%f55 */ \ 112050397Sobrien 88, 89, 90, 91, 92, 93, 94, 95, /* %f56-%f63 */ \ 1121117395Skan 39, 38, 37, 36, 35, 34, 33, 32, /* %f7-%f0 */ \ 1122117395Skan 96, 97, 98, 99, /* %fcc0-3 */ \ 1123117395Skan 100, 0, 14, 30, 101} /* %icc, %g0, %o6, %i6, %sfp */ 112450397Sobrien 112550397Sobrien/* This is the order in which to allocate registers for 1126117395Skan leaf functions. If all registers can fit in the global and 1127117395Skan output registers, then we have the possibility of having a leaf 1128117395Skan function. 112950397Sobrien 1130117395Skan The macro actually mentioned the input registers first, 1131117395Skan because they get renumbered into the output registers once 1132117395Skan we know really do have a leaf function. 1133117395Skan 1134117395Skan To be more precise, this register allocation order is used 1135117395Skan when %o7 is found to not be clobbered right before register 1136117395Skan allocation. Normally, the reason %o7 would be clobbered is 1137117395Skan due to a call which could not be transformed into a sibling 1138117395Skan call. 1139117395Skan 1140117395Skan As a consequence, it is possible to use the leaf register 1141117395Skan allocation order and not end up with a leaf function. We will 1142117395Skan not get suboptimal register allocation in that case because by 1143117395Skan definition of being potentially leaf, there were no function 1144117395Skan calls. Therefore, allocation order within the local register 1145117395Skan window is not critical like it is when we do have function calls. */ 1146117395Skan 114750397Sobrien#define REG_LEAF_ALLOC_ORDER \ 1148117395Skan{ 1, 2, 3, 4, 5, 6, 7, /* %g1-%g7 */ \ 1149117395Skan 29, 28, 27, 26, 25, 24, /* %i5-%i0 */ \ 1150117395Skan 15, /* %o7 */ \ 1151117395Skan 13, 12, 11, 10, 9, 8, /* %o5-%o0 */ \ 1152117395Skan 16, 17, 18, 19, 20, 21, 22, 23, /* %l0-%l7 */ \ 1153117395Skan 40, 41, 42, 43, 44, 45, 46, 47, /* %f8-%f15 */ \ 1154117395Skan 48, 49, 50, 51, 52, 53, 54, 55, /* %f16-%f23 */ \ 1155117395Skan 56, 57, 58, 59, 60, 61, 62, 63, /* %f24-%f31 */ \ 1156117395Skan 64, 65, 66, 67, 68, 69, 70, 71, /* %f32-%f39 */ \ 1157117395Skan 72, 73, 74, 75, 76, 77, 78, 79, /* %f40-%f47 */ \ 1158117395Skan 80, 81, 82, 83, 84, 85, 86, 87, /* %f48-%f55 */ \ 1159117395Skan 88, 89, 90, 91, 92, 93, 94, 95, /* %f56-%f63 */ \ 1160117395Skan 39, 38, 37, 36, 35, 34, 33, 32, /* %f7-%f0 */ \ 1161117395Skan 96, 97, 98, 99, /* %fcc0-3 */ \ 1162117395Skan 100, 0, 14, 30, 31, 101} /* %icc, %g0, %o6, %i6, %i7, %sfp */ 1163117395Skan 116450397Sobrien#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc () 116550397Sobrien 116690075Sobrienextern char sparc_leaf_regs[]; 116790075Sobrien#define LEAF_REGISTERS sparc_leaf_regs 116850397Sobrien 116996263Sobrienextern char leaf_reg_remap[]; 117050397Sobrien#define LEAF_REG_REMAP(REGNO) (leaf_reg_remap[REGNO]) 117150397Sobrien 117250397Sobrien/* The class value for index registers, and the one for base regs. */ 117350397Sobrien#define INDEX_REG_CLASS GENERAL_REGS 117450397Sobrien#define BASE_REG_CLASS GENERAL_REGS 117550397Sobrien 117650397Sobrien/* Local macro to handle the two v9 classes of FP regs. */ 117750397Sobrien#define FP_REG_CLASS_P(CLASS) ((CLASS) == FP_REGS || (CLASS) == EXTRA_FP_REGS) 117850397Sobrien 117950397Sobrien/* Get reg_class from a letter such as appears in the machine description. 118050397Sobrien In the not-v9 case, coerce v9's 'e' class to 'f', so we can use 'e' in the 118150397Sobrien .md file for v8 and v9. 118250397Sobrien 'd' and 'b' are used for single and double precision VIS operations, 118350397Sobrien if TARGET_VIS. 118490075Sobrien 'h' is used for V8+ 64 bit global and out registers. */ 118550397Sobrien 118650397Sobrien#define REG_CLASS_FROM_LETTER(C) \ 118750397Sobrien(TARGET_V9 \ 118850397Sobrien ? ((C) == 'f' ? FP_REGS \ 118950397Sobrien : (C) == 'e' ? EXTRA_FP_REGS \ 119050397Sobrien : (C) == 'c' ? FPCC_REGS \ 119150397Sobrien : ((C) == 'd' && TARGET_VIS) ? FP_REGS\ 119250397Sobrien : ((C) == 'b' && TARGET_VIS) ? EXTRA_FP_REGS\ 119350397Sobrien : ((C) == 'h' && TARGET_V8PLUS) ? I64_REGS\ 119450397Sobrien : NO_REGS) \ 119550397Sobrien : ((C) == 'f' ? FP_REGS \ 119650397Sobrien : (C) == 'e' ? FP_REGS \ 119750397Sobrien : (C) == 'c' ? FPCC_REGS \ 119850397Sobrien : NO_REGS)) 119950397Sobrien 1200169689Skan/* The letters I, J, K, L, M, N, O, P in a register constraint string 1201169689Skan can be used to stand for particular ranges of CONST_INTs. 120250397Sobrien This macro defines what the ranges are. 120350397Sobrien C is the letter, and VALUE is a constant value. 120450397Sobrien Return 1 if VALUE is in the range specified by C. 120550397Sobrien 120650397Sobrien `I' is used for the range of constants an insn can actually contain. 120750397Sobrien `J' is used for the range which is just zero (since that is R0). 120850397Sobrien `K' is used for constants which can be loaded with a single sethi insn. 120950397Sobrien `L' is used for the range of constants supported by the movcc insns. 121096263Sobrien `M' is used for the range of constants supported by the movrcc insns. 1211117395Skan `N' is like K, but for constants wider than 32 bits. 1212169689Skan `O' is used for the range which is just 4096. 1213169689Skan `P' is free. */ 121450397Sobrien 1215169689Skan/* Predicates for 10-bit, 11-bit and 13-bit signed constants. */ 121650397Sobrien#define SPARC_SIMM10_P(X) ((unsigned HOST_WIDE_INT) (X) + 0x200 < 0x400) 121750397Sobrien#define SPARC_SIMM11_P(X) ((unsigned HOST_WIDE_INT) (X) + 0x400 < 0x800) 121850397Sobrien#define SPARC_SIMM13_P(X) ((unsigned HOST_WIDE_INT) (X) + 0x1000 < 0x2000) 1219169689Skan 1220169689Skan/* 10- and 11-bit immediates are only used for a few specific insns. 122150397Sobrien SMALL_INT is used throughout the port so we continue to use it. */ 122250397Sobrien#define SMALL_INT(X) (SPARC_SIMM13_P (INTVAL (X))) 1223169689Skan 1224169689Skan/* Predicate for constants that can be loaded with a sethi instruction. 1225169689Skan This is the general, 64-bit aware, bitwise version that ensures that 1226169689Skan only constants whose representation fits in the mask 1227169689Skan 1228169689Skan 0x00000000fffffc00 1229169689Skan 1230169689Skan are accepted. It will reject, for example, negative SImode constants 1231169689Skan on 64-bit hosts, so correct handling is to mask the value beforehand 1232169689Skan according to the mode of the instruction. */ 123350397Sobrien#define SPARC_SETHI_P(X) \ 123496263Sobrien (((unsigned HOST_WIDE_INT) (X) \ 123596263Sobrien & ((unsigned HOST_WIDE_INT) 0x3ff - GET_MODE_MASK (SImode) - 1)) == 0) 1236169689Skan 1237169689Skan/* Version of the above predicate for SImode constants and below. */ 123896263Sobrien#define SPARC_SETHI32_P(X) \ 123996263Sobrien (SPARC_SETHI_P ((unsigned HOST_WIDE_INT) (X) & GET_MODE_MASK (SImode))) 124050397Sobrien 124150397Sobrien#define CONST_OK_FOR_LETTER_P(VALUE, C) \ 124250397Sobrien ((C) == 'I' ? SPARC_SIMM13_P (VALUE) \ 124350397Sobrien : (C) == 'J' ? (VALUE) == 0 \ 124496263Sobrien : (C) == 'K' ? SPARC_SETHI32_P (VALUE) \ 124550397Sobrien : (C) == 'L' ? SPARC_SIMM11_P (VALUE) \ 124650397Sobrien : (C) == 'M' ? SPARC_SIMM10_P (VALUE) \ 124796263Sobrien : (C) == 'N' ? SPARC_SETHI_P (VALUE) \ 1248117395Skan : (C) == 'O' ? (VALUE) == 4096 \ 124950397Sobrien : 0) 125050397Sobrien 1251169689Skan/* Similar, but for CONST_DOUBLEs, and defining letters G and H. 125250397Sobrien Here VALUE is the CONST_DOUBLE rtx itself. */ 125350397Sobrien 125450397Sobrien#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 1255169689Skan ((C) == 'G' ? const_zero_operand (VALUE, GET_MODE (VALUE)) \ 125690075Sobrien : (C) == 'H' ? arith_double_operand (VALUE, DImode) \ 125750397Sobrien : 0) 125850397Sobrien 125950397Sobrien/* Given an rtx X being reloaded into a reg required to be 126050397Sobrien in class CLASS, return the class of reg to actually use. 126150397Sobrien In general this is just CLASS; but on some machines 126250397Sobrien in some cases it is preferable to use a more restrictive class. */ 126390075Sobrien/* - We can't load constants into FP registers. 126490075Sobrien - We can't load FP constants into integer registers when soft-float, 126590075Sobrien because there is no soft-float pattern with a r/F constraint. 126690075Sobrien - We can't load FP constants into integer registers for TFmode unless 126790075Sobrien it is 0.0L, because there is no movtf pattern with a r/F constraint. 126852284Sobrien - Try and reload integer constants (symbolic or otherwise) back into 126952284Sobrien registers directly, rather than having them dumped to memory. */ 127052284Sobrien 127150397Sobrien#define PREFERRED_RELOAD_CLASS(X,CLASS) \ 127250397Sobrien (CONSTANT_P (X) \ 127352284Sobrien ? ((FP_REG_CLASS_P (CLASS) \ 1274102780Skan || (CLASS) == GENERAL_OR_FP_REGS \ 1275102780Skan || (CLASS) == GENERAL_OR_EXTRA_FP_REGS \ 127650397Sobrien || (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ 127790075Sobrien && ! TARGET_FPU) \ 127890075Sobrien || (GET_MODE (X) == TFmode \ 1279169689Skan && ! const_zero_operand (X, TFmode))) \ 128052284Sobrien ? NO_REGS \ 128152284Sobrien : (!FP_REG_CLASS_P (CLASS) \ 128252284Sobrien && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \ 128352284Sobrien ? GENERAL_REGS \ 128452284Sobrien : (CLASS)) \ 128552284Sobrien : (CLASS)) 128650397Sobrien 128750397Sobrien/* Return the register class of a scratch register needed to load IN into 128850397Sobrien a register of class CLASS in MODE. 128950397Sobrien 129052284Sobrien We need a temporary when loading/storing a HImode/QImode value 129150397Sobrien between memory and the FPU registers. This can happen when combine puts 129296263Sobrien a paradoxical subreg in a float/fix conversion insn. 129350397Sobrien 129496263Sobrien We need a temporary when loading/storing a DFmode value between 129596263Sobrien unaligned memory and the upper FPU registers. */ 129696263Sobrien 129750397Sobrien#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \ 129852284Sobrien ((FP_REG_CLASS_P (CLASS) \ 129952284Sobrien && ((MODE) == HImode || (MODE) == QImode) \ 130050397Sobrien && (GET_CODE (IN) == MEM \ 130152284Sobrien || ((GET_CODE (IN) == REG || GET_CODE (IN) == SUBREG) \ 130252284Sobrien && true_regnum (IN) == -1))) \ 130352284Sobrien ? GENERAL_REGS \ 130496263Sobrien : ((CLASS) == EXTRA_FP_REGS && (MODE) == DFmode \ 130596263Sobrien && GET_CODE (IN) == MEM && TARGET_ARCH32 \ 130696263Sobrien && ! mem_min_alignment ((IN), 8)) \ 130796263Sobrien ? FP_REGS \ 130896263Sobrien : (((TARGET_CM_MEDANY \ 130996263Sobrien && symbolic_operand ((IN), (MODE))) \ 131096263Sobrien || (TARGET_CM_EMBMEDANY \ 131196263Sobrien && text_segment_operand ((IN), (MODE)))) \ 131296263Sobrien && !flag_pic) \ 131396263Sobrien ? GENERAL_REGS \ 131496263Sobrien : NO_REGS) 131550397Sobrien 131650397Sobrien#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, IN) \ 131796263Sobrien ((FP_REG_CLASS_P (CLASS) \ 131852284Sobrien && ((MODE) == HImode || (MODE) == QImode) \ 131952284Sobrien && (GET_CODE (IN) == MEM \ 132052284Sobrien || ((GET_CODE (IN) == REG || GET_CODE (IN) == SUBREG) \ 132152284Sobrien && true_regnum (IN) == -1))) \ 132296263Sobrien ? GENERAL_REGS \ 132396263Sobrien : ((CLASS) == EXTRA_FP_REGS && (MODE) == DFmode \ 132496263Sobrien && GET_CODE (IN) == MEM && TARGET_ARCH32 \ 132596263Sobrien && ! mem_min_alignment ((IN), 8)) \ 132696263Sobrien ? FP_REGS \ 132796263Sobrien : (((TARGET_CM_MEDANY \ 132896263Sobrien && symbolic_operand ((IN), (MODE))) \ 132996263Sobrien || (TARGET_CM_EMBMEDANY \ 133096263Sobrien && text_segment_operand ((IN), (MODE)))) \ 133196263Sobrien && !flag_pic) \ 133296263Sobrien ? GENERAL_REGS \ 133396263Sobrien : NO_REGS) 133450397Sobrien 1335117395Skan/* On SPARC it is not possible to directly move data between 133650397Sobrien GENERAL_REGS and FP_REGS. */ 133750397Sobrien#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ 133850397Sobrien (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2)) 133950397Sobrien 134050397Sobrien/* Return the stack location to use for secondary memory needed reloads. 134150397Sobrien We want to use the reserved location just below the frame pointer. 134250397Sobrien However, we must ensure that there is a frame, so use assign_stack_local 134350397Sobrien if the frame size is zero. */ 134450397Sobrien#define SECONDARY_MEMORY_NEEDED_RTX(MODE) \ 134550397Sobrien (get_frame_size () == 0 \ 134650397Sobrien ? assign_stack_local (MODE, GET_MODE_SIZE (MODE), 0) \ 134790075Sobrien : gen_rtx_MEM (MODE, plus_constant (frame_pointer_rtx, \ 134890075Sobrien STARTING_FRAME_OFFSET))) 134950397Sobrien 135050397Sobrien/* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on v9 135150397Sobrien because the movsi and movsf patterns don't handle r/f moves. 135250397Sobrien For v8 we copy the default definition. */ 135350397Sobrien#define SECONDARY_MEMORY_NEEDED_MODE(MODE) \ 135450397Sobrien (TARGET_ARCH64 \ 135550397Sobrien ? (GET_MODE_BITSIZE (MODE) < 32 \ 135650397Sobrien ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \ 135750397Sobrien : MODE) \ 135850397Sobrien : (GET_MODE_BITSIZE (MODE) < BITS_PER_WORD \ 135950397Sobrien ? mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0) \ 136050397Sobrien : MODE)) 136150397Sobrien 136250397Sobrien/* Return the maximum number of consecutive registers 136350397Sobrien needed to represent mode MODE in a register of class CLASS. */ 136450397Sobrien/* On SPARC, this is the size of MODE in words. */ 136550397Sobrien#define CLASS_MAX_NREGS(CLASS, MODE) \ 136650397Sobrien (FP_REG_CLASS_P (CLASS) ? (GET_MODE_SIZE (MODE) + 3) / 4 \ 136750397Sobrien : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 136850397Sobrien 136950397Sobrien/* Stack layout; function entry, exit and calling. */ 137050397Sobrien 137150397Sobrien/* Define this if pushing a word on the stack 137250397Sobrien makes the stack pointer a smaller address. */ 137350397Sobrien#define STACK_GROWS_DOWNWARD 137450397Sobrien 1375169689Skan/* Define this to nonzero if the nominal address of the stack frame 137650397Sobrien is at the high-address end of the local variables; 137750397Sobrien that is, each additional local variable allocated 137850397Sobrien goes at a more negative offset in the frame. */ 1379169689Skan#define FRAME_GROWS_DOWNWARD 1 138050397Sobrien 138150397Sobrien/* Offset within stack frame to start allocating local variables at. 138250397Sobrien If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 138350397Sobrien first local allocated. Otherwise, it is the offset to the BEGINNING 138450397Sobrien of the first local allocated. */ 1385169689Skan/* This allows space for one TFmode floating point value, which is used 1386169689Skan by SECONDARY_MEMORY_NEEDED_RTX. */ 138750397Sobrien#define STARTING_FRAME_OFFSET \ 138896263Sobrien (TARGET_ARCH64 ? -16 \ 138950397Sobrien : (-SPARC_STACK_ALIGN (LONG_DOUBLE_TYPE_SIZE / BITS_PER_UNIT))) 139050397Sobrien 139150397Sobrien/* Offset of first parameter from the argument pointer register value. 139250397Sobrien !v9: This is 64 for the ins and locals, plus 4 for the struct-return reg 139350397Sobrien even if this function isn't going to use it. 139450397Sobrien v9: This is 128 for the ins and locals. */ 139550397Sobrien#define FIRST_PARM_OFFSET(FNDECL) \ 139696263Sobrien (TARGET_ARCH64 ? 16 * UNITS_PER_WORD : STRUCT_VALUE_OFFSET + UNITS_PER_WORD) 139750397Sobrien 139890075Sobrien/* Offset from the argument pointer register value to the CFA. 139990075Sobrien This is different from FIRST_PARM_OFFSET because the register window 140090075Sobrien comes between the CFA and the arguments. */ 140196263Sobrien#define ARG_POINTER_CFA_OFFSET(FNDECL) 0 140252284Sobrien 140350397Sobrien/* When a parameter is passed in a register, stack space is still 140450397Sobrien allocated for it. 140550397Sobrien !v9: All 6 possible integer registers have backing store allocated. 140690075Sobrien v9: Only space for the arguments passed is allocated. */ 140750397Sobrien/* ??? Ideally, we'd use zero here (as the minimum), but zero has special 140850397Sobrien meaning to the backend. Further, we need to be able to detect if a 140950397Sobrien varargs/unprototyped function is called, as they may want to spill more 141050397Sobrien registers than we've provided space. Ugly, ugly. So for now we retain 141150397Sobrien all 6 slots even for v9. */ 141250397Sobrien#define REG_PARM_STACK_SPACE(DECL) (6 * UNITS_PER_WORD) 141350397Sobrien 141496263Sobrien/* Definitions for register elimination. */ 1415117395Skan 141696263Sobrien#define ELIMINABLE_REGS \ 141796263Sobrien {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 141896263Sobrien { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM} } 141996263Sobrien 142096263Sobrien/* The way this is structured, we can't eliminate SFP in favor of SP 142196263Sobrien if the frame pointer is required: we want to use the SFP->HFP elimination 142296263Sobrien in that case. But the test in update_eliminables doesn't know we are 142396263Sobrien assuming below that we only do the former elimination. */ 142496263Sobrien#define CAN_ELIMINATE(FROM, TO) \ 142596263Sobrien ((TO) == HARD_FRAME_POINTER_REGNUM || !FRAME_POINTER_REQUIRED) 142696263Sobrien 1427169689Skan/* We always pretend that this is a leaf function because if it's not, 1428169689Skan there's no point in trying to eliminate the frame pointer. If it 1429169689Skan is a leaf function, we guessed right! */ 1430169689Skan#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 1431169689Skan do { \ 1432169689Skan if ((TO) == STACK_POINTER_REGNUM) \ 1433169689Skan (OFFSET) = sparc_compute_frame_size (get_frame_size (), 1); \ 1434169689Skan else \ 1435169689Skan (OFFSET) = 0; \ 1436169689Skan (OFFSET) += SPARC_STACK_BIAS; \ 143796263Sobrien } while (0) 143896263Sobrien 143950397Sobrien/* Keep the stack pointer constant throughout the function. 144050397Sobrien This is both an optimization and a necessity: longjmp 144150397Sobrien doesn't behave itself when the stack pointer moves within 144250397Sobrien the function! */ 144390075Sobrien#define ACCUMULATE_OUTGOING_ARGS 1 144450397Sobrien 144550397Sobrien/* Value is the number of bytes of arguments automatically 144650397Sobrien popped when returning from a subroutine call. 144750397Sobrien FUNDECL is the declaration node of the function (as a tree), 144850397Sobrien FUNTYPE is the data type of the function (as a tree), 144950397Sobrien or for a library call it is an identifier node for the subroutine name. 145050397Sobrien SIZE is the number of bytes of arguments passed on the stack. */ 145150397Sobrien 145250397Sobrien#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 145350397Sobrien 145450397Sobrien/* Define this macro if the target machine has "register windows". This 145550397Sobrien C expression returns the register number as seen by the called function 145650397Sobrien corresponding to register number OUT as seen by the calling function. 145750397Sobrien Return OUT if register number OUT is not an outbound register. */ 145850397Sobrien 145950397Sobrien#define INCOMING_REGNO(OUT) \ 1460169689Skan (((OUT) < 8 || (OUT) > 15) ? (OUT) : (OUT) + 16) 146150397Sobrien 146250397Sobrien/* Define this macro if the target machine has "register windows". This 146350397Sobrien C expression returns the register number as seen by the calling function 146450397Sobrien corresponding to register number IN as seen by the called function. 146550397Sobrien Return IN if register number IN is not an inbound register. */ 146650397Sobrien 146750397Sobrien#define OUTGOING_REGNO(IN) \ 1468169689Skan (((IN) < 24 || (IN) > 31) ? (IN) : (IN) - 16) 146950397Sobrien 147090075Sobrien/* Define this macro if the target machine has register windows. This 147190075Sobrien C expression returns true if the register is call-saved but is in the 147290075Sobrien register window. */ 147390075Sobrien 147490075Sobrien#define LOCAL_REGNO(REGNO) \ 1475169689Skan ((REGNO) >= 16 && (REGNO) <= 31) 147690075Sobrien 147750397Sobrien/* Define how to find the value returned by a function. 147850397Sobrien VALTYPE is the data type of the value (as a tree). 147950397Sobrien If the precise function being called is known, FUNC is its FUNCTION_DECL; 148050397Sobrien otherwise, FUNC is 0. */ 148150397Sobrien 148250397Sobrien/* On SPARC the value is found in the first "output" register. */ 148350397Sobrien 148450397Sobrien#define FUNCTION_VALUE(VALTYPE, FUNC) \ 148550397Sobrien function_value ((VALTYPE), TYPE_MODE (VALTYPE), 1) 148650397Sobrien 148750397Sobrien/* But the called function leaves it in the first "input" register. */ 148850397Sobrien 148950397Sobrien#define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \ 149050397Sobrien function_value ((VALTYPE), TYPE_MODE (VALTYPE), 0) 149150397Sobrien 149250397Sobrien/* Define how to find the value returned by a library function 149350397Sobrien assuming the value has mode MODE. */ 149450397Sobrien 149550397Sobrien#define LIBCALL_VALUE(MODE) \ 149650397Sobrien function_value (NULL_TREE, (MODE), 1) 149750397Sobrien 149850397Sobrien/* 1 if N is a possible register number for a function value 149950397Sobrien as seen by the caller. 150050397Sobrien On SPARC, the first "output" reg is used for integer values, 150150397Sobrien and the first floating point register is used for floating point values. */ 150250397Sobrien 150350397Sobrien#define FUNCTION_VALUE_REGNO_P(N) ((N) == 8 || (N) == 32) 150450397Sobrien 150550397Sobrien/* Define the size of space to allocate for the return value of an 150650397Sobrien untyped_call. */ 150750397Sobrien 1508169689Skan#define APPLY_RESULT_SIZE (TARGET_ARCH64 ? 24 : 16) 150950397Sobrien 151050397Sobrien/* 1 if N is a possible register number for function argument passing. 151150397Sobrien On SPARC, these are the "output" registers. v9 also uses %f0-%f31. */ 151250397Sobrien 151350397Sobrien#define FUNCTION_ARG_REGNO_P(N) \ 151450397Sobrien(TARGET_ARCH64 \ 151550397Sobrien ? (((N) >= 8 && (N) <= 13) || ((N) >= 32 && (N) <= 63)) \ 151650397Sobrien : ((N) >= 8 && (N) <= 13)) 151750397Sobrien 151850397Sobrien/* Define a data type for recording info about an argument list 151950397Sobrien during the scan of that argument list. This data type should 152050397Sobrien hold all necessary information about the function itself 152150397Sobrien and about the args processed so far, enough to enable macros 152250397Sobrien such as FUNCTION_ARG to determine where the next arg should go. 152350397Sobrien 152450397Sobrien On SPARC (!v9), this is a single integer, which is a number of words 152550397Sobrien of arguments scanned so far (including the invisible argument, 152650397Sobrien if any, which holds the structure-value-address). 152750397Sobrien Thus 7 or more means all following args should go on the stack. 152850397Sobrien 152950397Sobrien For v9, we also need to know whether a prototype is present. */ 153050397Sobrien 153150397Sobrienstruct sparc_args { 153250397Sobrien int words; /* number of words passed so far */ 1533117395Skan int prototype_p; /* nonzero if a prototype is present */ 1534117395Skan int libcall_p; /* nonzero if a library call */ 153550397Sobrien}; 153650397Sobrien#define CUMULATIVE_ARGS struct sparc_args 153750397Sobrien 153850397Sobrien/* Initialize a variable CUM of type CUMULATIVE_ARGS 153950397Sobrien for a call to a function whose data type is FNTYPE. 154050397Sobrien For a library call, FNTYPE is 0. */ 154150397Sobrien 1542132718Skan#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 1543132718Skaninit_cumulative_args (& (CUM), (FNTYPE), (LIBNAME), (FNDECL)); 154450397Sobrien 154550397Sobrien/* Update the data in CUM to advance over an argument 154650397Sobrien of mode MODE and data type TYPE. 154750397Sobrien TYPE is null for libcalls where that information may not be available. */ 154850397Sobrien 154950397Sobrien#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 155050397Sobrienfunction_arg_advance (& (CUM), (MODE), (TYPE), (NAMED)) 155150397Sobrien 155250397Sobrien/* Determine where to put an argument to a function. 155350397Sobrien Value is zero to push the argument on the stack, 155450397Sobrien or a hard register in which to store the argument. 155550397Sobrien 155650397Sobrien MODE is the argument's machine mode. 155750397Sobrien TYPE is the data type of the argument (as a tree). 155850397Sobrien This is null for libcalls where that information may 155950397Sobrien not be available. 156050397Sobrien CUM is a variable of type CUMULATIVE_ARGS which gives info about 156150397Sobrien the preceding args and about the function being called. 156250397Sobrien NAMED is nonzero if this argument is a named parameter 156350397Sobrien (otherwise it is an extra parameter matching an ellipsis). */ 156450397Sobrien 156550397Sobrien#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 156650397Sobrienfunction_arg (& (CUM), (MODE), (TYPE), (NAMED), 0) 156750397Sobrien 156850397Sobrien/* Define where a function finds its arguments. 156950397Sobrien This is different from FUNCTION_ARG because of register windows. */ 157050397Sobrien 157150397Sobrien#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ 157250397Sobrienfunction_arg (& (CUM), (MODE), (TYPE), (NAMED), 1) 157350397Sobrien 157450397Sobrien/* If defined, a C expression which determines whether, and in which direction, 157550397Sobrien to pad out an argument with extra space. The value should be of type 157650397Sobrien `enum direction': either `upward' to pad above the argument, 157750397Sobrien `downward' to pad below, or `none' to inhibit padding. */ 157850397Sobrien 157950397Sobrien#define FUNCTION_ARG_PADDING(MODE, TYPE) \ 158050397Sobrienfunction_arg_padding ((MODE), (TYPE)) 158150397Sobrien 158250397Sobrien/* If defined, a C expression that gives the alignment boundary, in bits, 158350397Sobrien of an argument with the specified mode and type. If it is not defined, 158450397Sobrien PARM_BOUNDARY is used for all arguments. 158550397Sobrien For sparc64, objects requiring 16 byte alignment are passed that way. */ 158650397Sobrien 158750397Sobrien#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 158850397Sobrien((TARGET_ARCH64 \ 158950397Sobrien && (GET_MODE_ALIGNMENT (MODE) == 128 \ 159050397Sobrien || ((TYPE) && TYPE_ALIGN (TYPE) == 128))) \ 159150397Sobrien ? 128 : PARM_BOUNDARY) 159250397Sobrien 159350397Sobrien/* Define the information needed to generate branch and scc insns. This is 159450397Sobrien stored from the compare operation. Note that we can't use "rtx" here 159550397Sobrien since it hasn't been defined! */ 159650397Sobrien 1597117395Skanextern GTY(()) rtx sparc_compare_op0; 1598117395Skanextern GTY(()) rtx sparc_compare_op1; 1599169689Skanextern GTY(()) rtx sparc_compare_emitted; 160050397Sobrien 160150397Sobrien 160250397Sobrien/* Generate the special assembly code needed to tell the assembler whatever 160350397Sobrien it might need to know about the return value of a function. 160450397Sobrien 1605117395Skan For SPARC assemblers, we need to output a .proc pseudo-op which conveys 160650397Sobrien information to the assembler relating to peephole optimization (done in 160750397Sobrien the assembler). */ 160850397Sobrien 160950397Sobrien#define ASM_DECLARE_RESULT(FILE, RESULT) \ 161050397Sobrien fprintf ((FILE), "\t.proc\t0%lo\n", sparc_type_code (TREE_TYPE (RESULT))) 161150397Sobrien 161290075Sobrien/* Output the special assembly code needed to tell the assembler some 1613117395Skan register is used as global register variable. 161450397Sobrien 161590075Sobrien SPARC 64bit psABI declares registers %g2 and %g3 as application 161690075Sobrien registers and %g6 and %g7 as OS registers. Any object using them 161790075Sobrien should declare (for %g2/%g3 has to, for %g6/%g7 can) that it uses them 161890075Sobrien and how they are used (scratch or some global variable). 161990075Sobrien Linker will then refuse to link together objects which use those 162090075Sobrien registers incompatibly. 162150397Sobrien 162290075Sobrien Unless the registers are used for scratch, two different global 162390075Sobrien registers cannot be declared to the same name, so in the unlikely 162490075Sobrien case of a global register variable occupying more than one register 162590075Sobrien we prefix the second and following registers with .gnu.part1. etc. */ 162650397Sobrien 1627161651Skanextern GTY(()) char sparc_hard_reg_printed[8]; 162850397Sobrien 162990075Sobrien#ifdef HAVE_AS_REGISTER_PSEUDO_OP 163090075Sobrien#define ASM_DECLARE_REGISTER_GLOBAL(FILE, DECL, REGNO, NAME) \ 163190075Sobriendo { \ 163290075Sobrien if (TARGET_ARCH64) \ 163390075Sobrien { \ 163490075Sobrien int end = HARD_REGNO_NREGS ((REGNO), DECL_MODE (decl)) + (REGNO); \ 163590075Sobrien int reg; \ 163690075Sobrien for (reg = (REGNO); reg < 8 && reg < end; reg++) \ 163790075Sobrien if ((reg & ~1) == 2 || (reg & ~1) == 6) \ 163890075Sobrien { \ 163990075Sobrien if (reg == (REGNO)) \ 164090075Sobrien fprintf ((FILE), "\t.register\t%%g%d, %s\n", reg, (NAME)); \ 164190075Sobrien else \ 164290075Sobrien fprintf ((FILE), "\t.register\t%%g%d, .gnu.part%d.%s\n", \ 164390075Sobrien reg, reg - (REGNO), (NAME)); \ 164490075Sobrien sparc_hard_reg_printed[reg] = 1; \ 164590075Sobrien } \ 164690075Sobrien } \ 164790075Sobrien} while (0) 164890075Sobrien#endif 164950397Sobrien 165050397Sobrien 165196263Sobrien/* Emit rtl for profiling. */ 165296263Sobrien#define PROFILE_HOOK(LABEL) sparc_profile_hook (LABEL) 165350397Sobrien 165496263Sobrien/* All the work done in PROFILE_HOOK, but still required. */ 165596263Sobrien#define FUNCTION_PROFILER(FILE, LABELNO) do { } while (0) 165650397Sobrien 165752284Sobrien/* Set the name of the mcount function for the system. */ 165852284Sobrien#define MCOUNT_FUNCTION "*mcount" 165950397Sobrien 166050397Sobrien/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 166150397Sobrien the stack pointer does not matter. The value is tested only in 166250397Sobrien functions that have frame pointers. 166350397Sobrien No definition is equivalent to always zero. */ 166450397Sobrien 166550397Sobrien#define EXIT_IGNORE_STACK \ 166650397Sobrien (get_frame_size () != 0 \ 166750397Sobrien || current_function_calls_alloca || current_function_outgoing_args_size) 166850397Sobrien 166950397Sobrien/* Define registers used by the epilogue and return instruction. */ 1670169689Skan#define EPILOGUE_USES(REGNO) ((REGNO) == 31 \ 1671169689Skan || (current_function_calls_eh_return && (REGNO) == 1)) 167250397Sobrien 167350397Sobrien/* Length in units of the trampoline for entering a nested function. */ 167450397Sobrien 167550397Sobrien#define TRAMPOLINE_SIZE (TARGET_ARCH64 ? 32 : 16) 167650397Sobrien 167750397Sobrien#define TRAMPOLINE_ALIGNMENT 128 /* 16 bytes */ 167850397Sobrien 167950397Sobrien/* Emit RTL insns to initialize the variable parts of a trampoline. 168050397Sobrien FNADDR is an RTX for the address of the function's pure code. 168150397Sobrien CXT is an RTX for the static chain value for the function. */ 168250397Sobrien 168350397Sobrien#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 168450397Sobrien if (TARGET_ARCH64) \ 168550397Sobrien sparc64_initialize_trampoline (TRAMP, FNADDR, CXT); \ 168650397Sobrien else \ 168750397Sobrien sparc_initialize_trampoline (TRAMP, FNADDR, CXT) 168850397Sobrien 168990075Sobrien/* Implement `va_start' for varargs and stdarg. */ 1690117395Skan#define EXPAND_BUILTIN_VA_START(valist, nextarg) \ 1691117395Skan sparc_va_start (valist, nextarg) 169290075Sobrien 169350397Sobrien/* Generate RTL to flush the register windows so as to make arbitrary frames 169450397Sobrien available. */ 169550397Sobrien#define SETUP_FRAME_ADDRESSES() \ 169650397Sobrien emit_insn (gen_flush_register_windows ()) 169750397Sobrien 169850397Sobrien/* Given an rtx for the address of a frame, 169950397Sobrien return an rtx for the address of the word in the frame 1700169689Skan that holds the dynamic chain--the previous frame's address. */ 1701102780Skan#define DYNAMIC_CHAIN_ADDRESS(frame) \ 1702102780Skan plus_constant (frame, 14 * UNITS_PER_WORD + SPARC_STACK_BIAS) 170350397Sobrien 1704169689Skan/* Given an rtx for the frame pointer, 1705169689Skan return an rtx for the address of the frame. */ 1706169689Skan#define FRAME_ADDR_RTX(frame) plus_constant (frame, SPARC_STACK_BIAS) 1707169689Skan 170850397Sobrien/* The return address isn't on the stack, it is in a register, so we can't 170950397Sobrien access it from the current frame pointer. We can access it from the 171050397Sobrien previous frame pointer though by reading a value from the register window 171150397Sobrien save area. */ 171250397Sobrien#define RETURN_ADDR_IN_PREVIOUS_FRAME 171350397Sobrien 171450397Sobrien/* This is the offset of the return address to the true next instruction to be 171590075Sobrien executed for the current function. */ 171650397Sobrien#define RETURN_ADDR_OFFSET \ 171750397Sobrien (8 + 4 * (! TARGET_ARCH64 && current_function_returns_struct)) 171850397Sobrien 171950397Sobrien/* The current return address is in %i7. The return address of anything 172050397Sobrien farther back is in the register window save area at [%fp+60]. */ 172150397Sobrien/* ??? This ignores the fact that the actual return address is +8 for normal 172250397Sobrien returns, and +12 for structure returns. */ 172350397Sobrien#define RETURN_ADDR_RTX(count, frame) \ 172450397Sobrien ((count == -1) \ 172550397Sobrien ? gen_rtx_REG (Pmode, 31) \ 172650397Sobrien : gen_rtx_MEM (Pmode, \ 172790075Sobrien memory_address (Pmode, plus_constant (frame, \ 172896263Sobrien 15 * UNITS_PER_WORD \ 172996263Sobrien + SPARC_STACK_BIAS)))) 173050397Sobrien 173150397Sobrien/* Before the prologue, the return address is %o7 + 8. OK, sometimes it's 173250397Sobrien +12, but always using +8 is close enough for frame unwind purposes. 173350397Sobrien Actually, just using %o7 is close enough for unwinding, but %o7+8 173450397Sobrien is something you can return to. */ 173550397Sobrien#define INCOMING_RETURN_ADDR_RTX \ 173690075Sobrien plus_constant (gen_rtx_REG (word_mode, 15), 8) 173790075Sobrien#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (15) 173850397Sobrien 173950397Sobrien/* The offset from the incoming value of %sp to the top of the stack frame 174050397Sobrien for the current function. On sparc64, we have to account for the stack 174150397Sobrien bias if present. */ 174250397Sobrien#define INCOMING_FRAME_SP_OFFSET SPARC_STACK_BIAS 174350397Sobrien 174490075Sobrien/* Describe how we implement __builtin_eh_return. */ 174590075Sobrien#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 24 : INVALID_REGNUM) 174690075Sobrien#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 1) /* %g1 */ 174790075Sobrien#define EH_RETURN_HANDLER_RTX gen_rtx_REG (Pmode, 31) /* %i7 */ 174890075Sobrien 174990075Sobrien/* Select a format to encode pointers in exception handling data. CODE 175090075Sobrien is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is 175190075Sobrien true if the symbol may be affected by dynamic relocations. 175290075Sobrien 175390075Sobrien If assembler and linker properly support .uaword %r_disp32(foo), 175490075Sobrien then use PC relative 32-bit relocations instead of absolute relocs 175590075Sobrien for shared libraries. On sparc64, use pc relative 32-bit relocs even 175696263Sobrien for binaries, to save memory. 175796263Sobrien 175896263Sobrien binutils 2.12 would emit a R_SPARC_DISP32 dynamic relocation if the 175996263Sobrien symbol %r_disp32() is against was not local, but .hidden. In that 176096263Sobrien case, we have to use DW_EH_PE_absptr for pic personality. */ 176190075Sobrien#ifdef HAVE_AS_SPARC_UA_PCREL 176296263Sobrien#ifdef HAVE_AS_SPARC_UA_PCREL_HIDDEN 176390075Sobrien#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \ 176490075Sobrien (flag_pic \ 176590075Sobrien ? (GLOBAL ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4\ 176690075Sobrien : ((TARGET_ARCH64 && ! GLOBAL) \ 176790075Sobrien ? (DW_EH_PE_pcrel | DW_EH_PE_sdata4) \ 176890075Sobrien : DW_EH_PE_absptr)) 176996263Sobrien#else 177096263Sobrien#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \ 177196263Sobrien (flag_pic \ 177296263Sobrien ? (GLOBAL ? DW_EH_PE_absptr : (DW_EH_PE_pcrel | DW_EH_PE_sdata4)) \ 177396263Sobrien : ((TARGET_ARCH64 && ! GLOBAL) \ 177496263Sobrien ? (DW_EH_PE_pcrel | DW_EH_PE_sdata4) \ 177596263Sobrien : DW_EH_PE_absptr)) 177696263Sobrien#endif 177790075Sobrien 177890075Sobrien/* Emit a PC-relative relocation. */ 177990075Sobrien#define ASM_OUTPUT_DWARF_PCREL(FILE, SIZE, LABEL) \ 178090075Sobrien do { \ 178190075Sobrien fputs (integer_asm_op (SIZE, FALSE), FILE); \ 178290075Sobrien fprintf (FILE, "%%r_disp%d(", SIZE * 8); \ 178390075Sobrien assemble_name (FILE, LABEL); \ 178490075Sobrien fputc (')', FILE); \ 178590075Sobrien } while (0) 178690075Sobrien#endif 178750397Sobrien 178850397Sobrien/* Addressing modes, and classification of registers for them. */ 178950397Sobrien 179050397Sobrien/* Macros to check register numbers against specific register classes. */ 179150397Sobrien 179250397Sobrien/* These assume that REGNO is a hard or pseudo reg number. 179350397Sobrien They give nonzero only if REGNO is a hard reg of the suitable class 179450397Sobrien or a pseudo reg currently allocated to a suitable hard reg. 179550397Sobrien Since they use reg_renumber, they are safe only once reg_renumber 179650397Sobrien has been allocated, which happens in local-alloc.c. */ 179750397Sobrien 179850397Sobrien#define REGNO_OK_FOR_INDEX_P(REGNO) \ 179996263Sobrien((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < (unsigned)32 \ 180096263Sobrien || (REGNO) == FRAME_POINTER_REGNUM \ 180196263Sobrien || reg_renumber[REGNO] == FRAME_POINTER_REGNUM) 180296263Sobrien 180396263Sobrien#define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO) 180496263Sobrien 180550397Sobrien#define REGNO_OK_FOR_FP_P(REGNO) \ 180650397Sobrien (((unsigned) (REGNO) - 32 < (TARGET_V9 ? (unsigned)64 : (unsigned)32)) \ 180750397Sobrien || ((unsigned) reg_renumber[REGNO] - 32 < (TARGET_V9 ? (unsigned)64 : (unsigned)32))) 180850397Sobrien#define REGNO_OK_FOR_CCFP_P(REGNO) \ 180950397Sobrien (TARGET_V9 \ 181050397Sobrien && (((unsigned) (REGNO) - 96 < (unsigned)4) \ 181150397Sobrien || ((unsigned) reg_renumber[REGNO] - 96 < (unsigned)4))) 181250397Sobrien 181350397Sobrien/* Now macros that check whether X is a register and also, 181450397Sobrien strictly, whether it is in a specified class. 181550397Sobrien 181650397Sobrien These macros are specific to the SPARC, and may be used only 181750397Sobrien in code for printing assembler insns and in conditions for 181850397Sobrien define_optimization. */ 181950397Sobrien 182050397Sobrien/* 1 if X is an fp register. */ 182150397Sobrien 182250397Sobrien#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X))) 182350397Sobrien 182450397Sobrien/* Is X, a REG, an in or global register? i.e. is regno 0..7 or 24..31 */ 182550397Sobrien#define IN_OR_GLOBAL_P(X) (REGNO (X) < 8 || (REGNO (X) >= 24 && REGNO (X) <= 31)) 182650397Sobrien 182750397Sobrien/* Maximum number of registers that can appear in a valid memory address. */ 182850397Sobrien 182950397Sobrien#define MAX_REGS_PER_ADDRESS 2 183050397Sobrien 183150397Sobrien/* Recognize any constant value that is a valid address. 183250397Sobrien When PIC, we do not accept an address that would require a scratch reg 183350397Sobrien to load into a register. */ 183450397Sobrien 1835132718Skan#define CONSTANT_ADDRESS_P(X) constant_address_p (X) 183650397Sobrien 183750397Sobrien/* Define this, so that when PIC, reload won't try to reload invalid 183850397Sobrien addresses which require two reload registers. */ 183950397Sobrien 1840132718Skan#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X) 184150397Sobrien 184250397Sobrien/* Nonzero if the constant value X is a legitimate general operand. 184352284Sobrien Anything can be made to work except floating point constants. 184452284Sobrien If TARGET_VIS, 0.0 can be made to work as well. */ 184550397Sobrien 1846132718Skan#define LEGITIMATE_CONSTANT_P(X) legitimate_constant_p (X) 184750397Sobrien 184850397Sobrien/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 184950397Sobrien and check its validity for a certain class. 185050397Sobrien We have two alternate definitions for each of them. 185150397Sobrien The usual definition accepts all pseudo regs; the other rejects 185250397Sobrien them unless they have been allocated suitable hard regs. 185350397Sobrien The symbol REG_OK_STRICT causes the latter definition to be used. 185450397Sobrien 185550397Sobrien Most source files want to accept pseudo regs in the hope that 185650397Sobrien they will get allocated to the class that the insn wants them to be in. 185750397Sobrien Source files for reload pass need to be strict. 185850397Sobrien After reload, it makes no difference, since pseudo regs have 185950397Sobrien been eliminated by then. */ 186050397Sobrien 186152284Sobrien/* Optional extra constraints for this machine. 186250397Sobrien 186390075Sobrien 'Q' handles floating point constants which can be moved into 186490075Sobrien an integer register with a single sethi instruction. 186590075Sobrien 186690075Sobrien 'R' handles floating point constants which can be moved into 186790075Sobrien an integer register with a single mov instruction. 186890075Sobrien 186990075Sobrien 'S' handles floating point constants which can be moved into 187090075Sobrien an integer register using a high/lo_sum sequence. 187190075Sobrien 187252284Sobrien 'T' handles memory addresses where the alignment is known to 187352284Sobrien be at least 8 bytes. 187450397Sobrien 187552284Sobrien `U' handles all pseudo registers or a hard even numbered 187696263Sobrien integer register, needed for ldd/std instructions. 187750397Sobrien 187896263Sobrien 'W' handles the memory operand when moving operands in/out 1879169689Skan of 'e' constraint floating point registers. 188090075Sobrien 1881169689Skan 'Y' handles the zero vector constant. */ 1882169689Skan 188350397Sobrien#ifndef REG_OK_STRICT 188450397Sobrien 188550397Sobrien/* Nonzero if X is a hard reg that can be used as an index 188650397Sobrien or if it is a pseudo reg. */ 188750397Sobrien#define REG_OK_FOR_INDEX_P(X) \ 188896263Sobrien (REGNO (X) < 32 \ 188996263Sobrien || REGNO (X) == FRAME_POINTER_REGNUM \ 189096263Sobrien || REGNO (X) >= FIRST_PSEUDO_REGISTER) 189196263Sobrien 189250397Sobrien/* Nonzero if X is a hard reg that can be used as a base reg 189350397Sobrien or if it is a pseudo reg. */ 189496263Sobrien#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P (X) 189550397Sobrien 189696263Sobrien/* 'T', 'U' are for aligned memory loads which aren't needed for arch64. 189796263Sobrien 'W' is like 'T' but is assumed true on arch64. 189850397Sobrien 189996263Sobrien Remember to accept pseudo-registers for memory constraints if reload is 190096263Sobrien in progress. */ 190190075Sobrien 190296263Sobrien#define EXTRA_CONSTRAINT(OP, C) \ 190396263Sobrien sparc_extra_constraint_check(OP, C, 0) 190496263Sobrien 190550397Sobrien#else 190650397Sobrien 190750397Sobrien/* Nonzero if X is a hard reg that can be used as an index. */ 190850397Sobrien#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 190950397Sobrien/* Nonzero if X is a hard reg that can be used as a base reg. */ 191050397Sobrien#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 191150397Sobrien 191296263Sobrien#define EXTRA_CONSTRAINT(OP, C) \ 191396263Sobrien sparc_extra_constraint_check(OP, C, 1) 191490075Sobrien 191550397Sobrien#endif 191650397Sobrien 191790075Sobrien/* Should gcc use [%reg+%lo(xx)+offset] addresses? */ 191890075Sobrien 191990075Sobrien#ifdef HAVE_AS_OFFSETABLE_LO10 192090075Sobrien#define USE_AS_OFFSETABLE_LO10 1 192190075Sobrien#else 192290075Sobrien#define USE_AS_OFFSETABLE_LO10 0 192390075Sobrien#endif 192490075Sobrien 192550397Sobrien/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 192650397Sobrien that is a valid memory address for an instruction. 192750397Sobrien The MODE argument is the machine mode for the MEM expression 192850397Sobrien that wants to use this address. 192950397Sobrien 193050397Sobrien On SPARC, the actual legitimate addresses must be REG+REG or REG+SMALLINT 193150397Sobrien ordinarily. This changes a bit when generating PIC. 193250397Sobrien 193350397Sobrien If you change this, execute "rm explow.o recog.o reload.o". */ 193450397Sobrien 1935117395Skan#define SYMBOLIC_CONST(X) symbolic_operand (X, VOIDmode) 1936117395Skan 193750397Sobrien#define RTX_OK_FOR_BASE_P(X) \ 193850397Sobrien ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ 193950397Sobrien || (GET_CODE (X) == SUBREG \ 194050397Sobrien && GET_CODE (SUBREG_REG (X)) == REG \ 194150397Sobrien && REG_OK_FOR_BASE_P (SUBREG_REG (X)))) 194250397Sobrien 194350397Sobrien#define RTX_OK_FOR_INDEX_P(X) \ 194450397Sobrien ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \ 194550397Sobrien || (GET_CODE (X) == SUBREG \ 194650397Sobrien && GET_CODE (SUBREG_REG (X)) == REG \ 194750397Sobrien && REG_OK_FOR_INDEX_P (SUBREG_REG (X)))) 194850397Sobrien 194950397Sobrien#define RTX_OK_FOR_OFFSET_P(X) \ 195090075Sobrien (GET_CODE (X) == CONST_INT && INTVAL (X) >= -0x1000 && INTVAL (X) < 0x1000 - 8) 1951117395Skan 195290075Sobrien#define RTX_OK_FOR_OLO10_P(X) \ 195390075Sobrien (GET_CODE (X) == CONST_INT && INTVAL (X) >= -0x1000 && INTVAL (X) < 0xc00 - 8) 195450397Sobrien 1955132718Skan#ifdef REG_OK_STRICT 195650397Sobrien#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1957132718Skan{ \ 1958132718Skan if (legitimate_address_p (MODE, X, 1)) \ 195950397Sobrien goto ADDR; \ 1960132718Skan} 1961132718Skan#else 1962132718Skan#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1963132718Skan{ \ 1964132718Skan if (legitimate_address_p (MODE, X, 0)) \ 196550397Sobrien goto ADDR; \ 196650397Sobrien} 1967132718Skan#endif 1968117395Skan 1969117395Skan/* Go to LABEL if ADDR (a legitimate address expression) 1970117395Skan has an effect that depends on the machine mode it is used for. 1971117395Skan 1972117395Skan In PIC mode, 1973117395Skan 1974117395Skan (mem:HI [%l7+a]) 1975117395Skan 1976117395Skan is not equivalent to 1977117395Skan 1978117395Skan (mem:QI [%l7+a]) (mem:QI [%l7+a+1]) 1979117395Skan 1980117395Skan because [%l7+a+1] is interpreted as the address of (a+1). */ 1981117395Skan 1982117395Skan#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ 1983117395Skan{ \ 1984117395Skan if (flag_pic == 1) \ 1985117395Skan { \ 1986117395Skan if (GET_CODE (ADDR) == PLUS) \ 1987117395Skan { \ 1988117395Skan rtx op0 = XEXP (ADDR, 0); \ 1989117395Skan rtx op1 = XEXP (ADDR, 1); \ 1990117395Skan if (op0 == pic_offset_table_rtx \ 1991117395Skan && SYMBOLIC_CONST (op1)) \ 1992117395Skan goto LABEL; \ 1993117395Skan } \ 1994117395Skan } \ 1995117395Skan} 199650397Sobrien 199750397Sobrien/* Try machine-dependent ways of modifying an illegitimate address 199850397Sobrien to be legitimate. If we find one, return the new, valid address. 199950397Sobrien This macro is used in only one place: `memory_address' in explow.c. 200050397Sobrien 200150397Sobrien OLDX is the address as it was before break_out_memory_refs was called. 200250397Sobrien In some cases it is useful to look at this to decide what needs to be done. 200350397Sobrien 200450397Sobrien MODE and WIN are passed so that this macro can use 200550397Sobrien GO_IF_LEGITIMATE_ADDRESS. 200650397Sobrien 200750397Sobrien It is always safe for this macro to do nothing. It exists to recognize 200850397Sobrien opportunities to optimize the output. */ 200950397Sobrien 201050397Sobrien/* On SPARC, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */ 201150397Sobrien#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 2012132718Skan{ \ 2013132718Skan (X) = legitimize_address (X, OLDX, MODE); \ 2014132718Skan if (memory_address_p (MODE, X)) \ 2015132718Skan goto WIN; \ 2016132718Skan} 201750397Sobrien 201852284Sobrien/* Try a machine-dependent way of reloading an illegitimate address 201952284Sobrien operand. If we find one, push the reload and jump to WIN. This 202052284Sobrien macro is used in only one place: `find_reloads_address' in reload.c. 202152284Sobrien 2022117395Skan For SPARC 32, we wish to handle addresses by splitting them into 2023117395Skan HIGH+LO_SUM pairs, retaining the LO_SUM in the memory reference. 202452284Sobrien This cuts the number of extra insns by one. 202552284Sobrien 202652284Sobrien Do nothing when generating PIC code and the address is a 202752284Sobrien symbolic operand or requires a scratch register. */ 202852284Sobrien 202952284Sobrien#define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_LEVELS,WIN) \ 203052284Sobriendo { \ 203152284Sobrien /* Decompose SImode constants into hi+lo_sum. We do have to \ 203252284Sobrien rerecognize what we produce, so be careful. */ \ 203352284Sobrien if (CONSTANT_P (X) \ 203496263Sobrien && (MODE != TFmode || TARGET_ARCH64) \ 203552284Sobrien && GET_MODE (X) == SImode \ 203652284Sobrien && GET_CODE (X) != LO_SUM && GET_CODE (X) != HIGH \ 203752284Sobrien && ! (flag_pic \ 203852284Sobrien && (symbolic_operand (X, Pmode) \ 203996263Sobrien || pic_address_needs_scratch (X))) \ 204096263Sobrien && sparc_cmodel <= CM_MEDLOW) \ 204152284Sobrien { \ 204252284Sobrien X = gen_rtx_LO_SUM (GET_MODE (X), \ 204352284Sobrien gen_rtx_HIGH (GET_MODE (X), X), X); \ 204490075Sobrien push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL, \ 204552284Sobrien BASE_REG_CLASS, GET_MODE (X), VOIDmode, 0, 0, \ 204652284Sobrien OPNUM, TYPE); \ 204752284Sobrien goto WIN; \ 204852284Sobrien } \ 204952284Sobrien /* ??? 64-bit reloads. */ \ 205052284Sobrien} while (0) 205150397Sobrien 205250397Sobrien/* Specify the machine mode that this machine uses 205350397Sobrien for the index in the tablejump instruction. */ 205452284Sobrien/* If we ever implement any of the full models (such as CM_FULLANY), 205552284Sobrien this has to be DImode in that case */ 205652284Sobrien#ifdef HAVE_GAS_SUBSECTION_ORDERING 205752284Sobrien#define CASE_VECTOR_MODE \ 205852284Sobrien(! TARGET_PTR64 ? SImode : flag_pic ? SImode : TARGET_CM_MEDLOW ? SImode : DImode) 205952284Sobrien#else 206052284Sobrien/* If assembler does not have working .subsection -1, we use DImode for pic, as otherwise 206190075Sobrien we have to sign extend which slows things down. */ 206252284Sobrien#define CASE_VECTOR_MODE \ 206352284Sobrien(! TARGET_PTR64 ? SImode : flag_pic ? DImode : TARGET_CM_MEDLOW ? SImode : DImode) 206452284Sobrien#endif 206550397Sobrien 206650397Sobrien/* Define this as 1 if `char' should by default be signed; else as 0. */ 206750397Sobrien#define DEFAULT_SIGNED_CHAR 1 206850397Sobrien 206950397Sobrien/* Max number of bytes we can move from memory to memory 207050397Sobrien in one reasonably fast instruction. */ 207150397Sobrien#define MOVE_MAX 8 207250397Sobrien 2073169689Skan/* If a memory-to-memory move would take MOVE_RATIO or more simple 2074169689Skan move-instruction pairs, we will do a movmem or libcall instead. */ 207550397Sobrien 2076169689Skan#define MOVE_RATIO (optimize_size ? 3 : 8) 207750397Sobrien 207850397Sobrien/* Define if operations between registers always perform the operation 207950397Sobrien on the full register even if a narrower mode is specified. */ 208050397Sobrien#define WORD_REGISTER_OPERATIONS 208150397Sobrien 208250397Sobrien/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 208350397Sobrien will either zero-extend or sign-extend. The value of this macro should 208450397Sobrien be the code that says which one of the two operations is implicitly 2085169689Skan done, UNKNOWN if none. */ 208650397Sobrien#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 208750397Sobrien 208850397Sobrien/* Nonzero if access to memory by bytes is slow and undesirable. 208950397Sobrien For RISC chips, it means that access to memory by bytes is no 209050397Sobrien better than access by words when possible, so grab a whole word 209150397Sobrien and maybe make use of that. */ 209250397Sobrien#define SLOW_BYTE_ACCESS 1 209350397Sobrien 209450397Sobrien/* Define this to be nonzero if shift instructions ignore all but the low-order 209590075Sobrien few bits. */ 209650397Sobrien#define SHIFT_COUNT_TRUNCATED 1 209750397Sobrien 209850397Sobrien/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 209950397Sobrien is done just by pretending it is already truncated. */ 210050397Sobrien#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 210150397Sobrien 2102132718Skan/* Specify the machine mode used for addresses. */ 210390075Sobrien#define Pmode (TARGET_ARCH64 ? DImode : SImode) 210450397Sobrien 210550397Sobrien/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, 210650397Sobrien return the mode to be used for the comparison. For floating-point, 210790075Sobrien CCFP[E]mode is used. CC_NOOVmode should be used when the first operand 210890075Sobrien is a PLUS, MINUS, NEG, or ASHIFT. CCmode should be used when no special 210950397Sobrien processing is needed. */ 211090075Sobrien#define SELECT_CC_MODE(OP,X,Y) select_cc_mode ((OP), (X), (Y)) 211150397Sobrien 2112117395Skan/* Return nonzero if MODE implies a floating point inequality can be 2113117395Skan reversed. For SPARC this is always true because we have a full 211490075Sobrien compliment of ordered and unordered comparisons, but until generic 211590075Sobrien code knows how to reverse it correctly we keep the old definition. */ 211690075Sobrien#define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPEmode && (MODE) != CCFPmode) 211750397Sobrien 211890075Sobrien/* A function address in a call instruction for indexing purposes. */ 211990075Sobrien#define FUNCTION_MODE Pmode 212050397Sobrien 212150397Sobrien/* Define this if addresses of constant functions 212250397Sobrien shouldn't be put through pseudo regs where they can be cse'd. 212350397Sobrien Desirable on machines where ordinary constants are expensive 212450397Sobrien but a CALL with constant address is cheap. */ 212550397Sobrien#define NO_FUNCTION_CSE 212650397Sobrien 212750397Sobrien/* alloca should avoid clobbering the old register save area. */ 212850397Sobrien#define SETJMP_VIA_SAVE_AREA 212950397Sobrien 2130132718Skan/* The _Q_* comparison libcalls return booleans. */ 2131132718Skan#define FLOAT_LIB_COMPARE_RETURNS_BOOL(MODE, COMPARISON) ((MODE) == TFmode) 213250397Sobrien 2133102780Skan/* Assume by default that the _Qp_* 64-bit libcalls are implemented such 2134102780Skan that the inputs are fully consumed before the output memory is clobbered. */ 2135102780Skan 2136102780Skan#define TARGET_BUGGY_QP_LIB 0 2137102780Skan 2138132718Skan/* Assume by default that we do not have the Solaris-specific conversion 2139132718Skan routines nor 64-bit integer multiply and divide routines. */ 214050397Sobrien 2141132718Skan#define SUN_CONVERSION_LIBFUNCS 0 2142132718Skan#define DITF_CONVERSION_LIBFUNCS 0 2143132718Skan#define SUN_INTEGER_MULTIPLY_64 0 214450397Sobrien 214550397Sobrien/* Compute extra cost of moving data between one register class 214650397Sobrien and another. */ 214750397Sobrien#define GENERAL_OR_I64(C) ((C) == GENERAL_REGS || (C) == I64_REGS) 214890075Sobrien#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 214950397Sobrien (((FP_REG_CLASS_P (CLASS1) && GENERAL_OR_I64 (CLASS2)) \ 215050397Sobrien || (GENERAL_OR_I64 (CLASS1) && FP_REG_CLASS_P (CLASS2)) \ 215150397Sobrien || (CLASS1) == FPCC_REGS || (CLASS2) == FPCC_REGS) \ 2152117395Skan ? ((sparc_cpu == PROCESSOR_ULTRASPARC \ 2153169689Skan || sparc_cpu == PROCESSOR_ULTRASPARC3 \ 2154169689Skan || sparc_cpu == PROCESSOR_NIAGARA) ? 12 : 6) : 2) 215550397Sobrien 215696263Sobrien/* Provide the cost of a branch. For pre-v9 processors we use 215796263Sobrien a value of 3 to take into account the potential annulling of 215896263Sobrien the delay slot (which ends up being a bubble in the pipeline slot) 215996263Sobrien plus a cycle to take into consideration the instruction cache 216096263Sobrien effects. 216196263Sobrien 216296263Sobrien On v9 and later, which have branch prediction facilities, we set 216396263Sobrien it to the depth of the pipeline as that is the cost of a 2164169689Skan mispredicted branch. 216596263Sobrien 2166169689Skan On Niagara, normal branches insert 3 bubbles into the pipe 2167169689Skan and annulled branches insert 4 bubbles. */ 2168169689Skan 216996263Sobrien#define BRANCH_COST \ 217096263Sobrien ((sparc_cpu == PROCESSOR_V9 \ 217196263Sobrien || sparc_cpu == PROCESSOR_ULTRASPARC) \ 2172117395Skan ? 7 \ 2173117395Skan : (sparc_cpu == PROCESSOR_ULTRASPARC3 \ 2174169689Skan ? 9 \ 2175169689Skan : (sparc_cpu == PROCESSOR_NIAGARA \ 2176169689Skan ? 4 \ 2177169689Skan : 3))) 217896263Sobrien 217996263Sobrien#define PREFETCH_BLOCK \ 2180117395Skan ((sparc_cpu == PROCESSOR_ULTRASPARC \ 2181169689Skan || sparc_cpu == PROCESSOR_ULTRASPARC3 \ 2182169689Skan || sparc_cpu == PROCESSOR_NIAGARA) \ 2183117395Skan ? 64 : 32) 218496263Sobrien 218596263Sobrien#define SIMULTANEOUS_PREFETCHES \ 2186169689Skan ((sparc_cpu == PROCESSOR_ULTRASPARC \ 2187169689Skan || sparc_cpu == PROCESSOR_NIAGARA) \ 2188117395Skan ? 2 \ 2189117395Skan : (sparc_cpu == PROCESSOR_ULTRASPARC3 \ 2190117395Skan ? 8 : 3)) 219150397Sobrien 219250397Sobrien/* Control the assembler format that we output. */ 219350397Sobrien 219450397Sobrien/* A C string constant describing how to begin a comment in the target 219550397Sobrien assembler language. The compiler assumes that the comment will end at 219650397Sobrien the end of the line. */ 219750397Sobrien 219850397Sobrien#define ASM_COMMENT_START "!" 219950397Sobrien 220050397Sobrien/* Output to assembler file text saying following lines 220150397Sobrien may contain character constants, extra white space, comments, etc. */ 220250397Sobrien 220350397Sobrien#define ASM_APP_ON "" 220450397Sobrien 220550397Sobrien/* Output to assembler file text saying following lines 220650397Sobrien no longer contain unusual constructs. */ 220750397Sobrien 220850397Sobrien#define ASM_APP_OFF "" 220950397Sobrien 221050397Sobrien/* How to refer to registers in assembler output. 221150397Sobrien This sequence is indexed by compiler's hard-register-number (see above). */ 221250397Sobrien 221350397Sobrien#define REGISTER_NAMES \ 221450397Sobrien{"%g0", "%g1", "%g2", "%g3", "%g4", "%g5", "%g6", "%g7", \ 221550397Sobrien "%o0", "%o1", "%o2", "%o3", "%o4", "%o5", "%sp", "%o7", \ 221650397Sobrien "%l0", "%l1", "%l2", "%l3", "%l4", "%l5", "%l6", "%l7", \ 221750397Sobrien "%i0", "%i1", "%i2", "%i3", "%i4", "%i5", "%fp", "%i7", \ 221850397Sobrien "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", \ 221950397Sobrien "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", \ 222050397Sobrien "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", \ 222150397Sobrien "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31", \ 222250397Sobrien "%f32", "%f33", "%f34", "%f35", "%f36", "%f37", "%f38", "%f39", \ 222350397Sobrien "%f40", "%f41", "%f42", "%f43", "%f44", "%f45", "%f46", "%f47", \ 222450397Sobrien "%f48", "%f49", "%f50", "%f51", "%f52", "%f53", "%f54", "%f55", \ 222550397Sobrien "%f56", "%f57", "%f58", "%f59", "%f60", "%f61", "%f62", "%f63", \ 222696263Sobrien "%fcc0", "%fcc1", "%fcc2", "%fcc3", "%icc", "%sfp" } 222750397Sobrien 222850397Sobrien/* Define additional names for use in asm clobbers and asm declarations. */ 222950397Sobrien 223050397Sobrien#define ADDITIONAL_REGISTER_NAMES \ 223150397Sobrien{{"ccr", SPARC_ICC_REG}, {"cc", SPARC_ICC_REG}} 223250397Sobrien 223350397Sobrien/* On Sun 4, this limit is 2048. We use 1000 to be safe, since the length 223450397Sobrien can run past this up to a continuation point. Once we used 1500, but 223550397Sobrien a single entry in C++ can run more than 500 bytes, due to the length of 223650397Sobrien mangled symbol names. dbxout.c should really be fixed to do 223750397Sobrien continuations when they are actually needed instead of trying to 223850397Sobrien guess... */ 223950397Sobrien#define DBX_CONTIN_LENGTH 1000 224050397Sobrien 224150397Sobrien/* This is how to output a command to make the user-level label named NAME 224250397Sobrien defined for reference from other files. */ 224350397Sobrien 2244117395Skan/* Globalizing directive for a label. */ 2245117395Skan#define GLOBAL_ASM_OP "\t.global " 224650397Sobrien 224790075Sobrien/* The prefix to add to user-visible assembler symbols. */ 224850397Sobrien 224950397Sobrien#define USER_LABEL_PREFIX "_" 225050397Sobrien 225150397Sobrien/* This is how to store into the string LABEL 225250397Sobrien the symbol_ref name of an internal numbered label where 225350397Sobrien PREFIX is the class of label and NUM is the number within the class. 225450397Sobrien This is suitable for output with `assemble_name'. */ 225550397Sobrien 225650397Sobrien#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 225750397Sobrien sprintf ((LABEL), "*%s%ld", (PREFIX), (long)(NUM)) 225850397Sobrien 225952284Sobrien/* This is how we hook in and defer the case-vector until the end of 226052284Sobrien the function. */ 226152284Sobrien#define ASM_OUTPUT_ADDR_VEC(LAB,VEC) \ 226252284Sobrien sparc_defer_case_vector ((LAB),(VEC), 0) 226352284Sobrien 226452284Sobrien#define ASM_OUTPUT_ADDR_DIFF_VEC(LAB,VEC) \ 226552284Sobrien sparc_defer_case_vector ((LAB),(VEC), 1) 226652284Sobrien 226750397Sobrien/* This is how to output an element of a case-vector that is absolute. */ 226850397Sobrien 226950397Sobrien#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 227050397Sobriendo { \ 227150397Sobrien char label[30]; \ 227250397Sobrien ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \ 227352284Sobrien if (CASE_VECTOR_MODE == SImode) \ 227450397Sobrien fprintf (FILE, "\t.word\t"); \ 227550397Sobrien else \ 227650397Sobrien fprintf (FILE, "\t.xword\t"); \ 227750397Sobrien assemble_name (FILE, label); \ 227850397Sobrien fputc ('\n', FILE); \ 227950397Sobrien} while (0) 228050397Sobrien 228150397Sobrien/* This is how to output an element of a case-vector that is relative. 228250397Sobrien (SPARC uses such vectors only when generating PIC.) */ 228350397Sobrien 228450397Sobrien#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 228550397Sobriendo { \ 228650397Sobrien char label[30]; \ 228752284Sobrien ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE)); \ 228852284Sobrien if (CASE_VECTOR_MODE == SImode) \ 228950397Sobrien fprintf (FILE, "\t.word\t"); \ 229050397Sobrien else \ 229150397Sobrien fprintf (FILE, "\t.xword\t"); \ 229250397Sobrien assemble_name (FILE, label); \ 229350397Sobrien ASM_GENERATE_INTERNAL_LABEL (label, "L", (REL)); \ 229450397Sobrien fputc ('-', FILE); \ 229550397Sobrien assemble_name (FILE, label); \ 229650397Sobrien fputc ('\n', FILE); \ 229750397Sobrien} while (0) 229850397Sobrien 229952284Sobrien/* This is what to output before and after case-vector (both 230052284Sobrien relative and absolute). If .subsection -1 works, we put case-vectors 230152284Sobrien at the beginning of the current section. */ 230252284Sobrien 230352284Sobrien#ifdef HAVE_GAS_SUBSECTION_ORDERING 230452284Sobrien 230552284Sobrien#define ASM_OUTPUT_ADDR_VEC_START(FILE) \ 230652284Sobrien fprintf(FILE, "\t.subsection\t-1\n") 230752284Sobrien 230852284Sobrien#define ASM_OUTPUT_ADDR_VEC_END(FILE) \ 230952284Sobrien fprintf(FILE, "\t.previous\n") 231052284Sobrien 231152284Sobrien#endif 231252284Sobrien 231350397Sobrien/* This is how to output an assembler line 231450397Sobrien that says to advance the location counter 231550397Sobrien to a multiple of 2**LOG bytes. */ 231650397Sobrien 231750397Sobrien#define ASM_OUTPUT_ALIGN(FILE,LOG) \ 231850397Sobrien if ((LOG) != 0) \ 231950397Sobrien fprintf (FILE, "\t.align %d\n", (1<<(LOG))) 232050397Sobrien 2321117395Skan/* This is how to output an assembler line that says to advance 2322117395Skan the location counter to a multiple of 2**LOG bytes using the 2323117395Skan "nop" instruction as padding. */ 2324117395Skan#define ASM_OUTPUT_ALIGN_WITH_NOP(FILE,LOG) \ 2325117395Skan if ((LOG) != 0) \ 2326117395Skan fprintf (FILE, "\t.align %d,0x1000000\n", (1<<(LOG))) 2327117395Skan 232850397Sobrien#define ASM_OUTPUT_SKIP(FILE,SIZE) \ 2329132718Skan fprintf (FILE, "\t.skip "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)) 233050397Sobrien 233150397Sobrien/* This says how to output an assembler line 233250397Sobrien to define a global common symbol. */ 233350397Sobrien 233450397Sobrien#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 233550397Sobrien( fputs ("\t.common ", (FILE)), \ 233650397Sobrien assemble_name ((FILE), (NAME)), \ 2337132718Skan fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",\"bss\"\n", (SIZE))) 233850397Sobrien 233950397Sobrien/* This says how to output an assembler line to define a local common 234050397Sobrien symbol. */ 234150397Sobrien 234250397Sobrien#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \ 234350397Sobrien( fputs ("\t.reserve ", (FILE)), \ 234450397Sobrien assemble_name ((FILE), (NAME)), \ 2345132718Skan fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",\"bss\",%u\n", \ 234650397Sobrien (SIZE), ((ALIGNED) / BITS_PER_UNIT))) 234750397Sobrien 234850397Sobrien/* A C statement (sans semicolon) to output to the stdio stream 234950397Sobrien FILE the assembler definition of uninitialized global DECL named 235050397Sobrien NAME whose size is SIZE bytes and alignment is ALIGN bytes. 235150397Sobrien Try to use asm_output_aligned_bss to implement this macro. */ 235250397Sobrien 235350397Sobrien#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ 235450397Sobrien do { \ 235550397Sobrien ASM_OUTPUT_ALIGNED_LOCAL (FILE, NAME, SIZE, ALIGN); \ 235650397Sobrien } while (0) 235750397Sobrien 235890075Sobrien#define IDENT_ASM_OP "\t.ident\t" 235950397Sobrien 236050397Sobrien/* Output #ident as a .ident. */ 236150397Sobrien 236250397Sobrien#define ASM_OUTPUT_IDENT(FILE, NAME) \ 236390075Sobrien fprintf (FILE, "%s\"%s\"\n", IDENT_ASM_OP, NAME); 236450397Sobrien 2365169689Skan/* Prettify the assembly. */ 2366132718Skan 2367169689Skanextern int sparc_indent_opcode; 2368132718Skan 2369169689Skan#define ASM_OUTPUT_OPCODE(FILE, PTR) \ 2370169689Skan do { \ 2371169689Skan if (sparc_indent_opcode) \ 2372169689Skan { \ 2373169689Skan putc (' ', FILE); \ 2374169689Skan sparc_indent_opcode = 0; \ 2375169689Skan } \ 2376169689Skan } while (0) 2377169689Skan 2378169689Skan#define SPARC_SYMBOL_REF_TLS_P(RTX) \ 2379169689Skan (GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0) 2380169689Skan 238150397Sobrien#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ 2382169689Skan ((CHAR) == '#' || (CHAR) == '*' || (CHAR) == '(' \ 2383169689Skan || (CHAR) == ')' || (CHAR) == '_' || (CHAR) == '&') 238450397Sobrien 238550397Sobrien/* Print operand X (an rtx) in assembler syntax to file FILE. 238650397Sobrien CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 238750397Sobrien For `%' followed by punctuation, CODE is the punctuation and X is null. */ 238850397Sobrien 238950397Sobrien#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 239050397Sobrien 239150397Sobrien/* Print a memory address as an operand to reference that memory location. */ 239250397Sobrien 239350397Sobrien#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 239450397Sobrien{ register rtx base, index = 0; \ 239550397Sobrien int offset = 0; \ 239650397Sobrien register rtx addr = ADDR; \ 239750397Sobrien if (GET_CODE (addr) == REG) \ 239850397Sobrien fputs (reg_names[REGNO (addr)], FILE); \ 239950397Sobrien else if (GET_CODE (addr) == PLUS) \ 240050397Sobrien { \ 240150397Sobrien if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \ 240250397Sobrien offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);\ 240350397Sobrien else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \ 240450397Sobrien offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);\ 240550397Sobrien else \ 240650397Sobrien base = XEXP (addr, 0), index = XEXP (addr, 1); \ 240790075Sobrien if (GET_CODE (base) == LO_SUM) \ 240890075Sobrien { \ 2409169689Skan gcc_assert (USE_AS_OFFSETABLE_LO10 \ 2410169689Skan && TARGET_ARCH64 \ 2411169689Skan && ! TARGET_CM_MEDMID); \ 241290075Sobrien output_operand (XEXP (base, 0), 0); \ 241390075Sobrien fputs ("+%lo(", FILE); \ 241490075Sobrien output_address (XEXP (base, 1)); \ 241590075Sobrien fprintf (FILE, ")+%d", offset); \ 241690075Sobrien } \ 241790075Sobrien else \ 241890075Sobrien { \ 241990075Sobrien fputs (reg_names[REGNO (base)], FILE); \ 242090075Sobrien if (index == 0) \ 242190075Sobrien fprintf (FILE, "%+d", offset); \ 242290075Sobrien else if (GET_CODE (index) == REG) \ 242390075Sobrien fprintf (FILE, "+%s", reg_names[REGNO (index)]); \ 242490075Sobrien else if (GET_CODE (index) == SYMBOL_REF \ 242590075Sobrien || GET_CODE (index) == CONST) \ 242690075Sobrien fputc ('+', FILE), output_addr_const (FILE, index); \ 2427169689Skan else gcc_unreachable (); \ 242890075Sobrien } \ 242950397Sobrien } \ 243050397Sobrien else if (GET_CODE (addr) == MINUS \ 243150397Sobrien && GET_CODE (XEXP (addr, 1)) == LABEL_REF) \ 243250397Sobrien { \ 243350397Sobrien output_addr_const (FILE, XEXP (addr, 0)); \ 243450397Sobrien fputs ("-(", FILE); \ 243550397Sobrien output_addr_const (FILE, XEXP (addr, 1)); \ 243650397Sobrien fputs ("-.)", FILE); \ 243750397Sobrien } \ 243850397Sobrien else if (GET_CODE (addr) == LO_SUM) \ 243950397Sobrien { \ 244050397Sobrien output_operand (XEXP (addr, 0), 0); \ 244152284Sobrien if (TARGET_CM_MEDMID) \ 244252284Sobrien fputs ("+%l44(", FILE); \ 244352284Sobrien else \ 244452284Sobrien fputs ("+%lo(", FILE); \ 244550397Sobrien output_address (XEXP (addr, 1)); \ 244650397Sobrien fputc (')', FILE); \ 244750397Sobrien } \ 244850397Sobrien else if (flag_pic && GET_CODE (addr) == CONST \ 244950397Sobrien && GET_CODE (XEXP (addr, 0)) == MINUS \ 245050397Sobrien && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST \ 245150397Sobrien && GET_CODE (XEXP (XEXP (XEXP (addr, 0), 1), 0)) == MINUS \ 245250397Sobrien && XEXP (XEXP (XEXP (XEXP (addr, 0), 1), 0), 1) == pc_rtx) \ 245350397Sobrien { \ 245450397Sobrien addr = XEXP (addr, 0); \ 245550397Sobrien output_addr_const (FILE, XEXP (addr, 0)); \ 245650397Sobrien /* Group the args of the second CONST in parenthesis. */ \ 245750397Sobrien fputs ("-(", FILE); \ 245850397Sobrien /* Skip past the second CONST--it does nothing for us. */\ 245950397Sobrien output_addr_const (FILE, XEXP (XEXP (addr, 1), 0)); \ 246050397Sobrien /* Close the parenthesis. */ \ 246150397Sobrien fputc (')', FILE); \ 246250397Sobrien } \ 246350397Sobrien else \ 246450397Sobrien { \ 246550397Sobrien output_addr_const (FILE, addr); \ 246650397Sobrien } \ 246750397Sobrien} 246850397Sobrien 2469169689Skan/* TLS support defaulting to original Sun flavor. GNU extensions 2470169689Skan must be activated in separate configuration files. */ 2471132718Skan#ifdef HAVE_AS_TLS 2472132718Skan#define TARGET_TLS 1 2473132718Skan#else 2474132718Skan#define TARGET_TLS 0 2475132718Skan#endif 2476169689Skan 2477132718Skan#define TARGET_SUN_TLS TARGET_TLS 2478132718Skan#define TARGET_GNU_TLS 0 2479132718Skan 248050397Sobrien/* The number of Pmode words for the setjmp buffer. */ 248150397Sobrien#define JMP_BUF_SIZE 12 2482