160484Sobrien/* ppc-opc.c -- PowerPC opcode list 2218822Sdim Copyright 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002, 2003, 2004, 3218822Sdim 2005, 2006, 2007 Free Software Foundation, Inc. 460484Sobrien Written by Ian Lance Taylor, Cygnus Support 560484Sobrien 6130561Sobrien This file is part of GDB, GAS, and the GNU binutils. 760484Sobrien 8130561Sobrien GDB, GAS, and the GNU binutils are free software; you can redistribute 9130561Sobrien them and/or modify them under the terms of the GNU General Public 10130561Sobrien License as published by the Free Software Foundation; either version 11130561Sobrien 2, or (at your option) any later version. 1260484Sobrien 13130561Sobrien GDB, GAS, and the GNU binutils are distributed in the hope that they 14130561Sobrien will be useful, but WITHOUT ANY WARRANTY; without even the implied 15130561Sobrien warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See 16130561Sobrien the GNU General Public License for more details. 1760484Sobrien 18130561Sobrien You should have received a copy of the GNU General Public License 19130561Sobrien along with this file; see the file COPYING. If not, write to the Free 20218822Sdim Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 21218822Sdim 02110-1301, USA. */ 2260484Sobrien 2360484Sobrien#include <stdio.h> 2460484Sobrien#include "sysdep.h" 2560484Sobrien#include "opcode/ppc.h" 2660484Sobrien#include "opintl.h" 2760484Sobrien 2860484Sobrien/* This file holds the PowerPC opcode table. The opcode table 2960484Sobrien includes almost all of the extended instruction mnemonics. This 3060484Sobrien permits the disassembler to use them, and simplifies the assembler 3160484Sobrien logic, at the cost of increasing the table size. The table is 3260484Sobrien strictly constant data, so the compiler should be able to put it in 3360484Sobrien the .text section. 3460484Sobrien 3560484Sobrien This file also holds the operand table. All knowledge about 3660484Sobrien inserting operands into instructions and vice-versa is kept in this 3760484Sobrien file. */ 3860484Sobrien 3960484Sobrien/* Local insertion and extraction functions. */ 4060484Sobrien 41130561Sobrienstatic unsigned long insert_bat (unsigned long, long, int, const char **); 42130561Sobrienstatic long extract_bat (unsigned long, int, int *); 43130561Sobrienstatic unsigned long insert_bba (unsigned long, long, int, const char **); 44130561Sobrienstatic long extract_bba (unsigned long, int, int *); 45130561Sobrienstatic unsigned long insert_bdm (unsigned long, long, int, const char **); 46130561Sobrienstatic long extract_bdm (unsigned long, int, int *); 47130561Sobrienstatic unsigned long insert_bdp (unsigned long, long, int, const char **); 48130561Sobrienstatic long extract_bdp (unsigned long, int, int *); 49130561Sobrienstatic unsigned long insert_bo (unsigned long, long, int, const char **); 50130561Sobrienstatic long extract_bo (unsigned long, int, int *); 51130561Sobrienstatic unsigned long insert_boe (unsigned long, long, int, const char **); 52130561Sobrienstatic long extract_boe (unsigned long, int, int *); 53130561Sobrienstatic unsigned long insert_fxm (unsigned long, long, int, const char **); 54130561Sobrienstatic long extract_fxm (unsigned long, int, int *); 55130561Sobrienstatic unsigned long insert_mbe (unsigned long, long, int, const char **); 56130561Sobrienstatic long extract_mbe (unsigned long, int, int *); 57130561Sobrienstatic unsigned long insert_mb6 (unsigned long, long, int, const char **); 58130561Sobrienstatic long extract_mb6 (unsigned long, int, int *); 59130561Sobrienstatic long extract_nb (unsigned long, int, int *); 60130561Sobrienstatic unsigned long insert_nsi (unsigned long, long, int, const char **); 61130561Sobrienstatic long extract_nsi (unsigned long, int, int *); 62130561Sobrienstatic unsigned long insert_ral (unsigned long, long, int, const char **); 63130561Sobrienstatic unsigned long insert_ram (unsigned long, long, int, const char **); 64130561Sobrienstatic unsigned long insert_raq (unsigned long, long, int, const char **); 65130561Sobrienstatic unsigned long insert_ras (unsigned long, long, int, const char **); 66130561Sobrienstatic unsigned long insert_rbs (unsigned long, long, int, const char **); 67130561Sobrienstatic long extract_rbs (unsigned long, int, int *); 68130561Sobrienstatic unsigned long insert_sh6 (unsigned long, long, int, const char **); 69130561Sobrienstatic long extract_sh6 (unsigned long, int, int *); 70130561Sobrienstatic unsigned long insert_spr (unsigned long, long, int, const char **); 71130561Sobrienstatic long extract_spr (unsigned long, int, int *); 72218822Sdimstatic unsigned long insert_sprg (unsigned long, long, int, const char **); 73218822Sdimstatic long extract_sprg (unsigned long, int, int *); 74130561Sobrienstatic unsigned long insert_tbr (unsigned long, long, int, const char **); 75130561Sobrienstatic long extract_tbr (unsigned long, int, int *); 7660484Sobrien 7760484Sobrien/* The operands table. 7860484Sobrien 79218822Sdim The fields are bitm, shift, insert, extract, flags. 8060484Sobrien 8160484Sobrien We used to put parens around the various additions, like the one 8260484Sobrien for BA just below. However, that caused trouble with feeble 8360484Sobrien compilers with a limit on depth of a parenthesized expression, like 8460484Sobrien (reportedly) the compiler in Microsoft Developer Studio 5. So we 8560484Sobrien omit the parens, since the macros are never used in a context where 8660484Sobrien the addition will be ambiguous. */ 8760484Sobrien 8860484Sobrienconst struct powerpc_operand powerpc_operands[] = 8960484Sobrien{ 9060484Sobrien /* The zero index is used to indicate the end of the list of 9160484Sobrien operands. */ 9260484Sobrien#define UNUSED 0 93218822Sdim { 0, 0, NULL, NULL, 0 }, 9460484Sobrien 9560484Sobrien /* The BA field in an XL form instruction. */ 9660484Sobrien#define BA UNUSED + 1 97218822Sdim /* The BI field in a B form or XL form instruction. */ 98218822Sdim#define BI BA 99218822Sdim#define BI_MASK (0x1f << 16) 100218822Sdim { 0x1f, 16, NULL, NULL, PPC_OPERAND_CR }, 10160484Sobrien 10260484Sobrien /* The BA field in an XL form instruction when it must be the same 10360484Sobrien as the BT field in the same instruction. */ 10460484Sobrien#define BAT BA + 1 105218822Sdim { 0x1f, 16, insert_bat, extract_bat, PPC_OPERAND_FAKE }, 10660484Sobrien 10760484Sobrien /* The BB field in an XL form instruction. */ 10860484Sobrien#define BB BAT + 1 10960484Sobrien#define BB_MASK (0x1f << 11) 110218822Sdim { 0x1f, 11, NULL, NULL, PPC_OPERAND_CR }, 11160484Sobrien 11260484Sobrien /* The BB field in an XL form instruction when it must be the same 11360484Sobrien as the BA field in the same instruction. */ 11460484Sobrien#define BBA BB + 1 115218822Sdim { 0x1f, 11, insert_bba, extract_bba, PPC_OPERAND_FAKE }, 11660484Sobrien 11760484Sobrien /* The BD field in a B form instruction. The lower two bits are 11860484Sobrien forced to zero. */ 11960484Sobrien#define BD BBA + 1 120218822Sdim { 0xfffc, 0, NULL, NULL, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED }, 12160484Sobrien 12260484Sobrien /* The BD field in a B form instruction when absolute addressing is 12360484Sobrien used. */ 12460484Sobrien#define BDA BD + 1 125218822Sdim { 0xfffc, 0, NULL, NULL, PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED }, 12660484Sobrien 12760484Sobrien /* The BD field in a B form instruction when the - modifier is used. 12860484Sobrien This sets the y bit of the BO field appropriately. */ 12960484Sobrien#define BDM BDA + 1 130218822Sdim { 0xfffc, 0, insert_bdm, extract_bdm, 13160484Sobrien PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED }, 13260484Sobrien 13360484Sobrien /* The BD field in a B form instruction when the - modifier is used 13460484Sobrien and absolute address is used. */ 13560484Sobrien#define BDMA BDM + 1 136218822Sdim { 0xfffc, 0, insert_bdm, extract_bdm, 13760484Sobrien PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED }, 13860484Sobrien 13960484Sobrien /* The BD field in a B form instruction when the + modifier is used. 14060484Sobrien This sets the y bit of the BO field appropriately. */ 14160484Sobrien#define BDP BDMA + 1 142218822Sdim { 0xfffc, 0, insert_bdp, extract_bdp, 14360484Sobrien PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED }, 14460484Sobrien 14560484Sobrien /* The BD field in a B form instruction when the + modifier is used 14660484Sobrien and absolute addressing is used. */ 14760484Sobrien#define BDPA BDP + 1 148218822Sdim { 0xfffc, 0, insert_bdp, extract_bdp, 14960484Sobrien PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED }, 15060484Sobrien 15160484Sobrien /* The BF field in an X or XL form instruction. */ 15260484Sobrien#define BF BDPA + 1 153218822Sdim /* The CRFD field in an X form instruction. */ 154218822Sdim#define CRFD BF 155218822Sdim { 0x7, 23, NULL, NULL, PPC_OPERAND_CR }, 15660484Sobrien 157218822Sdim /* The BF field in an X or XL form instruction. */ 158218822Sdim#define BFF BF + 1 159218822Sdim { 0x7, 23, NULL, NULL, 0 }, 160218822Sdim 16160484Sobrien /* An optional BF field. This is used for comparison instructions, 16260484Sobrien in which an omitted BF field is taken as zero. */ 163218822Sdim#define OBF BFF + 1 164218822Sdim { 0x7, 23, NULL, NULL, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL }, 16560484Sobrien 16660484Sobrien /* The BFA field in an X or XL form instruction. */ 16760484Sobrien#define BFA OBF + 1 168218822Sdim { 0x7, 18, NULL, NULL, PPC_OPERAND_CR }, 16960484Sobrien 17060484Sobrien /* The BO field in a B form instruction. Certain values are 17160484Sobrien illegal. */ 172218822Sdim#define BO BFA + 1 17360484Sobrien#define BO_MASK (0x1f << 21) 174218822Sdim { 0x1f, 21, insert_bo, extract_bo, 0 }, 17560484Sobrien 17660484Sobrien /* The BO field in a B form instruction when the + or - modifier is 17760484Sobrien used. This is like the BO field, but it must be even. */ 17860484Sobrien#define BOE BO + 1 179218822Sdim { 0x1e, 21, insert_boe, extract_boe, 0 }, 18060484Sobrien 181218822Sdim#define BH BOE + 1 182218822Sdim { 0x3, 11, NULL, NULL, PPC_OPERAND_OPTIONAL }, 183218822Sdim 18460484Sobrien /* The BT field in an X or XL form instruction. */ 185218822Sdim#define BT BH + 1 186218822Sdim { 0x1f, 21, NULL, NULL, PPC_OPERAND_CR }, 18760484Sobrien 18860484Sobrien /* The condition register number portion of the BI field in a B form 18960484Sobrien or XL form instruction. This is used for the extended 19060484Sobrien conditional branch mnemonics, which set the lower two bits of the 19160484Sobrien BI field. This field is optional. */ 19260484Sobrien#define CR BT + 1 193218822Sdim { 0x7, 18, NULL, NULL, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL }, 19460484Sobrien 195130561Sobrien /* The CRB field in an X form instruction. */ 196130561Sobrien#define CRB CR + 1 197218822Sdim /* The MB field in an M form instruction. */ 198218822Sdim#define MB CRB 199218822Sdim#define MB_MASK (0x1f << 6) 200218822Sdim { 0x1f, 6, NULL, NULL, 0 }, 201130561Sobrien 202130561Sobrien /* The CRFS field in an X form instruction. */ 203218822Sdim#define CRFS CRB + 1 204218822Sdim { 0x7, 0, NULL, NULL, PPC_OPERAND_CR }, 205130561Sobrien 20689857Sobrien /* The CT field in an X form instruction. */ 207130561Sobrien#define CT CRFS + 1 208218822Sdim /* The MO field in an mbar instruction. */ 209218822Sdim#define MO CT 210218822Sdim { 0x1f, 21, NULL, NULL, PPC_OPERAND_OPTIONAL }, 21189857Sobrien 21260484Sobrien /* The D field in a D form instruction. This is a displacement off 21360484Sobrien a register, and implies that the next operand is a register in 21460484Sobrien parentheses. */ 21589857Sobrien#define D CT + 1 216218822Sdim { 0xffff, 0, NULL, NULL, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED }, 21760484Sobrien 21889857Sobrien /* The DE field in a DE form instruction. This is like D, but is 12 21989857Sobrien bits only. */ 22089857Sobrien#define DE D + 1 221218822Sdim { 0xfff, 4, NULL, NULL, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED }, 22289857Sobrien 22389857Sobrien /* The DES field in a DES form instruction. This is like DS, but is 14 22489857Sobrien bits only (12 stored.) */ 22589857Sobrien#define DES DE + 1 226218822Sdim { 0x3ffc, 2, NULL, NULL, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED }, 22789857Sobrien 228130561Sobrien /* The DQ field in a DQ form instruction. This is like D, but the 229130561Sobrien lower four bits are forced to zero. */ 230130561Sobrien#define DQ DES + 1 231218822Sdim { 0xfff0, 0, NULL, NULL, 232218822Sdim PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED | PPC_OPERAND_DQ }, 233130561Sobrien 23460484Sobrien /* The DS field in a DS form instruction. This is like D, but the 23560484Sobrien lower two bits are forced to zero. */ 236130561Sobrien#define DS DQ + 1 237218822Sdim { 0xfffc, 0, NULL, NULL, 238218822Sdim PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED | PPC_OPERAND_DS }, 23960484Sobrien 24060484Sobrien /* The E field in a wrteei instruction. */ 24160484Sobrien#define E DS + 1 242218822Sdim { 0x1, 15, NULL, NULL, 0 }, 24360484Sobrien 24460484Sobrien /* The FL1 field in a POWER SC form instruction. */ 24560484Sobrien#define FL1 E + 1 246218822Sdim /* The U field in an X form instruction. */ 247218822Sdim#define U FL1 248218822Sdim { 0xf, 12, NULL, NULL, 0 }, 24960484Sobrien 25060484Sobrien /* The FL2 field in a POWER SC form instruction. */ 25160484Sobrien#define FL2 FL1 + 1 252218822Sdim { 0x7, 2, NULL, NULL, 0 }, 25360484Sobrien 25460484Sobrien /* The FLM field in an XFL form instruction. */ 25560484Sobrien#define FLM FL2 + 1 256218822Sdim { 0xff, 17, NULL, NULL, 0 }, 25760484Sobrien 25860484Sobrien /* The FRA field in an X or A form instruction. */ 25960484Sobrien#define FRA FLM + 1 26060484Sobrien#define FRA_MASK (0x1f << 16) 261218822Sdim { 0x1f, 16, NULL, NULL, PPC_OPERAND_FPR }, 26260484Sobrien 26360484Sobrien /* The FRB field in an X or A form instruction. */ 26460484Sobrien#define FRB FRA + 1 26560484Sobrien#define FRB_MASK (0x1f << 11) 266218822Sdim { 0x1f, 11, NULL, NULL, PPC_OPERAND_FPR }, 26760484Sobrien 26860484Sobrien /* The FRC field in an A form instruction. */ 26960484Sobrien#define FRC FRB + 1 27060484Sobrien#define FRC_MASK (0x1f << 6) 271218822Sdim { 0x1f, 6, NULL, NULL, PPC_OPERAND_FPR }, 27260484Sobrien 27360484Sobrien /* The FRS field in an X form instruction or the FRT field in a D, X 27460484Sobrien or A form instruction. */ 27560484Sobrien#define FRS FRC + 1 27660484Sobrien#define FRT FRS 277218822Sdim { 0x1f, 21, NULL, NULL, PPC_OPERAND_FPR }, 27860484Sobrien 27960484Sobrien /* The FXM field in an XFX instruction. */ 28060484Sobrien#define FXM FRS + 1 281218822Sdim { 0xff, 12, insert_fxm, extract_fxm, 0 }, 28260484Sobrien 283130561Sobrien /* Power4 version for mfcr. */ 284130561Sobrien#define FXM4 FXM + 1 285218822Sdim { 0xff, 12, insert_fxm, extract_fxm, PPC_OPERAND_OPTIONAL }, 286130561Sobrien 28760484Sobrien /* The L field in a D or X form instruction. */ 288130561Sobrien#define L FXM4 + 1 289218822Sdim { 0x1, 21, NULL, NULL, PPC_OPERAND_OPTIONAL }, 29060484Sobrien 291218822Sdim /* The LEV field in a POWER SVC form instruction. */ 292218822Sdim#define SVC_LEV L + 1 293218822Sdim { 0x7f, 5, NULL, NULL, 0 }, 29460484Sobrien 295218822Sdim /* The LEV field in an SC form instruction. */ 296218822Sdim#define LEV SVC_LEV + 1 297218822Sdim { 0x7f, 5, NULL, NULL, PPC_OPERAND_OPTIONAL }, 298218822Sdim 29960484Sobrien /* The LI field in an I form instruction. The lower two bits are 30060484Sobrien forced to zero. */ 30160484Sobrien#define LI LEV + 1 302218822Sdim { 0x3fffffc, 0, NULL, NULL, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED }, 30360484Sobrien 30460484Sobrien /* The LI field in an I form instruction when used as an absolute 30560484Sobrien address. */ 30660484Sobrien#define LIA LI + 1 307218822Sdim { 0x3fffffc, 0, NULL, NULL, PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED }, 30860484Sobrien 30989857Sobrien /* The LS field in an X (sync) form instruction. */ 31089857Sobrien#define LS LIA + 1 311218822Sdim { 0x3, 21, NULL, NULL, PPC_OPERAND_OPTIONAL }, 31289857Sobrien 31360484Sobrien /* The ME field in an M form instruction. */ 314218822Sdim#define ME LS + 1 31560484Sobrien#define ME_MASK (0x1f << 1) 316218822Sdim { 0x1f, 1, NULL, NULL, 0 }, 31760484Sobrien 31860484Sobrien /* The MB and ME fields in an M form instruction expressed a single 31960484Sobrien operand which is a bitmask indicating which bits to select. This 32060484Sobrien is a two operand form using PPC_OPERAND_NEXT. See the 32160484Sobrien description in opcode/ppc.h for what this means. */ 32260484Sobrien#define MBE ME + 1 323218822Sdim { 0x1f, 6, NULL, NULL, PPC_OPERAND_OPTIONAL | PPC_OPERAND_NEXT }, 324218822Sdim { -1, 0, insert_mbe, extract_mbe, 0 }, 32560484Sobrien 32660484Sobrien /* The MB or ME field in an MD or MDS form instruction. The high 32760484Sobrien bit is wrapped to the low end. */ 32860484Sobrien#define MB6 MBE + 2 32960484Sobrien#define ME6 MB6 33060484Sobrien#define MB6_MASK (0x3f << 5) 331218822Sdim { 0x3f, 5, insert_mb6, extract_mb6, 0 }, 33260484Sobrien 33360484Sobrien /* The NB field in an X form instruction. The value 32 is stored as 33460484Sobrien 0. */ 335218822Sdim#define NB MB6 + 1 336218822Sdim { 0x1f, 11, NULL, extract_nb, PPC_OPERAND_PLUS1 }, 33760484Sobrien 33860484Sobrien /* The NSI field in a D form instruction. This is the same as the 33960484Sobrien SI field, only negated. */ 34060484Sobrien#define NSI NB + 1 341218822Sdim { 0xffff, 0, insert_nsi, extract_nsi, 34260484Sobrien PPC_OPERAND_NEGATIVE | PPC_OPERAND_SIGNED }, 34360484Sobrien 344130561Sobrien /* The RA field in an D, DS, DQ, X, XO, M, or MDS form instruction. */ 34560484Sobrien#define RA NSI + 1 34660484Sobrien#define RA_MASK (0x1f << 16) 347218822Sdim { 0x1f, 16, NULL, NULL, PPC_OPERAND_GPR }, 34860484Sobrien 349130561Sobrien /* As above, but 0 in the RA field means zero, not r0. */ 350130561Sobrien#define RA0 RA + 1 351218822Sdim { 0x1f, 16, NULL, NULL, PPC_OPERAND_GPR_0 }, 352130561Sobrien 353130561Sobrien /* The RA field in the DQ form lq instruction, which has special 354130561Sobrien value restrictions. */ 355130561Sobrien#define RAQ RA0 + 1 356218822Sdim { 0x1f, 16, insert_raq, NULL, PPC_OPERAND_GPR_0 }, 357130561Sobrien 35860484Sobrien /* The RA field in a D or X form instruction which is an updating 35960484Sobrien load, which means that the RA field may not be zero and may not 36060484Sobrien equal the RT field. */ 361130561Sobrien#define RAL RAQ + 1 362218822Sdim { 0x1f, 16, insert_ral, NULL, PPC_OPERAND_GPR_0 }, 36360484Sobrien 36460484Sobrien /* The RA field in an lmw instruction, which has special value 36560484Sobrien restrictions. */ 36660484Sobrien#define RAM RAL + 1 367218822Sdim { 0x1f, 16, insert_ram, NULL, PPC_OPERAND_GPR_0 }, 36860484Sobrien 36960484Sobrien /* The RA field in a D or X form instruction which is an updating 37060484Sobrien store or an updating floating point load, which means that the RA 37160484Sobrien field may not be zero. */ 37260484Sobrien#define RAS RAM + 1 373218822Sdim { 0x1f, 16, insert_ras, NULL, PPC_OPERAND_GPR_0 }, 37460484Sobrien 375130561Sobrien /* The RA field of the tlbwe instruction, which is optional. */ 376130561Sobrien#define RAOPT RAS + 1 377218822Sdim { 0x1f, 16, NULL, NULL, PPC_OPERAND_GPR | PPC_OPERAND_OPTIONAL }, 378130561Sobrien 37960484Sobrien /* The RB field in an X, XO, M, or MDS form instruction. */ 380130561Sobrien#define RB RAOPT + 1 38160484Sobrien#define RB_MASK (0x1f << 11) 382218822Sdim { 0x1f, 11, NULL, NULL, PPC_OPERAND_GPR }, 38360484Sobrien 38460484Sobrien /* The RB field in an X form instruction when it must be the same as 38560484Sobrien the RS field in the instruction. This is used for extended 38660484Sobrien mnemonics like mr. */ 38760484Sobrien#define RBS RB + 1 388218822Sdim { 0x1f, 11, insert_rbs, extract_rbs, PPC_OPERAND_FAKE }, 38960484Sobrien 39060484Sobrien /* The RS field in a D, DS, X, XFX, XS, M, MD or MDS form 39160484Sobrien instruction or the RT field in a D, DS, X, XFX or XO form 39260484Sobrien instruction. */ 39360484Sobrien#define RS RBS + 1 39460484Sobrien#define RT RS 39560484Sobrien#define RT_MASK (0x1f << 21) 396218822Sdim { 0x1f, 21, NULL, NULL, PPC_OPERAND_GPR }, 39760484Sobrien 398218822Sdim /* The RS and RT fields of the DS form stq instruction, which have 399218822Sdim special value restrictions. */ 400130561Sobrien#define RSQ RS + 1 401218822Sdim#define RTQ RSQ 402218822Sdim { 0x1e, 21, NULL, NULL, PPC_OPERAND_GPR_0 }, 403130561Sobrien 404130561Sobrien /* The RS field of the tlbwe instruction, which is optional. */ 405218822Sdim#define RSO RSQ + 1 406218822Sdim#define RTO RSO 407218822Sdim { 0x1f, 21, NULL, NULL, PPC_OPERAND_GPR | PPC_OPERAND_OPTIONAL }, 408130561Sobrien 40960484Sobrien /* The SH field in an X or M form instruction. */ 410130561Sobrien#define SH RSO + 1 41160484Sobrien#define SH_MASK (0x1f << 11) 412218822Sdim /* The other UIMM field in a EVX form instruction. */ 413218822Sdim#define EVUIMM SH 414218822Sdim { 0x1f, 11, NULL, NULL, 0 }, 41560484Sobrien 41660484Sobrien /* The SH field in an MD form instruction. This is split. */ 41760484Sobrien#define SH6 SH + 1 41860484Sobrien#define SH6_MASK ((0x1f << 11) | (1 << 1)) 419218822Sdim { 0x3f, -1, insert_sh6, extract_sh6, 0 }, 42060484Sobrien 421130561Sobrien /* The SH field of the tlbwe instruction, which is optional. */ 422130561Sobrien#define SHO SH6 + 1 423218822Sdim { 0x1f, 11, NULL, NULL, PPC_OPERAND_OPTIONAL }, 424130561Sobrien 42560484Sobrien /* The SI field in a D form instruction. */ 426130561Sobrien#define SI SHO + 1 427218822Sdim { 0xffff, 0, NULL, NULL, PPC_OPERAND_SIGNED }, 42860484Sobrien 42960484Sobrien /* The SI field in a D form instruction when we accept a wide range 43060484Sobrien of positive values. */ 43160484Sobrien#define SISIGNOPT SI + 1 432218822Sdim { 0xffff, 0, NULL, NULL, PPC_OPERAND_SIGNED | PPC_OPERAND_SIGNOPT }, 43360484Sobrien 43460484Sobrien /* The SPR field in an XFX form instruction. This is flipped--the 43560484Sobrien lower 5 bits are stored in the upper 5 and vice- versa. */ 43660484Sobrien#define SPR SISIGNOPT + 1 437130561Sobrien#define PMR SPR 43860484Sobrien#define SPR_MASK (0x3ff << 11) 439218822Sdim { 0x3ff, 11, insert_spr, extract_spr, 0 }, 44060484Sobrien 44160484Sobrien /* The BAT index number in an XFX form m[ft]ibat[lu] instruction. */ 44260484Sobrien#define SPRBAT SPR + 1 44360484Sobrien#define SPRBAT_MASK (0x3 << 17) 444218822Sdim { 0x3, 17, NULL, NULL, 0 }, 44560484Sobrien 44660484Sobrien /* The SPRG register number in an XFX form m[ft]sprg instruction. */ 44760484Sobrien#define SPRG SPRBAT + 1 448218822Sdim { 0x1f, 16, insert_sprg, extract_sprg, 0 }, 44960484Sobrien 45060484Sobrien /* The SR field in an X form instruction. */ 45160484Sobrien#define SR SPRG + 1 452218822Sdim { 0xf, 16, NULL, NULL, 0 }, 45360484Sobrien 45489857Sobrien /* The STRM field in an X AltiVec form instruction. */ 45589857Sobrien#define STRM SR + 1 456218822Sdim { 0x3, 21, NULL, NULL, 0 }, 45789857Sobrien 45860484Sobrien /* The SV field in a POWER SC form instruction. */ 45989857Sobrien#define SV STRM + 1 460218822Sdim { 0x3fff, 2, NULL, NULL, 0 }, 46160484Sobrien 46260484Sobrien /* The TBR field in an XFX form instruction. This is like the SPR 46360484Sobrien field, but it is optional. */ 46460484Sobrien#define TBR SV + 1 465218822Sdim { 0x3ff, 11, insert_tbr, extract_tbr, PPC_OPERAND_OPTIONAL }, 46660484Sobrien 46760484Sobrien /* The TO field in a D or X form instruction. */ 46860484Sobrien#define TO TBR + 1 46960484Sobrien#define TO_MASK (0x1f << 21) 470218822Sdim { 0x1f, 21, NULL, NULL, 0 }, 47160484Sobrien 47260484Sobrien /* The UI field in a D form instruction. */ 473218822Sdim#define UI TO + 1 474218822Sdim { 0xffff, 0, NULL, NULL, 0 }, 47577298Sobrien 476130561Sobrien /* The VA field in a VA, VX or VXR form instruction. */ 47777298Sobrien#define VA UI + 1 478218822Sdim { 0x1f, 16, NULL, NULL, PPC_OPERAND_VR }, 47977298Sobrien 480130561Sobrien /* The VB field in a VA, VX or VXR form instruction. */ 48177298Sobrien#define VB VA + 1 482218822Sdim { 0x1f, 11, NULL, NULL, PPC_OPERAND_VR }, 48377298Sobrien 484130561Sobrien /* The VC field in a VA form instruction. */ 48577298Sobrien#define VC VB + 1 486218822Sdim { 0x1f, 6, NULL, NULL, PPC_OPERAND_VR }, 48777298Sobrien 488130561Sobrien /* The VD or VS field in a VA, VX, VXR or X form instruction. */ 48977298Sobrien#define VD VC + 1 49077298Sobrien#define VS VD 491218822Sdim { 0x1f, 21, NULL, NULL, PPC_OPERAND_VR }, 49277298Sobrien 493130561Sobrien /* The SIMM field in a VX form instruction. */ 49477298Sobrien#define SIMM VD + 1 495218822Sdim { 0x1f, 16, NULL, NULL, PPC_OPERAND_SIGNED}, 49677298Sobrien 497218822Sdim /* The UIMM field in a VX form instruction, and TE in Z form. */ 49877298Sobrien#define UIMM SIMM + 1 499218822Sdim#define TE UIMM 500218822Sdim { 0x1f, 16, NULL, NULL, 0 }, 50177298Sobrien 502130561Sobrien /* The SHB field in a VA form instruction. */ 50377298Sobrien#define SHB UIMM + 1 504218822Sdim { 0xf, 6, NULL, NULL, 0 }, 50594536Sobrien 506130561Sobrien /* The other UIMM field in a half word EVX form instruction. */ 507218822Sdim#define EVUIMM_2 SHB + 1 508218822Sdim { 0x3e, 10, NULL, NULL, PPC_OPERAND_PARENS }, 509130561Sobrien 510130561Sobrien /* The other UIMM field in a word EVX form instruction. */ 511130561Sobrien#define EVUIMM_4 EVUIMM_2 + 1 512218822Sdim { 0x7c, 9, NULL, NULL, PPC_OPERAND_PARENS }, 513130561Sobrien 514130561Sobrien /* The other UIMM field in a double EVX form instruction. */ 515130561Sobrien#define EVUIMM_8 EVUIMM_4 + 1 516218822Sdim { 0xf8, 8, NULL, NULL, PPC_OPERAND_PARENS }, 517130561Sobrien 51894536Sobrien /* The WS field. */ 519130561Sobrien#define WS EVUIMM_8 + 1 520218822Sdim { 0x7, 11, NULL, NULL, 0 }, 52194536Sobrien 522218822Sdim /* The L field in an mtmsrd or A form instruction or W in an X form. */ 523218822Sdim#define A_L WS + 1 524218822Sdim#define W A_L 525218822Sdim { 0x1, 16, NULL, NULL, PPC_OPERAND_OPTIONAL }, 52694536Sobrien 527218822Sdim#define RMC A_L + 1 528218822Sdim { 0x3, 9, NULL, NULL, 0 }, 529218822Sdim 530218822Sdim#define R RMC + 1 531218822Sdim { 0x1, 16, NULL, NULL, 0 }, 532218822Sdim 533218822Sdim#define SP R + 1 534218822Sdim { 0x3, 19, NULL, NULL, 0 }, 535218822Sdim 536218822Sdim#define S SP + 1 537218822Sdim { 0x1, 20, NULL, NULL, 0 }, 538218822Sdim 539218822Sdim /* SH field starting at bit position 16. */ 540218822Sdim#define SH16 S + 1 541218822Sdim /* The DCM and DGM fields in a Z form instruction. */ 542218822Sdim#define DCM SH16 543218822Sdim#define DGM DCM 544218822Sdim { 0x3f, 10, NULL, NULL, 0 }, 545218822Sdim 546218822Sdim /* The EH field in larx instruction. */ 547218822Sdim#define EH SH16 + 1 548218822Sdim { 0x1, 0, NULL, NULL, PPC_OPERAND_OPTIONAL }, 549218822Sdim 550218822Sdim /* The L field in an mtfsf or XFL form instruction. */ 551218822Sdim#define XFL_L EH + 1 552218822Sdim { 0x1, 25, NULL, NULL, PPC_OPERAND_OPTIONAL}, 55360484Sobrien}; 55460484Sobrien 555218822Sdimconst unsigned int num_powerpc_operands = (sizeof (powerpc_operands) 556218822Sdim / sizeof (powerpc_operands[0])); 557218822Sdim 55860484Sobrien/* The functions used to insert and extract complicated operands. */ 55960484Sobrien 56060484Sobrien/* The BA field in an XL form instruction when it must be the same as 56160484Sobrien the BT field in the same instruction. This operand is marked FAKE. 56260484Sobrien The insertion function just copies the BT field into the BA field, 56360484Sobrien and the extraction function just checks that the fields are the 56460484Sobrien same. */ 56560484Sobrien 56660484Sobrienstatic unsigned long 567130561Sobrieninsert_bat (unsigned long insn, 568130561Sobrien long value ATTRIBUTE_UNUSED, 569130561Sobrien int dialect ATTRIBUTE_UNUSED, 570130561Sobrien const char **errmsg ATTRIBUTE_UNUSED) 57160484Sobrien{ 57260484Sobrien return insn | (((insn >> 21) & 0x1f) << 16); 57360484Sobrien} 57460484Sobrien 57560484Sobrienstatic long 576130561Sobrienextract_bat (unsigned long insn, 577130561Sobrien int dialect ATTRIBUTE_UNUSED, 578130561Sobrien int *invalid) 57960484Sobrien{ 580130561Sobrien if (((insn >> 21) & 0x1f) != ((insn >> 16) & 0x1f)) 58160484Sobrien *invalid = 1; 58260484Sobrien return 0; 58360484Sobrien} 58460484Sobrien 58560484Sobrien/* The BB field in an XL form instruction when it must be the same as 58660484Sobrien the BA field in the same instruction. This operand is marked FAKE. 58760484Sobrien The insertion function just copies the BA field into the BB field, 58860484Sobrien and the extraction function just checks that the fields are the 58960484Sobrien same. */ 59060484Sobrien 59160484Sobrienstatic unsigned long 592130561Sobrieninsert_bba (unsigned long insn, 593130561Sobrien long value ATTRIBUTE_UNUSED, 594130561Sobrien int dialect ATTRIBUTE_UNUSED, 595130561Sobrien const char **errmsg ATTRIBUTE_UNUSED) 59660484Sobrien{ 59760484Sobrien return insn | (((insn >> 16) & 0x1f) << 11); 59860484Sobrien} 59960484Sobrien 60060484Sobrienstatic long 601130561Sobrienextract_bba (unsigned long insn, 602130561Sobrien int dialect ATTRIBUTE_UNUSED, 603130561Sobrien int *invalid) 60460484Sobrien{ 605130561Sobrien if (((insn >> 16) & 0x1f) != ((insn >> 11) & 0x1f)) 60660484Sobrien *invalid = 1; 60760484Sobrien return 0; 60860484Sobrien} 60960484Sobrien 61060484Sobrien/* The BD field in a B form instruction when the - modifier is used. 61160484Sobrien This modifier means that the branch is not expected to be taken. 61292828Sobrien For chips built to versions of the architecture prior to version 2 61392828Sobrien (ie. not Power4 compatible), we set the y bit of the BO field to 1 61492828Sobrien if the offset is negative. When extracting, we require that the y 61592828Sobrien bit be 1 and that the offset be positive, since if the y bit is 0 61692828Sobrien we just want to print the normal form of the instruction. 61792828Sobrien Power4 compatible targets use two bits, "a", and "t", instead of 61892828Sobrien the "y" bit. "at" == 00 => no hint, "at" == 01 => unpredictable, 61992828Sobrien "at" == 10 => not taken, "at" == 11 => taken. The "t" bit is 00001 62092828Sobrien in BO field, the "a" bit is 00010 for branch on CR(BI) and 01000 621218822Sdim for branch on CTR. We only handle the taken/not-taken hint here. 622218822Sdim Note that we don't relax the conditions tested here when 623218822Sdim disassembling with -Many because insns using extract_bdm and 624218822Sdim extract_bdp always occur in pairs. One or the other will always 625218822Sdim be valid. */ 62660484Sobrien 62760484Sobrienstatic unsigned long 628130561Sobrieninsert_bdm (unsigned long insn, 629130561Sobrien long value, 630130561Sobrien int dialect, 631130561Sobrien const char **errmsg ATTRIBUTE_UNUSED) 63260484Sobrien{ 63392828Sobrien if ((dialect & PPC_OPCODE_POWER4) == 0) 63489857Sobrien { 63589857Sobrien if ((value & 0x8000) != 0) 63689857Sobrien insn |= 1 << 21; 63789857Sobrien } 63889857Sobrien else 63989857Sobrien { 64089857Sobrien if ((insn & (0x14 << 21)) == (0x04 << 21)) 64189857Sobrien insn |= 0x02 << 21; 64289857Sobrien else if ((insn & (0x14 << 21)) == (0x10 << 21)) 64389857Sobrien insn |= 0x08 << 21; 64489857Sobrien } 64560484Sobrien return insn | (value & 0xfffc); 64660484Sobrien} 64760484Sobrien 64860484Sobrienstatic long 649130561Sobrienextract_bdm (unsigned long insn, 650130561Sobrien int dialect, 651130561Sobrien int *invalid) 65260484Sobrien{ 653130561Sobrien if ((dialect & PPC_OPCODE_POWER4) == 0) 65489857Sobrien { 655130561Sobrien if (((insn & (1 << 21)) == 0) != ((insn & (1 << 15)) == 0)) 656130561Sobrien *invalid = 1; 65789857Sobrien } 658130561Sobrien else 659130561Sobrien { 660130561Sobrien if ((insn & (0x17 << 21)) != (0x06 << 21) 661130561Sobrien && (insn & (0x1d << 21)) != (0x18 << 21)) 662130561Sobrien *invalid = 1; 663130561Sobrien } 664130561Sobrien 66589857Sobrien return ((insn & 0xfffc) ^ 0x8000) - 0x8000; 66660484Sobrien} 66760484Sobrien 66860484Sobrien/* The BD field in a B form instruction when the + modifier is used. 66960484Sobrien This is like BDM, above, except that the branch is expected to be 67060484Sobrien taken. */ 67160484Sobrien 67260484Sobrienstatic unsigned long 673130561Sobrieninsert_bdp (unsigned long insn, 674130561Sobrien long value, 675130561Sobrien int dialect, 676130561Sobrien const char **errmsg ATTRIBUTE_UNUSED) 67760484Sobrien{ 67892828Sobrien if ((dialect & PPC_OPCODE_POWER4) == 0) 67989857Sobrien { 68089857Sobrien if ((value & 0x8000) == 0) 68189857Sobrien insn |= 1 << 21; 68289857Sobrien } 68389857Sobrien else 68489857Sobrien { 68589857Sobrien if ((insn & (0x14 << 21)) == (0x04 << 21)) 68689857Sobrien insn |= 0x03 << 21; 68789857Sobrien else if ((insn & (0x14 << 21)) == (0x10 << 21)) 68889857Sobrien insn |= 0x09 << 21; 68989857Sobrien } 69060484Sobrien return insn | (value & 0xfffc); 69160484Sobrien} 69260484Sobrien 69360484Sobrienstatic long 694130561Sobrienextract_bdp (unsigned long insn, 695130561Sobrien int dialect, 696130561Sobrien int *invalid) 69760484Sobrien{ 698130561Sobrien if ((dialect & PPC_OPCODE_POWER4) == 0) 69989857Sobrien { 700130561Sobrien if (((insn & (1 << 21)) == 0) == ((insn & (1 << 15)) == 0)) 701130561Sobrien *invalid = 1; 70289857Sobrien } 703130561Sobrien else 704130561Sobrien { 705130561Sobrien if ((insn & (0x17 << 21)) != (0x07 << 21) 706130561Sobrien && (insn & (0x1d << 21)) != (0x19 << 21)) 707130561Sobrien *invalid = 1; 708130561Sobrien } 709130561Sobrien 71089857Sobrien return ((insn & 0xfffc) ^ 0x8000) - 0x8000; 71160484Sobrien} 71260484Sobrien 71360484Sobrien/* Check for legal values of a BO field. */ 71460484Sobrien 71560484Sobrienstatic int 716218822Sdimvalid_bo (long value, int dialect, int extract) 71760484Sobrien{ 71892828Sobrien if ((dialect & PPC_OPCODE_POWER4) == 0) 71960484Sobrien { 720218822Sdim int valid; 72189857Sobrien /* Certain encodings have bits that are required to be zero. 72289857Sobrien These are (z must be zero, y may be anything): 72389857Sobrien 001zy 72489857Sobrien 011zy 72589857Sobrien 1z00y 72689857Sobrien 1z01y 72789857Sobrien 1z1zz 72889857Sobrien */ 72989857Sobrien switch (value & 0x14) 73089857Sobrien { 73189857Sobrien default: 73289857Sobrien case 0: 733218822Sdim valid = 1; 734218822Sdim break; 73589857Sobrien case 0x4: 736218822Sdim valid = (value & 0x2) == 0; 737218822Sdim break; 73889857Sobrien case 0x10: 739218822Sdim valid = (value & 0x8) == 0; 740218822Sdim break; 74189857Sobrien case 0x14: 742218822Sdim valid = value == 0x14; 743218822Sdim break; 74489857Sobrien } 745218822Sdim /* When disassembling with -Many, accept power4 encodings too. */ 746218822Sdim if (valid 747218822Sdim || (dialect & PPC_OPCODE_ANY) == 0 748218822Sdim || !extract) 749218822Sdim return valid; 75060484Sobrien } 751218822Sdim 752218822Sdim /* Certain encodings have bits that are required to be zero. 753218822Sdim These are (z must be zero, a & t may be anything): 754218822Sdim 0000z 755218822Sdim 0001z 756218822Sdim 0100z 757218822Sdim 0101z 758218822Sdim 001at 759218822Sdim 011at 760218822Sdim 1a00t 761218822Sdim 1a01t 762218822Sdim 1z1zz 763218822Sdim */ 764218822Sdim if ((value & 0x14) == 0) 765218822Sdim return (value & 0x1) == 0; 766218822Sdim else if ((value & 0x14) == 0x14) 767218822Sdim return value == 0x14; 76889857Sobrien else 769218822Sdim return 1; 77060484Sobrien} 77160484Sobrien 77260484Sobrien/* The BO field in a B form instruction. Warn about attempts to set 77360484Sobrien the field to an illegal value. */ 77460484Sobrien 77560484Sobrienstatic unsigned long 776130561Sobrieninsert_bo (unsigned long insn, 777130561Sobrien long value, 778130561Sobrien int dialect, 779130561Sobrien const char **errmsg) 78060484Sobrien{ 781218822Sdim if (!valid_bo (value, dialect, 0)) 78260484Sobrien *errmsg = _("invalid conditional option"); 78360484Sobrien return insn | ((value & 0x1f) << 21); 78460484Sobrien} 78560484Sobrien 78660484Sobrienstatic long 787130561Sobrienextract_bo (unsigned long insn, 788130561Sobrien int dialect, 789130561Sobrien int *invalid) 79060484Sobrien{ 79160484Sobrien long value; 79260484Sobrien 79360484Sobrien value = (insn >> 21) & 0x1f; 794218822Sdim if (!valid_bo (value, dialect, 1)) 79560484Sobrien *invalid = 1; 79660484Sobrien return value; 79760484Sobrien} 79860484Sobrien 79960484Sobrien/* The BO field in a B form instruction when the + or - modifier is 80060484Sobrien used. This is like the BO field, but it must be even. When 80160484Sobrien extracting it, we force it to be even. */ 80260484Sobrien 80360484Sobrienstatic unsigned long 804130561Sobrieninsert_boe (unsigned long insn, 805130561Sobrien long value, 806130561Sobrien int dialect, 807130561Sobrien const char **errmsg) 80860484Sobrien{ 809218822Sdim if (!valid_bo (value, dialect, 0)) 810130561Sobrien *errmsg = _("invalid conditional option"); 811130561Sobrien else if ((value & 1) != 0) 812130561Sobrien *errmsg = _("attempt to set y bit when using + or - modifier"); 813130561Sobrien 81460484Sobrien return insn | ((value & 0x1f) << 21); 81560484Sobrien} 81660484Sobrien 81760484Sobrienstatic long 818130561Sobrienextract_boe (unsigned long insn, 819130561Sobrien int dialect, 820130561Sobrien int *invalid) 82160484Sobrien{ 82260484Sobrien long value; 82360484Sobrien 82460484Sobrien value = (insn >> 21) & 0x1f; 825218822Sdim if (!valid_bo (value, dialect, 1)) 82660484Sobrien *invalid = 1; 82760484Sobrien return value & 0x1e; 82860484Sobrien} 82960484Sobrien 830130561Sobrien/* FXM mask in mfcr and mtcrf instructions. */ 831130561Sobrien 832130561Sobrienstatic unsigned long 833130561Sobrieninsert_fxm (unsigned long insn, 834130561Sobrien long value, 835130561Sobrien int dialect, 836130561Sobrien const char **errmsg) 837130561Sobrien{ 838218822Sdim /* If we're handling the mfocrf and mtocrf insns ensure that exactly 839218822Sdim one bit of the mask field is set. */ 840218822Sdim if ((insn & (1 << 20)) != 0) 841218822Sdim { 842218822Sdim if (value == 0 || (value & -value) != value) 843218822Sdim { 844218822Sdim *errmsg = _("invalid mask field"); 845218822Sdim value = 0; 846218822Sdim } 847218822Sdim } 848218822Sdim 849130561Sobrien /* If the optional field on mfcr is missing that means we want to use 850130561Sobrien the old form of the instruction that moves the whole cr. In that 851130561Sobrien case we'll have VALUE zero. There doesn't seem to be a way to 852130561Sobrien distinguish this from the case where someone writes mfcr %r3,0. */ 853218822Sdim else if (value == 0) 854130561Sobrien ; 855130561Sobrien 856130561Sobrien /* If only one bit of the FXM field is set, we can use the new form 857130561Sobrien of the instruction, which is faster. Unlike the Power4 branch hint 858218822Sdim encoding, this is not backward compatible. Do not generate the 859218822Sdim new form unless -mpower4 has been given, or -many and the two 860218822Sdim operand form of mfcr was used. */ 861218822Sdim else if ((value & -value) == value 862218822Sdim && ((dialect & PPC_OPCODE_POWER4) != 0 863218822Sdim || ((dialect & PPC_OPCODE_ANY) != 0 864218822Sdim && (insn & (0x3ff << 1)) == 19 << 1))) 865130561Sobrien insn |= 1 << 20; 866130561Sobrien 867130561Sobrien /* Any other value on mfcr is an error. */ 868130561Sobrien else if ((insn & (0x3ff << 1)) == 19 << 1) 869130561Sobrien { 870130561Sobrien *errmsg = _("ignoring invalid mfcr mask"); 871130561Sobrien value = 0; 872130561Sobrien } 873130561Sobrien 874130561Sobrien return insn | ((value & 0xff) << 12); 875130561Sobrien} 876130561Sobrien 877130561Sobrienstatic long 878130561Sobrienextract_fxm (unsigned long insn, 879218822Sdim int dialect ATTRIBUTE_UNUSED, 880130561Sobrien int *invalid) 881130561Sobrien{ 882130561Sobrien long mask = (insn >> 12) & 0xff; 883130561Sobrien 884130561Sobrien /* Is this a Power4 insn? */ 885130561Sobrien if ((insn & (1 << 20)) != 0) 886130561Sobrien { 887218822Sdim /* Exactly one bit of MASK should be set. */ 888218822Sdim if (mask == 0 || (mask & -mask) != mask) 889130561Sobrien *invalid = 1; 890130561Sobrien } 891130561Sobrien 892130561Sobrien /* Check that non-power4 form of mfcr has a zero MASK. */ 893130561Sobrien else if ((insn & (0x3ff << 1)) == 19 << 1) 894130561Sobrien { 895130561Sobrien if (mask != 0) 896130561Sobrien *invalid = 1; 897130561Sobrien } 898130561Sobrien 899130561Sobrien return mask; 900130561Sobrien} 901130561Sobrien 90260484Sobrien/* The MB and ME fields in an M form instruction expressed as a single 90360484Sobrien operand which is itself a bitmask. The extraction function always 90460484Sobrien marks it as invalid, since we never want to recognize an 90560484Sobrien instruction which uses a field of this type. */ 90660484Sobrien 90760484Sobrienstatic unsigned long 908130561Sobrieninsert_mbe (unsigned long insn, 909130561Sobrien long value, 910130561Sobrien int dialect ATTRIBUTE_UNUSED, 911130561Sobrien const char **errmsg) 91260484Sobrien{ 91360484Sobrien unsigned long uval, mask; 91460484Sobrien int mb, me, mx, count, last; 91560484Sobrien 91660484Sobrien uval = value; 91760484Sobrien 91860484Sobrien if (uval == 0) 91960484Sobrien { 920130561Sobrien *errmsg = _("illegal bitmask"); 92160484Sobrien return insn; 92260484Sobrien } 92360484Sobrien 92460484Sobrien mb = 0; 92560484Sobrien me = 32; 92660484Sobrien if ((uval & 1) != 0) 92760484Sobrien last = 1; 92860484Sobrien else 92960484Sobrien last = 0; 93060484Sobrien count = 0; 93160484Sobrien 93260484Sobrien /* mb: location of last 0->1 transition */ 93360484Sobrien /* me: location of last 1->0 transition */ 93460484Sobrien /* count: # transitions */ 93560484Sobrien 936130561Sobrien for (mx = 0, mask = 1L << 31; mx < 32; ++mx, mask >>= 1) 93760484Sobrien { 93860484Sobrien if ((uval & mask) && !last) 93960484Sobrien { 94060484Sobrien ++count; 94160484Sobrien mb = mx; 94260484Sobrien last = 1; 94360484Sobrien } 94460484Sobrien else if (!(uval & mask) && last) 94560484Sobrien { 94660484Sobrien ++count; 94760484Sobrien me = mx; 94860484Sobrien last = 0; 94960484Sobrien } 95060484Sobrien } 95160484Sobrien if (me == 0) 95260484Sobrien me = 32; 95360484Sobrien 95460484Sobrien if (count != 2 && (count != 0 || ! last)) 955130561Sobrien *errmsg = _("illegal bitmask"); 95660484Sobrien 95760484Sobrien return insn | (mb << 6) | ((me - 1) << 1); 95860484Sobrien} 95960484Sobrien 96060484Sobrienstatic long 961130561Sobrienextract_mbe (unsigned long insn, 962130561Sobrien int dialect ATTRIBUTE_UNUSED, 963130561Sobrien int *invalid) 96460484Sobrien{ 96560484Sobrien long ret; 96660484Sobrien int mb, me; 96760484Sobrien int i; 96860484Sobrien 969130561Sobrien *invalid = 1; 97060484Sobrien 97160484Sobrien mb = (insn >> 6) & 0x1f; 97260484Sobrien me = (insn >> 1) & 0x1f; 97360484Sobrien if (mb < me + 1) 97460484Sobrien { 97560484Sobrien ret = 0; 97660484Sobrien for (i = mb; i <= me; i++) 977130561Sobrien ret |= 1L << (31 - i); 97860484Sobrien } 97960484Sobrien else if (mb == me + 1) 98060484Sobrien ret = ~0; 98160484Sobrien else /* (mb > me + 1) */ 98260484Sobrien { 983130561Sobrien ret = ~0; 98460484Sobrien for (i = me + 1; i < mb; i++) 985130561Sobrien ret &= ~(1L << (31 - i)); 98660484Sobrien } 98760484Sobrien return ret; 98860484Sobrien} 98960484Sobrien 99060484Sobrien/* The MB or ME field in an MD or MDS form instruction. The high bit 99160484Sobrien is wrapped to the low end. */ 99260484Sobrien 99360484Sobrienstatic unsigned long 994130561Sobrieninsert_mb6 (unsigned long insn, 995130561Sobrien long value, 996130561Sobrien int dialect ATTRIBUTE_UNUSED, 997130561Sobrien const char **errmsg ATTRIBUTE_UNUSED) 99860484Sobrien{ 99960484Sobrien return insn | ((value & 0x1f) << 6) | (value & 0x20); 100060484Sobrien} 100160484Sobrien 100260484Sobrienstatic long 1003130561Sobrienextract_mb6 (unsigned long insn, 1004130561Sobrien int dialect ATTRIBUTE_UNUSED, 1005130561Sobrien int *invalid ATTRIBUTE_UNUSED) 100660484Sobrien{ 100760484Sobrien return ((insn >> 6) & 0x1f) | (insn & 0x20); 100860484Sobrien} 100960484Sobrien 101060484Sobrien/* The NB field in an X form instruction. The value 32 is stored as 101160484Sobrien 0. */ 101260484Sobrien 101360484Sobrienstatic long 1014130561Sobrienextract_nb (unsigned long insn, 1015130561Sobrien int dialect ATTRIBUTE_UNUSED, 1016130561Sobrien int *invalid ATTRIBUTE_UNUSED) 101760484Sobrien{ 101860484Sobrien long ret; 101960484Sobrien 102060484Sobrien ret = (insn >> 11) & 0x1f; 102160484Sobrien if (ret == 0) 102260484Sobrien ret = 32; 102360484Sobrien return ret; 102460484Sobrien} 102560484Sobrien 102660484Sobrien/* The NSI field in a D form instruction. This is the same as the SI 102760484Sobrien field, only negated. The extraction function always marks it as 102860484Sobrien invalid, since we never want to recognize an instruction which uses 102960484Sobrien a field of this type. */ 103060484Sobrien 103160484Sobrienstatic unsigned long 1032130561Sobrieninsert_nsi (unsigned long insn, 1033130561Sobrien long value, 1034130561Sobrien int dialect ATTRIBUTE_UNUSED, 1035130561Sobrien const char **errmsg ATTRIBUTE_UNUSED) 103660484Sobrien{ 1037130561Sobrien return insn | (-value & 0xffff); 103860484Sobrien} 103960484Sobrien 104060484Sobrienstatic long 1041130561Sobrienextract_nsi (unsigned long insn, 1042130561Sobrien int dialect ATTRIBUTE_UNUSED, 1043130561Sobrien int *invalid) 104460484Sobrien{ 1045130561Sobrien *invalid = 1; 1046130561Sobrien return -(((insn & 0xffff) ^ 0x8000) - 0x8000); 104760484Sobrien} 104860484Sobrien 104960484Sobrien/* The RA field in a D or X form instruction which is an updating 105060484Sobrien load, which means that the RA field may not be zero and may not 105160484Sobrien equal the RT field. */ 105260484Sobrien 105360484Sobrienstatic unsigned long 1054130561Sobrieninsert_ral (unsigned long insn, 1055130561Sobrien long value, 1056130561Sobrien int dialect ATTRIBUTE_UNUSED, 1057130561Sobrien const char **errmsg) 105860484Sobrien{ 105960484Sobrien if (value == 0 106060484Sobrien || (unsigned long) value == ((insn >> 21) & 0x1f)) 106160484Sobrien *errmsg = "invalid register operand when updating"; 106260484Sobrien return insn | ((value & 0x1f) << 16); 106360484Sobrien} 106460484Sobrien 106560484Sobrien/* The RA field in an lmw instruction, which has special value 106660484Sobrien restrictions. */ 106760484Sobrien 106860484Sobrienstatic unsigned long 1069130561Sobrieninsert_ram (unsigned long insn, 1070130561Sobrien long value, 1071130561Sobrien int dialect ATTRIBUTE_UNUSED, 1072130561Sobrien const char **errmsg) 107360484Sobrien{ 107460484Sobrien if ((unsigned long) value >= ((insn >> 21) & 0x1f)) 107560484Sobrien *errmsg = _("index register in load range"); 107660484Sobrien return insn | ((value & 0x1f) << 16); 107760484Sobrien} 107860484Sobrien 1079130561Sobrien/* The RA field in the DQ form lq instruction, which has special 1080130561Sobrien value restrictions. */ 1081130561Sobrien 1082130561Sobrienstatic unsigned long 1083130561Sobrieninsert_raq (unsigned long insn, 1084130561Sobrien long value, 1085130561Sobrien int dialect ATTRIBUTE_UNUSED, 1086130561Sobrien const char **errmsg) 1087130561Sobrien{ 1088130561Sobrien long rtvalue = (insn & RT_MASK) >> 21; 1089130561Sobrien 1090130561Sobrien if (value == rtvalue) 1091130561Sobrien *errmsg = _("source and target register operands must be different"); 1092130561Sobrien return insn | ((value & 0x1f) << 16); 1093130561Sobrien} 1094130561Sobrien 109560484Sobrien/* The RA field in a D or X form instruction which is an updating 109660484Sobrien store or an updating floating point load, which means that the RA 109760484Sobrien field may not be zero. */ 109860484Sobrien 109960484Sobrienstatic unsigned long 1100130561Sobrieninsert_ras (unsigned long insn, 1101130561Sobrien long value, 1102130561Sobrien int dialect ATTRIBUTE_UNUSED, 1103130561Sobrien const char **errmsg) 110460484Sobrien{ 110560484Sobrien if (value == 0) 110660484Sobrien *errmsg = _("invalid register operand when updating"); 110760484Sobrien return insn | ((value & 0x1f) << 16); 110860484Sobrien} 110960484Sobrien 111060484Sobrien/* The RB field in an X form instruction when it must be the same as 111160484Sobrien the RS field in the instruction. This is used for extended 111260484Sobrien mnemonics like mr. This operand is marked FAKE. The insertion 111360484Sobrien function just copies the BT field into the BA field, and the 111460484Sobrien extraction function just checks that the fields are the same. */ 111560484Sobrien 111660484Sobrienstatic unsigned long 1117130561Sobrieninsert_rbs (unsigned long insn, 1118130561Sobrien long value ATTRIBUTE_UNUSED, 1119130561Sobrien int dialect ATTRIBUTE_UNUSED, 1120130561Sobrien const char **errmsg ATTRIBUTE_UNUSED) 112160484Sobrien{ 112260484Sobrien return insn | (((insn >> 21) & 0x1f) << 11); 112360484Sobrien} 112460484Sobrien 112560484Sobrienstatic long 1126130561Sobrienextract_rbs (unsigned long insn, 1127130561Sobrien int dialect ATTRIBUTE_UNUSED, 1128130561Sobrien int *invalid) 112960484Sobrien{ 1130130561Sobrien if (((insn >> 21) & 0x1f) != ((insn >> 11) & 0x1f)) 113160484Sobrien *invalid = 1; 113260484Sobrien return 0; 113360484Sobrien} 113460484Sobrien 113560484Sobrien/* The SH field in an MD form instruction. This is split. */ 113660484Sobrien 113760484Sobrienstatic unsigned long 1138130561Sobrieninsert_sh6 (unsigned long insn, 1139130561Sobrien long value, 1140130561Sobrien int dialect ATTRIBUTE_UNUSED, 1141130561Sobrien const char **errmsg ATTRIBUTE_UNUSED) 114260484Sobrien{ 114360484Sobrien return insn | ((value & 0x1f) << 11) | ((value & 0x20) >> 4); 114460484Sobrien} 114560484Sobrien 114660484Sobrienstatic long 1147130561Sobrienextract_sh6 (unsigned long insn, 1148130561Sobrien int dialect ATTRIBUTE_UNUSED, 1149130561Sobrien int *invalid ATTRIBUTE_UNUSED) 115060484Sobrien{ 115160484Sobrien return ((insn >> 11) & 0x1f) | ((insn << 4) & 0x20); 115260484Sobrien} 115360484Sobrien 115460484Sobrien/* The SPR field in an XFX form instruction. This is flipped--the 115560484Sobrien lower 5 bits are stored in the upper 5 and vice- versa. */ 115660484Sobrien 115760484Sobrienstatic unsigned long 1158130561Sobrieninsert_spr (unsigned long insn, 1159130561Sobrien long value, 1160130561Sobrien int dialect ATTRIBUTE_UNUSED, 1161130561Sobrien const char **errmsg ATTRIBUTE_UNUSED) 116260484Sobrien{ 116360484Sobrien return insn | ((value & 0x1f) << 16) | ((value & 0x3e0) << 6); 116460484Sobrien} 116560484Sobrien 116660484Sobrienstatic long 1167130561Sobrienextract_spr (unsigned long insn, 1168130561Sobrien int dialect ATTRIBUTE_UNUSED, 1169130561Sobrien int *invalid ATTRIBUTE_UNUSED) 117060484Sobrien{ 117160484Sobrien return ((insn >> 16) & 0x1f) | ((insn >> 6) & 0x3e0); 117260484Sobrien} 117360484Sobrien 1174218822Sdim/* Some dialects have 8 SPRG registers instead of the standard 4. */ 1175218822Sdim 1176218822Sdimstatic unsigned long 1177218822Sdiminsert_sprg (unsigned long insn, 1178218822Sdim long value, 1179218822Sdim int dialect, 1180218822Sdim const char **errmsg) 1181218822Sdim{ 1182218822Sdim /* This check uses PPC_OPCODE_403 because PPC405 is later defined 1183218822Sdim as a synonym. If ever a 405 specific dialect is added this 1184218822Sdim check should use that instead. */ 1185218822Sdim if (value > 7 1186218822Sdim || (value > 3 1187218822Sdim && (dialect & (PPC_OPCODE_BOOKE | PPC_OPCODE_403)) == 0)) 1188218822Sdim *errmsg = _("invalid sprg number"); 1189218822Sdim 1190218822Sdim /* If this is mfsprg4..7 then use spr 260..263 which can be read in 1191218822Sdim user mode. Anything else must use spr 272..279. */ 1192218822Sdim if (value <= 3 || (insn & 0x100) != 0) 1193218822Sdim value |= 0x10; 1194218822Sdim 1195218822Sdim return insn | ((value & 0x17) << 16); 1196218822Sdim} 1197218822Sdim 1198218822Sdimstatic long 1199218822Sdimextract_sprg (unsigned long insn, 1200218822Sdim int dialect, 1201218822Sdim int *invalid) 1202218822Sdim{ 1203218822Sdim unsigned long val = (insn >> 16) & 0x1f; 1204218822Sdim 1205218822Sdim /* mfsprg can use 260..263 and 272..279. mtsprg only uses spr 272..279 1206218822Sdim If not BOOKE or 405, then both use only 272..275. */ 1207218822Sdim if (val <= 3 1208218822Sdim || (val < 0x10 && (insn & 0x100) != 0) 1209218822Sdim || (val - 0x10 > 3 1210218822Sdim && (dialect & (PPC_OPCODE_BOOKE | PPC_OPCODE_403)) == 0)) 1211218822Sdim *invalid = 1; 1212218822Sdim return val & 7; 1213218822Sdim} 1214218822Sdim 121560484Sobrien/* The TBR field in an XFX instruction. This is just like SPR, but it 121660484Sobrien is optional. When TBR is omitted, it must be inserted as 268 (the 121760484Sobrien magic number of the TB register). These functions treat 0 121860484Sobrien (indicating an omitted optional operand) as 268. This means that 121960484Sobrien ``mftb 4,0'' is not handled correctly. This does not matter very 122060484Sobrien much, since the architecture manual does not define mftb as 122160484Sobrien accepting any values other than 268 or 269. */ 122260484Sobrien 122360484Sobrien#define TB (268) 122460484Sobrien 122560484Sobrienstatic unsigned long 1226130561Sobrieninsert_tbr (unsigned long insn, 1227130561Sobrien long value, 1228130561Sobrien int dialect ATTRIBUTE_UNUSED, 1229130561Sobrien const char **errmsg ATTRIBUTE_UNUSED) 123060484Sobrien{ 123160484Sobrien if (value == 0) 123260484Sobrien value = TB; 123360484Sobrien return insn | ((value & 0x1f) << 16) | ((value & 0x3e0) << 6); 123460484Sobrien} 123560484Sobrien 123660484Sobrienstatic long 1237130561Sobrienextract_tbr (unsigned long insn, 1238130561Sobrien int dialect ATTRIBUTE_UNUSED, 1239130561Sobrien int *invalid ATTRIBUTE_UNUSED) 124060484Sobrien{ 124160484Sobrien long ret; 124260484Sobrien 124360484Sobrien ret = ((insn >> 16) & 0x1f) | ((insn >> 6) & 0x3e0); 124460484Sobrien if (ret == TB) 124560484Sobrien ret = 0; 124660484Sobrien return ret; 124760484Sobrien} 124860484Sobrien 124960484Sobrien/* Macros used to form opcodes. */ 125060484Sobrien 125160484Sobrien/* The main opcode. */ 125260484Sobrien#define OP(x) ((((unsigned long)(x)) & 0x3f) << 26) 125360484Sobrien#define OP_MASK OP (0x3f) 125460484Sobrien 125560484Sobrien/* The main opcode combined with a trap code in the TO field of a D 125660484Sobrien form instruction. Used for extended mnemonics for the trap 125760484Sobrien instructions. */ 125860484Sobrien#define OPTO(x,to) (OP (x) | ((((unsigned long)(to)) & 0x1f) << 21)) 125960484Sobrien#define OPTO_MASK (OP_MASK | TO_MASK) 126060484Sobrien 126160484Sobrien/* The main opcode combined with a comparison size bit in the L field 126260484Sobrien of a D form or X form instruction. Used for extended mnemonics for 126360484Sobrien the comparison instructions. */ 126460484Sobrien#define OPL(x,l) (OP (x) | ((((unsigned long)(l)) & 1) << 21)) 126560484Sobrien#define OPL_MASK OPL (0x3f,1) 126660484Sobrien 126760484Sobrien/* An A form instruction. */ 126860484Sobrien#define A(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1) | (((unsigned long)(rc)) & 1)) 126960484Sobrien#define A_MASK A (0x3f, 0x1f, 1) 127060484Sobrien 127160484Sobrien/* An A_MASK with the FRB field fixed. */ 127260484Sobrien#define AFRB_MASK (A_MASK | FRB_MASK) 127360484Sobrien 127460484Sobrien/* An A_MASK with the FRC field fixed. */ 127560484Sobrien#define AFRC_MASK (A_MASK | FRC_MASK) 127660484Sobrien 127760484Sobrien/* An A_MASK with the FRA and FRC fields fixed. */ 127860484Sobrien#define AFRAFRC_MASK (A_MASK | FRA_MASK | FRC_MASK) 127960484Sobrien 1280218822Sdim/* An AFRAFRC_MASK, but with L bit clear. */ 1281218822Sdim#define AFRALFRC_MASK (AFRAFRC_MASK & ~((unsigned long) 1 << 16)) 1282218822Sdim 128360484Sobrien/* A B form instruction. */ 128460484Sobrien#define B(op, aa, lk) (OP (op) | ((((unsigned long)(aa)) & 1) << 1) | ((lk) & 1)) 128560484Sobrien#define B_MASK B (0x3f, 1, 1) 128660484Sobrien 128760484Sobrien/* A B form instruction setting the BO field. */ 128860484Sobrien#define BBO(op, bo, aa, lk) (B ((op), (aa), (lk)) | ((((unsigned long)(bo)) & 0x1f) << 21)) 128960484Sobrien#define BBO_MASK BBO (0x3f, 0x1f, 1, 1) 129060484Sobrien 129160484Sobrien/* A BBO_MASK with the y bit of the BO field removed. This permits 129260484Sobrien matching a conditional branch regardless of the setting of the y 129392828Sobrien bit. Similarly for the 'at' bits used for power4 branch hints. */ 129489857Sobrien#define Y_MASK (((unsigned long) 1) << 21) 129589857Sobrien#define AT1_MASK (((unsigned long) 3) << 21) 129689857Sobrien#define AT2_MASK (((unsigned long) 9) << 21) 129789857Sobrien#define BBOY_MASK (BBO_MASK &~ Y_MASK) 129889857Sobrien#define BBOAT_MASK (BBO_MASK &~ AT1_MASK) 129960484Sobrien 130060484Sobrien/* A B form instruction setting the BO field and the condition bits of 130160484Sobrien the BI field. */ 130260484Sobrien#define BBOCB(op, bo, cb, aa, lk) \ 130360484Sobrien (BBO ((op), (bo), (aa), (lk)) | ((((unsigned long)(cb)) & 0x3) << 16)) 130460484Sobrien#define BBOCB_MASK BBOCB (0x3f, 0x1f, 0x3, 1, 1) 130560484Sobrien 130660484Sobrien/* A BBOCB_MASK with the y bit of the BO field removed. */ 130760484Sobrien#define BBOYCB_MASK (BBOCB_MASK &~ Y_MASK) 130889857Sobrien#define BBOATCB_MASK (BBOCB_MASK &~ AT1_MASK) 130989857Sobrien#define BBOAT2CB_MASK (BBOCB_MASK &~ AT2_MASK) 131060484Sobrien 131160484Sobrien/* A BBOYCB_MASK in which the BI field is fixed. */ 131260484Sobrien#define BBOYBI_MASK (BBOYCB_MASK | BI_MASK) 131389857Sobrien#define BBOATBI_MASK (BBOAT2CB_MASK | BI_MASK) 131460484Sobrien 1315130561Sobrien/* An Context form instruction. */ 1316130561Sobrien#define CTX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x7)) 1317130561Sobrien#define CTX_MASK CTX(0x3f, 0x7) 1318130561Sobrien 1319130561Sobrien/* An User Context form instruction. */ 1320130561Sobrien#define UCTX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x1f)) 1321130561Sobrien#define UCTX_MASK UCTX(0x3f, 0x1f) 1322130561Sobrien 132360484Sobrien/* The main opcode mask with the RA field clear. */ 132460484Sobrien#define DRA_MASK (OP_MASK | RA_MASK) 132560484Sobrien 132660484Sobrien/* A DS form instruction. */ 132760484Sobrien#define DSO(op, xop) (OP (op) | ((xop) & 0x3)) 132860484Sobrien#define DS_MASK DSO (0x3f, 3) 132960484Sobrien 133089857Sobrien/* A DE form instruction. */ 133189857Sobrien#define DEO(op, xop) (OP (op) | ((xop) & 0xf)) 133289857Sobrien#define DE_MASK DEO (0x3e, 0xf) 133389857Sobrien 1334130561Sobrien/* An EVSEL form instruction. */ 1335130561Sobrien#define EVSEL(op, xop) (OP (op) | (((unsigned long)(xop)) & 0xff) << 3) 1336130561Sobrien#define EVSEL_MASK EVSEL(0x3f, 0xff) 1337130561Sobrien 133860484Sobrien/* An M form instruction. */ 133960484Sobrien#define M(op, rc) (OP (op) | ((rc) & 1)) 134060484Sobrien#define M_MASK M (0x3f, 1) 134160484Sobrien 134260484Sobrien/* An M form instruction with the ME field specified. */ 134360484Sobrien#define MME(op, me, rc) (M ((op), (rc)) | ((((unsigned long)(me)) & 0x1f) << 1)) 134460484Sobrien 134560484Sobrien/* An M_MASK with the MB and ME fields fixed. */ 134660484Sobrien#define MMBME_MASK (M_MASK | MB_MASK | ME_MASK) 134760484Sobrien 134860484Sobrien/* An M_MASK with the SH and ME fields fixed. */ 134960484Sobrien#define MSHME_MASK (M_MASK | SH_MASK | ME_MASK) 135060484Sobrien 135160484Sobrien/* An MD form instruction. */ 135260484Sobrien#define MD(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x7) << 2) | ((rc) & 1)) 135360484Sobrien#define MD_MASK MD (0x3f, 0x7, 1) 135460484Sobrien 135560484Sobrien/* An MD_MASK with the MB field fixed. */ 135660484Sobrien#define MDMB_MASK (MD_MASK | MB6_MASK) 135760484Sobrien 135860484Sobrien/* An MD_MASK with the SH field fixed. */ 135960484Sobrien#define MDSH_MASK (MD_MASK | SH6_MASK) 136060484Sobrien 136160484Sobrien/* An MDS form instruction. */ 136260484Sobrien#define MDS(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0xf) << 1) | ((rc) & 1)) 136360484Sobrien#define MDS_MASK MDS (0x3f, 0xf, 1) 136460484Sobrien 136560484Sobrien/* An MDS_MASK with the MB field fixed. */ 136660484Sobrien#define MDSMB_MASK (MDS_MASK | MB6_MASK) 136760484Sobrien 136860484Sobrien/* An SC form instruction. */ 136960484Sobrien#define SC(op, sa, lk) (OP (op) | ((((unsigned long)(sa)) & 1) << 1) | ((lk) & 1)) 137060484Sobrien#define SC_MASK (OP_MASK | (((unsigned long)0x3ff) << 16) | (((unsigned long)1) << 1) | 1) 137160484Sobrien 1372130561Sobrien/* An VX form instruction. */ 137377298Sobrien#define VX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x7ff)) 137477298Sobrien 1375130561Sobrien/* The mask for an VX form instruction. */ 137677298Sobrien#define VX_MASK VX(0x3f, 0x7ff) 137777298Sobrien 1378130561Sobrien/* An VA form instruction. */ 137989857Sobrien#define VXA(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x03f)) 138077298Sobrien 1381130561Sobrien/* The mask for an VA form instruction. */ 138289857Sobrien#define VXA_MASK VXA(0x3f, 0x3f) 138377298Sobrien 1384130561Sobrien/* An VXR form instruction. */ 138577298Sobrien#define VXR(op, xop, rc) (OP (op) | (((rc) & 1) << 10) | (((unsigned long)(xop)) & 0x3ff)) 138677298Sobrien 1387130561Sobrien/* The mask for a VXR form instruction. */ 138877298Sobrien#define VXR_MASK VXR(0x3f, 0x3ff, 1) 138977298Sobrien 139060484Sobrien/* An X form instruction. */ 139160484Sobrien#define X(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1)) 139260484Sobrien 1393218822Sdim/* A Z form instruction. */ 1394218822Sdim#define Z(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1ff) << 1)) 1395218822Sdim 139660484Sobrien/* An X form instruction with the RC bit specified. */ 139760484Sobrien#define XRC(op, xop, rc) (X ((op), (xop)) | ((rc) & 1)) 139860484Sobrien 1399218822Sdim/* A Z form instruction with the RC bit specified. */ 1400218822Sdim#define ZRC(op, xop, rc) (Z ((op), (xop)) | ((rc) & 1)) 1401218822Sdim 140260484Sobrien/* The mask for an X form instruction. */ 140360484Sobrien#define X_MASK XRC (0x3f, 0x3ff, 1) 140460484Sobrien 1405218822Sdim/* The mask for a Z form instruction. */ 1406218822Sdim#define Z_MASK ZRC (0x3f, 0x1ff, 1) 1407218822Sdim#define Z2_MASK ZRC (0x3f, 0xff, 1) 1408218822Sdim 140960484Sobrien/* An X_MASK with the RA field fixed. */ 141060484Sobrien#define XRA_MASK (X_MASK | RA_MASK) 141160484Sobrien 1412218822Sdim/* An XRA_MASK with the W field clear. */ 1413218822Sdim#define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16)) 1414218822Sdim 141560484Sobrien/* An X_MASK with the RB field fixed. */ 141660484Sobrien#define XRB_MASK (X_MASK | RB_MASK) 141760484Sobrien 141860484Sobrien/* An X_MASK with the RT field fixed. */ 141960484Sobrien#define XRT_MASK (X_MASK | RT_MASK) 142060484Sobrien 1421218822Sdim/* An XRT_MASK mask with the L bits clear. */ 1422218822Sdim#define XLRT_MASK (XRT_MASK & ~((unsigned long) 0x3 << 21)) 1423218822Sdim 142460484Sobrien/* An X_MASK with the RA and RB fields fixed. */ 142560484Sobrien#define XRARB_MASK (X_MASK | RA_MASK | RB_MASK) 142660484Sobrien 1427130561Sobrien/* An XRARB_MASK, but with the L bit clear. */ 142894536Sobrien#define XRLARB_MASK (XRARB_MASK & ~((unsigned long) 1 << 16)) 142994536Sobrien 143060484Sobrien/* An X_MASK with the RT and RA fields fixed. */ 143160484Sobrien#define XRTRA_MASK (X_MASK | RT_MASK | RA_MASK) 143260484Sobrien 143394536Sobrien/* An XRTRA_MASK, but with L bit clear. */ 143494536Sobrien#define XRTLRA_MASK (XRTRA_MASK & ~((unsigned long) 1 << 21)) 143594536Sobrien 1436218822Sdim/* An X form instruction with the L bit specified. */ 1437218822Sdim#define XOPL(op, xop, l) (X ((op), (xop)) | ((((unsigned long)(l)) & 1) << 21)) 143860484Sobrien 143960484Sobrien/* The mask for an X form comparison instruction. */ 144060484Sobrien#define XCMP_MASK (X_MASK | (((unsigned long)1) << 22)) 144160484Sobrien 144260484Sobrien/* The mask for an X form comparison instruction with the L field 144360484Sobrien fixed. */ 144460484Sobrien#define XCMPL_MASK (XCMP_MASK | (((unsigned long)1) << 21)) 144560484Sobrien 144660484Sobrien/* An X form trap instruction with the TO field specified. */ 144760484Sobrien#define XTO(op, xop, to) (X ((op), (xop)) | ((((unsigned long)(to)) & 0x1f) << 21)) 144860484Sobrien#define XTO_MASK (X_MASK | TO_MASK) 144960484Sobrien 145077298Sobrien/* An X form tlb instruction with the SH field specified. */ 145177298Sobrien#define XTLB(op, xop, sh) (X ((op), (xop)) | ((((unsigned long)(sh)) & 0x1f) << 11)) 145277298Sobrien#define XTLB_MASK (X_MASK | SH_MASK) 145377298Sobrien 145489857Sobrien/* An X form sync instruction. */ 145589857Sobrien#define XSYNC(op, xop, l) (X ((op), (xop)) | ((((unsigned long)(l)) & 3) << 21)) 145689857Sobrien 145789857Sobrien/* An X form sync instruction with everything filled in except the LS field. */ 145889857Sobrien#define XSYNC_MASK (0xff9fffff) 145989857Sobrien 1460218822Sdim/* An X_MASK, but with the EH bit clear. */ 1461218822Sdim#define XEH_MASK (X_MASK & ~((unsigned long )1)) 1462218822Sdim 146389857Sobrien/* An X form AltiVec dss instruction. */ 146489857Sobrien#define XDSS(op, xop, a) (X ((op), (xop)) | ((((unsigned long)(a)) & 1) << 25)) 146589857Sobrien#define XDSS_MASK XDSS(0x3f, 0x3ff, 1) 146689857Sobrien 146760484Sobrien/* An XFL form instruction. */ 146860484Sobrien#define XFL(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1) | (((unsigned long)(rc)) & 1)) 1469218822Sdim#define XFL_MASK XFL (0x3f, 0x3ff, 1) 147060484Sobrien 1471130561Sobrien/* An X form isel instruction. */ 1472130561Sobrien#define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) 1473130561Sobrien#define XISEL_MASK XISEL(0x3f, 0x1f) 1474130561Sobrien 147560484Sobrien/* An XL form instruction with the LK field set to 0. */ 147660484Sobrien#define XL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1)) 147760484Sobrien 147860484Sobrien/* An XL form instruction which uses the LK field. */ 147960484Sobrien#define XLLK(op, xop, lk) (XL ((op), (xop)) | ((lk) & 1)) 148060484Sobrien 148160484Sobrien/* The mask for an XL form instruction. */ 148260484Sobrien#define XL_MASK XLLK (0x3f, 0x3ff, 1) 148360484Sobrien 148460484Sobrien/* An XL form instruction which explicitly sets the BO field. */ 148560484Sobrien#define XLO(op, bo, xop, lk) \ 148660484Sobrien (XLLK ((op), (xop), (lk)) | ((((unsigned long)(bo)) & 0x1f) << 21)) 148760484Sobrien#define XLO_MASK (XL_MASK | BO_MASK) 148860484Sobrien 148960484Sobrien/* An XL form instruction which explicitly sets the y bit of the BO 149060484Sobrien field. */ 149160484Sobrien#define XLYLK(op, xop, y, lk) (XLLK ((op), (xop), (lk)) | ((((unsigned long)(y)) & 1) << 21)) 149260484Sobrien#define XLYLK_MASK (XL_MASK | Y_MASK) 149360484Sobrien 149460484Sobrien/* An XL form instruction which sets the BO field and the condition 149560484Sobrien bits of the BI field. */ 149660484Sobrien#define XLOCB(op, bo, cb, xop, lk) \ 149760484Sobrien (XLO ((op), (bo), (xop), (lk)) | ((((unsigned long)(cb)) & 3) << 16)) 149860484Sobrien#define XLOCB_MASK XLOCB (0x3f, 0x1f, 0x3, 0x3ff, 1) 149960484Sobrien 150060484Sobrien/* An XL_MASK or XLYLK_MASK or XLOCB_MASK with the BB field fixed. */ 150160484Sobrien#define XLBB_MASK (XL_MASK | BB_MASK) 150260484Sobrien#define XLYBB_MASK (XLYLK_MASK | BB_MASK) 150360484Sobrien#define XLBOCBBB_MASK (XLOCB_MASK | BB_MASK) 150460484Sobrien 1505218822Sdim/* A mask for branch instructions using the BH field. */ 1506218822Sdim#define XLBH_MASK (XL_MASK | (0x1c << 11)) 1507218822Sdim 150860484Sobrien/* An XL_MASK with the BO and BB fields fixed. */ 150960484Sobrien#define XLBOBB_MASK (XL_MASK | BO_MASK | BB_MASK) 151060484Sobrien 151160484Sobrien/* An XL_MASK with the BO, BI and BB fields fixed. */ 151260484Sobrien#define XLBOBIBB_MASK (XL_MASK | BO_MASK | BI_MASK | BB_MASK) 151360484Sobrien 151460484Sobrien/* An XO form instruction. */ 151560484Sobrien#define XO(op, xop, oe, rc) \ 151660484Sobrien (OP (op) | ((((unsigned long)(xop)) & 0x1ff) << 1) | ((((unsigned long)(oe)) & 1) << 10) | (((unsigned long)(rc)) & 1)) 151760484Sobrien#define XO_MASK XO (0x3f, 0x1ff, 1, 1) 151860484Sobrien 151960484Sobrien/* An XO_MASK with the RB field fixed. */ 152060484Sobrien#define XORB_MASK (XO_MASK | RB_MASK) 152160484Sobrien 152260484Sobrien/* An XS form instruction. */ 152360484Sobrien#define XS(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x1ff) << 2) | (((unsigned long)(rc)) & 1)) 152460484Sobrien#define XS_MASK XS (0x3f, 0x1ff, 1) 152560484Sobrien 152660484Sobrien/* A mask for the FXM version of an XFX form instruction. */ 1527218822Sdim#define XFXFXM_MASK (X_MASK | (1 << 11) | (1 << 20)) 152860484Sobrien 152960484Sobrien/* An XFX form instruction with the FXM field filled in. */ 1530218822Sdim#define XFXM(op, xop, fxm, p4) \ 1531218822Sdim (X ((op), (xop)) | ((((unsigned long)(fxm)) & 0xff) << 12) \ 1532218822Sdim | ((unsigned long)(p4) << 20)) 153360484Sobrien 153460484Sobrien/* An XFX form instruction with the SPR field filled in. */ 153560484Sobrien#define XSPR(op, xop, spr) \ 153660484Sobrien (X ((op), (xop)) | ((((unsigned long)(spr)) & 0x1f) << 16) | ((((unsigned long)(spr)) & 0x3e0) << 6)) 153760484Sobrien#define XSPR_MASK (X_MASK | SPR_MASK) 153860484Sobrien 153960484Sobrien/* An XFX form instruction with the SPR field filled in except for the 154060484Sobrien SPRBAT field. */ 154160484Sobrien#define XSPRBAT_MASK (XSPR_MASK &~ SPRBAT_MASK) 154260484Sobrien 154360484Sobrien/* An XFX form instruction with the SPR field filled in except for the 154460484Sobrien SPRG field. */ 1545218822Sdim#define XSPRG_MASK (XSPR_MASK & ~(0x1f << 16)) 154660484Sobrien 154760484Sobrien/* An X form instruction with everything filled in except the E field. */ 154860484Sobrien#define XE_MASK (0xffff7fff) 154960484Sobrien 1550130561Sobrien/* An X form user context instruction. */ 1551130561Sobrien#define XUC(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x1f)) 1552130561Sobrien#define XUC_MASK XUC(0x3f, 0x1f) 1553130561Sobrien 155460484Sobrien/* The BO encodings used in extended conditional branch mnemonics. */ 155560484Sobrien#define BODNZF (0x0) 155660484Sobrien#define BODNZFP (0x1) 155760484Sobrien#define BODZF (0x2) 155860484Sobrien#define BODZFP (0x3) 155960484Sobrien#define BODNZT (0x8) 156060484Sobrien#define BODNZTP (0x9) 156160484Sobrien#define BODZT (0xa) 156260484Sobrien#define BODZTP (0xb) 156389857Sobrien 156489857Sobrien#define BOF (0x4) 156589857Sobrien#define BOFP (0x5) 156692828Sobrien#define BOFM4 (0x6) 156792828Sobrien#define BOFP4 (0x7) 156860484Sobrien#define BOT (0xc) 156960484Sobrien#define BOTP (0xd) 157092828Sobrien#define BOTM4 (0xe) 157192828Sobrien#define BOTP4 (0xf) 157289857Sobrien 157360484Sobrien#define BODNZ (0x10) 157460484Sobrien#define BODNZP (0x11) 157560484Sobrien#define BODZ (0x12) 157660484Sobrien#define BODZP (0x13) 157792828Sobrien#define BODNZM4 (0x18) 157892828Sobrien#define BODNZP4 (0x19) 157992828Sobrien#define BODZM4 (0x1a) 158092828Sobrien#define BODZP4 (0x1b) 158189857Sobrien 158260484Sobrien#define BOU (0x14) 158360484Sobrien 158460484Sobrien/* The BI condition bit encodings used in extended conditional branch 158560484Sobrien mnemonics. */ 158660484Sobrien#define CBLT (0) 158760484Sobrien#define CBGT (1) 158860484Sobrien#define CBEQ (2) 158960484Sobrien#define CBSO (3) 159060484Sobrien 159160484Sobrien/* The TO encodings used in extended trap mnemonics. */ 159260484Sobrien#define TOLGT (0x1) 159360484Sobrien#define TOLLT (0x2) 159460484Sobrien#define TOEQ (0x4) 159560484Sobrien#define TOLGE (0x5) 159660484Sobrien#define TOLNL (0x5) 159760484Sobrien#define TOLLE (0x6) 159860484Sobrien#define TOLNG (0x6) 159960484Sobrien#define TOGT (0x8) 160060484Sobrien#define TOGE (0xc) 160160484Sobrien#define TONL (0xc) 160260484Sobrien#define TOLT (0x10) 160360484Sobrien#define TOLE (0x14) 160460484Sobrien#define TONG (0x14) 160560484Sobrien#define TONE (0x18) 160660484Sobrien#define TOU (0x1f) 160760484Sobrien 160860484Sobrien/* Smaller names for the flags so each entry in the opcodes table will 160960484Sobrien fit on a single line. */ 161060484Sobrien#undef PPC 1611130561Sobrien#define PPC PPC_OPCODE_PPC 1612130561Sobrien#define PPCCOM PPC_OPCODE_PPC | PPC_OPCODE_COMMON 161392828Sobrien#define NOPOWER4 PPC_OPCODE_NOPOWER4 | PPCCOM 1614130561Sobrien#define POWER4 PPC_OPCODE_POWER4 1615218822Sdim#define POWER5 PPC_OPCODE_POWER5 1616218822Sdim#define POWER6 PPC_OPCODE_POWER6 1617218822Sdim#define CELL PPC_OPCODE_CELL 1618130561Sobrien#define PPC32 PPC_OPCODE_32 | PPC_OPCODE_PPC 1619130561Sobrien#define PPC64 PPC_OPCODE_64 | PPC_OPCODE_PPC 162089857Sobrien#define PPC403 PPC_OPCODE_403 162177298Sobrien#define PPC405 PPC403 1622130561Sobrien#define PPC440 PPC_OPCODE_440 162360484Sobrien#define PPC750 PPC 162460484Sobrien#define PPC860 PPC 1625130561Sobrien#define PPCVEC PPC_OPCODE_ALTIVEC 1626130561Sobrien#define POWER PPC_OPCODE_POWER 1627130561Sobrien#define POWER2 PPC_OPCODE_POWER | PPC_OPCODE_POWER2 1628130561Sobrien#define PPCPWR2 PPC_OPCODE_PPC | PPC_OPCODE_POWER | PPC_OPCODE_POWER2 1629130561Sobrien#define POWER32 PPC_OPCODE_POWER | PPC_OPCODE_32 1630130561Sobrien#define COM PPC_OPCODE_POWER | PPC_OPCODE_PPC | PPC_OPCODE_COMMON 1631130561Sobrien#define COM32 PPC_OPCODE_POWER | PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_32 1632130561Sobrien#define M601 PPC_OPCODE_POWER | PPC_OPCODE_601 1633130561Sobrien#define PWRCOM PPC_OPCODE_POWER | PPC_OPCODE_601 | PPC_OPCODE_COMMON 163460484Sobrien#define MFDEC1 PPC_OPCODE_POWER 1635130561Sobrien#define MFDEC2 PPC_OPCODE_PPC | PPC_OPCODE_601 | PPC_OPCODE_BOOKE 163689857Sobrien#define BOOKE PPC_OPCODE_BOOKE 163789857Sobrien#define BOOKE64 PPC_OPCODE_BOOKE64 1638130561Sobrien#define CLASSIC PPC_OPCODE_CLASSIC 1639218822Sdim#define PPCE300 PPC_OPCODE_E300 1640130561Sobrien#define PPCSPE PPC_OPCODE_SPE 1641130561Sobrien#define PPCISEL PPC_OPCODE_ISEL 1642130561Sobrien#define PPCEFS PPC_OPCODE_EFS 1643130561Sobrien#define PPCBRLK PPC_OPCODE_BRLOCK 1644130561Sobrien#define PPCPMR PPC_OPCODE_PMR 1645130561Sobrien#define PPCCHLK PPC_OPCODE_CACHELCK 1646130561Sobrien#define PPCCHLK64 PPC_OPCODE_CACHELCK | PPC_OPCODE_BOOKE64 1647130561Sobrien#define PPCRFMCI PPC_OPCODE_RFMCI 164860484Sobrien 164960484Sobrien/* The opcode table. 165060484Sobrien 165160484Sobrien The format of the opcode table is: 165260484Sobrien 165360484Sobrien NAME OPCODE MASK FLAGS { OPERANDS } 165460484Sobrien 165560484Sobrien NAME is the name of the instruction. 165660484Sobrien OPCODE is the instruction opcode. 165760484Sobrien MASK is the opcode mask; this is used to tell the disassembler 165860484Sobrien which bits in the actual opcode must match OPCODE. 165960484Sobrien FLAGS are flags indicated what processors support the instruction. 166060484Sobrien OPERANDS is the list of operands. 166160484Sobrien 166260484Sobrien The disassembler reads the table in order and prints the first 166360484Sobrien instruction which matches, so this table is sorted to put more 166460484Sobrien specific instructions before more general instructions. It is also 166560484Sobrien sorted by major opcode. */ 166660484Sobrien 166760484Sobrienconst struct powerpc_opcode powerpc_opcodes[] = { 1668130561Sobrien{ "attn", X(0,256), X_MASK, POWER4, { 0 } }, 166960484Sobrien{ "tdlgti", OPTO(2,TOLGT), OPTO_MASK, PPC64, { RA, SI } }, 167060484Sobrien{ "tdllti", OPTO(2,TOLLT), OPTO_MASK, PPC64, { RA, SI } }, 167160484Sobrien{ "tdeqi", OPTO(2,TOEQ), OPTO_MASK, PPC64, { RA, SI } }, 167260484Sobrien{ "tdlgei", OPTO(2,TOLGE), OPTO_MASK, PPC64, { RA, SI } }, 167360484Sobrien{ "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 167460484Sobrien{ "tdllei", OPTO(2,TOLLE), OPTO_MASK, PPC64, { RA, SI } }, 167560484Sobrien{ "tdlngi", OPTO(2,TOLNG), OPTO_MASK, PPC64, { RA, SI } }, 167660484Sobrien{ "tdgti", OPTO(2,TOGT), OPTO_MASK, PPC64, { RA, SI } }, 167760484Sobrien{ "tdgei", OPTO(2,TOGE), OPTO_MASK, PPC64, { RA, SI } }, 167860484Sobrien{ "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } }, 167960484Sobrien{ "tdlti", OPTO(2,TOLT), OPTO_MASK, PPC64, { RA, SI } }, 168060484Sobrien{ "tdlei", OPTO(2,TOLE), OPTO_MASK, PPC64, { RA, SI } }, 168160484Sobrien{ "tdngi", OPTO(2,TONG), OPTO_MASK, PPC64, { RA, SI } }, 168260484Sobrien{ "tdnei", OPTO(2,TONE), OPTO_MASK, PPC64, { RA, SI } }, 168360484Sobrien{ "tdi", OP(2), OP_MASK, PPC64, { TO, RA, SI } }, 168460484Sobrien 168560484Sobrien{ "twlgti", OPTO(3,TOLGT), OPTO_MASK, PPCCOM, { RA, SI } }, 168660484Sobrien{ "tlgti", OPTO(3,TOLGT), OPTO_MASK, PWRCOM, { RA, SI } }, 168760484Sobrien{ "twllti", OPTO(3,TOLLT), OPTO_MASK, PPCCOM, { RA, SI } }, 168860484Sobrien{ "tllti", OPTO(3,TOLLT), OPTO_MASK, PWRCOM, { RA, SI } }, 168960484Sobrien{ "tweqi", OPTO(3,TOEQ), OPTO_MASK, PPCCOM, { RA, SI } }, 169060484Sobrien{ "teqi", OPTO(3,TOEQ), OPTO_MASK, PWRCOM, { RA, SI } }, 169160484Sobrien{ "twlgei", OPTO(3,TOLGE), OPTO_MASK, PPCCOM, { RA, SI } }, 169260484Sobrien{ "tlgei", OPTO(3,TOLGE), OPTO_MASK, PWRCOM, { RA, SI } }, 169360484Sobrien{ "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 169460484Sobrien{ "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 169560484Sobrien{ "twllei", OPTO(3,TOLLE), OPTO_MASK, PPCCOM, { RA, SI } }, 169660484Sobrien{ "tllei", OPTO(3,TOLLE), OPTO_MASK, PWRCOM, { RA, SI } }, 169760484Sobrien{ "twlngi", OPTO(3,TOLNG), OPTO_MASK, PPCCOM, { RA, SI } }, 169860484Sobrien{ "tlngi", OPTO(3,TOLNG), OPTO_MASK, PWRCOM, { RA, SI } }, 169960484Sobrien{ "twgti", OPTO(3,TOGT), OPTO_MASK, PPCCOM, { RA, SI } }, 170060484Sobrien{ "tgti", OPTO(3,TOGT), OPTO_MASK, PWRCOM, { RA, SI } }, 170160484Sobrien{ "twgei", OPTO(3,TOGE), OPTO_MASK, PPCCOM, { RA, SI } }, 170260484Sobrien{ "tgei", OPTO(3,TOGE), OPTO_MASK, PWRCOM, { RA, SI } }, 170360484Sobrien{ "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } }, 170460484Sobrien{ "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } }, 170560484Sobrien{ "twlti", OPTO(3,TOLT), OPTO_MASK, PPCCOM, { RA, SI } }, 170660484Sobrien{ "tlti", OPTO(3,TOLT), OPTO_MASK, PWRCOM, { RA, SI } }, 170760484Sobrien{ "twlei", OPTO(3,TOLE), OPTO_MASK, PPCCOM, { RA, SI } }, 170860484Sobrien{ "tlei", OPTO(3,TOLE), OPTO_MASK, PWRCOM, { RA, SI } }, 170960484Sobrien{ "twngi", OPTO(3,TONG), OPTO_MASK, PPCCOM, { RA, SI } }, 171060484Sobrien{ "tngi", OPTO(3,TONG), OPTO_MASK, PWRCOM, { RA, SI } }, 171160484Sobrien{ "twnei", OPTO(3,TONE), OPTO_MASK, PPCCOM, { RA, SI } }, 171260484Sobrien{ "tnei", OPTO(3,TONE), OPTO_MASK, PWRCOM, { RA, SI } }, 171360484Sobrien{ "twi", OP(3), OP_MASK, PPCCOM, { TO, RA, SI } }, 171460484Sobrien{ "ti", OP(3), OP_MASK, PWRCOM, { TO, RA, SI } }, 171560484Sobrien 1716130561Sobrien{ "macchw", XO(4,172,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1717130561Sobrien{ "macchw.", XO(4,172,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1718130561Sobrien{ "macchwo", XO(4,172,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1719130561Sobrien{ "macchwo.", XO(4,172,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1720130561Sobrien{ "macchws", XO(4,236,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1721130561Sobrien{ "macchws.", XO(4,236,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1722130561Sobrien{ "macchwso", XO(4,236,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1723130561Sobrien{ "macchwso.", XO(4,236,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1724130561Sobrien{ "macchwsu", XO(4,204,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1725130561Sobrien{ "macchwsu.", XO(4,204,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1726130561Sobrien{ "macchwsuo", XO(4,204,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1727130561Sobrien{ "macchwsuo.", XO(4,204,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1728130561Sobrien{ "macchwu", XO(4,140,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1729130561Sobrien{ "macchwu.", XO(4,140,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1730130561Sobrien{ "macchwuo", XO(4,140,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1731130561Sobrien{ "macchwuo.", XO(4,140,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1732130561Sobrien{ "machhw", XO(4,44,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1733130561Sobrien{ "machhw.", XO(4,44,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1734130561Sobrien{ "machhwo", XO(4,44,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1735130561Sobrien{ "machhwo.", XO(4,44,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1736130561Sobrien{ "machhws", XO(4,108,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1737130561Sobrien{ "machhws.", XO(4,108,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1738130561Sobrien{ "machhwso", XO(4,108,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1739130561Sobrien{ "machhwso.", XO(4,108,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1740130561Sobrien{ "machhwsu", XO(4,76,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1741130561Sobrien{ "machhwsu.", XO(4,76,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1742130561Sobrien{ "machhwsuo", XO(4,76,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1743130561Sobrien{ "machhwsuo.", XO(4,76,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1744130561Sobrien{ "machhwu", XO(4,12,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1745130561Sobrien{ "machhwu.", XO(4,12,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1746130561Sobrien{ "machhwuo", XO(4,12,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1747130561Sobrien{ "machhwuo.", XO(4,12,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1748130561Sobrien{ "maclhw", XO(4,428,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1749130561Sobrien{ "maclhw.", XO(4,428,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1750130561Sobrien{ "maclhwo", XO(4,428,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1751130561Sobrien{ "maclhwo.", XO(4,428,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1752130561Sobrien{ "maclhws", XO(4,492,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1753130561Sobrien{ "maclhws.", XO(4,492,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1754130561Sobrien{ "maclhwso", XO(4,492,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1755130561Sobrien{ "maclhwso.", XO(4,492,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1756130561Sobrien{ "maclhwsu", XO(4,460,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1757130561Sobrien{ "maclhwsu.", XO(4,460,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1758130561Sobrien{ "maclhwsuo", XO(4,460,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1759130561Sobrien{ "maclhwsuo.", XO(4,460,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1760130561Sobrien{ "maclhwu", XO(4,396,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1761130561Sobrien{ "maclhwu.", XO(4,396,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1762130561Sobrien{ "maclhwuo", XO(4,396,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1763130561Sobrien{ "maclhwuo.", XO(4,396,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1764130561Sobrien{ "mulchw", XRC(4,168,0), X_MASK, PPC405|PPC440, { RT, RA, RB } }, 1765130561Sobrien{ "mulchw.", XRC(4,168,1), X_MASK, PPC405|PPC440, { RT, RA, RB } }, 1766130561Sobrien{ "mulchwu", XRC(4,136,0), X_MASK, PPC405|PPC440, { RT, RA, RB } }, 1767130561Sobrien{ "mulchwu.", XRC(4,136,1), X_MASK, PPC405|PPC440, { RT, RA, RB } }, 1768130561Sobrien{ "mulhhw", XRC(4,40,0), X_MASK, PPC405|PPC440, { RT, RA, RB } }, 1769130561Sobrien{ "mulhhw.", XRC(4,40,1), X_MASK, PPC405|PPC440, { RT, RA, RB } }, 1770130561Sobrien{ "mulhhwu", XRC(4,8,0), X_MASK, PPC405|PPC440, { RT, RA, RB } }, 1771130561Sobrien{ "mulhhwu.", XRC(4,8,1), X_MASK, PPC405|PPC440, { RT, RA, RB } }, 1772130561Sobrien{ "mullhw", XRC(4,424,0), X_MASK, PPC405|PPC440, { RT, RA, RB } }, 1773130561Sobrien{ "mullhw.", XRC(4,424,1), X_MASK, PPC405|PPC440, { RT, RA, RB } }, 1774130561Sobrien{ "mullhwu", XRC(4,392,0), X_MASK, PPC405|PPC440, { RT, RA, RB } }, 1775130561Sobrien{ "mullhwu.", XRC(4,392,1), X_MASK, PPC405|PPC440, { RT, RA, RB } }, 1776130561Sobrien{ "nmacchw", XO(4,174,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1777130561Sobrien{ "nmacchw.", XO(4,174,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1778130561Sobrien{ "nmacchwo", XO(4,174,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1779130561Sobrien{ "nmacchwo.", XO(4,174,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1780130561Sobrien{ "nmacchws", XO(4,238,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1781130561Sobrien{ "nmacchws.", XO(4,238,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1782130561Sobrien{ "nmacchwso", XO(4,238,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1783130561Sobrien{ "nmacchwso.", XO(4,238,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1784130561Sobrien{ "nmachhw", XO(4,46,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1785130561Sobrien{ "nmachhw.", XO(4,46,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1786130561Sobrien{ "nmachhwo", XO(4,46,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1787130561Sobrien{ "nmachhwo.", XO(4,46,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1788130561Sobrien{ "nmachhws", XO(4,110,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1789130561Sobrien{ "nmachhws.", XO(4,110,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1790130561Sobrien{ "nmachhwso", XO(4,110,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1791130561Sobrien{ "nmachhwso.", XO(4,110,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1792130561Sobrien{ "nmaclhw", XO(4,430,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1793130561Sobrien{ "nmaclhw.", XO(4,430,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1794130561Sobrien{ "nmaclhwo", XO(4,430,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1795130561Sobrien{ "nmaclhwo.", XO(4,430,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1796130561Sobrien{ "nmaclhws", XO(4,494,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1797130561Sobrien{ "nmaclhws.", XO(4,494,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1798130561Sobrien{ "nmaclhwso", XO(4,494,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 1799130561Sobrien{ "nmaclhwso.", XO(4,494,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 180077298Sobrien{ "mfvscr", VX(4, 1540), VX_MASK, PPCVEC, { VD } }, 180189857Sobrien{ "mtvscr", VX(4, 1604), VX_MASK, PPCVEC, { VB } }, 1802218822Sdim 1803218822Sdim /* Double-precision opcodes. */ 1804218822Sdim /* Some of these conflict with AltiVec, so move them before, since 1805218822Sdim PPCVEC includes the PPC_OPCODE_PPC set. */ 1806218822Sdim{ "efscfd", VX(4, 719), VX_MASK, PPCEFS, { RS, RB } }, 1807218822Sdim{ "efdabs", VX(4, 740), VX_MASK, PPCEFS, { RS, RA } }, 1808218822Sdim{ "efdnabs", VX(4, 741), VX_MASK, PPCEFS, { RS, RA } }, 1809218822Sdim{ "efdneg", VX(4, 742), VX_MASK, PPCEFS, { RS, RA } }, 1810218822Sdim{ "efdadd", VX(4, 736), VX_MASK, PPCEFS, { RS, RA, RB } }, 1811218822Sdim{ "efdsub", VX(4, 737), VX_MASK, PPCEFS, { RS, RA, RB } }, 1812218822Sdim{ "efdmul", VX(4, 744), VX_MASK, PPCEFS, { RS, RA, RB } }, 1813218822Sdim{ "efddiv", VX(4, 745), VX_MASK, PPCEFS, { RS, RA, RB } }, 1814218822Sdim{ "efdcmpgt", VX(4, 748), VX_MASK, PPCEFS, { CRFD, RA, RB } }, 1815218822Sdim{ "efdcmplt", VX(4, 749), VX_MASK, PPCEFS, { CRFD, RA, RB } }, 1816218822Sdim{ "efdcmpeq", VX(4, 750), VX_MASK, PPCEFS, { CRFD, RA, RB } }, 1817218822Sdim{ "efdtstgt", VX(4, 764), VX_MASK, PPCEFS, { CRFD, RA, RB } }, 1818218822Sdim{ "efdtstlt", VX(4, 765), VX_MASK, PPCEFS, { CRFD, RA, RB } }, 1819218822Sdim{ "efdtsteq", VX(4, 766), VX_MASK, PPCEFS, { CRFD, RA, RB } }, 1820218822Sdim{ "efdcfsi", VX(4, 753), VX_MASK, PPCEFS, { RS, RB } }, 1821218822Sdim{ "efdcfsid", VX(4, 739), VX_MASK, PPCEFS, { RS, RB } }, 1822218822Sdim{ "efdcfui", VX(4, 752), VX_MASK, PPCEFS, { RS, RB } }, 1823218822Sdim{ "efdcfuid", VX(4, 738), VX_MASK, PPCEFS, { RS, RB } }, 1824218822Sdim{ "efdcfsf", VX(4, 755), VX_MASK, PPCEFS, { RS, RB } }, 1825218822Sdim{ "efdcfuf", VX(4, 754), VX_MASK, PPCEFS, { RS, RB } }, 1826218822Sdim{ "efdctsi", VX(4, 757), VX_MASK, PPCEFS, { RS, RB } }, 1827218822Sdim{ "efdctsidz",VX(4, 747), VX_MASK, PPCEFS, { RS, RB } }, 1828218822Sdim{ "efdctsiz", VX(4, 762), VX_MASK, PPCEFS, { RS, RB } }, 1829218822Sdim{ "efdctui", VX(4, 756), VX_MASK, PPCEFS, { RS, RB } }, 1830218822Sdim{ "efdctuidz",VX(4, 746), VX_MASK, PPCEFS, { RS, RB } }, 1831218822Sdim{ "efdctuiz", VX(4, 760), VX_MASK, PPCEFS, { RS, RB } }, 1832218822Sdim{ "efdctsf", VX(4, 759), VX_MASK, PPCEFS, { RS, RB } }, 1833218822Sdim{ "efdctuf", VX(4, 758), VX_MASK, PPCEFS, { RS, RB } }, 1834218822Sdim{ "efdcfs", VX(4, 751), VX_MASK, PPCEFS, { RS, RB } }, 1835218822Sdim /* End of double-precision opcodes. */ 1836218822Sdim 183777298Sobrien{ "vaddcuw", VX(4, 384), VX_MASK, PPCVEC, { VD, VA, VB } }, 183877298Sobrien{ "vaddfp", VX(4, 10), VX_MASK, PPCVEC, { VD, VA, VB } }, 183977298Sobrien{ "vaddsbs", VX(4, 768), VX_MASK, PPCVEC, { VD, VA, VB } }, 184077298Sobrien{ "vaddshs", VX(4, 832), VX_MASK, PPCVEC, { VD, VA, VB } }, 184177298Sobrien{ "vaddsws", VX(4, 896), VX_MASK, PPCVEC, { VD, VA, VB } }, 184277298Sobrien{ "vaddubm", VX(4, 0), VX_MASK, PPCVEC, { VD, VA, VB } }, 184377298Sobrien{ "vaddubs", VX(4, 512), VX_MASK, PPCVEC, { VD, VA, VB } }, 184477298Sobrien{ "vadduhm", VX(4, 64), VX_MASK, PPCVEC, { VD, VA, VB } }, 184577298Sobrien{ "vadduhs", VX(4, 576), VX_MASK, PPCVEC, { VD, VA, VB } }, 184677298Sobrien{ "vadduwm", VX(4, 128), VX_MASK, PPCVEC, { VD, VA, VB } }, 184777298Sobrien{ "vadduws", VX(4, 640), VX_MASK, PPCVEC, { VD, VA, VB } }, 184877298Sobrien{ "vand", VX(4, 1028), VX_MASK, PPCVEC, { VD, VA, VB } }, 184977298Sobrien{ "vandc", VX(4, 1092), VX_MASK, PPCVEC, { VD, VA, VB } }, 185077298Sobrien{ "vavgsb", VX(4, 1282), VX_MASK, PPCVEC, { VD, VA, VB } }, 185177298Sobrien{ "vavgsh", VX(4, 1346), VX_MASK, PPCVEC, { VD, VA, VB } }, 185277298Sobrien{ "vavgsw", VX(4, 1410), VX_MASK, PPCVEC, { VD, VA, VB } }, 185377298Sobrien{ "vavgub", VX(4, 1026), VX_MASK, PPCVEC, { VD, VA, VB } }, 185477298Sobrien{ "vavguh", VX(4, 1090), VX_MASK, PPCVEC, { VD, VA, VB } }, 185577298Sobrien{ "vavguw", VX(4, 1154), VX_MASK, PPCVEC, { VD, VA, VB } }, 185677298Sobrien{ "vcfsx", VX(4, 842), VX_MASK, PPCVEC, { VD, VB, UIMM } }, 185777298Sobrien{ "vcfux", VX(4, 778), VX_MASK, PPCVEC, { VD, VB, UIMM } }, 185877298Sobrien{ "vcmpbfp", VXR(4, 966, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, 185977298Sobrien{ "vcmpbfp.", VXR(4, 966, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, 186077298Sobrien{ "vcmpeqfp", VXR(4, 198, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, 186177298Sobrien{ "vcmpeqfp.", VXR(4, 198, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, 186277298Sobrien{ "vcmpequb", VXR(4, 6, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, 186377298Sobrien{ "vcmpequb.", VXR(4, 6, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, 186477298Sobrien{ "vcmpequh", VXR(4, 70, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, 186577298Sobrien{ "vcmpequh.", VXR(4, 70, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, 186677298Sobrien{ "vcmpequw", VXR(4, 134, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, 186777298Sobrien{ "vcmpequw.", VXR(4, 134, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, 186877298Sobrien{ "vcmpgefp", VXR(4, 454, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, 186977298Sobrien{ "vcmpgefp.", VXR(4, 454, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, 187077298Sobrien{ "vcmpgtfp", VXR(4, 710, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, 187177298Sobrien{ "vcmpgtfp.", VXR(4, 710, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, 187277298Sobrien{ "vcmpgtsb", VXR(4, 774, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, 187377298Sobrien{ "vcmpgtsb.", VXR(4, 774, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, 187477298Sobrien{ "vcmpgtsh", VXR(4, 838, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, 187577298Sobrien{ "vcmpgtsh.", VXR(4, 838, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, 187677298Sobrien{ "vcmpgtsw", VXR(4, 902, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, 187777298Sobrien{ "vcmpgtsw.", VXR(4, 902, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, 187877298Sobrien{ "vcmpgtub", VXR(4, 518, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, 187977298Sobrien{ "vcmpgtub.", VXR(4, 518, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, 188077298Sobrien{ "vcmpgtuh", VXR(4, 582, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, 188177298Sobrien{ "vcmpgtuh.", VXR(4, 582, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, 188277298Sobrien{ "vcmpgtuw", VXR(4, 646, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, 188377298Sobrien{ "vcmpgtuw.", VXR(4, 646, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, 188477298Sobrien{ "vctsxs", VX(4, 970), VX_MASK, PPCVEC, { VD, VB, UIMM } }, 188577298Sobrien{ "vctuxs", VX(4, 906), VX_MASK, PPCVEC, { VD, VB, UIMM } }, 188677298Sobrien{ "vexptefp", VX(4, 394), VX_MASK, PPCVEC, { VD, VB } }, 188777298Sobrien{ "vlogefp", VX(4, 458), VX_MASK, PPCVEC, { VD, VB } }, 188894536Sobrien{ "vmaddfp", VXA(4, 46), VXA_MASK, PPCVEC, { VD, VA, VC, VB } }, 188977298Sobrien{ "vmaxfp", VX(4, 1034), VX_MASK, PPCVEC, { VD, VA, VB } }, 189077298Sobrien{ "vmaxsb", VX(4, 258), VX_MASK, PPCVEC, { VD, VA, VB } }, 189177298Sobrien{ "vmaxsh", VX(4, 322), VX_MASK, PPCVEC, { VD, VA, VB } }, 189277298Sobrien{ "vmaxsw", VX(4, 386), VX_MASK, PPCVEC, { VD, VA, VB } }, 189377298Sobrien{ "vmaxub", VX(4, 2), VX_MASK, PPCVEC, { VD, VA, VB } }, 189477298Sobrien{ "vmaxuh", VX(4, 66), VX_MASK, PPCVEC, { VD, VA, VB } }, 189577298Sobrien{ "vmaxuw", VX(4, 130), VX_MASK, PPCVEC, { VD, VA, VB } }, 189677298Sobrien{ "vmhaddshs", VXA(4, 32), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, 189777298Sobrien{ "vmhraddshs", VXA(4, 33), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, 189877298Sobrien{ "vminfp", VX(4, 1098), VX_MASK, PPCVEC, { VD, VA, VB } }, 189977298Sobrien{ "vminsb", VX(4, 770), VX_MASK, PPCVEC, { VD, VA, VB } }, 190077298Sobrien{ "vminsh", VX(4, 834), VX_MASK, PPCVEC, { VD, VA, VB } }, 190177298Sobrien{ "vminsw", VX(4, 898), VX_MASK, PPCVEC, { VD, VA, VB } }, 190277298Sobrien{ "vminub", VX(4, 514), VX_MASK, PPCVEC, { VD, VA, VB } }, 190377298Sobrien{ "vminuh", VX(4, 578), VX_MASK, PPCVEC, { VD, VA, VB } }, 190477298Sobrien{ "vminuw", VX(4, 642), VX_MASK, PPCVEC, { VD, VA, VB } }, 190577298Sobrien{ "vmladduhm", VXA(4, 34), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, 190677298Sobrien{ "vmrghb", VX(4, 12), VX_MASK, PPCVEC, { VD, VA, VB } }, 190777298Sobrien{ "vmrghh", VX(4, 76), VX_MASK, PPCVEC, { VD, VA, VB } }, 190877298Sobrien{ "vmrghw", VX(4, 140), VX_MASK, PPCVEC, { VD, VA, VB } }, 190977298Sobrien{ "vmrglb", VX(4, 268), VX_MASK, PPCVEC, { VD, VA, VB } }, 191077298Sobrien{ "vmrglh", VX(4, 332), VX_MASK, PPCVEC, { VD, VA, VB } }, 191177298Sobrien{ "vmrglw", VX(4, 396), VX_MASK, PPCVEC, { VD, VA, VB } }, 191277298Sobrien{ "vmsummbm", VXA(4, 37), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, 191377298Sobrien{ "vmsumshm", VXA(4, 40), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, 191477298Sobrien{ "vmsumshs", VXA(4, 41), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, 191577298Sobrien{ "vmsumubm", VXA(4, 36), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, 191677298Sobrien{ "vmsumuhm", VXA(4, 38), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, 191777298Sobrien{ "vmsumuhs", VXA(4, 39), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, 191877298Sobrien{ "vmulesb", VX(4, 776), VX_MASK, PPCVEC, { VD, VA, VB } }, 191977298Sobrien{ "vmulesh", VX(4, 840), VX_MASK, PPCVEC, { VD, VA, VB } }, 192077298Sobrien{ "vmuleub", VX(4, 520), VX_MASK, PPCVEC, { VD, VA, VB } }, 192177298Sobrien{ "vmuleuh", VX(4, 584), VX_MASK, PPCVEC, { VD, VA, VB } }, 192277298Sobrien{ "vmulosb", VX(4, 264), VX_MASK, PPCVEC, { VD, VA, VB } }, 192377298Sobrien{ "vmulosh", VX(4, 328), VX_MASK, PPCVEC, { VD, VA, VB } }, 192477298Sobrien{ "vmuloub", VX(4, 8), VX_MASK, PPCVEC, { VD, VA, VB } }, 192577298Sobrien{ "vmulouh", VX(4, 72), VX_MASK, PPCVEC, { VD, VA, VB } }, 192677298Sobrien{ "vnmsubfp", VXA(4, 47), VXA_MASK, PPCVEC, { VD, VA, VC, VB } }, 192777298Sobrien{ "vnor", VX(4, 1284), VX_MASK, PPCVEC, { VD, VA, VB } }, 192877298Sobrien{ "vor", VX(4, 1156), VX_MASK, PPCVEC, { VD, VA, VB } }, 192977298Sobrien{ "vperm", VXA(4, 43), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, 193077298Sobrien{ "vpkpx", VX(4, 782), VX_MASK, PPCVEC, { VD, VA, VB } }, 193177298Sobrien{ "vpkshss", VX(4, 398), VX_MASK, PPCVEC, { VD, VA, VB } }, 193277298Sobrien{ "vpkshus", VX(4, 270), VX_MASK, PPCVEC, { VD, VA, VB } }, 193377298Sobrien{ "vpkswss", VX(4, 462), VX_MASK, PPCVEC, { VD, VA, VB } }, 193477298Sobrien{ "vpkswus", VX(4, 334), VX_MASK, PPCVEC, { VD, VA, VB } }, 193577298Sobrien{ "vpkuhum", VX(4, 14), VX_MASK, PPCVEC, { VD, VA, VB } }, 193677298Sobrien{ "vpkuhus", VX(4, 142), VX_MASK, PPCVEC, { VD, VA, VB } }, 193777298Sobrien{ "vpkuwum", VX(4, 78), VX_MASK, PPCVEC, { VD, VA, VB } }, 193877298Sobrien{ "vpkuwus", VX(4, 206), VX_MASK, PPCVEC, { VD, VA, VB } }, 193977298Sobrien{ "vrefp", VX(4, 266), VX_MASK, PPCVEC, { VD, VB } }, 194077298Sobrien{ "vrfim", VX(4, 714), VX_MASK, PPCVEC, { VD, VB } }, 194177298Sobrien{ "vrfin", VX(4, 522), VX_MASK, PPCVEC, { VD, VB } }, 194277298Sobrien{ "vrfip", VX(4, 650), VX_MASK, PPCVEC, { VD, VB } }, 194377298Sobrien{ "vrfiz", VX(4, 586), VX_MASK, PPCVEC, { VD, VB } }, 194477298Sobrien{ "vrlb", VX(4, 4), VX_MASK, PPCVEC, { VD, VA, VB } }, 194577298Sobrien{ "vrlh", VX(4, 68), VX_MASK, PPCVEC, { VD, VA, VB } }, 194677298Sobrien{ "vrlw", VX(4, 132), VX_MASK, PPCVEC, { VD, VA, VB } }, 194777298Sobrien{ "vrsqrtefp", VX(4, 330), VX_MASK, PPCVEC, { VD, VB } }, 194877298Sobrien{ "vsel", VXA(4, 42), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, 194977298Sobrien{ "vsl", VX(4, 452), VX_MASK, PPCVEC, { VD, VA, VB } }, 195077298Sobrien{ "vslb", VX(4, 260), VX_MASK, PPCVEC, { VD, VA, VB } }, 195177298Sobrien{ "vsldoi", VXA(4, 44), VXA_MASK, PPCVEC, { VD, VA, VB, SHB } }, 195277298Sobrien{ "vslh", VX(4, 324), VX_MASK, PPCVEC, { VD, VA, VB } }, 195377298Sobrien{ "vslo", VX(4, 1036), VX_MASK, PPCVEC, { VD, VA, VB } }, 195477298Sobrien{ "vslw", VX(4, 388), VX_MASK, PPCVEC, { VD, VA, VB } }, 195577298Sobrien{ "vspltb", VX(4, 524), VX_MASK, PPCVEC, { VD, VB, UIMM } }, 195677298Sobrien{ "vsplth", VX(4, 588), VX_MASK, PPCVEC, { VD, VB, UIMM } }, 195777298Sobrien{ "vspltisb", VX(4, 780), VX_MASK, PPCVEC, { VD, SIMM } }, 195877298Sobrien{ "vspltish", VX(4, 844), VX_MASK, PPCVEC, { VD, SIMM } }, 195977298Sobrien{ "vspltisw", VX(4, 908), VX_MASK, PPCVEC, { VD, SIMM } }, 196077298Sobrien{ "vspltw", VX(4, 652), VX_MASK, PPCVEC, { VD, VB, UIMM } }, 196177298Sobrien{ "vsr", VX(4, 708), VX_MASK, PPCVEC, { VD, VA, VB } }, 196277298Sobrien{ "vsrab", VX(4, 772), VX_MASK, PPCVEC, { VD, VA, VB } }, 196377298Sobrien{ "vsrah", VX(4, 836), VX_MASK, PPCVEC, { VD, VA, VB } }, 196477298Sobrien{ "vsraw", VX(4, 900), VX_MASK, PPCVEC, { VD, VA, VB } }, 196577298Sobrien{ "vsrb", VX(4, 516), VX_MASK, PPCVEC, { VD, VA, VB } }, 196677298Sobrien{ "vsrh", VX(4, 580), VX_MASK, PPCVEC, { VD, VA, VB } }, 196777298Sobrien{ "vsro", VX(4, 1100), VX_MASK, PPCVEC, { VD, VA, VB } }, 196877298Sobrien{ "vsrw", VX(4, 644), VX_MASK, PPCVEC, { VD, VA, VB } }, 196977298Sobrien{ "vsubcuw", VX(4, 1408), VX_MASK, PPCVEC, { VD, VA, VB } }, 197077298Sobrien{ "vsubfp", VX(4, 74), VX_MASK, PPCVEC, { VD, VA, VB } }, 197177298Sobrien{ "vsubsbs", VX(4, 1792), VX_MASK, PPCVEC, { VD, VA, VB } }, 197277298Sobrien{ "vsubshs", VX(4, 1856), VX_MASK, PPCVEC, { VD, VA, VB } }, 197377298Sobrien{ "vsubsws", VX(4, 1920), VX_MASK, PPCVEC, { VD, VA, VB } }, 197477298Sobrien{ "vsububm", VX(4, 1024), VX_MASK, PPCVEC, { VD, VA, VB } }, 197577298Sobrien{ "vsububs", VX(4, 1536), VX_MASK, PPCVEC, { VD, VA, VB } }, 197677298Sobrien{ "vsubuhm", VX(4, 1088), VX_MASK, PPCVEC, { VD, VA, VB } }, 197777298Sobrien{ "vsubuhs", VX(4, 1600), VX_MASK, PPCVEC, { VD, VA, VB } }, 197877298Sobrien{ "vsubuwm", VX(4, 1152), VX_MASK, PPCVEC, { VD, VA, VB } }, 197977298Sobrien{ "vsubuws", VX(4, 1664), VX_MASK, PPCVEC, { VD, VA, VB } }, 198077298Sobrien{ "vsumsws", VX(4, 1928), VX_MASK, PPCVEC, { VD, VA, VB } }, 198177298Sobrien{ "vsum2sws", VX(4, 1672), VX_MASK, PPCVEC, { VD, VA, VB } }, 198277298Sobrien{ "vsum4sbs", VX(4, 1800), VX_MASK, PPCVEC, { VD, VA, VB } }, 198377298Sobrien{ "vsum4shs", VX(4, 1608), VX_MASK, PPCVEC, { VD, VA, VB } }, 198477298Sobrien{ "vsum4ubs", VX(4, 1544), VX_MASK, PPCVEC, { VD, VA, VB } }, 198577298Sobrien{ "vupkhpx", VX(4, 846), VX_MASK, PPCVEC, { VD, VB } }, 198677298Sobrien{ "vupkhsb", VX(4, 526), VX_MASK, PPCVEC, { VD, VB } }, 198777298Sobrien{ "vupkhsh", VX(4, 590), VX_MASK, PPCVEC, { VD, VB } }, 198877298Sobrien{ "vupklpx", VX(4, 974), VX_MASK, PPCVEC, { VD, VB } }, 198977298Sobrien{ "vupklsb", VX(4, 654), VX_MASK, PPCVEC, { VD, VB } }, 199077298Sobrien{ "vupklsh", VX(4, 718), VX_MASK, PPCVEC, { VD, VB } }, 199177298Sobrien{ "vxor", VX(4, 1220), VX_MASK, PPCVEC, { VD, VA, VB } }, 199277298Sobrien 1993130561Sobrien{ "evaddw", VX(4, 512), VX_MASK, PPCSPE, { RS, RA, RB } }, 1994130561Sobrien{ "evaddiw", VX(4, 514), VX_MASK, PPCSPE, { RS, RB, UIMM } }, 1995130561Sobrien{ "evsubfw", VX(4, 516), VX_MASK, PPCSPE, { RS, RA, RB } }, 1996130561Sobrien{ "evsubw", VX(4, 516), VX_MASK, PPCSPE, { RS, RB, RA } }, 1997130561Sobrien{ "evsubifw", VX(4, 518), VX_MASK, PPCSPE, { RS, UIMM, RB } }, 1998130561Sobrien{ "evsubiw", VX(4, 518), VX_MASK, PPCSPE, { RS, RB, UIMM } }, 1999130561Sobrien{ "evabs", VX(4, 520), VX_MASK, PPCSPE, { RS, RA } }, 2000130561Sobrien{ "evneg", VX(4, 521), VX_MASK, PPCSPE, { RS, RA } }, 2001130561Sobrien{ "evextsb", VX(4, 522), VX_MASK, PPCSPE, { RS, RA } }, 2002130561Sobrien{ "evextsh", VX(4, 523), VX_MASK, PPCSPE, { RS, RA } }, 2003130561Sobrien{ "evrndw", VX(4, 524), VX_MASK, PPCSPE, { RS, RA } }, 2004130561Sobrien{ "evcntlzw", VX(4, 525), VX_MASK, PPCSPE, { RS, RA } }, 2005130561Sobrien{ "evcntlsw", VX(4, 526), VX_MASK, PPCSPE, { RS, RA } }, 2006130561Sobrien 2007130561Sobrien{ "brinc", VX(4, 527), VX_MASK, PPCSPE, { RS, RA, RB } }, 2008130561Sobrien 2009130561Sobrien{ "evand", VX(4, 529), VX_MASK, PPCSPE, { RS, RA, RB } }, 2010130561Sobrien{ "evandc", VX(4, 530), VX_MASK, PPCSPE, { RS, RA, RB } }, 2011130561Sobrien{ "evmr", VX(4, 535), VX_MASK, PPCSPE, { RS, RA, BBA } }, 2012130561Sobrien{ "evor", VX(4, 535), VX_MASK, PPCSPE, { RS, RA, RB } }, 2013130561Sobrien{ "evorc", VX(4, 539), VX_MASK, PPCSPE, { RS, RA, RB } }, 2014130561Sobrien{ "evxor", VX(4, 534), VX_MASK, PPCSPE, { RS, RA, RB } }, 2015130561Sobrien{ "eveqv", VX(4, 537), VX_MASK, PPCSPE, { RS, RA, RB } }, 2016130561Sobrien{ "evnand", VX(4, 542), VX_MASK, PPCSPE, { RS, RA, RB } }, 2017130561Sobrien{ "evnot", VX(4, 536), VX_MASK, PPCSPE, { RS, RA, BBA } }, 2018130561Sobrien{ "evnor", VX(4, 536), VX_MASK, PPCSPE, { RS, RA, RB } }, 2019130561Sobrien 2020130561Sobrien{ "evrlw", VX(4, 552), VX_MASK, PPCSPE, { RS, RA, RB } }, 2021130561Sobrien{ "evrlwi", VX(4, 554), VX_MASK, PPCSPE, { RS, RA, EVUIMM } }, 2022130561Sobrien{ "evslw", VX(4, 548), VX_MASK, PPCSPE, { RS, RA, RB } }, 2023130561Sobrien{ "evslwi", VX(4, 550), VX_MASK, PPCSPE, { RS, RA, EVUIMM } }, 2024130561Sobrien{ "evsrws", VX(4, 545), VX_MASK, PPCSPE, { RS, RA, RB } }, 2025130561Sobrien{ "evsrwu", VX(4, 544), VX_MASK, PPCSPE, { RS, RA, RB } }, 2026130561Sobrien{ "evsrwis", VX(4, 547), VX_MASK, PPCSPE, { RS, RA, EVUIMM } }, 2027130561Sobrien{ "evsrwiu", VX(4, 546), VX_MASK, PPCSPE, { RS, RA, EVUIMM } }, 2028130561Sobrien{ "evsplati", VX(4, 553), VX_MASK, PPCSPE, { RS, SIMM } }, 2029130561Sobrien{ "evsplatfi", VX(4, 555), VX_MASK, PPCSPE, { RS, SIMM } }, 2030130561Sobrien{ "evmergehi", VX(4, 556), VX_MASK, PPCSPE, { RS, RA, RB } }, 2031130561Sobrien{ "evmergelo", VX(4, 557), VX_MASK, PPCSPE, { RS, RA, RB } }, 2032130561Sobrien{ "evmergehilo",VX(4,558), VX_MASK, PPCSPE, { RS, RA, RB } }, 2033130561Sobrien{ "evmergelohi",VX(4,559), VX_MASK, PPCSPE, { RS, RA, RB } }, 2034130561Sobrien 2035130561Sobrien{ "evcmpgts", VX(4, 561), VX_MASK, PPCSPE, { CRFD, RA, RB } }, 2036130561Sobrien{ "evcmpgtu", VX(4, 560), VX_MASK, PPCSPE, { CRFD, RA, RB } }, 2037130561Sobrien{ "evcmplts", VX(4, 563), VX_MASK, PPCSPE, { CRFD, RA, RB } }, 2038130561Sobrien{ "evcmpltu", VX(4, 562), VX_MASK, PPCSPE, { CRFD, RA, RB } }, 2039130561Sobrien{ "evcmpeq", VX(4, 564), VX_MASK, PPCSPE, { CRFD, RA, RB } }, 2040130561Sobrien{ "evsel", EVSEL(4,79),EVSEL_MASK, PPCSPE, { RS, RA, RB, CRFS } }, 2041130561Sobrien 2042130561Sobrien{ "evldd", VX(4, 769), VX_MASK, PPCSPE, { RS, EVUIMM_8, RA } }, 2043130561Sobrien{ "evlddx", VX(4, 768), VX_MASK, PPCSPE, { RS, RA, RB } }, 2044130561Sobrien{ "evldw", VX(4, 771), VX_MASK, PPCSPE, { RS, EVUIMM_8, RA } }, 2045130561Sobrien{ "evldwx", VX(4, 770), VX_MASK, PPCSPE, { RS, RA, RB } }, 2046130561Sobrien{ "evldh", VX(4, 773), VX_MASK, PPCSPE, { RS, EVUIMM_8, RA } }, 2047130561Sobrien{ "evldhx", VX(4, 772), VX_MASK, PPCSPE, { RS, RA, RB } }, 2048130561Sobrien{ "evlwhe", VX(4, 785), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } }, 2049130561Sobrien{ "evlwhex", VX(4, 784), VX_MASK, PPCSPE, { RS, RA, RB } }, 2050130561Sobrien{ "evlwhou", VX(4, 789), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } }, 2051130561Sobrien{ "evlwhoux", VX(4, 788), VX_MASK, PPCSPE, { RS, RA, RB } }, 2052130561Sobrien{ "evlwhos", VX(4, 791), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } }, 2053130561Sobrien{ "evlwhosx", VX(4, 790), VX_MASK, PPCSPE, { RS, RA, RB } }, 2054130561Sobrien{ "evlwwsplat",VX(4, 793), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } }, 2055130561Sobrien{ "evlwwsplatx",VX(4, 792), VX_MASK, PPCSPE, { RS, RA, RB } }, 2056130561Sobrien{ "evlwhsplat",VX(4, 797), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } }, 2057130561Sobrien{ "evlwhsplatx",VX(4, 796), VX_MASK, PPCSPE, { RS, RA, RB } }, 2058130561Sobrien{ "evlhhesplat",VX(4, 777), VX_MASK, PPCSPE, { RS, EVUIMM_2, RA } }, 2059130561Sobrien{ "evlhhesplatx",VX(4, 776), VX_MASK, PPCSPE, { RS, RA, RB } }, 2060130561Sobrien{ "evlhhousplat",VX(4, 781), VX_MASK, PPCSPE, { RS, EVUIMM_2, RA } }, 2061130561Sobrien{ "evlhhousplatx",VX(4, 780), VX_MASK, PPCSPE, { RS, RA, RB } }, 2062130561Sobrien{ "evlhhossplat",VX(4, 783), VX_MASK, PPCSPE, { RS, EVUIMM_2, RA } }, 2063130561Sobrien{ "evlhhossplatx",VX(4, 782), VX_MASK, PPCSPE, { RS, RA, RB } }, 2064130561Sobrien 2065130561Sobrien{ "evstdd", VX(4, 801), VX_MASK, PPCSPE, { RS, EVUIMM_8, RA } }, 2066130561Sobrien{ "evstddx", VX(4, 800), VX_MASK, PPCSPE, { RS, RA, RB } }, 2067130561Sobrien{ "evstdw", VX(4, 803), VX_MASK, PPCSPE, { RS, EVUIMM_8, RA } }, 2068130561Sobrien{ "evstdwx", VX(4, 802), VX_MASK, PPCSPE, { RS, RA, RB } }, 2069130561Sobrien{ "evstdh", VX(4, 805), VX_MASK, PPCSPE, { RS, EVUIMM_8, RA } }, 2070130561Sobrien{ "evstdhx", VX(4, 804), VX_MASK, PPCSPE, { RS, RA, RB } }, 2071130561Sobrien{ "evstwwe", VX(4, 825), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } }, 2072130561Sobrien{ "evstwwex", VX(4, 824), VX_MASK, PPCSPE, { RS, RA, RB } }, 2073130561Sobrien{ "evstwwo", VX(4, 829), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } }, 2074130561Sobrien{ "evstwwox", VX(4, 828), VX_MASK, PPCSPE, { RS, RA, RB } }, 2075130561Sobrien{ "evstwhe", VX(4, 817), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } }, 2076130561Sobrien{ "evstwhex", VX(4, 816), VX_MASK, PPCSPE, { RS, RA, RB } }, 2077130561Sobrien{ "evstwho", VX(4, 821), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } }, 2078130561Sobrien{ "evstwhox", VX(4, 820), VX_MASK, PPCSPE, { RS, RA, RB } }, 2079130561Sobrien 2080130561Sobrien{ "evfsabs", VX(4, 644), VX_MASK, PPCSPE, { RS, RA } }, 2081130561Sobrien{ "evfsnabs", VX(4, 645), VX_MASK, PPCSPE, { RS, RA } }, 2082130561Sobrien{ "evfsneg", VX(4, 646), VX_MASK, PPCSPE, { RS, RA } }, 2083130561Sobrien{ "evfsadd", VX(4, 640), VX_MASK, PPCSPE, { RS, RA, RB } }, 2084130561Sobrien{ "evfssub", VX(4, 641), VX_MASK, PPCSPE, { RS, RA, RB } }, 2085130561Sobrien{ "evfsmul", VX(4, 648), VX_MASK, PPCSPE, { RS, RA, RB } }, 2086130561Sobrien{ "evfsdiv", VX(4, 649), VX_MASK, PPCSPE, { RS, RA, RB } }, 2087130561Sobrien{ "evfscmpgt", VX(4, 652), VX_MASK, PPCSPE, { CRFD, RA, RB } }, 2088130561Sobrien{ "evfscmplt", VX(4, 653), VX_MASK, PPCSPE, { CRFD, RA, RB } }, 2089130561Sobrien{ "evfscmpeq", VX(4, 654), VX_MASK, PPCSPE, { CRFD, RA, RB } }, 2090130561Sobrien{ "evfststgt", VX(4, 668), VX_MASK, PPCSPE, { CRFD, RA, RB } }, 2091130561Sobrien{ "evfststlt", VX(4, 669), VX_MASK, PPCSPE, { CRFD, RA, RB } }, 2092130561Sobrien{ "evfststeq", VX(4, 670), VX_MASK, PPCSPE, { CRFD, RA, RB } }, 2093130561Sobrien{ "evfscfui", VX(4, 656), VX_MASK, PPCSPE, { RS, RB } }, 2094130561Sobrien{ "evfsctuiz", VX(4, 664), VX_MASK, PPCSPE, { RS, RB } }, 2095130561Sobrien{ "evfscfsi", VX(4, 657), VX_MASK, PPCSPE, { RS, RB } }, 2096130561Sobrien{ "evfscfuf", VX(4, 658), VX_MASK, PPCSPE, { RS, RB } }, 2097130561Sobrien{ "evfscfsf", VX(4, 659), VX_MASK, PPCSPE, { RS, RB } }, 2098130561Sobrien{ "evfsctui", VX(4, 660), VX_MASK, PPCSPE, { RS, RB } }, 2099130561Sobrien{ "evfsctsi", VX(4, 661), VX_MASK, PPCSPE, { RS, RB } }, 2100130561Sobrien{ "evfsctsiz", VX(4, 666), VX_MASK, PPCSPE, { RS, RB } }, 2101130561Sobrien{ "evfsctuf", VX(4, 662), VX_MASK, PPCSPE, { RS, RB } }, 2102130561Sobrien{ "evfsctsf", VX(4, 663), VX_MASK, PPCSPE, { RS, RB } }, 2103130561Sobrien 2104130561Sobrien{ "efsabs", VX(4, 708), VX_MASK, PPCEFS, { RS, RA } }, 2105130561Sobrien{ "efsnabs", VX(4, 709), VX_MASK, PPCEFS, { RS, RA } }, 2106130561Sobrien{ "efsneg", VX(4, 710), VX_MASK, PPCEFS, { RS, RA } }, 2107130561Sobrien{ "efsadd", VX(4, 704), VX_MASK, PPCEFS, { RS, RA, RB } }, 2108130561Sobrien{ "efssub", VX(4, 705), VX_MASK, PPCEFS, { RS, RA, RB } }, 2109130561Sobrien{ "efsmul", VX(4, 712), VX_MASK, PPCEFS, { RS, RA, RB } }, 2110130561Sobrien{ "efsdiv", VX(4, 713), VX_MASK, PPCEFS, { RS, RA, RB } }, 2111130561Sobrien{ "efscmpgt", VX(4, 716), VX_MASK, PPCEFS, { CRFD, RA, RB } }, 2112130561Sobrien{ "efscmplt", VX(4, 717), VX_MASK, PPCEFS, { CRFD, RA, RB } }, 2113130561Sobrien{ "efscmpeq", VX(4, 718), VX_MASK, PPCEFS, { CRFD, RA, RB } }, 2114130561Sobrien{ "efststgt", VX(4, 732), VX_MASK, PPCEFS, { CRFD, RA, RB } }, 2115130561Sobrien{ "efststlt", VX(4, 733), VX_MASK, PPCEFS, { CRFD, RA, RB } }, 2116130561Sobrien{ "efststeq", VX(4, 734), VX_MASK, PPCEFS, { CRFD, RA, RB } }, 2117130561Sobrien{ "efscfui", VX(4, 720), VX_MASK, PPCEFS, { RS, RB } }, 2118130561Sobrien{ "efsctuiz", VX(4, 728), VX_MASK, PPCEFS, { RS, RB } }, 2119130561Sobrien{ "efscfsi", VX(4, 721), VX_MASK, PPCEFS, { RS, RB } }, 2120130561Sobrien{ "efscfuf", VX(4, 722), VX_MASK, PPCEFS, { RS, RB } }, 2121130561Sobrien{ "efscfsf", VX(4, 723), VX_MASK, PPCEFS, { RS, RB } }, 2122130561Sobrien{ "efsctui", VX(4, 724), VX_MASK, PPCEFS, { RS, RB } }, 2123130561Sobrien{ "efsctsi", VX(4, 725), VX_MASK, PPCEFS, { RS, RB } }, 2124130561Sobrien{ "efsctsiz", VX(4, 730), VX_MASK, PPCEFS, { RS, RB } }, 2125130561Sobrien{ "efsctuf", VX(4, 726), VX_MASK, PPCEFS, { RS, RB } }, 2126130561Sobrien{ "efsctsf", VX(4, 727), VX_MASK, PPCEFS, { RS, RB } }, 2127130561Sobrien 2128130561Sobrien{ "evmhossf", VX(4, 1031), VX_MASK, PPCSPE, { RS, RA, RB } }, 2129130561Sobrien{ "evmhossfa", VX(4, 1063), VX_MASK, PPCSPE, { RS, RA, RB } }, 2130130561Sobrien{ "evmhosmf", VX(4, 1039), VX_MASK, PPCSPE, { RS, RA, RB } }, 2131130561Sobrien{ "evmhosmfa", VX(4, 1071), VX_MASK, PPCSPE, { RS, RA, RB } }, 2132130561Sobrien{ "evmhosmi", VX(4, 1037), VX_MASK, PPCSPE, { RS, RA, RB } }, 2133130561Sobrien{ "evmhosmia", VX(4, 1069), VX_MASK, PPCSPE, { RS, RA, RB } }, 2134130561Sobrien{ "evmhoumi", VX(4, 1036), VX_MASK, PPCSPE, { RS, RA, RB } }, 2135130561Sobrien{ "evmhoumia", VX(4, 1068), VX_MASK, PPCSPE, { RS, RA, RB } }, 2136130561Sobrien{ "evmhessf", VX(4, 1027), VX_MASK, PPCSPE, { RS, RA, RB } }, 2137130561Sobrien{ "evmhessfa", VX(4, 1059), VX_MASK, PPCSPE, { RS, RA, RB } }, 2138130561Sobrien{ "evmhesmf", VX(4, 1035), VX_MASK, PPCSPE, { RS, RA, RB } }, 2139130561Sobrien{ "evmhesmfa", VX(4, 1067), VX_MASK, PPCSPE, { RS, RA, RB } }, 2140130561Sobrien{ "evmhesmi", VX(4, 1033), VX_MASK, PPCSPE, { RS, RA, RB } }, 2141130561Sobrien{ "evmhesmia", VX(4, 1065), VX_MASK, PPCSPE, { RS, RA, RB } }, 2142130561Sobrien{ "evmheumi", VX(4, 1032), VX_MASK, PPCSPE, { RS, RA, RB } }, 2143130561Sobrien{ "evmheumia", VX(4, 1064), VX_MASK, PPCSPE, { RS, RA, RB } }, 2144130561Sobrien 2145130561Sobrien{ "evmhossfaaw",VX(4, 1287), VX_MASK, PPCSPE, { RS, RA, RB } }, 2146130561Sobrien{ "evmhossiaaw",VX(4, 1285), VX_MASK, PPCSPE, { RS, RA, RB } }, 2147130561Sobrien{ "evmhosmfaaw",VX(4, 1295), VX_MASK, PPCSPE, { RS, RA, RB } }, 2148130561Sobrien{ "evmhosmiaaw",VX(4, 1293), VX_MASK, PPCSPE, { RS, RA, RB } }, 2149130561Sobrien{ "evmhousiaaw",VX(4, 1284), VX_MASK, PPCSPE, { RS, RA, RB } }, 2150130561Sobrien{ "evmhoumiaaw",VX(4, 1292), VX_MASK, PPCSPE, { RS, RA, RB } }, 2151130561Sobrien{ "evmhessfaaw",VX(4, 1283), VX_MASK, PPCSPE, { RS, RA, RB } }, 2152130561Sobrien{ "evmhessiaaw",VX(4, 1281), VX_MASK, PPCSPE, { RS, RA, RB } }, 2153130561Sobrien{ "evmhesmfaaw",VX(4, 1291), VX_MASK, PPCSPE, { RS, RA, RB } }, 2154130561Sobrien{ "evmhesmiaaw",VX(4, 1289), VX_MASK, PPCSPE, { RS, RA, RB } }, 2155130561Sobrien{ "evmheusiaaw",VX(4, 1280), VX_MASK, PPCSPE, { RS, RA, RB } }, 2156130561Sobrien{ "evmheumiaaw",VX(4, 1288), VX_MASK, PPCSPE, { RS, RA, RB } }, 2157130561Sobrien 2158130561Sobrien{ "evmhossfanw",VX(4, 1415), VX_MASK, PPCSPE, { RS, RA, RB } }, 2159130561Sobrien{ "evmhossianw",VX(4, 1413), VX_MASK, PPCSPE, { RS, RA, RB } }, 2160130561Sobrien{ "evmhosmfanw",VX(4, 1423), VX_MASK, PPCSPE, { RS, RA, RB } }, 2161130561Sobrien{ "evmhosmianw",VX(4, 1421), VX_MASK, PPCSPE, { RS, RA, RB } }, 2162130561Sobrien{ "evmhousianw",VX(4, 1412), VX_MASK, PPCSPE, { RS, RA, RB } }, 2163130561Sobrien{ "evmhoumianw",VX(4, 1420), VX_MASK, PPCSPE, { RS, RA, RB } }, 2164130561Sobrien{ "evmhessfanw",VX(4, 1411), VX_MASK, PPCSPE, { RS, RA, RB } }, 2165130561Sobrien{ "evmhessianw",VX(4, 1409), VX_MASK, PPCSPE, { RS, RA, RB } }, 2166130561Sobrien{ "evmhesmfanw",VX(4, 1419), VX_MASK, PPCSPE, { RS, RA, RB } }, 2167130561Sobrien{ "evmhesmianw",VX(4, 1417), VX_MASK, PPCSPE, { RS, RA, RB } }, 2168130561Sobrien{ "evmheusianw",VX(4, 1408), VX_MASK, PPCSPE, { RS, RA, RB } }, 2169130561Sobrien{ "evmheumianw",VX(4, 1416), VX_MASK, PPCSPE, { RS, RA, RB } }, 2170130561Sobrien 2171130561Sobrien{ "evmhogsmfaa",VX(4, 1327), VX_MASK, PPCSPE, { RS, RA, RB } }, 2172130561Sobrien{ "evmhogsmiaa",VX(4, 1325), VX_MASK, PPCSPE, { RS, RA, RB } }, 2173130561Sobrien{ "evmhogumiaa",VX(4, 1324), VX_MASK, PPCSPE, { RS, RA, RB } }, 2174130561Sobrien{ "evmhegsmfaa",VX(4, 1323), VX_MASK, PPCSPE, { RS, RA, RB } }, 2175130561Sobrien{ "evmhegsmiaa",VX(4, 1321), VX_MASK, PPCSPE, { RS, RA, RB } }, 2176130561Sobrien{ "evmhegumiaa",VX(4, 1320), VX_MASK, PPCSPE, { RS, RA, RB } }, 2177130561Sobrien 2178130561Sobrien{ "evmhogsmfan",VX(4, 1455), VX_MASK, PPCSPE, { RS, RA, RB } }, 2179130561Sobrien{ "evmhogsmian",VX(4, 1453), VX_MASK, PPCSPE, { RS, RA, RB } }, 2180130561Sobrien{ "evmhogumian",VX(4, 1452), VX_MASK, PPCSPE, { RS, RA, RB } }, 2181130561Sobrien{ "evmhegsmfan",VX(4, 1451), VX_MASK, PPCSPE, { RS, RA, RB } }, 2182130561Sobrien{ "evmhegsmian",VX(4, 1449), VX_MASK, PPCSPE, { RS, RA, RB } }, 2183130561Sobrien{ "evmhegumian",VX(4, 1448), VX_MASK, PPCSPE, { RS, RA, RB } }, 2184130561Sobrien 2185130561Sobrien{ "evmwhssf", VX(4, 1095), VX_MASK, PPCSPE, { RS, RA, RB } }, 2186130561Sobrien{ "evmwhssfa", VX(4, 1127), VX_MASK, PPCSPE, { RS, RA, RB } }, 2187130561Sobrien{ "evmwhsmf", VX(4, 1103), VX_MASK, PPCSPE, { RS, RA, RB } }, 2188130561Sobrien{ "evmwhsmfa", VX(4, 1135), VX_MASK, PPCSPE, { RS, RA, RB } }, 2189130561Sobrien{ "evmwhsmi", VX(4, 1101), VX_MASK, PPCSPE, { RS, RA, RB } }, 2190130561Sobrien{ "evmwhsmia", VX(4, 1133), VX_MASK, PPCSPE, { RS, RA, RB } }, 2191130561Sobrien{ "evmwhumi", VX(4, 1100), VX_MASK, PPCSPE, { RS, RA, RB } }, 2192130561Sobrien{ "evmwhumia", VX(4, 1132), VX_MASK, PPCSPE, { RS, RA, RB } }, 2193130561Sobrien 2194130561Sobrien{ "evmwlumi", VX(4, 1096), VX_MASK, PPCSPE, { RS, RA, RB } }, 2195130561Sobrien{ "evmwlumia", VX(4, 1128), VX_MASK, PPCSPE, { RS, RA, RB } }, 2196130561Sobrien 2197130561Sobrien{ "evmwlssiaaw",VX(4, 1345), VX_MASK, PPCSPE, { RS, RA, RB } }, 2198130561Sobrien{ "evmwlsmiaaw",VX(4, 1353), VX_MASK, PPCSPE, { RS, RA, RB } }, 2199130561Sobrien{ "evmwlusiaaw",VX(4, 1344), VX_MASK, PPCSPE, { RS, RA, RB } }, 2200130561Sobrien{ "evmwlumiaaw",VX(4, 1352), VX_MASK, PPCSPE, { RS, RA, RB } }, 2201130561Sobrien 2202130561Sobrien{ "evmwlssianw",VX(4, 1473), VX_MASK, PPCSPE, { RS, RA, RB } }, 2203130561Sobrien{ "evmwlsmianw",VX(4, 1481), VX_MASK, PPCSPE, { RS, RA, RB } }, 2204130561Sobrien{ "evmwlusianw",VX(4, 1472), VX_MASK, PPCSPE, { RS, RA, RB } }, 2205130561Sobrien{ "evmwlumianw",VX(4, 1480), VX_MASK, PPCSPE, { RS, RA, RB } }, 2206130561Sobrien 2207130561Sobrien{ "evmwssf", VX(4, 1107), VX_MASK, PPCSPE, { RS, RA, RB } }, 2208130561Sobrien{ "evmwssfa", VX(4, 1139), VX_MASK, PPCSPE, { RS, RA, RB } }, 2209130561Sobrien{ "evmwsmf", VX(4, 1115), VX_MASK, PPCSPE, { RS, RA, RB } }, 2210130561Sobrien{ "evmwsmfa", VX(4, 1147), VX_MASK, PPCSPE, { RS, RA, RB } }, 2211130561Sobrien{ "evmwsmi", VX(4, 1113), VX_MASK, PPCSPE, { RS, RA, RB } }, 2212130561Sobrien{ "evmwsmia", VX(4, 1145), VX_MASK, PPCSPE, { RS, RA, RB } }, 2213130561Sobrien{ "evmwumi", VX(4, 1112), VX_MASK, PPCSPE, { RS, RA, RB } }, 2214130561Sobrien{ "evmwumia", VX(4, 1144), VX_MASK, PPCSPE, { RS, RA, RB } }, 2215130561Sobrien 2216130561Sobrien{ "evmwssfaa", VX(4, 1363), VX_MASK, PPCSPE, { RS, RA, RB } }, 2217130561Sobrien{ "evmwsmfaa", VX(4, 1371), VX_MASK, PPCSPE, { RS, RA, RB } }, 2218130561Sobrien{ "evmwsmiaa", VX(4, 1369), VX_MASK, PPCSPE, { RS, RA, RB } }, 2219130561Sobrien{ "evmwumiaa", VX(4, 1368), VX_MASK, PPCSPE, { RS, RA, RB } }, 2220130561Sobrien 2221130561Sobrien{ "evmwssfan", VX(4, 1491), VX_MASK, PPCSPE, { RS, RA, RB } }, 2222130561Sobrien{ "evmwsmfan", VX(4, 1499), VX_MASK, PPCSPE, { RS, RA, RB } }, 2223130561Sobrien{ "evmwsmian", VX(4, 1497), VX_MASK, PPCSPE, { RS, RA, RB } }, 2224130561Sobrien{ "evmwumian", VX(4, 1496), VX_MASK, PPCSPE, { RS, RA, RB } }, 2225130561Sobrien 2226130561Sobrien{ "evaddssiaaw",VX(4, 1217), VX_MASK, PPCSPE, { RS, RA } }, 2227130561Sobrien{ "evaddsmiaaw",VX(4, 1225), VX_MASK, PPCSPE, { RS, RA } }, 2228130561Sobrien{ "evaddusiaaw",VX(4, 1216), VX_MASK, PPCSPE, { RS, RA } }, 2229130561Sobrien{ "evaddumiaaw",VX(4, 1224), VX_MASK, PPCSPE, { RS, RA } }, 2230130561Sobrien 2231130561Sobrien{ "evsubfssiaaw",VX(4, 1219), VX_MASK, PPCSPE, { RS, RA } }, 2232130561Sobrien{ "evsubfsmiaaw",VX(4, 1227), VX_MASK, PPCSPE, { RS, RA } }, 2233130561Sobrien{ "evsubfusiaaw",VX(4, 1218), VX_MASK, PPCSPE, { RS, RA } }, 2234130561Sobrien{ "evsubfumiaaw",VX(4, 1226), VX_MASK, PPCSPE, { RS, RA } }, 2235130561Sobrien 2236130561Sobrien{ "evmra", VX(4, 1220), VX_MASK, PPCSPE, { RS, RA } }, 2237130561Sobrien 2238130561Sobrien{ "evdivws", VX(4, 1222), VX_MASK, PPCSPE, { RS, RA, RB } }, 2239130561Sobrien{ "evdivwu", VX(4, 1223), VX_MASK, PPCSPE, { RS, RA, RB } }, 2240130561Sobrien 224160484Sobrien{ "mulli", OP(7), OP_MASK, PPCCOM, { RT, RA, SI } }, 224260484Sobrien{ "muli", OP(7), OP_MASK, PWRCOM, { RT, RA, SI } }, 224360484Sobrien 224460484Sobrien{ "subfic", OP(8), OP_MASK, PPCCOM, { RT, RA, SI } }, 224560484Sobrien{ "sfi", OP(8), OP_MASK, PWRCOM, { RT, RA, SI } }, 224660484Sobrien 224760484Sobrien{ "dozi", OP(9), OP_MASK, M601, { RT, RA, SI } }, 224860484Sobrien 224989857Sobrien{ "bce", B(9,0,0), B_MASK, BOOKE64, { BO, BI, BD } }, 225089857Sobrien{ "bcel", B(9,0,1), B_MASK, BOOKE64, { BO, BI, BD } }, 225189857Sobrien{ "bcea", B(9,1,0), B_MASK, BOOKE64, { BO, BI, BDA } }, 225289857Sobrien{ "bcela", B(9,1,1), B_MASK, BOOKE64, { BO, BI, BDA } }, 225389857Sobrien 225460484Sobrien{ "cmplwi", OPL(10,0), OPL_MASK, PPCCOM, { OBF, RA, UI } }, 225560484Sobrien{ "cmpldi", OPL(10,1), OPL_MASK, PPC64, { OBF, RA, UI } }, 2256130561Sobrien{ "cmpli", OP(10), OP_MASK, PPC, { BF, L, RA, UI } }, 225760484Sobrien{ "cmpli", OP(10), OP_MASK, PWRCOM, { BF, RA, UI } }, 225860484Sobrien 225960484Sobrien{ "cmpwi", OPL(11,0), OPL_MASK, PPCCOM, { OBF, RA, SI } }, 226060484Sobrien{ "cmpdi", OPL(11,1), OPL_MASK, PPC64, { OBF, RA, SI } }, 2261130561Sobrien{ "cmpi", OP(11), OP_MASK, PPC, { BF, L, RA, SI } }, 226260484Sobrien{ "cmpi", OP(11), OP_MASK, PWRCOM, { BF, RA, SI } }, 226360484Sobrien 226460484Sobrien{ "addic", OP(12), OP_MASK, PPCCOM, { RT, RA, SI } }, 226560484Sobrien{ "ai", OP(12), OP_MASK, PWRCOM, { RT, RA, SI } }, 226660484Sobrien{ "subic", OP(12), OP_MASK, PPCCOM, { RT, RA, NSI } }, 226760484Sobrien 226860484Sobrien{ "addic.", OP(13), OP_MASK, PPCCOM, { RT, RA, SI } }, 226960484Sobrien{ "ai.", OP(13), OP_MASK, PWRCOM, { RT, RA, SI } }, 227060484Sobrien{ "subic.", OP(13), OP_MASK, PPCCOM, { RT, RA, NSI } }, 227160484Sobrien 227260484Sobrien{ "li", OP(14), DRA_MASK, PPCCOM, { RT, SI } }, 227360484Sobrien{ "lil", OP(14), DRA_MASK, PWRCOM, { RT, SI } }, 2274130561Sobrien{ "addi", OP(14), OP_MASK, PPCCOM, { RT, RA0, SI } }, 2275130561Sobrien{ "cal", OP(14), OP_MASK, PWRCOM, { RT, D, RA0 } }, 2276130561Sobrien{ "subi", OP(14), OP_MASK, PPCCOM, { RT, RA0, NSI } }, 2277130561Sobrien{ "la", OP(14), OP_MASK, PPCCOM, { RT, D, RA0 } }, 227860484Sobrien 227960484Sobrien{ "lis", OP(15), DRA_MASK, PPCCOM, { RT, SISIGNOPT } }, 228060484Sobrien{ "liu", OP(15), DRA_MASK, PWRCOM, { RT, SISIGNOPT } }, 2281130561Sobrien{ "addis", OP(15), OP_MASK, PPCCOM, { RT,RA0,SISIGNOPT } }, 2282130561Sobrien{ "cau", OP(15), OP_MASK, PWRCOM, { RT,RA0,SISIGNOPT } }, 2283130561Sobrien{ "subis", OP(15), OP_MASK, PPCCOM, { RT, RA0, NSI } }, 228460484Sobrien 2285130561Sobrien{ "bdnz-", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, { BDM } }, 2286130561Sobrien{ "bdnz+", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, { BDP } }, 2287130561Sobrien{ "bdnz", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, { BD } }, 2288130561Sobrien{ "bdn", BBO(16,BODNZ,0,0), BBOATBI_MASK, PWRCOM, { BD } }, 2289130561Sobrien{ "bdnzl-", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, { BDM } }, 2290130561Sobrien{ "bdnzl+", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, { BDP } }, 2291130561Sobrien{ "bdnzl", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, { BD } }, 2292130561Sobrien{ "bdnl", BBO(16,BODNZ,0,1), BBOATBI_MASK, PWRCOM, { BD } }, 2293130561Sobrien{ "bdnza-", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, { BDMA } }, 2294130561Sobrien{ "bdnza+", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, { BDPA } }, 2295130561Sobrien{ "bdnza", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, { BDA } }, 2296130561Sobrien{ "bdna", BBO(16,BODNZ,1,0), BBOATBI_MASK, PWRCOM, { BDA } }, 2297130561Sobrien{ "bdnzla-", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, { BDMA } }, 2298130561Sobrien{ "bdnzla+", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, { BDPA } }, 2299130561Sobrien{ "bdnzla", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, { BDA } }, 2300130561Sobrien{ "bdnla", BBO(16,BODNZ,1,1), BBOATBI_MASK, PWRCOM, { BDA } }, 2301130561Sobrien{ "bdz-", BBO(16,BODZ,0,0), BBOATBI_MASK, PPCCOM, { BDM } }, 2302130561Sobrien{ "bdz+", BBO(16,BODZ,0,0), BBOATBI_MASK, PPCCOM, { BDP } }, 2303130561Sobrien{ "bdz", BBO(16,BODZ,0,0), BBOATBI_MASK, COM, { BD } }, 2304130561Sobrien{ "bdzl-", BBO(16,BODZ,0,1), BBOATBI_MASK, PPCCOM, { BDM } }, 2305130561Sobrien{ "bdzl+", BBO(16,BODZ,0,1), BBOATBI_MASK, PPCCOM, { BDP } }, 2306130561Sobrien{ "bdzl", BBO(16,BODZ,0,1), BBOATBI_MASK, COM, { BD } }, 2307130561Sobrien{ "bdza-", BBO(16,BODZ,1,0), BBOATBI_MASK, PPCCOM, { BDMA } }, 2308130561Sobrien{ "bdza+", BBO(16,BODZ,1,0), BBOATBI_MASK, PPCCOM, { BDPA } }, 2309130561Sobrien{ "bdza", BBO(16,BODZ,1,0), BBOATBI_MASK, COM, { BDA } }, 2310130561Sobrien{ "bdzla-", BBO(16,BODZ,1,1), BBOATBI_MASK, PPCCOM, { BDMA } }, 2311130561Sobrien{ "bdzla+", BBO(16,BODZ,1,1), BBOATBI_MASK, PPCCOM, { BDPA } }, 2312130561Sobrien{ "bdzla", BBO(16,BODZ,1,1), BBOATBI_MASK, COM, { BDA } }, 231389857Sobrien{ "blt-", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 231489857Sobrien{ "blt+", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 231589857Sobrien{ "blt", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, COM, { CR, BD } }, 231689857Sobrien{ "bltl-", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 231789857Sobrien{ "bltl+", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 231889857Sobrien{ "bltl", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, COM, { CR, BD } }, 231989857Sobrien{ "blta-", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 232089857Sobrien{ "blta+", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 232189857Sobrien{ "blta", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, COM, { CR, BDA } }, 232289857Sobrien{ "bltla-", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 232389857Sobrien{ "bltla+", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 232489857Sobrien{ "bltla", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, COM, { CR, BDA } }, 232589857Sobrien{ "bgt-", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 232689857Sobrien{ "bgt+", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 232789857Sobrien{ "bgt", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, COM, { CR, BD } }, 232889857Sobrien{ "bgtl-", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 232989857Sobrien{ "bgtl+", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 233089857Sobrien{ "bgtl", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, COM, { CR, BD } }, 233189857Sobrien{ "bgta-", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 233289857Sobrien{ "bgta+", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 233389857Sobrien{ "bgta", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, COM, { CR, BDA } }, 233489857Sobrien{ "bgtla-", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 233589857Sobrien{ "bgtla+", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 233689857Sobrien{ "bgtla", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, COM, { CR, BDA } }, 233789857Sobrien{ "beq-", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 233889857Sobrien{ "beq+", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 233989857Sobrien{ "beq", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, COM, { CR, BD } }, 234089857Sobrien{ "beql-", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 234189857Sobrien{ "beql+", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 234289857Sobrien{ "beql", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, COM, { CR, BD } }, 234389857Sobrien{ "beqa-", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 234489857Sobrien{ "beqa+", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 234589857Sobrien{ "beqa", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, COM, { CR, BDA } }, 234689857Sobrien{ "beqla-", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 234789857Sobrien{ "beqla+", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 234889857Sobrien{ "beqla", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, COM, { CR, BDA } }, 234989857Sobrien{ "bso-", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 235089857Sobrien{ "bso+", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 235189857Sobrien{ "bso", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, COM, { CR, BD } }, 235289857Sobrien{ "bsol-", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 235389857Sobrien{ "bsol+", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 235489857Sobrien{ "bsol", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, COM, { CR, BD } }, 235589857Sobrien{ "bsoa-", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 235689857Sobrien{ "bsoa+", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 235789857Sobrien{ "bsoa", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, COM, { CR, BDA } }, 235889857Sobrien{ "bsola-", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 235989857Sobrien{ "bsola+", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 236089857Sobrien{ "bsola", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, COM, { CR, BDA } }, 236189857Sobrien{ "bun-", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 236289857Sobrien{ "bun+", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 236389857Sobrien{ "bun", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BD } }, 236489857Sobrien{ "bunl-", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 236589857Sobrien{ "bunl+", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 236689857Sobrien{ "bunl", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BD } }, 236789857Sobrien{ "buna-", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 236889857Sobrien{ "buna+", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 236989857Sobrien{ "buna", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDA } }, 237089857Sobrien{ "bunla-", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 237189857Sobrien{ "bunla+", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 237289857Sobrien{ "bunla", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDA } }, 237389857Sobrien{ "bge-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 237489857Sobrien{ "bge+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 237589857Sobrien{ "bge", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, { CR, BD } }, 237689857Sobrien{ "bgel-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 237789857Sobrien{ "bgel+", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 237889857Sobrien{ "bgel", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, { CR, BD } }, 237989857Sobrien{ "bgea-", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 238089857Sobrien{ "bgea+", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 238189857Sobrien{ "bgea", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, COM, { CR, BDA } }, 238289857Sobrien{ "bgela-", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 238389857Sobrien{ "bgela+", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 238489857Sobrien{ "bgela", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, COM, { CR, BDA } }, 238589857Sobrien{ "bnl-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 238689857Sobrien{ "bnl+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 238789857Sobrien{ "bnl", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, { CR, BD } }, 238889857Sobrien{ "bnll-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 238989857Sobrien{ "bnll+", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 239089857Sobrien{ "bnll", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, { CR, BD } }, 239189857Sobrien{ "bnla-", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 239289857Sobrien{ "bnla+", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 239389857Sobrien{ "bnla", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, COM, { CR, BDA } }, 239489857Sobrien{ "bnlla-", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 239589857Sobrien{ "bnlla+", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 239689857Sobrien{ "bnlla", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, COM, { CR, BDA } }, 239789857Sobrien{ "ble-", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 239889857Sobrien{ "ble+", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 239989857Sobrien{ "ble", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, { CR, BD } }, 240089857Sobrien{ "blel-", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 240189857Sobrien{ "blel+", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 240289857Sobrien{ "blel", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, { CR, BD } }, 240389857Sobrien{ "blea-", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 240489857Sobrien{ "blea+", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 240589857Sobrien{ "blea", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, COM, { CR, BDA } }, 240689857Sobrien{ "blela-", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 240789857Sobrien{ "blela+", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 240889857Sobrien{ "blela", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, COM, { CR, BDA } }, 240989857Sobrien{ "bng-", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 241089857Sobrien{ "bng+", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 241189857Sobrien{ "bng", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, { CR, BD } }, 241289857Sobrien{ "bngl-", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 241389857Sobrien{ "bngl+", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 241489857Sobrien{ "bngl", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, { CR, BD } }, 241589857Sobrien{ "bnga-", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 241689857Sobrien{ "bnga+", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 241789857Sobrien{ "bnga", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, COM, { CR, BDA } }, 241889857Sobrien{ "bngla-", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 241989857Sobrien{ "bngla+", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 242089857Sobrien{ "bngla", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, COM, { CR, BDA } }, 242189857Sobrien{ "bne-", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 242289857Sobrien{ "bne+", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 242389857Sobrien{ "bne", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, COM, { CR, BD } }, 242489857Sobrien{ "bnel-", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 242589857Sobrien{ "bnel+", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 242689857Sobrien{ "bnel", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, COM, { CR, BD } }, 242789857Sobrien{ "bnea-", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 242889857Sobrien{ "bnea+", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 242989857Sobrien{ "bnea", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, COM, { CR, BDA } }, 243089857Sobrien{ "bnela-", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 243189857Sobrien{ "bnela+", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 243289857Sobrien{ "bnela", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, COM, { CR, BDA } }, 243389857Sobrien{ "bns-", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 243489857Sobrien{ "bns+", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 243589857Sobrien{ "bns", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, COM, { CR, BD } }, 243689857Sobrien{ "bnsl-", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 243789857Sobrien{ "bnsl+", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 243889857Sobrien{ "bnsl", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, COM, { CR, BD } }, 243989857Sobrien{ "bnsa-", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 244089857Sobrien{ "bnsa+", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 244189857Sobrien{ "bnsa", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, COM, { CR, BDA } }, 244289857Sobrien{ "bnsla-", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 244389857Sobrien{ "bnsla+", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 244489857Sobrien{ "bnsla", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, COM, { CR, BDA } }, 244589857Sobrien{ "bnu-", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 244689857Sobrien{ "bnu+", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 244789857Sobrien{ "bnu", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BD } }, 244889857Sobrien{ "bnul-", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } }, 244989857Sobrien{ "bnul+", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } }, 245089857Sobrien{ "bnul", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BD } }, 245189857Sobrien{ "bnua-", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 245289857Sobrien{ "bnua+", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 245389857Sobrien{ "bnua", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDA } }, 245489857Sobrien{ "bnula-", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } }, 245589857Sobrien{ "bnula+", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } }, 245689857Sobrien{ "bnula", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDA } }, 245792828Sobrien{ "bdnzt-", BBO(16,BODNZT,0,0), BBOY_MASK, NOPOWER4, { BI, BDM } }, 245892828Sobrien{ "bdnzt+", BBO(16,BODNZT,0,0), BBOY_MASK, NOPOWER4, { BI, BDP } }, 245960484Sobrien{ "bdnzt", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, { BI, BD } }, 246092828Sobrien{ "bdnztl-", BBO(16,BODNZT,0,1), BBOY_MASK, NOPOWER4, { BI, BDM } }, 246192828Sobrien{ "bdnztl+", BBO(16,BODNZT,0,1), BBOY_MASK, NOPOWER4, { BI, BDP } }, 246260484Sobrien{ "bdnztl", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, { BI, BD } }, 246392828Sobrien{ "bdnzta-", BBO(16,BODNZT,1,0), BBOY_MASK, NOPOWER4, { BI, BDMA } }, 246492828Sobrien{ "bdnzta+", BBO(16,BODNZT,1,0), BBOY_MASK, NOPOWER4, { BI, BDPA } }, 246560484Sobrien{ "bdnzta", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, { BI, BDA } }, 246692828Sobrien{ "bdnztla-",BBO(16,BODNZT,1,1), BBOY_MASK, NOPOWER4, { BI, BDMA } }, 246792828Sobrien{ "bdnztla+",BBO(16,BODNZT,1,1), BBOY_MASK, NOPOWER4, { BI, BDPA } }, 246860484Sobrien{ "bdnztla", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, { BI, BDA } }, 246992828Sobrien{ "bdnzf-", BBO(16,BODNZF,0,0), BBOY_MASK, NOPOWER4, { BI, BDM } }, 247092828Sobrien{ "bdnzf+", BBO(16,BODNZF,0,0), BBOY_MASK, NOPOWER4, { BI, BDP } }, 247160484Sobrien{ "bdnzf", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, { BI, BD } }, 247292828Sobrien{ "bdnzfl-", BBO(16,BODNZF,0,1), BBOY_MASK, NOPOWER4, { BI, BDM } }, 247392828Sobrien{ "bdnzfl+", BBO(16,BODNZF,0,1), BBOY_MASK, NOPOWER4, { BI, BDP } }, 247460484Sobrien{ "bdnzfl", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, { BI, BD } }, 247592828Sobrien{ "bdnzfa-", BBO(16,BODNZF,1,0), BBOY_MASK, NOPOWER4, { BI, BDMA } }, 247692828Sobrien{ "bdnzfa+", BBO(16,BODNZF,1,0), BBOY_MASK, NOPOWER4, { BI, BDPA } }, 247760484Sobrien{ "bdnzfa", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, { BI, BDA } }, 247892828Sobrien{ "bdnzfla-",BBO(16,BODNZF,1,1), BBOY_MASK, NOPOWER4, { BI, BDMA } }, 247992828Sobrien{ "bdnzfla+",BBO(16,BODNZF,1,1), BBOY_MASK, NOPOWER4, { BI, BDPA } }, 248060484Sobrien{ "bdnzfla", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, { BI, BDA } }, 248189857Sobrien{ "bt-", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, { BI, BDM } }, 248289857Sobrien{ "bt+", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, { BI, BDP } }, 248389857Sobrien{ "bt", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, { BI, BD } }, 248489857Sobrien{ "bbt", BBO(16,BOT,0,0), BBOAT_MASK, PWRCOM, { BI, BD } }, 248589857Sobrien{ "btl-", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, { BI, BDM } }, 248689857Sobrien{ "btl+", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, { BI, BDP } }, 248789857Sobrien{ "btl", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, { BI, BD } }, 248889857Sobrien{ "bbtl", BBO(16,BOT,0,1), BBOAT_MASK, PWRCOM, { BI, BD } }, 248989857Sobrien{ "bta-", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, { BI, BDMA } }, 249089857Sobrien{ "bta+", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, { BI, BDPA } }, 249189857Sobrien{ "bta", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, { BI, BDA } }, 249289857Sobrien{ "bbta", BBO(16,BOT,1,0), BBOAT_MASK, PWRCOM, { BI, BDA } }, 249389857Sobrien{ "btla-", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, { BI, BDMA } }, 249489857Sobrien{ "btla+", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, { BI, BDPA } }, 249589857Sobrien{ "btla", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, { BI, BDA } }, 249689857Sobrien{ "bbtla", BBO(16,BOT,1,1), BBOAT_MASK, PWRCOM, { BI, BDA } }, 249789857Sobrien{ "bf-", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, { BI, BDM } }, 249889857Sobrien{ "bf+", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, { BI, BDP } }, 249989857Sobrien{ "bf", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, { BI, BD } }, 250089857Sobrien{ "bbf", BBO(16,BOF,0,0), BBOAT_MASK, PWRCOM, { BI, BD } }, 250189857Sobrien{ "bfl-", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, { BI, BDM } }, 250289857Sobrien{ "bfl+", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, { BI, BDP } }, 250389857Sobrien{ "bfl", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, { BI, BD } }, 250489857Sobrien{ "bbfl", BBO(16,BOF,0,1), BBOAT_MASK, PWRCOM, { BI, BD } }, 250589857Sobrien{ "bfa-", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, { BI, BDMA } }, 250689857Sobrien{ "bfa+", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, { BI, BDPA } }, 250789857Sobrien{ "bfa", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, { BI, BDA } }, 250889857Sobrien{ "bbfa", BBO(16,BOF,1,0), BBOAT_MASK, PWRCOM, { BI, BDA } }, 250989857Sobrien{ "bfla-", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, { BI, BDMA } }, 251089857Sobrien{ "bfla+", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, { BI, BDPA } }, 251189857Sobrien{ "bfla", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, { BI, BDA } }, 251289857Sobrien{ "bbfla", BBO(16,BOF,1,1), BBOAT_MASK, PWRCOM, { BI, BDA } }, 251392828Sobrien{ "bdzt-", BBO(16,BODZT,0,0), BBOY_MASK, NOPOWER4, { BI, BDM } }, 251492828Sobrien{ "bdzt+", BBO(16,BODZT,0,0), BBOY_MASK, NOPOWER4, { BI, BDP } }, 251560484Sobrien{ "bdzt", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, { BI, BD } }, 251692828Sobrien{ "bdztl-", BBO(16,BODZT,0,1), BBOY_MASK, NOPOWER4, { BI, BDM } }, 251792828Sobrien{ "bdztl+", BBO(16,BODZT,0,1), BBOY_MASK, NOPOWER4, { BI, BDP } }, 251860484Sobrien{ "bdztl", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, { BI, BD } }, 251992828Sobrien{ "bdzta-", BBO(16,BODZT,1,0), BBOY_MASK, NOPOWER4, { BI, BDMA } }, 252092828Sobrien{ "bdzta+", BBO(16,BODZT,1,0), BBOY_MASK, NOPOWER4, { BI, BDPA } }, 252160484Sobrien{ "bdzta", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, { BI, BDA } }, 252292828Sobrien{ "bdztla-", BBO(16,BODZT,1,1), BBOY_MASK, NOPOWER4, { BI, BDMA } }, 252392828Sobrien{ "bdztla+", BBO(16,BODZT,1,1), BBOY_MASK, NOPOWER4, { BI, BDPA } }, 252460484Sobrien{ "bdztla", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, { BI, BDA } }, 252592828Sobrien{ "bdzf-", BBO(16,BODZF,0,0), BBOY_MASK, NOPOWER4, { BI, BDM } }, 252692828Sobrien{ "bdzf+", BBO(16,BODZF,0,0), BBOY_MASK, NOPOWER4, { BI, BDP } }, 252760484Sobrien{ "bdzf", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, { BI, BD } }, 252892828Sobrien{ "bdzfl-", BBO(16,BODZF,0,1), BBOY_MASK, NOPOWER4, { BI, BDM } }, 252992828Sobrien{ "bdzfl+", BBO(16,BODZF,0,1), BBOY_MASK, NOPOWER4, { BI, BDP } }, 253060484Sobrien{ "bdzfl", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, { BI, BD } }, 253192828Sobrien{ "bdzfa-", BBO(16,BODZF,1,0), BBOY_MASK, NOPOWER4, { BI, BDMA } }, 253292828Sobrien{ "bdzfa+", BBO(16,BODZF,1,0), BBOY_MASK, NOPOWER4, { BI, BDPA } }, 253360484Sobrien{ "bdzfa", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, { BI, BDA } }, 253492828Sobrien{ "bdzfla-", BBO(16,BODZF,1,1), BBOY_MASK, NOPOWER4, { BI, BDMA } }, 253592828Sobrien{ "bdzfla+", BBO(16,BODZF,1,1), BBOY_MASK, NOPOWER4, { BI, BDPA } }, 253660484Sobrien{ "bdzfla", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, { BI, BDA } }, 253777298Sobrien{ "bc-", B(16,0,0), B_MASK, PPCCOM, { BOE, BI, BDM } }, 253877298Sobrien{ "bc+", B(16,0,0), B_MASK, PPCCOM, { BOE, BI, BDP } }, 253960484Sobrien{ "bc", B(16,0,0), B_MASK, COM, { BO, BI, BD } }, 254077298Sobrien{ "bcl-", B(16,0,1), B_MASK, PPCCOM, { BOE, BI, BDM } }, 254177298Sobrien{ "bcl+", B(16,0,1), B_MASK, PPCCOM, { BOE, BI, BDP } }, 254260484Sobrien{ "bcl", B(16,0,1), B_MASK, COM, { BO, BI, BD } }, 254377298Sobrien{ "bca-", B(16,1,0), B_MASK, PPCCOM, { BOE, BI, BDMA } }, 254477298Sobrien{ "bca+", B(16,1,0), B_MASK, PPCCOM, { BOE, BI, BDPA } }, 254560484Sobrien{ "bca", B(16,1,0), B_MASK, COM, { BO, BI, BDA } }, 254677298Sobrien{ "bcla-", B(16,1,1), B_MASK, PPCCOM, { BOE, BI, BDMA } }, 254777298Sobrien{ "bcla+", B(16,1,1), B_MASK, PPCCOM, { BOE, BI, BDPA } }, 254860484Sobrien{ "bcla", B(16,1,1), B_MASK, COM, { BO, BI, BDA } }, 254960484Sobrien 2550218822Sdim{ "sc", SC(17,1,0), SC_MASK, PPC, { LEV } }, 2551218822Sdim{ "svc", SC(17,0,0), SC_MASK, POWER, { SVC_LEV, FL1, FL2 } }, 2552218822Sdim{ "svcl", SC(17,0,1), SC_MASK, POWER, { SVC_LEV, FL1, FL2 } }, 255360484Sobrien{ "svca", SC(17,1,0), SC_MASK, PWRCOM, { SV } }, 255460484Sobrien{ "svcla", SC(17,1,1), SC_MASK, POWER, { SV } }, 255560484Sobrien 255689857Sobrien{ "b", B(18,0,0), B_MASK, COM, { LI } }, 255789857Sobrien{ "bl", B(18,0,1), B_MASK, COM, { LI } }, 255889857Sobrien{ "ba", B(18,1,0), B_MASK, COM, { LIA } }, 255989857Sobrien{ "bla", B(18,1,1), B_MASK, COM, { LIA } }, 256060484Sobrien 2561130561Sobrien{ "mcrf", XL(19,0), XLBB_MASK|(3 << 21)|(3 << 16), COM, { BF, BFA } }, 256260484Sobrien 256360484Sobrien{ "blr", XLO(19,BOU,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } }, 256460484Sobrien{ "br", XLO(19,BOU,16,0), XLBOBIBB_MASK, PWRCOM, { 0 } }, 256560484Sobrien{ "blrl", XLO(19,BOU,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } }, 256660484Sobrien{ "brl", XLO(19,BOU,16,1), XLBOBIBB_MASK, PWRCOM, { 0 } }, 256760484Sobrien{ "bdnzlr", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } }, 256892828Sobrien{ "bdnzlr-", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, NOPOWER4, { 0 } }, 2569130561Sobrien{ "bdnzlr-", XLO(19,BODNZM4,16,0), XLBOBIBB_MASK, POWER4, { 0 } }, 257092828Sobrien{ "bdnzlr+", XLO(19,BODNZP,16,0), XLBOBIBB_MASK, NOPOWER4, { 0 } }, 257192828Sobrien{ "bdnzlr+", XLO(19,BODNZP4,16,0), XLBOBIBB_MASK, POWER4, { 0 } }, 257260484Sobrien{ "bdnzlrl", XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } }, 257392828Sobrien{ "bdnzlrl-",XLO(19,BODNZ,16,1), XLBOBIBB_MASK, NOPOWER4, { 0 } }, 2574130561Sobrien{ "bdnzlrl-",XLO(19,BODNZM4,16,1), XLBOBIBB_MASK, POWER4, { 0 } }, 257592828Sobrien{ "bdnzlrl+",XLO(19,BODNZP,16,1), XLBOBIBB_MASK, NOPOWER4, { 0 } }, 257692828Sobrien{ "bdnzlrl+",XLO(19,BODNZP4,16,1), XLBOBIBB_MASK, POWER4, { 0 } }, 257760484Sobrien{ "bdzlr", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } }, 257892828Sobrien{ "bdzlr-", XLO(19,BODZ,16,0), XLBOBIBB_MASK, NOPOWER4, { 0 } }, 2579130561Sobrien{ "bdzlr-", XLO(19,BODZM4,16,0), XLBOBIBB_MASK, POWER4, { 0 } }, 258092828Sobrien{ "bdzlr+", XLO(19,BODZP,16,0), XLBOBIBB_MASK, NOPOWER4, { 0 } }, 258192828Sobrien{ "bdzlr+", XLO(19,BODZP4,16,0), XLBOBIBB_MASK, POWER4, { 0 } }, 258260484Sobrien{ "bdzlrl", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } }, 258392828Sobrien{ "bdzlrl-", XLO(19,BODZ,16,1), XLBOBIBB_MASK, NOPOWER4, { 0 } }, 2584130561Sobrien{ "bdzlrl-", XLO(19,BODZM4,16,1), XLBOBIBB_MASK, POWER4, { 0 } }, 258592828Sobrien{ "bdzlrl+", XLO(19,BODZP,16,1), XLBOBIBB_MASK, NOPOWER4, { 0 } }, 258692828Sobrien{ "bdzlrl+", XLO(19,BODZP4,16,1), XLBOBIBB_MASK, POWER4, { 0 } }, 258760484Sobrien{ "bltlr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 258892828Sobrien{ "bltlr-", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2589130561Sobrien{ "bltlr-", XLOCB(19,BOTM4,CBLT,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 259092828Sobrien{ "bltlr+", XLOCB(19,BOTP,CBLT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 259192828Sobrien{ "bltlr+", XLOCB(19,BOTP4,CBLT,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 259260484Sobrien{ "bltr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, 259360484Sobrien{ "bltlrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 259492828Sobrien{ "bltlrl-", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2595130561Sobrien{ "bltlrl-", XLOCB(19,BOTM4,CBLT,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 259692828Sobrien{ "bltlrl+", XLOCB(19,BOTP,CBLT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 259792828Sobrien{ "bltlrl+", XLOCB(19,BOTP4,CBLT,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 259860484Sobrien{ "bltrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, 259960484Sobrien{ "bgtlr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 260092828Sobrien{ "bgtlr-", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2601130561Sobrien{ "bgtlr-", XLOCB(19,BOTM4,CBGT,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 260292828Sobrien{ "bgtlr+", XLOCB(19,BOTP,CBGT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 260392828Sobrien{ "bgtlr+", XLOCB(19,BOTP4,CBGT,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 260460484Sobrien{ "bgtr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, 260560484Sobrien{ "bgtlrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 260692828Sobrien{ "bgtlrl-", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2607130561Sobrien{ "bgtlrl-", XLOCB(19,BOTM4,CBGT,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 260892828Sobrien{ "bgtlrl+", XLOCB(19,BOTP,CBGT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 260992828Sobrien{ "bgtlrl+", XLOCB(19,BOTP4,CBGT,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 261060484Sobrien{ "bgtrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, 261160484Sobrien{ "beqlr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 261292828Sobrien{ "beqlr-", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2613130561Sobrien{ "beqlr-", XLOCB(19,BOTM4,CBEQ,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 261492828Sobrien{ "beqlr+", XLOCB(19,BOTP,CBEQ,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 261592828Sobrien{ "beqlr+", XLOCB(19,BOTP4,CBEQ,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 261660484Sobrien{ "beqr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, 261760484Sobrien{ "beqlrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 261892828Sobrien{ "beqlrl-", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2619130561Sobrien{ "beqlrl-", XLOCB(19,BOTM4,CBEQ,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 262092828Sobrien{ "beqlrl+", XLOCB(19,BOTP,CBEQ,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 262192828Sobrien{ "beqlrl+", XLOCB(19,BOTP4,CBEQ,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 262260484Sobrien{ "beqrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, 262360484Sobrien{ "bsolr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 262492828Sobrien{ "bsolr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2625130561Sobrien{ "bsolr-", XLOCB(19,BOTM4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 262692828Sobrien{ "bsolr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 262792828Sobrien{ "bsolr+", XLOCB(19,BOTP4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 262860484Sobrien{ "bsor", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, 262960484Sobrien{ "bsolrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 263092828Sobrien{ "bsolrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2631130561Sobrien{ "bsolrl-", XLOCB(19,BOTM4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 263292828Sobrien{ "bsolrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 263392828Sobrien{ "bsolrl+", XLOCB(19,BOTP4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 263460484Sobrien{ "bsorl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, 263560484Sobrien{ "bunlr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 263692828Sobrien{ "bunlr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2637130561Sobrien{ "bunlr-", XLOCB(19,BOTM4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 263892828Sobrien{ "bunlr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 263992828Sobrien{ "bunlr+", XLOCB(19,BOTP4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 264060484Sobrien{ "bunlrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 264192828Sobrien{ "bunlrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2642130561Sobrien{ "bunlrl-", XLOCB(19,BOTM4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 264392828Sobrien{ "bunlrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 264492828Sobrien{ "bunlrl+", XLOCB(19,BOTP4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 264560484Sobrien{ "bgelr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 264692828Sobrien{ "bgelr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2647130561Sobrien{ "bgelr-", XLOCB(19,BOFM4,CBLT,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 264892828Sobrien{ "bgelr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 264992828Sobrien{ "bgelr+", XLOCB(19,BOFP4,CBLT,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 265060484Sobrien{ "bger", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, 265160484Sobrien{ "bgelrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 265292828Sobrien{ "bgelrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2653130561Sobrien{ "bgelrl-", XLOCB(19,BOFM4,CBLT,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 265492828Sobrien{ "bgelrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 265592828Sobrien{ "bgelrl+", XLOCB(19,BOFP4,CBLT,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 265660484Sobrien{ "bgerl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, 265760484Sobrien{ "bnllr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 265892828Sobrien{ "bnllr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2659130561Sobrien{ "bnllr-", XLOCB(19,BOFM4,CBLT,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 266092828Sobrien{ "bnllr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 266192828Sobrien{ "bnllr+", XLOCB(19,BOFP4,CBLT,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 266260484Sobrien{ "bnlr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, 266360484Sobrien{ "bnllrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 266492828Sobrien{ "bnllrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2665130561Sobrien{ "bnllrl-", XLOCB(19,BOFM4,CBLT,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 266692828Sobrien{ "bnllrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 266792828Sobrien{ "bnllrl+", XLOCB(19,BOFP4,CBLT,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 266860484Sobrien{ "bnlrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, 266960484Sobrien{ "blelr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 267092828Sobrien{ "blelr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2671130561Sobrien{ "blelr-", XLOCB(19,BOFM4,CBGT,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 267292828Sobrien{ "blelr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 267392828Sobrien{ "blelr+", XLOCB(19,BOFP4,CBGT,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 267460484Sobrien{ "bler", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, 267560484Sobrien{ "blelrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 267692828Sobrien{ "blelrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2677130561Sobrien{ "blelrl-", XLOCB(19,BOFM4,CBGT,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 267892828Sobrien{ "blelrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 267992828Sobrien{ "blelrl+", XLOCB(19,BOFP4,CBGT,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 268060484Sobrien{ "blerl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, 268160484Sobrien{ "bnglr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 268292828Sobrien{ "bnglr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2683130561Sobrien{ "bnglr-", XLOCB(19,BOFM4,CBGT,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 268492828Sobrien{ "bnglr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 268592828Sobrien{ "bnglr+", XLOCB(19,BOFP4,CBGT,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 268660484Sobrien{ "bngr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, 268760484Sobrien{ "bnglrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 268892828Sobrien{ "bnglrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2689130561Sobrien{ "bnglrl-", XLOCB(19,BOFM4,CBGT,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 269092828Sobrien{ "bnglrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 269192828Sobrien{ "bnglrl+", XLOCB(19,BOFP4,CBGT,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 269260484Sobrien{ "bngrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, 269360484Sobrien{ "bnelr", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 269492828Sobrien{ "bnelr-", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2695130561Sobrien{ "bnelr-", XLOCB(19,BOFM4,CBEQ,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 269692828Sobrien{ "bnelr+", XLOCB(19,BOFP,CBEQ,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 269792828Sobrien{ "bnelr+", XLOCB(19,BOFP4,CBEQ,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 269860484Sobrien{ "bner", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, 269960484Sobrien{ "bnelrl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 270092828Sobrien{ "bnelrl-", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2701130561Sobrien{ "bnelrl-", XLOCB(19,BOFM4,CBEQ,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 270292828Sobrien{ "bnelrl+", XLOCB(19,BOFP,CBEQ,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 270392828Sobrien{ "bnelrl+", XLOCB(19,BOFP4,CBEQ,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 270460484Sobrien{ "bnerl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, 270560484Sobrien{ "bnslr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 270692828Sobrien{ "bnslr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2707130561Sobrien{ "bnslr-", XLOCB(19,BOFM4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 270892828Sobrien{ "bnslr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 270992828Sobrien{ "bnslr+", XLOCB(19,BOFP4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 271060484Sobrien{ "bnsr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, 271160484Sobrien{ "bnslrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 271292828Sobrien{ "bnslrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2713130561Sobrien{ "bnslrl-", XLOCB(19,BOFM4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 271492828Sobrien{ "bnslrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 271592828Sobrien{ "bnslrl+", XLOCB(19,BOFP4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 271660484Sobrien{ "bnsrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, 271760484Sobrien{ "bnulr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 271892828Sobrien{ "bnulr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2719130561Sobrien{ "bnulr-", XLOCB(19,BOFM4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 272092828Sobrien{ "bnulr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 272192828Sobrien{ "bnulr+", XLOCB(19,BOFP4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } }, 272260484Sobrien{ "bnulrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 272392828Sobrien{ "bnulrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2724130561Sobrien{ "bnulrl-", XLOCB(19,BOFM4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 272592828Sobrien{ "bnulrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 272692828Sobrien{ "bnulrl+", XLOCB(19,BOFP4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } }, 272760484Sobrien{ "btlr", XLO(19,BOT,16,0), XLBOBB_MASK, PPCCOM, { BI } }, 272892828Sobrien{ "btlr-", XLO(19,BOT,16,0), XLBOBB_MASK, NOPOWER4, { BI } }, 2729130561Sobrien{ "btlr-", XLO(19,BOTM4,16,0), XLBOBB_MASK, POWER4, { BI } }, 273092828Sobrien{ "btlr+", XLO(19,BOTP,16,0), XLBOBB_MASK, NOPOWER4, { BI } }, 273192828Sobrien{ "btlr+", XLO(19,BOTP4,16,0), XLBOBB_MASK, POWER4, { BI } }, 273260484Sobrien{ "bbtr", XLO(19,BOT,16,0), XLBOBB_MASK, PWRCOM, { BI } }, 273360484Sobrien{ "btlrl", XLO(19,BOT,16,1), XLBOBB_MASK, PPCCOM, { BI } }, 273492828Sobrien{ "btlrl-", XLO(19,BOT,16,1), XLBOBB_MASK, NOPOWER4, { BI } }, 2735130561Sobrien{ "btlrl-", XLO(19,BOTM4,16,1), XLBOBB_MASK, POWER4, { BI } }, 273692828Sobrien{ "btlrl+", XLO(19,BOTP,16,1), XLBOBB_MASK, NOPOWER4, { BI } }, 273792828Sobrien{ "btlrl+", XLO(19,BOTP4,16,1), XLBOBB_MASK, POWER4, { BI } }, 273860484Sobrien{ "bbtrl", XLO(19,BOT,16,1), XLBOBB_MASK, PWRCOM, { BI } }, 273960484Sobrien{ "bflr", XLO(19,BOF,16,0), XLBOBB_MASK, PPCCOM, { BI } }, 274092828Sobrien{ "bflr-", XLO(19,BOF,16,0), XLBOBB_MASK, NOPOWER4, { BI } }, 2741130561Sobrien{ "bflr-", XLO(19,BOFM4,16,0), XLBOBB_MASK, POWER4, { BI } }, 274292828Sobrien{ "bflr+", XLO(19,BOFP,16,0), XLBOBB_MASK, NOPOWER4, { BI } }, 274392828Sobrien{ "bflr+", XLO(19,BOFP4,16,0), XLBOBB_MASK, POWER4, { BI } }, 274460484Sobrien{ "bbfr", XLO(19,BOF,16,0), XLBOBB_MASK, PWRCOM, { BI } }, 274560484Sobrien{ "bflrl", XLO(19,BOF,16,1), XLBOBB_MASK, PPCCOM, { BI } }, 274692828Sobrien{ "bflrl-", XLO(19,BOF,16,1), XLBOBB_MASK, NOPOWER4, { BI } }, 2747130561Sobrien{ "bflrl-", XLO(19,BOFM4,16,1), XLBOBB_MASK, POWER4, { BI } }, 274892828Sobrien{ "bflrl+", XLO(19,BOFP,16,1), XLBOBB_MASK, NOPOWER4, { BI } }, 274992828Sobrien{ "bflrl+", XLO(19,BOFP4,16,1), XLBOBB_MASK, POWER4, { BI } }, 275060484Sobrien{ "bbfrl", XLO(19,BOF,16,1), XLBOBB_MASK, PWRCOM, { BI } }, 275160484Sobrien{ "bdnztlr", XLO(19,BODNZT,16,0), XLBOBB_MASK, PPCCOM, { BI } }, 275292828Sobrien{ "bdnztlr-",XLO(19,BODNZT,16,0), XLBOBB_MASK, NOPOWER4, { BI } }, 275392828Sobrien{ "bdnztlr+",XLO(19,BODNZTP,16,0), XLBOBB_MASK, NOPOWER4, { BI } }, 275460484Sobrien{ "bdnztlrl",XLO(19,BODNZT,16,1), XLBOBB_MASK, PPCCOM, { BI } }, 275592828Sobrien{ "bdnztlrl-",XLO(19,BODNZT,16,1), XLBOBB_MASK, NOPOWER4, { BI } }, 275692828Sobrien{ "bdnztlrl+",XLO(19,BODNZTP,16,1), XLBOBB_MASK, NOPOWER4, { BI } }, 275760484Sobrien{ "bdnzflr", XLO(19,BODNZF,16,0), XLBOBB_MASK, PPCCOM, { BI } }, 275892828Sobrien{ "bdnzflr-",XLO(19,BODNZF,16,0), XLBOBB_MASK, NOPOWER4, { BI } }, 275992828Sobrien{ "bdnzflr+",XLO(19,BODNZFP,16,0), XLBOBB_MASK, NOPOWER4, { BI } }, 276060484Sobrien{ "bdnzflrl",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPCCOM, { BI } }, 276192828Sobrien{ "bdnzflrl-",XLO(19,BODNZF,16,1), XLBOBB_MASK, NOPOWER4, { BI } }, 276292828Sobrien{ "bdnzflrl+",XLO(19,BODNZFP,16,1), XLBOBB_MASK, NOPOWER4, { BI } }, 276360484Sobrien{ "bdztlr", XLO(19,BODZT,16,0), XLBOBB_MASK, PPCCOM, { BI } }, 276492828Sobrien{ "bdztlr-", XLO(19,BODZT,16,0), XLBOBB_MASK, NOPOWER4, { BI } }, 276592828Sobrien{ "bdztlr+", XLO(19,BODZTP,16,0), XLBOBB_MASK, NOPOWER4, { BI } }, 276660484Sobrien{ "bdztlrl", XLO(19,BODZT,16,1), XLBOBB_MASK, PPCCOM, { BI } }, 276792828Sobrien{ "bdztlrl-",XLO(19,BODZT,16,1), XLBOBB_MASK, NOPOWER4, { BI } }, 276892828Sobrien{ "bdztlrl+",XLO(19,BODZTP,16,1), XLBOBB_MASK, NOPOWER4, { BI } }, 276960484Sobrien{ "bdzflr", XLO(19,BODZF,16,0), XLBOBB_MASK, PPCCOM, { BI } }, 277092828Sobrien{ "bdzflr-", XLO(19,BODZF,16,0), XLBOBB_MASK, NOPOWER4, { BI } }, 277192828Sobrien{ "bdzflr+", XLO(19,BODZFP,16,0), XLBOBB_MASK, NOPOWER4, { BI } }, 277260484Sobrien{ "bdzflrl", XLO(19,BODZF,16,1), XLBOBB_MASK, PPCCOM, { BI } }, 277392828Sobrien{ "bdzflrl-",XLO(19,BODZF,16,1), XLBOBB_MASK, NOPOWER4, { BI } }, 277492828Sobrien{ "bdzflrl+",XLO(19,BODZFP,16,1), XLBOBB_MASK, NOPOWER4, { BI } }, 277577298Sobrien{ "bclr+", XLYLK(19,16,1,0), XLYBB_MASK, PPCCOM, { BOE, BI } }, 277677298Sobrien{ "bclrl+", XLYLK(19,16,1,1), XLYBB_MASK, PPCCOM, { BOE, BI } }, 277777298Sobrien{ "bclr-", XLYLK(19,16,0,0), XLYBB_MASK, PPCCOM, { BOE, BI } }, 277877298Sobrien{ "bclrl-", XLYLK(19,16,0,1), XLYBB_MASK, PPCCOM, { BOE, BI } }, 2779218822Sdim{ "bclr", XLLK(19,16,0), XLBH_MASK, PPCCOM, { BO, BI, BH } }, 2780218822Sdim{ "bclrl", XLLK(19,16,1), XLBH_MASK, PPCCOM, { BO, BI, BH } }, 278160484Sobrien{ "bcr", XLLK(19,16,0), XLBB_MASK, PWRCOM, { BO, BI } }, 278260484Sobrien{ "bcrl", XLLK(19,16,1), XLBB_MASK, PWRCOM, { BO, BI } }, 278389857Sobrien{ "bclre", XLLK(19,17,0), XLBB_MASK, BOOKE64, { BO, BI } }, 278489857Sobrien{ "bclrel", XLLK(19,17,1), XLBB_MASK, BOOKE64, { BO, BI } }, 278560484Sobrien 278677298Sobrien{ "rfid", XL(19,18), 0xffffffff, PPC64, { 0 } }, 278777298Sobrien 278860484Sobrien{ "crnot", XL(19,33), XL_MASK, PPCCOM, { BT, BA, BBA } }, 278960484Sobrien{ "crnor", XL(19,33), XL_MASK, COM, { BT, BA, BB } }, 2790130561Sobrien{ "rfmci", X(19,38), 0xffffffff, PPCRFMCI, { 0 } }, 279160484Sobrien 279260484Sobrien{ "rfi", XL(19,50), 0xffffffff, COM, { 0 } }, 2793130561Sobrien{ "rfci", XL(19,51), 0xffffffff, PPC403 | BOOKE, { 0 } }, 279460484Sobrien 279560484Sobrien{ "rfsvc", XL(19,82), 0xffffffff, POWER, { 0 } }, 279660484Sobrien 279760484Sobrien{ "crandc", XL(19,129), XL_MASK, COM, { BT, BA, BB } }, 279860484Sobrien 279960484Sobrien{ "isync", XL(19,150), 0xffffffff, PPCCOM, { 0 } }, 280060484Sobrien{ "ics", XL(19,150), 0xffffffff, PWRCOM, { 0 } }, 280160484Sobrien 280260484Sobrien{ "crclr", XL(19,193), XL_MASK, PPCCOM, { BT, BAT, BBA } }, 280360484Sobrien{ "crxor", XL(19,193), XL_MASK, COM, { BT, BA, BB } }, 280460484Sobrien 280560484Sobrien{ "crnand", XL(19,225), XL_MASK, COM, { BT, BA, BB } }, 280660484Sobrien 280760484Sobrien{ "crand", XL(19,257), XL_MASK, COM, { BT, BA, BB } }, 280860484Sobrien 2809218822Sdim{ "hrfid", XL(19,274), 0xffffffff, POWER5 | CELL, { 0 } }, 2810218822Sdim 281160484Sobrien{ "crset", XL(19,289), XL_MASK, PPCCOM, { BT, BAT, BBA } }, 281260484Sobrien{ "creqv", XL(19,289), XL_MASK, COM, { BT, BA, BB } }, 281360484Sobrien 2814218822Sdim{ "doze", XL(19,402), 0xffffffff, POWER6, { 0 } }, 2815218822Sdim 281660484Sobrien{ "crorc", XL(19,417), XL_MASK, COM, { BT, BA, BB } }, 281760484Sobrien 2818218822Sdim{ "nap", XL(19,434), 0xffffffff, POWER6, { 0 } }, 2819218822Sdim 282060484Sobrien{ "crmove", XL(19,449), XL_MASK, PPCCOM, { BT, BA, BBA } }, 282160484Sobrien{ "cror", XL(19,449), XL_MASK, COM, { BT, BA, BB } }, 282260484Sobrien 2823218822Sdim{ "sleep", XL(19,466), 0xffffffff, POWER6, { 0 } }, 2824218822Sdim{ "rvwinkle", XL(19,498), 0xffffffff, POWER6, { 0 } }, 2825218822Sdim 282660484Sobrien{ "bctr", XLO(19,BOU,528,0), XLBOBIBB_MASK, COM, { 0 } }, 282760484Sobrien{ "bctrl", XLO(19,BOU,528,1), XLBOBIBB_MASK, COM, { 0 } }, 282860484Sobrien{ "bltctr", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 282992828Sobrien{ "bltctr-", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2830130561Sobrien{ "bltctr-", XLOCB(19,BOTM4,CBLT,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 283192828Sobrien{ "bltctr+", XLOCB(19,BOTP,CBLT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 283292828Sobrien{ "bltctr+", XLOCB(19,BOTP4,CBLT,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 283360484Sobrien{ "bltctrl", XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 283492828Sobrien{ "bltctrl-",XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2835130561Sobrien{ "bltctrl-",XLOCB(19,BOTM4,CBLT,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 283692828Sobrien{ "bltctrl+",XLOCB(19,BOTP,CBLT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 283792828Sobrien{ "bltctrl+",XLOCB(19,BOTP4,CBLT,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 283860484Sobrien{ "bgtctr", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 283992828Sobrien{ "bgtctr-", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2840130561Sobrien{ "bgtctr-", XLOCB(19,BOTM4,CBGT,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 284192828Sobrien{ "bgtctr+", XLOCB(19,BOTP,CBGT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 284292828Sobrien{ "bgtctr+", XLOCB(19,BOTP4,CBGT,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 284360484Sobrien{ "bgtctrl", XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 284492828Sobrien{ "bgtctrl-",XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2845130561Sobrien{ "bgtctrl-",XLOCB(19,BOTM4,CBGT,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 284692828Sobrien{ "bgtctrl+",XLOCB(19,BOTP,CBGT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 284792828Sobrien{ "bgtctrl+",XLOCB(19,BOTP4,CBGT,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 284860484Sobrien{ "beqctr", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 284992828Sobrien{ "beqctr-", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2850130561Sobrien{ "beqctr-", XLOCB(19,BOTM4,CBEQ,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 285192828Sobrien{ "beqctr+", XLOCB(19,BOTP,CBEQ,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 285292828Sobrien{ "beqctr+", XLOCB(19,BOTP4,CBEQ,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 285360484Sobrien{ "beqctrl", XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 285492828Sobrien{ "beqctrl-",XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2855130561Sobrien{ "beqctrl-",XLOCB(19,BOTM4,CBEQ,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 285692828Sobrien{ "beqctrl+",XLOCB(19,BOTP,CBEQ,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 285792828Sobrien{ "beqctrl+",XLOCB(19,BOTP4,CBEQ,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 285860484Sobrien{ "bsoctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 285992828Sobrien{ "bsoctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2860130561Sobrien{ "bsoctr-", XLOCB(19,BOTM4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 286192828Sobrien{ "bsoctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 286292828Sobrien{ "bsoctr+", XLOCB(19,BOTP4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 286360484Sobrien{ "bsoctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 286492828Sobrien{ "bsoctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2865130561Sobrien{ "bsoctrl-",XLOCB(19,BOTM4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 286692828Sobrien{ "bsoctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 286792828Sobrien{ "bsoctrl+",XLOCB(19,BOTP4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 286860484Sobrien{ "bunctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 286992828Sobrien{ "bunctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2870130561Sobrien{ "bunctr-", XLOCB(19,BOTM4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 287192828Sobrien{ "bunctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 287292828Sobrien{ "bunctr+", XLOCB(19,BOTP4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 287360484Sobrien{ "bunctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 287492828Sobrien{ "bunctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2875130561Sobrien{ "bunctrl-",XLOCB(19,BOTM4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 287692828Sobrien{ "bunctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 287792828Sobrien{ "bunctrl+",XLOCB(19,BOTP4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 287860484Sobrien{ "bgectr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 287992828Sobrien{ "bgectr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2880130561Sobrien{ "bgectr-", XLOCB(19,BOFM4,CBLT,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 288192828Sobrien{ "bgectr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 288292828Sobrien{ "bgectr+", XLOCB(19,BOFP4,CBLT,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 288360484Sobrien{ "bgectrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 288492828Sobrien{ "bgectrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2885130561Sobrien{ "bgectrl-",XLOCB(19,BOFM4,CBLT,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 288692828Sobrien{ "bgectrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 288792828Sobrien{ "bgectrl+",XLOCB(19,BOFP4,CBLT,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 288860484Sobrien{ "bnlctr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 288992828Sobrien{ "bnlctr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2890130561Sobrien{ "bnlctr-", XLOCB(19,BOFM4,CBLT,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 289192828Sobrien{ "bnlctr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 289292828Sobrien{ "bnlctr+", XLOCB(19,BOFP4,CBLT,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 289360484Sobrien{ "bnlctrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 289492828Sobrien{ "bnlctrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2895130561Sobrien{ "bnlctrl-",XLOCB(19,BOFM4,CBLT,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 289692828Sobrien{ "bnlctrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 289792828Sobrien{ "bnlctrl+",XLOCB(19,BOFP4,CBLT,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 289860484Sobrien{ "blectr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 289992828Sobrien{ "blectr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2900130561Sobrien{ "blectr-", XLOCB(19,BOFM4,CBGT,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 290192828Sobrien{ "blectr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 290292828Sobrien{ "blectr+", XLOCB(19,BOFP4,CBGT,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 290360484Sobrien{ "blectrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 290492828Sobrien{ "blectrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2905130561Sobrien{ "blectrl-",XLOCB(19,BOFM4,CBGT,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 290692828Sobrien{ "blectrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 290792828Sobrien{ "blectrl+",XLOCB(19,BOFP4,CBGT,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 290860484Sobrien{ "bngctr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 290992828Sobrien{ "bngctr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2910130561Sobrien{ "bngctr-", XLOCB(19,BOFM4,CBGT,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 291192828Sobrien{ "bngctr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 291292828Sobrien{ "bngctr+", XLOCB(19,BOFP4,CBGT,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 291360484Sobrien{ "bngctrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 291492828Sobrien{ "bngctrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2915130561Sobrien{ "bngctrl-",XLOCB(19,BOFM4,CBGT,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 291692828Sobrien{ "bngctrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 291792828Sobrien{ "bngctrl+",XLOCB(19,BOFP4,CBGT,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 291860484Sobrien{ "bnectr", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 291992828Sobrien{ "bnectr-", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2920130561Sobrien{ "bnectr-", XLOCB(19,BOFM4,CBEQ,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 292192828Sobrien{ "bnectr+", XLOCB(19,BOFP,CBEQ,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 292292828Sobrien{ "bnectr+", XLOCB(19,BOFP4,CBEQ,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 292360484Sobrien{ "bnectrl", XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 292492828Sobrien{ "bnectrl-",XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2925130561Sobrien{ "bnectrl-",XLOCB(19,BOFM4,CBEQ,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 292692828Sobrien{ "bnectrl+",XLOCB(19,BOFP,CBEQ,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 292792828Sobrien{ "bnectrl+",XLOCB(19,BOFP4,CBEQ,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 292860484Sobrien{ "bnsctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 292992828Sobrien{ "bnsctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2930130561Sobrien{ "bnsctr-", XLOCB(19,BOFM4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 293192828Sobrien{ "bnsctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 293292828Sobrien{ "bnsctr+", XLOCB(19,BOFP4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 293360484Sobrien{ "bnsctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 293492828Sobrien{ "bnsctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2935130561Sobrien{ "bnsctrl-",XLOCB(19,BOFM4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 293692828Sobrien{ "bnsctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 293792828Sobrien{ "bnsctrl+",XLOCB(19,BOFP4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 293860484Sobrien{ "bnuctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, 293992828Sobrien{ "bnuctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2940130561Sobrien{ "bnuctr-", XLOCB(19,BOFM4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 294192828Sobrien{ "bnuctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } }, 294292828Sobrien{ "bnuctr+", XLOCB(19,BOFP4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } }, 294360484Sobrien{ "bnuctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, 294492828Sobrien{ "bnuctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 2945130561Sobrien{ "bnuctrl-",XLOCB(19,BOFM4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 294692828Sobrien{ "bnuctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } }, 294792828Sobrien{ "bnuctrl+",XLOCB(19,BOFP4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } }, 294860484Sobrien{ "btctr", XLO(19,BOT,528,0), XLBOBB_MASK, PPCCOM, { BI } }, 294992828Sobrien{ "btctr-", XLO(19,BOT,528,0), XLBOBB_MASK, NOPOWER4, { BI } }, 2950130561Sobrien{ "btctr-", XLO(19,BOTM4,528,0), XLBOBB_MASK, POWER4, { BI } }, 295192828Sobrien{ "btctr+", XLO(19,BOTP,528,0), XLBOBB_MASK, NOPOWER4, { BI } }, 295292828Sobrien{ "btctr+", XLO(19,BOTP4,528,0), XLBOBB_MASK, POWER4, { BI } }, 295360484Sobrien{ "btctrl", XLO(19,BOT,528,1), XLBOBB_MASK, PPCCOM, { BI } }, 295492828Sobrien{ "btctrl-", XLO(19,BOT,528,1), XLBOBB_MASK, NOPOWER4, { BI } }, 2955130561Sobrien{ "btctrl-", XLO(19,BOTM4,528,1), XLBOBB_MASK, POWER4, { BI } }, 295692828Sobrien{ "btctrl+", XLO(19,BOTP,528,1), XLBOBB_MASK, NOPOWER4, { BI } }, 295792828Sobrien{ "btctrl+", XLO(19,BOTP4,528,1), XLBOBB_MASK, POWER4, { BI } }, 295860484Sobrien{ "bfctr", XLO(19,BOF,528,0), XLBOBB_MASK, PPCCOM, { BI } }, 295992828Sobrien{ "bfctr-", XLO(19,BOF,528,0), XLBOBB_MASK, NOPOWER4, { BI } }, 2960130561Sobrien{ "bfctr-", XLO(19,BOFM4,528,0), XLBOBB_MASK, POWER4, { BI } }, 296192828Sobrien{ "bfctr+", XLO(19,BOFP,528,0), XLBOBB_MASK, NOPOWER4, { BI } }, 296292828Sobrien{ "bfctr+", XLO(19,BOFP4,528,0), XLBOBB_MASK, POWER4, { BI } }, 296360484Sobrien{ "bfctrl", XLO(19,BOF,528,1), XLBOBB_MASK, PPCCOM, { BI } }, 296492828Sobrien{ "bfctrl-", XLO(19,BOF,528,1), XLBOBB_MASK, NOPOWER4, { BI } }, 2965130561Sobrien{ "bfctrl-", XLO(19,BOFM4,528,1), XLBOBB_MASK, POWER4, { BI } }, 296692828Sobrien{ "bfctrl+", XLO(19,BOFP,528,1), XLBOBB_MASK, NOPOWER4, { BI } }, 296792828Sobrien{ "bfctrl+", XLO(19,BOFP4,528,1), XLBOBB_MASK, POWER4, { BI } }, 296877298Sobrien{ "bcctr-", XLYLK(19,528,0,0), XLYBB_MASK, PPCCOM, { BOE, BI } }, 296977298Sobrien{ "bcctr+", XLYLK(19,528,1,0), XLYBB_MASK, PPCCOM, { BOE, BI } }, 297077298Sobrien{ "bcctrl-", XLYLK(19,528,0,1), XLYBB_MASK, PPCCOM, { BOE, BI } }, 297177298Sobrien{ "bcctrl+", XLYLK(19,528,1,1), XLYBB_MASK, PPCCOM, { BOE, BI } }, 2972218822Sdim{ "bcctr", XLLK(19,528,0), XLBH_MASK, PPCCOM, { BO, BI, BH } }, 2973218822Sdim{ "bcctrl", XLLK(19,528,1), XLBH_MASK, PPCCOM, { BO, BI, BH } }, 297460484Sobrien{ "bcc", XLLK(19,528,0), XLBB_MASK, PWRCOM, { BO, BI } }, 297560484Sobrien{ "bccl", XLLK(19,528,1), XLBB_MASK, PWRCOM, { BO, BI } }, 2976218822Sdim{ "bcctre", XLLK(19,529,0), XLBB_MASK, BOOKE64, { BO, BI } }, 2977218822Sdim{ "bcctrel", XLLK(19,529,1), XLBB_MASK, BOOKE64, { BO, BI } }, 297860484Sobrien 297960484Sobrien{ "rlwimi", M(20,0), M_MASK, PPCCOM, { RA,RS,SH,MBE,ME } }, 298060484Sobrien{ "rlimi", M(20,0), M_MASK, PWRCOM, { RA,RS,SH,MBE,ME } }, 298160484Sobrien 298260484Sobrien{ "rlwimi.", M(20,1), M_MASK, PPCCOM, { RA,RS,SH,MBE,ME } }, 298360484Sobrien{ "rlimi.", M(20,1), M_MASK, PWRCOM, { RA,RS,SH,MBE,ME } }, 298460484Sobrien 298560484Sobrien{ "rotlwi", MME(21,31,0), MMBME_MASK, PPCCOM, { RA, RS, SH } }, 298660484Sobrien{ "clrlwi", MME(21,31,0), MSHME_MASK, PPCCOM, { RA, RS, MB } }, 298760484Sobrien{ "rlwinm", M(21,0), M_MASK, PPCCOM, { RA,RS,SH,MBE,ME } }, 298860484Sobrien{ "rlinm", M(21,0), M_MASK, PWRCOM, { RA,RS,SH,MBE,ME } }, 298960484Sobrien{ "rotlwi.", MME(21,31,1), MMBME_MASK, PPCCOM, { RA,RS,SH } }, 299060484Sobrien{ "clrlwi.", MME(21,31,1), MSHME_MASK, PPCCOM, { RA, RS, MB } }, 299160484Sobrien{ "rlwinm.", M(21,1), M_MASK, PPCCOM, { RA,RS,SH,MBE,ME } }, 299260484Sobrien{ "rlinm.", M(21,1), M_MASK, PWRCOM, { RA,RS,SH,MBE,ME } }, 299360484Sobrien 299460484Sobrien{ "rlmi", M(22,0), M_MASK, M601, { RA,RS,RB,MBE,ME } }, 299560484Sobrien{ "rlmi.", M(22,1), M_MASK, M601, { RA,RS,RB,MBE,ME } }, 299660484Sobrien 299789857Sobrien{ "be", B(22,0,0), B_MASK, BOOKE64, { LI } }, 299889857Sobrien{ "bel", B(22,0,1), B_MASK, BOOKE64, { LI } }, 299989857Sobrien{ "bea", B(22,1,0), B_MASK, BOOKE64, { LIA } }, 300089857Sobrien{ "bela", B(22,1,1), B_MASK, BOOKE64, { LIA } }, 300189857Sobrien 300260484Sobrien{ "rotlw", MME(23,31,0), MMBME_MASK, PPCCOM, { RA, RS, RB } }, 300360484Sobrien{ "rlwnm", M(23,0), M_MASK, PPCCOM, { RA,RS,RB,MBE,ME } }, 300460484Sobrien{ "rlnm", M(23,0), M_MASK, PWRCOM, { RA,RS,RB,MBE,ME } }, 300560484Sobrien{ "rotlw.", MME(23,31,1), MMBME_MASK, PPCCOM, { RA, RS, RB } }, 300660484Sobrien{ "rlwnm.", M(23,1), M_MASK, PPCCOM, { RA,RS,RB,MBE,ME } }, 300760484Sobrien{ "rlnm.", M(23,1), M_MASK, PWRCOM, { RA,RS,RB,MBE,ME } }, 300860484Sobrien 300960484Sobrien{ "nop", OP(24), 0xffffffff, PPCCOM, { 0 } }, 301060484Sobrien{ "ori", OP(24), OP_MASK, PPCCOM, { RA, RS, UI } }, 301160484Sobrien{ "oril", OP(24), OP_MASK, PWRCOM, { RA, RS, UI } }, 301260484Sobrien 301360484Sobrien{ "oris", OP(25), OP_MASK, PPCCOM, { RA, RS, UI } }, 301460484Sobrien{ "oriu", OP(25), OP_MASK, PWRCOM, { RA, RS, UI } }, 301560484Sobrien 301660484Sobrien{ "xori", OP(26), OP_MASK, PPCCOM, { RA, RS, UI } }, 301760484Sobrien{ "xoril", OP(26), OP_MASK, PWRCOM, { RA, RS, UI } }, 301860484Sobrien 301960484Sobrien{ "xoris", OP(27), OP_MASK, PPCCOM, { RA, RS, UI } }, 302060484Sobrien{ "xoriu", OP(27), OP_MASK, PWRCOM, { RA, RS, UI } }, 302160484Sobrien 302260484Sobrien{ "andi.", OP(28), OP_MASK, PPCCOM, { RA, RS, UI } }, 302360484Sobrien{ "andil.", OP(28), OP_MASK, PWRCOM, { RA, RS, UI } }, 302460484Sobrien 302560484Sobrien{ "andis.", OP(29), OP_MASK, PPCCOM, { RA, RS, UI } }, 302660484Sobrien{ "andiu.", OP(29), OP_MASK, PWRCOM, { RA, RS, UI } }, 302760484Sobrien 302860484Sobrien{ "rotldi", MD(30,0,0), MDMB_MASK, PPC64, { RA, RS, SH6 } }, 302960484Sobrien{ "clrldi", MD(30,0,0), MDSH_MASK, PPC64, { RA, RS, MB6 } }, 303060484Sobrien{ "rldicl", MD(30,0,0), MD_MASK, PPC64, { RA, RS, SH6, MB6 } }, 303160484Sobrien{ "rotldi.", MD(30,0,1), MDMB_MASK, PPC64, { RA, RS, SH6 } }, 303260484Sobrien{ "clrldi.", MD(30,0,1), MDSH_MASK, PPC64, { RA, RS, MB6 } }, 303360484Sobrien{ "rldicl.", MD(30,0,1), MD_MASK, PPC64, { RA, RS, SH6, MB6 } }, 303460484Sobrien 303560484Sobrien{ "rldicr", MD(30,1,0), MD_MASK, PPC64, { RA, RS, SH6, ME6 } }, 303660484Sobrien{ "rldicr.", MD(30,1,1), MD_MASK, PPC64, { RA, RS, SH6, ME6 } }, 303760484Sobrien 303860484Sobrien{ "rldic", MD(30,2,0), MD_MASK, PPC64, { RA, RS, SH6, MB6 } }, 303960484Sobrien{ "rldic.", MD(30,2,1), MD_MASK, PPC64, { RA, RS, SH6, MB6 } }, 304060484Sobrien 304160484Sobrien{ "rldimi", MD(30,3,0), MD_MASK, PPC64, { RA, RS, SH6, MB6 } }, 304260484Sobrien{ "rldimi.", MD(30,3,1), MD_MASK, PPC64, { RA, RS, SH6, MB6 } }, 304360484Sobrien 304460484Sobrien{ "rotld", MDS(30,8,0), MDSMB_MASK, PPC64, { RA, RS, RB } }, 304560484Sobrien{ "rldcl", MDS(30,8,0), MDS_MASK, PPC64, { RA, RS, RB, MB6 } }, 304660484Sobrien{ "rotld.", MDS(30,8,1), MDSMB_MASK, PPC64, { RA, RS, RB } }, 304760484Sobrien{ "rldcl.", MDS(30,8,1), MDS_MASK, PPC64, { RA, RS, RB, MB6 } }, 304860484Sobrien 304960484Sobrien{ "rldcr", MDS(30,9,0), MDS_MASK, PPC64, { RA, RS, RB, ME6 } }, 305060484Sobrien{ "rldcr.", MDS(30,9,1), MDS_MASK, PPC64, { RA, RS, RB, ME6 } }, 305160484Sobrien 3052218822Sdim{ "cmpw", XOPL(31,0,0), XCMPL_MASK, PPCCOM, { OBF, RA, RB } }, 3053218822Sdim{ "cmpd", XOPL(31,0,1), XCMPL_MASK, PPC64, { OBF, RA, RB } }, 3054130561Sobrien{ "cmp", X(31,0), XCMP_MASK, PPC, { BF, L, RA, RB } }, 305560484Sobrien{ "cmp", X(31,0), XCMPL_MASK, PWRCOM, { BF, RA, RB } }, 305660484Sobrien 305760484Sobrien{ "twlgt", XTO(31,4,TOLGT), XTO_MASK, PPCCOM, { RA, RB } }, 305860484Sobrien{ "tlgt", XTO(31,4,TOLGT), XTO_MASK, PWRCOM, { RA, RB } }, 305960484Sobrien{ "twllt", XTO(31,4,TOLLT), XTO_MASK, PPCCOM, { RA, RB } }, 306060484Sobrien{ "tllt", XTO(31,4,TOLLT), XTO_MASK, PWRCOM, { RA, RB } }, 306160484Sobrien{ "tweq", XTO(31,4,TOEQ), XTO_MASK, PPCCOM, { RA, RB } }, 306260484Sobrien{ "teq", XTO(31,4,TOEQ), XTO_MASK, PWRCOM, { RA, RB } }, 306360484Sobrien{ "twlge", XTO(31,4,TOLGE), XTO_MASK, PPCCOM, { RA, RB } }, 306460484Sobrien{ "tlge", XTO(31,4,TOLGE), XTO_MASK, PWRCOM, { RA, RB } }, 306560484Sobrien{ "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 306660484Sobrien{ "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 306760484Sobrien{ "twlle", XTO(31,4,TOLLE), XTO_MASK, PPCCOM, { RA, RB } }, 306860484Sobrien{ "tlle", XTO(31,4,TOLLE), XTO_MASK, PWRCOM, { RA, RB } }, 306960484Sobrien{ "twlng", XTO(31,4,TOLNG), XTO_MASK, PPCCOM, { RA, RB } }, 307060484Sobrien{ "tlng", XTO(31,4,TOLNG), XTO_MASK, PWRCOM, { RA, RB } }, 307160484Sobrien{ "twgt", XTO(31,4,TOGT), XTO_MASK, PPCCOM, { RA, RB } }, 307260484Sobrien{ "tgt", XTO(31,4,TOGT), XTO_MASK, PWRCOM, { RA, RB } }, 307360484Sobrien{ "twge", XTO(31,4,TOGE), XTO_MASK, PPCCOM, { RA, RB } }, 307460484Sobrien{ "tge", XTO(31,4,TOGE), XTO_MASK, PWRCOM, { RA, RB } }, 307560484Sobrien{ "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } }, 307660484Sobrien{ "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } }, 307760484Sobrien{ "twlt", XTO(31,4,TOLT), XTO_MASK, PPCCOM, { RA, RB } }, 307860484Sobrien{ "tlt", XTO(31,4,TOLT), XTO_MASK, PWRCOM, { RA, RB } }, 307960484Sobrien{ "twle", XTO(31,4,TOLE), XTO_MASK, PPCCOM, { RA, RB } }, 308060484Sobrien{ "tle", XTO(31,4,TOLE), XTO_MASK, PWRCOM, { RA, RB } }, 308160484Sobrien{ "twng", XTO(31,4,TONG), XTO_MASK, PPCCOM, { RA, RB } }, 308260484Sobrien{ "tng", XTO(31,4,TONG), XTO_MASK, PWRCOM, { RA, RB } }, 308360484Sobrien{ "twne", XTO(31,4,TONE), XTO_MASK, PPCCOM, { RA, RB } }, 308460484Sobrien{ "tne", XTO(31,4,TONE), XTO_MASK, PWRCOM, { RA, RB } }, 308560484Sobrien{ "trap", XTO(31,4,TOU), 0xffffffff, PPCCOM, { 0 } }, 308660484Sobrien{ "tw", X(31,4), X_MASK, PPCCOM, { TO, RA, RB } }, 308760484Sobrien{ "t", X(31,4), X_MASK, PWRCOM, { TO, RA, RB } }, 308860484Sobrien 308960484Sobrien{ "subfc", XO(31,8,0,0), XO_MASK, PPCCOM, { RT, RA, RB } }, 309060484Sobrien{ "sf", XO(31,8,0,0), XO_MASK, PWRCOM, { RT, RA, RB } }, 309160484Sobrien{ "subc", XO(31,8,0,0), XO_MASK, PPC, { RT, RB, RA } }, 309260484Sobrien{ "subfc.", XO(31,8,0,1), XO_MASK, PPCCOM, { RT, RA, RB } }, 309360484Sobrien{ "sf.", XO(31,8,0,1), XO_MASK, PWRCOM, { RT, RA, RB } }, 309460484Sobrien{ "subc.", XO(31,8,0,1), XO_MASK, PPCCOM, { RT, RB, RA } }, 309560484Sobrien{ "subfco", XO(31,8,1,0), XO_MASK, PPCCOM, { RT, RA, RB } }, 309660484Sobrien{ "sfo", XO(31,8,1,0), XO_MASK, PWRCOM, { RT, RA, RB } }, 309760484Sobrien{ "subco", XO(31,8,1,0), XO_MASK, PPC, { RT, RB, RA } }, 309860484Sobrien{ "subfco.", XO(31,8,1,1), XO_MASK, PPCCOM, { RT, RA, RB } }, 309960484Sobrien{ "sfo.", XO(31,8,1,1), XO_MASK, PWRCOM, { RT, RA, RB } }, 310060484Sobrien{ "subco.", XO(31,8,1,1), XO_MASK, PPC, { RT, RB, RA } }, 310160484Sobrien 310260484Sobrien{ "mulhdu", XO(31,9,0,0), XO_MASK, PPC64, { RT, RA, RB } }, 310360484Sobrien{ "mulhdu.", XO(31,9,0,1), XO_MASK, PPC64, { RT, RA, RB } }, 310460484Sobrien 310560484Sobrien{ "addc", XO(31,10,0,0), XO_MASK, PPCCOM, { RT, RA, RB } }, 310660484Sobrien{ "a", XO(31,10,0,0), XO_MASK, PWRCOM, { RT, RA, RB } }, 310760484Sobrien{ "addc.", XO(31,10,0,1), XO_MASK, PPCCOM, { RT, RA, RB } }, 310860484Sobrien{ "a.", XO(31,10,0,1), XO_MASK, PWRCOM, { RT, RA, RB } }, 310960484Sobrien{ "addco", XO(31,10,1,0), XO_MASK, PPCCOM, { RT, RA, RB } }, 311060484Sobrien{ "ao", XO(31,10,1,0), XO_MASK, PWRCOM, { RT, RA, RB } }, 311160484Sobrien{ "addco.", XO(31,10,1,1), XO_MASK, PPCCOM, { RT, RA, RB } }, 311260484Sobrien{ "ao.", XO(31,10,1,1), XO_MASK, PWRCOM, { RT, RA, RB } }, 311360484Sobrien 311460484Sobrien{ "mulhwu", XO(31,11,0,0), XO_MASK, PPC, { RT, RA, RB } }, 311560484Sobrien{ "mulhwu.", XO(31,11,0,1), XO_MASK, PPC, { RT, RA, RB } }, 311660484Sobrien 3117130561Sobrien{ "isellt", X(31,15), X_MASK, PPCISEL, { RT, RA, RB } }, 3118130561Sobrien{ "iselgt", X(31,47), X_MASK, PPCISEL, { RT, RA, RB } }, 3119130561Sobrien{ "iseleq", X(31,79), X_MASK, PPCISEL, { RT, RA, RB } }, 3120130561Sobrien{ "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } }, 312160484Sobrien 3122218822Sdim{ "mfocrf", XFXM(31,19,0,1), XFXFXM_MASK, COM, { RT, FXM } }, 3123218822Sdim{ "mfcr", X(31,19), XRARB_MASK, NOPOWER4 | COM, { RT } }, 3124130561Sobrien{ "mfcr", X(31,19), XFXFXM_MASK, POWER4, { RT, FXM4 } }, 312560484Sobrien 3126218822Sdim{ "lwarx", X(31,20), XEH_MASK, PPC, { RT, RA0, RB, EH } }, 312760484Sobrien 3128130561Sobrien{ "ldx", X(31,21), X_MASK, PPC64, { RT, RA0, RB } }, 3129130561Sobrien 3130218822Sdim{ "icbt", X(31,22), X_MASK, BOOKE|PPCE300, { CT, RA, RB } }, 3131130561Sobrien{ "icbt", X(31,262), XRT_MASK, PPC403, { RA, RB } }, 313289857Sobrien 3133130561Sobrien{ "lwzx", X(31,23), X_MASK, PPCCOM, { RT, RA0, RB } }, 313460484Sobrien{ "lx", X(31,23), X_MASK, PWRCOM, { RT, RA, RB } }, 313560484Sobrien 313660484Sobrien{ "slw", XRC(31,24,0), X_MASK, PPCCOM, { RA, RS, RB } }, 313760484Sobrien{ "sl", XRC(31,24,0), X_MASK, PWRCOM, { RA, RS, RB } }, 313860484Sobrien{ "slw.", XRC(31,24,1), X_MASK, PPCCOM, { RA, RS, RB } }, 313960484Sobrien{ "sl.", XRC(31,24,1), X_MASK, PWRCOM, { RA, RS, RB } }, 314060484Sobrien 314160484Sobrien{ "cntlzw", XRC(31,26,0), XRB_MASK, PPCCOM, { RA, RS } }, 314260484Sobrien{ "cntlz", XRC(31,26,0), XRB_MASK, PWRCOM, { RA, RS } }, 314360484Sobrien{ "cntlzw.", XRC(31,26,1), XRB_MASK, PPCCOM, { RA, RS } }, 314460484Sobrien{ "cntlz.", XRC(31,26,1), XRB_MASK, PWRCOM, { RA, RS } }, 314560484Sobrien 314660484Sobrien{ "sld", XRC(31,27,0), X_MASK, PPC64, { RA, RS, RB } }, 314760484Sobrien{ "sld.", XRC(31,27,1), X_MASK, PPC64, { RA, RS, RB } }, 314860484Sobrien 314960484Sobrien{ "and", XRC(31,28,0), X_MASK, COM, { RA, RS, RB } }, 315060484Sobrien{ "and.", XRC(31,28,1), X_MASK, COM, { RA, RS, RB } }, 315160484Sobrien 315260484Sobrien{ "maskg", XRC(31,29,0), X_MASK, M601, { RA, RS, RB } }, 315360484Sobrien{ "maskg.", XRC(31,29,1), X_MASK, M601, { RA, RS, RB } }, 315460484Sobrien 315589857Sobrien{ "icbte", X(31,30), X_MASK, BOOKE64, { CT, RA, RB } }, 315689857Sobrien 3157130561Sobrien{ "lwzxe", X(31,31), X_MASK, BOOKE64, { RT, RA0, RB } }, 315889857Sobrien 3159218822Sdim{ "cmplw", XOPL(31,32,0), XCMPL_MASK, PPCCOM, { OBF, RA, RB } }, 3160218822Sdim{ "cmpld", XOPL(31,32,1), XCMPL_MASK, PPC64, { OBF, RA, RB } }, 3161130561Sobrien{ "cmpl", X(31,32), XCMP_MASK, PPC, { BF, L, RA, RB } }, 316260484Sobrien{ "cmpl", X(31,32), XCMPL_MASK, PWRCOM, { BF, RA, RB } }, 316360484Sobrien 316460484Sobrien{ "subf", XO(31,40,0,0), XO_MASK, PPC, { RT, RA, RB } }, 316560484Sobrien{ "sub", XO(31,40,0,0), XO_MASK, PPC, { RT, RB, RA } }, 316660484Sobrien{ "subf.", XO(31,40,0,1), XO_MASK, PPC, { RT, RA, RB } }, 316760484Sobrien{ "sub.", XO(31,40,0,1), XO_MASK, PPC, { RT, RB, RA } }, 316860484Sobrien{ "subfo", XO(31,40,1,0), XO_MASK, PPC, { RT, RA, RB } }, 316960484Sobrien{ "subo", XO(31,40,1,0), XO_MASK, PPC, { RT, RB, RA } }, 317060484Sobrien{ "subfo.", XO(31,40,1,1), XO_MASK, PPC, { RT, RA, RB } }, 317160484Sobrien{ "subo.", XO(31,40,1,1), XO_MASK, PPC, { RT, RB, RA } }, 317260484Sobrien 317360484Sobrien{ "ldux", X(31,53), X_MASK, PPC64, { RT, RAL, RB } }, 317460484Sobrien 317560484Sobrien{ "dcbst", X(31,54), XRT_MASK, PPC, { RA, RB } }, 317660484Sobrien 317760484Sobrien{ "lwzux", X(31,55), X_MASK, PPCCOM, { RT, RAL, RB } }, 317860484Sobrien{ "lux", X(31,55), X_MASK, PWRCOM, { RT, RA, RB } }, 317960484Sobrien 318089857Sobrien{ "dcbste", X(31,62), XRT_MASK, BOOKE64, { RA, RB } }, 318189857Sobrien 318289857Sobrien{ "lwzuxe", X(31,63), X_MASK, BOOKE64, { RT, RAL, RB } }, 318389857Sobrien 318460484Sobrien{ "cntlzd", XRC(31,58,0), XRB_MASK, PPC64, { RA, RS } }, 318560484Sobrien{ "cntlzd.", XRC(31,58,1), XRB_MASK, PPC64, { RA, RS } }, 318660484Sobrien 318789857Sobrien{ "andc", XRC(31,60,0), X_MASK, COM, { RA, RS, RB } }, 318889857Sobrien{ "andc.", XRC(31,60,1), X_MASK, COM, { RA, RS, RB } }, 318960484Sobrien 319060484Sobrien{ "tdlgt", XTO(31,68,TOLGT), XTO_MASK, PPC64, { RA, RB } }, 319160484Sobrien{ "tdllt", XTO(31,68,TOLLT), XTO_MASK, PPC64, { RA, RB } }, 319260484Sobrien{ "tdeq", XTO(31,68,TOEQ), XTO_MASK, PPC64, { RA, RB } }, 319360484Sobrien{ "tdlge", XTO(31,68,TOLGE), XTO_MASK, PPC64, { RA, RB } }, 319460484Sobrien{ "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } }, 319560484Sobrien{ "tdlle", XTO(31,68,TOLLE), XTO_MASK, PPC64, { RA, RB } }, 319660484Sobrien{ "tdlng", XTO(31,68,TOLNG), XTO_MASK, PPC64, { RA, RB } }, 319760484Sobrien{ "tdgt", XTO(31,68,TOGT), XTO_MASK, PPC64, { RA, RB } }, 319860484Sobrien{ "tdge", XTO(31,68,TOGE), XTO_MASK, PPC64, { RA, RB } }, 319960484Sobrien{ "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } }, 320060484Sobrien{ "tdlt", XTO(31,68,TOLT), XTO_MASK, PPC64, { RA, RB } }, 320160484Sobrien{ "tdle", XTO(31,68,TOLE), XTO_MASK, PPC64, { RA, RB } }, 320260484Sobrien{ "tdng", XTO(31,68,TONG), XTO_MASK, PPC64, { RA, RB } }, 320360484Sobrien{ "tdne", XTO(31,68,TONE), XTO_MASK, PPC64, { RA, RB } }, 320460484Sobrien{ "td", X(31,68), X_MASK, PPC64, { TO, RA, RB } }, 320560484Sobrien 320660484Sobrien{ "mulhd", XO(31,73,0,0), XO_MASK, PPC64, { RT, RA, RB } }, 320760484Sobrien{ "mulhd.", XO(31,73,0,1), XO_MASK, PPC64, { RT, RA, RB } }, 320860484Sobrien 320960484Sobrien{ "mulhw", XO(31,75,0,0), XO_MASK, PPC, { RT, RA, RB } }, 321060484Sobrien{ "mulhw.", XO(31,75,0,1), XO_MASK, PPC, { RT, RA, RB } }, 321160484Sobrien 3212130561Sobrien{ "dlmzb", XRC(31,78,0), X_MASK, PPC403|PPC440, { RA, RS, RB } }, 3213130561Sobrien{ "dlmzb.", XRC(31,78,1), X_MASK, PPC403|PPC440, { RA, RS, RB } }, 3214130561Sobrien 321577298Sobrien{ "mtsrd", X(31,82), XRB_MASK|(1<<20), PPC64, { SR, RS } }, 321677298Sobrien 321760484Sobrien{ "mfmsr", X(31,83), XRARB_MASK, COM, { RT } }, 321860484Sobrien 3219218822Sdim{ "ldarx", X(31,84), XEH_MASK, PPC64, { RT, RA0, RB, EH } }, 322060484Sobrien 3221218822Sdim{ "dcbfl", XOPL(31,86,1), XRT_MASK, POWER5, { RA, RB } }, 3222218822Sdim{ "dcbf", X(31,86), XLRT_MASK, PPC, { RA, RB, L } }, 322360484Sobrien 3224130561Sobrien{ "lbzx", X(31,87), X_MASK, COM, { RT, RA0, RB } }, 322560484Sobrien 322689857Sobrien{ "dcbfe", X(31,94), XRT_MASK, BOOKE64, { RA, RB } }, 322789857Sobrien 3228130561Sobrien{ "lbzxe", X(31,95), X_MASK, BOOKE64, { RT, RA0, RB } }, 322989857Sobrien 323060484Sobrien{ "neg", XO(31,104,0,0), XORB_MASK, COM, { RT, RA } }, 323160484Sobrien{ "neg.", XO(31,104,0,1), XORB_MASK, COM, { RT, RA } }, 323260484Sobrien{ "nego", XO(31,104,1,0), XORB_MASK, COM, { RT, RA } }, 323360484Sobrien{ "nego.", XO(31,104,1,1), XORB_MASK, COM, { RT, RA } }, 323460484Sobrien 323560484Sobrien{ "mul", XO(31,107,0,0), XO_MASK, M601, { RT, RA, RB } }, 323660484Sobrien{ "mul.", XO(31,107,0,1), XO_MASK, M601, { RT, RA, RB } }, 323760484Sobrien{ "mulo", XO(31,107,1,0), XO_MASK, M601, { RT, RA, RB } }, 323860484Sobrien{ "mulo.", XO(31,107,1,1), XO_MASK, M601, { RT, RA, RB } }, 323960484Sobrien 324077298Sobrien{ "mtsrdin", X(31,114), XRA_MASK, PPC64, { RS, RB } }, 324177298Sobrien 324280016Sobrien{ "clf", X(31,118), XTO_MASK, POWER, { RA, RB } }, 324360484Sobrien 324460484Sobrien{ "lbzux", X(31,119), X_MASK, COM, { RT, RAL, RB } }, 324560484Sobrien 3246218822Sdim{ "popcntb", X(31,122), XRB_MASK, POWER5, { RA, RS } }, 3247218822Sdim 324860484Sobrien{ "not", XRC(31,124,0), X_MASK, COM, { RA, RS, RBS } }, 324960484Sobrien{ "nor", XRC(31,124,0), X_MASK, COM, { RA, RS, RB } }, 325060484Sobrien{ "not.", XRC(31,124,1), X_MASK, COM, { RA, RS, RBS } }, 325160484Sobrien{ "nor.", XRC(31,124,1), X_MASK, COM, { RA, RS, RB } }, 325260484Sobrien 3253130561Sobrien{ "lwarxe", X(31,126), X_MASK, BOOKE64, { RT, RA0, RB } }, 325489857Sobrien 325589857Sobrien{ "lbzuxe", X(31,127), X_MASK, BOOKE64, { RT, RAL, RB } }, 325689857Sobrien 3257130561Sobrien{ "wrtee", X(31,131), XRARB_MASK, PPC403 | BOOKE, { RS } }, 325860484Sobrien 3259130561Sobrien{ "dcbtstls",X(31,134), X_MASK, PPCCHLK, { CT, RA, RB }}, 3260130561Sobrien 326160484Sobrien{ "subfe", XO(31,136,0,0), XO_MASK, PPCCOM, { RT, RA, RB } }, 326260484Sobrien{ "sfe", XO(31,136,0,0), XO_MASK, PWRCOM, { RT, RA, RB } }, 326360484Sobrien{ "subfe.", XO(31,136,0,1), XO_MASK, PPCCOM, { RT, RA, RB } }, 326460484Sobrien{ "sfe.", XO(31,136,0,1), XO_MASK, PWRCOM, { RT, RA, RB } }, 326560484Sobrien{ "subfeo", XO(31,136,1,0), XO_MASK, PPCCOM, { RT, RA, RB } }, 326660484Sobrien{ "sfeo", XO(31,136,1,0), XO_MASK, PWRCOM, { RT, RA, RB } }, 326760484Sobrien{ "subfeo.", XO(31,136,1,1), XO_MASK, PPCCOM, { RT, RA, RB } }, 326860484Sobrien{ "sfeo.", XO(31,136,1,1), XO_MASK, PWRCOM, { RT, RA, RB } }, 326960484Sobrien 327060484Sobrien{ "adde", XO(31,138,0,0), XO_MASK, PPCCOM, { RT, RA, RB } }, 327160484Sobrien{ "ae", XO(31,138,0,0), XO_MASK, PWRCOM, { RT, RA, RB } }, 327260484Sobrien{ "adde.", XO(31,138,0,1), XO_MASK, PPCCOM, { RT, RA, RB } }, 327360484Sobrien{ "ae.", XO(31,138,0,1), XO_MASK, PWRCOM, { RT, RA, RB } }, 327460484Sobrien{ "addeo", XO(31,138,1,0), XO_MASK, PPCCOM, { RT, RA, RB } }, 327560484Sobrien{ "aeo", XO(31,138,1,0), XO_MASK, PWRCOM, { RT, RA, RB } }, 327660484Sobrien{ "addeo.", XO(31,138,1,1), XO_MASK, PPCCOM, { RT, RA, RB } }, 327760484Sobrien{ "aeo.", XO(31,138,1,1), XO_MASK, PWRCOM, { RT, RA, RB } }, 327860484Sobrien 3279130561Sobrien{ "dcbtstlse",X(31,142),X_MASK, PPCCHLK64, { CT, RA, RB }}, 3280130561Sobrien 3281218822Sdim{ "mtocrf", XFXM(31,144,0,1), XFXFXM_MASK, COM, { FXM, RS } }, 3282218822Sdim{ "mtcr", XFXM(31,144,0xff,0), XRARB_MASK, COM, { RS }}, 328360484Sobrien{ "mtcrf", X(31,144), XFXFXM_MASK, COM, { FXM, RS } }, 328460484Sobrien 328560484Sobrien{ "mtmsr", X(31,146), XRARB_MASK, COM, { RS } }, 328660484Sobrien 3287130561Sobrien{ "stdx", X(31,149), X_MASK, PPC64, { RS, RA0, RB } }, 328860484Sobrien 3289130561Sobrien{ "stwcx.", XRC(31,150,1), X_MASK, PPC, { RS, RA0, RB } }, 329060484Sobrien 3291130561Sobrien{ "stwx", X(31,151), X_MASK, PPCCOM, { RS, RA0, RB } }, 329260484Sobrien{ "stx", X(31,151), X_MASK, PWRCOM, { RS, RA, RB } }, 329360484Sobrien 3294130561Sobrien{ "stwcxe.", XRC(31,158,1), X_MASK, BOOKE64, { RS, RA0, RB } }, 329589857Sobrien 3296130561Sobrien{ "stwxe", X(31,159), X_MASK, BOOKE64, { RS, RA0, RB } }, 329789857Sobrien 329860484Sobrien{ "slq", XRC(31,152,0), X_MASK, M601, { RA, RS, RB } }, 329960484Sobrien{ "slq.", XRC(31,152,1), X_MASK, M601, { RA, RS, RB } }, 330060484Sobrien 330160484Sobrien{ "sle", XRC(31,153,0), X_MASK, M601, { RA, RS, RB } }, 330260484Sobrien{ "sle.", XRC(31,153,1), X_MASK, M601, { RA, RS, RB } }, 330360484Sobrien 3304218822Sdim{ "prtyw", X(31,154), XRB_MASK, POWER6, { RA, RS } }, 3305218822Sdim 3306130561Sobrien{ "wrteei", X(31,163), XE_MASK, PPC403 | BOOKE, { E } }, 330760484Sobrien 3308130561Sobrien{ "dcbtls", X(31,166), X_MASK, PPCCHLK, { CT, RA, RB }}, 3309130561Sobrien{ "dcbtlse", X(31,174), X_MASK, PPCCHLK64, { CT, RA, RB }}, 3310130561Sobrien 3311218822Sdim{ "mtmsrd", X(31,178), XRLARB_MASK, PPC64, { RS, A_L } }, 331277298Sobrien 331360484Sobrien{ "stdux", X(31,181), X_MASK, PPC64, { RS, RAS, RB } }, 331460484Sobrien 331560484Sobrien{ "stwux", X(31,183), X_MASK, PPCCOM, { RS, RAS, RB } }, 3316130561Sobrien{ "stux", X(31,183), X_MASK, PWRCOM, { RS, RA0, RB } }, 331760484Sobrien 331860484Sobrien{ "sliq", XRC(31,184,0), X_MASK, M601, { RA, RS, SH } }, 331960484Sobrien{ "sliq.", XRC(31,184,1), X_MASK, M601, { RA, RS, SH } }, 332060484Sobrien 3321218822Sdim{ "prtyd", X(31,186), XRB_MASK, POWER6, { RA, RS } }, 3322218822Sdim 332389857Sobrien{ "stwuxe", X(31,191), X_MASK, BOOKE64, { RS, RAS, RB } }, 332489857Sobrien 332560484Sobrien{ "subfze", XO(31,200,0,0), XORB_MASK, PPCCOM, { RT, RA } }, 332660484Sobrien{ "sfze", XO(31,200,0,0), XORB_MASK, PWRCOM, { RT, RA } }, 332760484Sobrien{ "subfze.", XO(31,200,0,1), XORB_MASK, PPCCOM, { RT, RA } }, 332860484Sobrien{ "sfze.", XO(31,200,0,1), XORB_MASK, PWRCOM, { RT, RA } }, 332960484Sobrien{ "subfzeo", XO(31,200,1,0), XORB_MASK, PPCCOM, { RT, RA } }, 333060484Sobrien{ "sfzeo", XO(31,200,1,0), XORB_MASK, PWRCOM, { RT, RA } }, 333160484Sobrien{ "subfzeo.",XO(31,200,1,1), XORB_MASK, PPCCOM, { RT, RA } }, 333260484Sobrien{ "sfzeo.", XO(31,200,1,1), XORB_MASK, PWRCOM, { RT, RA } }, 333360484Sobrien 333460484Sobrien{ "addze", XO(31,202,0,0), XORB_MASK, PPCCOM, { RT, RA } }, 333560484Sobrien{ "aze", XO(31,202,0,0), XORB_MASK, PWRCOM, { RT, RA } }, 333660484Sobrien{ "addze.", XO(31,202,0,1), XORB_MASK, PPCCOM, { RT, RA } }, 333760484Sobrien{ "aze.", XO(31,202,0,1), XORB_MASK, PWRCOM, { RT, RA } }, 333860484Sobrien{ "addzeo", XO(31,202,1,0), XORB_MASK, PPCCOM, { RT, RA } }, 333960484Sobrien{ "azeo", XO(31,202,1,0), XORB_MASK, PWRCOM, { RT, RA } }, 334060484Sobrien{ "addzeo.", XO(31,202,1,1), XORB_MASK, PPCCOM, { RT, RA } }, 334160484Sobrien{ "azeo.", XO(31,202,1,1), XORB_MASK, PWRCOM, { RT, RA } }, 334260484Sobrien 334360484Sobrien{ "mtsr", X(31,210), XRB_MASK|(1<<20), COM32, { SR, RS } }, 334460484Sobrien 3345130561Sobrien{ "stdcx.", XRC(31,214,1), X_MASK, PPC64, { RS, RA0, RB } }, 334660484Sobrien 3347130561Sobrien{ "stbx", X(31,215), X_MASK, COM, { RS, RA0, RB } }, 334860484Sobrien 334960484Sobrien{ "sllq", XRC(31,216,0), X_MASK, M601, { RA, RS, RB } }, 335060484Sobrien{ "sllq.", XRC(31,216,1), X_MASK, M601, { RA, RS, RB } }, 335160484Sobrien 335260484Sobrien{ "sleq", XRC(31,217,0), X_MASK, M601, { RA, RS, RB } }, 335360484Sobrien{ "sleq.", XRC(31,217,1), X_MASK, M601, { RA, RS, RB } }, 335460484Sobrien 3355130561Sobrien{ "stbxe", X(31,223), X_MASK, BOOKE64, { RS, RA0, RB } }, 335689857Sobrien 3357130561Sobrien{ "icblc", X(31,230), X_MASK, PPCCHLK, { CT, RA, RB }}, 3358130561Sobrien 335960484Sobrien{ "subfme", XO(31,232,0,0), XORB_MASK, PPCCOM, { RT, RA } }, 336060484Sobrien{ "sfme", XO(31,232,0,0), XORB_MASK, PWRCOM, { RT, RA } }, 336160484Sobrien{ "subfme.", XO(31,232,0,1), XORB_MASK, PPCCOM, { RT, RA } }, 336260484Sobrien{ "sfme.", XO(31,232,0,1), XORB_MASK, PWRCOM, { RT, RA } }, 336360484Sobrien{ "subfmeo", XO(31,232,1,0), XORB_MASK, PPCCOM, { RT, RA } }, 336460484Sobrien{ "sfmeo", XO(31,232,1,0), XORB_MASK, PWRCOM, { RT, RA } }, 336560484Sobrien{ "subfmeo.",XO(31,232,1,1), XORB_MASK, PPCCOM, { RT, RA } }, 336660484Sobrien{ "sfmeo.", XO(31,232,1,1), XORB_MASK, PWRCOM, { RT, RA } }, 336760484Sobrien 336860484Sobrien{ "mulld", XO(31,233,0,0), XO_MASK, PPC64, { RT, RA, RB } }, 336960484Sobrien{ "mulld.", XO(31,233,0,1), XO_MASK, PPC64, { RT, RA, RB } }, 337060484Sobrien{ "mulldo", XO(31,233,1,0), XO_MASK, PPC64, { RT, RA, RB } }, 337160484Sobrien{ "mulldo.", XO(31,233,1,1), XO_MASK, PPC64, { RT, RA, RB } }, 337260484Sobrien 337360484Sobrien{ "addme", XO(31,234,0,0), XORB_MASK, PPCCOM, { RT, RA } }, 337460484Sobrien{ "ame", XO(31,234,0,0), XORB_MASK, PWRCOM, { RT, RA } }, 337560484Sobrien{ "addme.", XO(31,234,0,1), XORB_MASK, PPCCOM, { RT, RA } }, 337660484Sobrien{ "ame.", XO(31,234,0,1), XORB_MASK, PWRCOM, { RT, RA } }, 337760484Sobrien{ "addmeo", XO(31,234,1,0), XORB_MASK, PPCCOM, { RT, RA } }, 337860484Sobrien{ "ameo", XO(31,234,1,0), XORB_MASK, PWRCOM, { RT, RA } }, 337960484Sobrien{ "addmeo.", XO(31,234,1,1), XORB_MASK, PPCCOM, { RT, RA } }, 338060484Sobrien{ "ameo.", XO(31,234,1,1), XORB_MASK, PWRCOM, { RT, RA } }, 338160484Sobrien 338260484Sobrien{ "mullw", XO(31,235,0,0), XO_MASK, PPCCOM, { RT, RA, RB } }, 338360484Sobrien{ "muls", XO(31,235,0,0), XO_MASK, PWRCOM, { RT, RA, RB } }, 338460484Sobrien{ "mullw.", XO(31,235,0,1), XO_MASK, PPCCOM, { RT, RA, RB } }, 338560484Sobrien{ "muls.", XO(31,235,0,1), XO_MASK, PWRCOM, { RT, RA, RB } }, 338660484Sobrien{ "mullwo", XO(31,235,1,0), XO_MASK, PPCCOM, { RT, RA, RB } }, 338760484Sobrien{ "mulso", XO(31,235,1,0), XO_MASK, PWRCOM, { RT, RA, RB } }, 338860484Sobrien{ "mullwo.", XO(31,235,1,1), XO_MASK, PPCCOM, { RT, RA, RB } }, 338960484Sobrien{ "mulso.", XO(31,235,1,1), XO_MASK, PWRCOM, { RT, RA, RB } }, 339060484Sobrien 3391130561Sobrien{ "icblce", X(31,238), X_MASK, PPCCHLK64, { CT, RA, RB }}, 339260484Sobrien{ "mtsrin", X(31,242), XRA_MASK, PPC32, { RS, RB } }, 339360484Sobrien{ "mtsri", X(31,242), XRA_MASK, POWER32, { RS, RB } }, 339460484Sobrien 3395130561Sobrien{ "dcbtst", X(31,246), X_MASK, PPC, { CT, RA, RB } }, 339660484Sobrien 339760484Sobrien{ "stbux", X(31,247), X_MASK, COM, { RS, RAS, RB } }, 339860484Sobrien 339960484Sobrien{ "slliq", XRC(31,248,0), X_MASK, M601, { RA, RS, SH } }, 340060484Sobrien{ "slliq.", XRC(31,248,1), X_MASK, M601, { RA, RS, SH } }, 340160484Sobrien 340289857Sobrien{ "dcbtste", X(31,253), X_MASK, BOOKE64, { CT, RA, RB } }, 340389857Sobrien 340489857Sobrien{ "stbuxe", X(31,255), X_MASK, BOOKE64, { RS, RAS, RB } }, 340589857Sobrien 340689857Sobrien{ "mfdcrx", X(31,259), X_MASK, BOOKE, { RS, RA } }, 340789857Sobrien 340860484Sobrien{ "doz", XO(31,264,0,0), XO_MASK, M601, { RT, RA, RB } }, 340960484Sobrien{ "doz.", XO(31,264,0,1), XO_MASK, M601, { RT, RA, RB } }, 341060484Sobrien{ "dozo", XO(31,264,1,0), XO_MASK, M601, { RT, RA, RB } }, 341160484Sobrien{ "dozo.", XO(31,264,1,1), XO_MASK, M601, { RT, RA, RB } }, 341260484Sobrien 341360484Sobrien{ "add", XO(31,266,0,0), XO_MASK, PPCCOM, { RT, RA, RB } }, 341460484Sobrien{ "cax", XO(31,266,0,0), XO_MASK, PWRCOM, { RT, RA, RB } }, 341560484Sobrien{ "add.", XO(31,266,0,1), XO_MASK, PPCCOM, { RT, RA, RB } }, 341660484Sobrien{ "cax.", XO(31,266,0,1), XO_MASK, PWRCOM, { RT, RA, RB } }, 341760484Sobrien{ "addo", XO(31,266,1,0), XO_MASK, PPCCOM, { RT, RA, RB } }, 341860484Sobrien{ "caxo", XO(31,266,1,0), XO_MASK, PWRCOM, { RT, RA, RB } }, 341960484Sobrien{ "addo.", XO(31,266,1,1), XO_MASK, PPCCOM, { RT, RA, RB } }, 342060484Sobrien{ "caxo.", XO(31,266,1,1), XO_MASK, PWRCOM, { RT, RA, RB } }, 342160484Sobrien 3422218822Sdim{ "tlbiel", X(31,274), XRTLRA_MASK, POWER4, { RB, L } }, 342399461Sobrien 342489857Sobrien{ "mfapidi", X(31,275), X_MASK, BOOKE, { RT, RA } }, 342589857Sobrien 342660484Sobrien{ "lscbx", XRC(31,277,0), X_MASK, M601, { RT, RA, RB } }, 342760484Sobrien{ "lscbx.", XRC(31,277,1), X_MASK, M601, { RT, RA, RB } }, 342860484Sobrien 3429218822Sdim{ "dcbt", X(31,278), X_MASK, PPC, { CT, RA, RB } }, 343060484Sobrien 3431130561Sobrien{ "lhzx", X(31,279), X_MASK, COM, { RT, RA0, RB } }, 343260484Sobrien 343360484Sobrien{ "eqv", XRC(31,284,0), X_MASK, COM, { RA, RS, RB } }, 343460484Sobrien{ "eqv.", XRC(31,284,1), X_MASK, COM, { RA, RS, RB } }, 343560484Sobrien 343689857Sobrien{ "dcbte", X(31,286), X_MASK, BOOKE64, { CT, RA, RB } }, 343789857Sobrien 3438130561Sobrien{ "lhzxe", X(31,287), X_MASK, BOOKE64, { RT, RA0, RB } }, 343989857Sobrien 344094536Sobrien{ "tlbie", X(31,306), XRTLRA_MASK, PPC, { RB, L } }, 3441130561Sobrien{ "tlbi", X(31,306), XRT_MASK, POWER, { RA0, RB } }, 344260484Sobrien 344360484Sobrien{ "eciwx", X(31,310), X_MASK, PPC, { RT, RA, RB } }, 344460484Sobrien 344560484Sobrien{ "lhzux", X(31,311), X_MASK, COM, { RT, RAL, RB } }, 344660484Sobrien 344760484Sobrien{ "xor", XRC(31,316,0), X_MASK, COM, { RA, RS, RB } }, 344860484Sobrien{ "xor.", XRC(31,316,1), X_MASK, COM, { RA, RS, RB } }, 344960484Sobrien 345089857Sobrien{ "lhzuxe", X(31,319), X_MASK, BOOKE64, { RT, RAL, RB } }, 345189857Sobrien 3452130561Sobrien{ "mfexisr", XSPR(31,323,64), XSPR_MASK, PPC403, { RT } }, 3453130561Sobrien{ "mfexier", XSPR(31,323,66), XSPR_MASK, PPC403, { RT } }, 3454130561Sobrien{ "mfbr0", XSPR(31,323,128), XSPR_MASK, PPC403, { RT } }, 3455130561Sobrien{ "mfbr1", XSPR(31,323,129), XSPR_MASK, PPC403, { RT } }, 3456130561Sobrien{ "mfbr2", XSPR(31,323,130), XSPR_MASK, PPC403, { RT } }, 3457130561Sobrien{ "mfbr3", XSPR(31,323,131), XSPR_MASK, PPC403, { RT } }, 3458130561Sobrien{ "mfbr4", XSPR(31,323,132), XSPR_MASK, PPC403, { RT } }, 3459130561Sobrien{ "mfbr5", XSPR(31,323,133), XSPR_MASK, PPC403, { RT } }, 3460130561Sobrien{ "mfbr6", XSPR(31,323,134), XSPR_MASK, PPC403, { RT } }, 3461130561Sobrien{ "mfbr7", XSPR(31,323,135), XSPR_MASK, PPC403, { RT } }, 3462130561Sobrien{ "mfbear", XSPR(31,323,144), XSPR_MASK, PPC403, { RT } }, 3463130561Sobrien{ "mfbesr", XSPR(31,323,145), XSPR_MASK, PPC403, { RT } }, 3464130561Sobrien{ "mfiocr", XSPR(31,323,160), XSPR_MASK, PPC403, { RT } }, 346560484Sobrien{ "mfdmacr0", XSPR(31,323,192), XSPR_MASK, PPC403, { RT } }, 346660484Sobrien{ "mfdmact0", XSPR(31,323,193), XSPR_MASK, PPC403, { RT } }, 346760484Sobrien{ "mfdmada0", XSPR(31,323,194), XSPR_MASK, PPC403, { RT } }, 346860484Sobrien{ "mfdmasa0", XSPR(31,323,195), XSPR_MASK, PPC403, { RT } }, 346960484Sobrien{ "mfdmacc0", XSPR(31,323,196), XSPR_MASK, PPC403, { RT } }, 347060484Sobrien{ "mfdmacr1", XSPR(31,323,200), XSPR_MASK, PPC403, { RT } }, 347160484Sobrien{ "mfdmact1", XSPR(31,323,201), XSPR_MASK, PPC403, { RT } }, 347260484Sobrien{ "mfdmada1", XSPR(31,323,202), XSPR_MASK, PPC403, { RT } }, 347360484Sobrien{ "mfdmasa1", XSPR(31,323,203), XSPR_MASK, PPC403, { RT } }, 347460484Sobrien{ "mfdmacc1", XSPR(31,323,204), XSPR_MASK, PPC403, { RT } }, 347560484Sobrien{ "mfdmacr2", XSPR(31,323,208), XSPR_MASK, PPC403, { RT } }, 347660484Sobrien{ "mfdmact2", XSPR(31,323,209), XSPR_MASK, PPC403, { RT } }, 347760484Sobrien{ "mfdmada2", XSPR(31,323,210), XSPR_MASK, PPC403, { RT } }, 347860484Sobrien{ "mfdmasa2", XSPR(31,323,211), XSPR_MASK, PPC403, { RT } }, 347960484Sobrien{ "mfdmacc2", XSPR(31,323,212), XSPR_MASK, PPC403, { RT } }, 348060484Sobrien{ "mfdmacr3", XSPR(31,323,216), XSPR_MASK, PPC403, { RT } }, 348160484Sobrien{ "mfdmact3", XSPR(31,323,217), XSPR_MASK, PPC403, { RT } }, 348260484Sobrien{ "mfdmada3", XSPR(31,323,218), XSPR_MASK, PPC403, { RT } }, 348360484Sobrien{ "mfdmasa3", XSPR(31,323,219), XSPR_MASK, PPC403, { RT } }, 348460484Sobrien{ "mfdmacc3", XSPR(31,323,220), XSPR_MASK, PPC403, { RT } }, 3485130561Sobrien{ "mfdmasr", XSPR(31,323,224), XSPR_MASK, PPC403, { RT } }, 3486130561Sobrien{ "mfdcr", X(31,323), X_MASK, PPC403 | BOOKE, { RT, SPR } }, 348760484Sobrien 348860484Sobrien{ "div", XO(31,331,0,0), XO_MASK, M601, { RT, RA, RB } }, 348960484Sobrien{ "div.", XO(31,331,0,1), XO_MASK, M601, { RT, RA, RB } }, 349060484Sobrien{ "divo", XO(31,331,1,0), XO_MASK, M601, { RT, RA, RB } }, 349160484Sobrien{ "divo.", XO(31,331,1,1), XO_MASK, M601, { RT, RA, RB } }, 349260484Sobrien 3493130561Sobrien{ "mfpmr", X(31,334), X_MASK, PPCPMR, { RT, PMR }}, 3494130561Sobrien 3495130561Sobrien{ "mfmq", XSPR(31,339,0), XSPR_MASK, M601, { RT } }, 3496130561Sobrien{ "mfxer", XSPR(31,339,1), XSPR_MASK, COM, { RT } }, 3497130561Sobrien{ "mfrtcu", XSPR(31,339,4), XSPR_MASK, COM, { RT } }, 3498130561Sobrien{ "mfrtcl", XSPR(31,339,5), XSPR_MASK, COM, { RT } }, 3499130561Sobrien{ "mfdec", XSPR(31,339,6), XSPR_MASK, MFDEC1, { RT } }, 3500130561Sobrien{ "mfdec", XSPR(31,339,22), XSPR_MASK, MFDEC2, { RT } }, 3501130561Sobrien{ "mflr", XSPR(31,339,8), XSPR_MASK, COM, { RT } }, 3502130561Sobrien{ "mfctr", XSPR(31,339,9), XSPR_MASK, COM, { RT } }, 3503130561Sobrien{ "mftid", XSPR(31,339,17), XSPR_MASK, POWER, { RT } }, 3504130561Sobrien{ "mfdsisr", XSPR(31,339,18), XSPR_MASK, COM, { RT } }, 3505130561Sobrien{ "mfdar", XSPR(31,339,19), XSPR_MASK, COM, { RT } }, 3506130561Sobrien{ "mfsdr0", XSPR(31,339,24), XSPR_MASK, POWER, { RT } }, 3507130561Sobrien{ "mfsdr1", XSPR(31,339,25), XSPR_MASK, COM, { RT } }, 3508130561Sobrien{ "mfsrr0", XSPR(31,339,26), XSPR_MASK, COM, { RT } }, 3509130561Sobrien{ "mfsrr1", XSPR(31,339,27), XSPR_MASK, COM, { RT } }, 3510218822Sdim{ "mfcfar", XSPR(31,339,28), XSPR_MASK, POWER6, { RT } }, 3511130561Sobrien{ "mfpid", XSPR(31,339,48), XSPR_MASK, BOOKE, { RT } }, 3512130561Sobrien{ "mfpid", XSPR(31,339,945), XSPR_MASK, PPC403, { RT } }, 3513130561Sobrien{ "mfcsrr0", XSPR(31,339,58), XSPR_MASK, BOOKE, { RT } }, 3514130561Sobrien{ "mfcsrr1", XSPR(31,339,59), XSPR_MASK, BOOKE, { RT } }, 3515130561Sobrien{ "mfdear", XSPR(31,339,61), XSPR_MASK, BOOKE, { RT } }, 3516130561Sobrien{ "mfdear", XSPR(31,339,981), XSPR_MASK, PPC403, { RT } }, 3517130561Sobrien{ "mfesr", XSPR(31,339,62), XSPR_MASK, BOOKE, { RT } }, 3518130561Sobrien{ "mfesr", XSPR(31,339,980), XSPR_MASK, PPC403, { RT } }, 3519130561Sobrien{ "mfivpr", XSPR(31,339,63), XSPR_MASK, BOOKE, { RT } }, 3520130561Sobrien{ "mfcmpa", XSPR(31,339,144), XSPR_MASK, PPC860, { RT } }, 3521130561Sobrien{ "mfcmpb", XSPR(31,339,145), XSPR_MASK, PPC860, { RT } }, 3522130561Sobrien{ "mfcmpc", XSPR(31,339,146), XSPR_MASK, PPC860, { RT } }, 3523130561Sobrien{ "mfcmpd", XSPR(31,339,147), XSPR_MASK, PPC860, { RT } }, 3524130561Sobrien{ "mficr", XSPR(31,339,148), XSPR_MASK, PPC860, { RT } }, 3525130561Sobrien{ "mfder", XSPR(31,339,149), XSPR_MASK, PPC860, { RT } }, 3526130561Sobrien{ "mfcounta", XSPR(31,339,150), XSPR_MASK, PPC860, { RT } }, 3527130561Sobrien{ "mfcountb", XSPR(31,339,151), XSPR_MASK, PPC860, { RT } }, 3528130561Sobrien{ "mfcmpe", XSPR(31,339,152), XSPR_MASK, PPC860, { RT } }, 3529130561Sobrien{ "mfcmpf", XSPR(31,339,153), XSPR_MASK, PPC860, { RT } }, 3530130561Sobrien{ "mfcmpg", XSPR(31,339,154), XSPR_MASK, PPC860, { RT } }, 3531130561Sobrien{ "mfcmph", XSPR(31,339,155), XSPR_MASK, PPC860, { RT } }, 3532130561Sobrien{ "mflctrl1", XSPR(31,339,156), XSPR_MASK, PPC860, { RT } }, 3533130561Sobrien{ "mflctrl2", XSPR(31,339,157), XSPR_MASK, PPC860, { RT } }, 3534130561Sobrien{ "mfictrl", XSPR(31,339,158), XSPR_MASK, PPC860, { RT } }, 3535130561Sobrien{ "mfbar", XSPR(31,339,159), XSPR_MASK, PPC860, { RT } }, 3536130561Sobrien{ "mfvrsave", XSPR(31,339,256), XSPR_MASK, PPCVEC, { RT } }, 3537130561Sobrien{ "mfusprg0", XSPR(31,339,256), XSPR_MASK, BOOKE, { RT } }, 3538130561Sobrien{ "mftb", X(31,371), X_MASK, CLASSIC, { RT, TBR } }, 3539130561Sobrien{ "mftb", XSPR(31,339,268), XSPR_MASK, BOOKE, { RT } }, 3540130561Sobrien{ "mftbl", XSPR(31,371,268), XSPR_MASK, CLASSIC, { RT } }, 3541130561Sobrien{ "mftbl", XSPR(31,339,268), XSPR_MASK, BOOKE, { RT } }, 3542130561Sobrien{ "mftbu", XSPR(31,371,269), XSPR_MASK, CLASSIC, { RT } }, 3543130561Sobrien{ "mftbu", XSPR(31,339,269), XSPR_MASK, BOOKE, { RT } }, 3544218822Sdim{ "mfsprg", XSPR(31,339,256), XSPRG_MASK, PPC, { RT, SPRG } }, 3545130561Sobrien{ "mfsprg0", XSPR(31,339,272), XSPR_MASK, PPC, { RT } }, 3546130561Sobrien{ "mfsprg1", XSPR(31,339,273), XSPR_MASK, PPC, { RT } }, 3547130561Sobrien{ "mfsprg2", XSPR(31,339,274), XSPR_MASK, PPC, { RT } }, 3548130561Sobrien{ "mfsprg3", XSPR(31,339,275), XSPR_MASK, PPC, { RT } }, 3549218822Sdim{ "mfsprg4", XSPR(31,339,260), XSPR_MASK, PPC405 | BOOKE, { RT } }, 3550218822Sdim{ "mfsprg5", XSPR(31,339,261), XSPR_MASK, PPC405 | BOOKE, { RT } }, 3551218822Sdim{ "mfsprg6", XSPR(31,339,262), XSPR_MASK, PPC405 | BOOKE, { RT } }, 3552218822Sdim{ "mfsprg7", XSPR(31,339,263), XSPR_MASK, PPC405 | BOOKE, { RT } }, 3553130561Sobrien{ "mfasr", XSPR(31,339,280), XSPR_MASK, PPC64, { RT } }, 3554130561Sobrien{ "mfear", XSPR(31,339,282), XSPR_MASK, PPC, { RT } }, 3555130561Sobrien{ "mfpir", XSPR(31,339,286), XSPR_MASK, BOOKE, { RT } }, 3556130561Sobrien{ "mfpvr", XSPR(31,339,287), XSPR_MASK, PPC, { RT } }, 3557130561Sobrien{ "mfdbsr", XSPR(31,339,304), XSPR_MASK, BOOKE, { RT } }, 3558130561Sobrien{ "mfdbsr", XSPR(31,339,1008), XSPR_MASK, PPC403, { RT } }, 3559130561Sobrien{ "mfdbcr0", XSPR(31,339,308), XSPR_MASK, BOOKE, { RT } }, 3560130561Sobrien{ "mfdbcr0", XSPR(31,339,1010), XSPR_MASK, PPC405, { RT } }, 3561130561Sobrien{ "mfdbcr1", XSPR(31,339,309), XSPR_MASK, BOOKE, { RT } }, 3562130561Sobrien{ "mfdbcr1", XSPR(31,339,957), XSPR_MASK, PPC405, { RT } }, 3563130561Sobrien{ "mfdbcr2", XSPR(31,339,310), XSPR_MASK, BOOKE, { RT } }, 3564130561Sobrien{ "mfiac1", XSPR(31,339,312), XSPR_MASK, BOOKE, { RT } }, 3565130561Sobrien{ "mfiac1", XSPR(31,339,1012), XSPR_MASK, PPC403, { RT } }, 3566130561Sobrien{ "mfiac2", XSPR(31,339,313), XSPR_MASK, BOOKE, { RT } }, 3567130561Sobrien{ "mfiac2", XSPR(31,339,1013), XSPR_MASK, PPC403, { RT } }, 3568130561Sobrien{ "mfiac3", XSPR(31,339,314), XSPR_MASK, BOOKE, { RT } }, 356977298Sobrien{ "mfiac3", XSPR(31,339,948), XSPR_MASK, PPC405, { RT } }, 3570130561Sobrien{ "mfiac4", XSPR(31,339,315), XSPR_MASK, BOOKE, { RT } }, 357177298Sobrien{ "mfiac4", XSPR(31,339,949), XSPR_MASK, PPC405, { RT } }, 3572130561Sobrien{ "mfdac1", XSPR(31,339,316), XSPR_MASK, BOOKE, { RT } }, 3573130561Sobrien{ "mfdac1", XSPR(31,339,1014), XSPR_MASK, PPC403, { RT } }, 3574130561Sobrien{ "mfdac2", XSPR(31,339,317), XSPR_MASK, BOOKE, { RT } }, 3575130561Sobrien{ "mfdac2", XSPR(31,339,1015), XSPR_MASK, PPC403, { RT } }, 3576130561Sobrien{ "mfdvc1", XSPR(31,339,318), XSPR_MASK, BOOKE, { RT } }, 357777298Sobrien{ "mfdvc1", XSPR(31,339,950), XSPR_MASK, PPC405, { RT } }, 3578130561Sobrien{ "mfdvc2", XSPR(31,339,319), XSPR_MASK, BOOKE, { RT } }, 357977298Sobrien{ "mfdvc2", XSPR(31,339,951), XSPR_MASK, PPC405, { RT } }, 3580130561Sobrien{ "mftsr", XSPR(31,339,336), XSPR_MASK, BOOKE, { RT } }, 3581130561Sobrien{ "mftsr", XSPR(31,339,984), XSPR_MASK, PPC403, { RT } }, 3582130561Sobrien{ "mftcr", XSPR(31,339,340), XSPR_MASK, BOOKE, { RT } }, 3583130561Sobrien{ "mftcr", XSPR(31,339,986), XSPR_MASK, PPC403, { RT } }, 3584130561Sobrien{ "mfivor0", XSPR(31,339,400), XSPR_MASK, BOOKE, { RT } }, 3585130561Sobrien{ "mfivor1", XSPR(31,339,401), XSPR_MASK, BOOKE, { RT } }, 3586130561Sobrien{ "mfivor2", XSPR(31,339,402), XSPR_MASK, BOOKE, { RT } }, 3587130561Sobrien{ "mfivor3", XSPR(31,339,403), XSPR_MASK, BOOKE, { RT } }, 3588130561Sobrien{ "mfivor4", XSPR(31,339,404), XSPR_MASK, BOOKE, { RT } }, 3589130561Sobrien{ "mfivor5", XSPR(31,339,405), XSPR_MASK, BOOKE, { RT } }, 3590130561Sobrien{ "mfivor6", XSPR(31,339,406), XSPR_MASK, BOOKE, { RT } }, 3591130561Sobrien{ "mfivor7", XSPR(31,339,407), XSPR_MASK, BOOKE, { RT } }, 3592130561Sobrien{ "mfivor8", XSPR(31,339,408), XSPR_MASK, BOOKE, { RT } }, 3593130561Sobrien{ "mfivor9", XSPR(31,339,409), XSPR_MASK, BOOKE, { RT } }, 3594130561Sobrien{ "mfivor10", XSPR(31,339,410), XSPR_MASK, BOOKE, { RT } }, 3595130561Sobrien{ "mfivor11", XSPR(31,339,411), XSPR_MASK, BOOKE, { RT } }, 3596130561Sobrien{ "mfivor12", XSPR(31,339,412), XSPR_MASK, BOOKE, { RT } }, 3597130561Sobrien{ "mfivor13", XSPR(31,339,413), XSPR_MASK, BOOKE, { RT } }, 3598130561Sobrien{ "mfivor14", XSPR(31,339,414), XSPR_MASK, BOOKE, { RT } }, 3599130561Sobrien{ "mfivor15", XSPR(31,339,415), XSPR_MASK, BOOKE, { RT } }, 3600130561Sobrien{ "mfspefscr", XSPR(31,339,512), XSPR_MASK, PPCSPE, { RT } }, 3601130561Sobrien{ "mfbbear", XSPR(31,339,513), XSPR_MASK, PPCBRLK, { RT } }, 3602130561Sobrien{ "mfbbtar", XSPR(31,339,514), XSPR_MASK, PPCBRLK, { RT } }, 3603130561Sobrien{ "mfivor32", XSPR(31,339,528), XSPR_MASK, PPCSPE, { RT } }, 3604130561Sobrien{ "mfivor33", XSPR(31,339,529), XSPR_MASK, PPCSPE, { RT } }, 3605130561Sobrien{ "mfivor34", XSPR(31,339,530), XSPR_MASK, PPCSPE, { RT } }, 3606130561Sobrien{ "mfivor35", XSPR(31,339,531), XSPR_MASK, PPCPMR, { RT } }, 3607130561Sobrien{ "mfibatu", XSPR(31,339,528), XSPRBAT_MASK, PPC, { RT, SPRBAT } }, 3608130561Sobrien{ "mfibatl", XSPR(31,339,529), XSPRBAT_MASK, PPC, { RT, SPRBAT } }, 3609130561Sobrien{ "mfdbatu", XSPR(31,339,536), XSPRBAT_MASK, PPC, { RT, SPRBAT } }, 3610130561Sobrien{ "mfdbatl", XSPR(31,339,537), XSPRBAT_MASK, PPC, { RT, SPRBAT } }, 3611130561Sobrien{ "mfic_cst", XSPR(31,339,560), XSPR_MASK, PPC860, { RT } }, 3612130561Sobrien{ "mfic_adr", XSPR(31,339,561), XSPR_MASK, PPC860, { RT } }, 3613130561Sobrien{ "mfic_dat", XSPR(31,339,562), XSPR_MASK, PPC860, { RT } }, 3614130561Sobrien{ "mfdc_cst", XSPR(31,339,568), XSPR_MASK, PPC860, { RT } }, 3615130561Sobrien{ "mfdc_adr", XSPR(31,339,569), XSPR_MASK, PPC860, { RT } }, 3616130561Sobrien{ "mfmcsrr0", XSPR(31,339,570), XSPR_MASK, PPCRFMCI, { RT } }, 3617130561Sobrien{ "mfdc_dat", XSPR(31,339,570), XSPR_MASK, PPC860, { RT } }, 3618130561Sobrien{ "mfmcsrr1", XSPR(31,339,571), XSPR_MASK, PPCRFMCI, { RT } }, 3619130561Sobrien{ "mfmcsr", XSPR(31,339,572), XSPR_MASK, PPCRFMCI, { RT } }, 3620130561Sobrien{ "mfmcar", XSPR(31,339,573), XSPR_MASK, PPCRFMCI, { RT } }, 3621130561Sobrien{ "mfdpdr", XSPR(31,339,630), XSPR_MASK, PPC860, { RT } }, 3622130561Sobrien{ "mfdpir", XSPR(31,339,631), XSPR_MASK, PPC860, { RT } }, 3623130561Sobrien{ "mfimmr", XSPR(31,339,638), XSPR_MASK, PPC860, { RT } }, 3624130561Sobrien{ "mfmi_ctr", XSPR(31,339,784), XSPR_MASK, PPC860, { RT } }, 3625130561Sobrien{ "mfmi_ap", XSPR(31,339,786), XSPR_MASK, PPC860, { RT } }, 3626130561Sobrien{ "mfmi_epn", XSPR(31,339,787), XSPR_MASK, PPC860, { RT } }, 3627130561Sobrien{ "mfmi_twc", XSPR(31,339,789), XSPR_MASK, PPC860, { RT } }, 3628130561Sobrien{ "mfmi_rpn", XSPR(31,339,790), XSPR_MASK, PPC860, { RT } }, 3629130561Sobrien{ "mfmd_ctr", XSPR(31,339,792), XSPR_MASK, PPC860, { RT } }, 3630130561Sobrien{ "mfm_casid", XSPR(31,339,793), XSPR_MASK, PPC860, { RT } }, 3631130561Sobrien{ "mfmd_ap", XSPR(31,339,794), XSPR_MASK, PPC860, { RT } }, 3632130561Sobrien{ "mfmd_epn", XSPR(31,339,795), XSPR_MASK, PPC860, { RT } }, 3633130561Sobrien{ "mfmd_twb", XSPR(31,339,796), XSPR_MASK, PPC860, { RT } }, 3634130561Sobrien{ "mfmd_twc", XSPR(31,339,797), XSPR_MASK, PPC860, { RT } }, 3635130561Sobrien{ "mfmd_rpn", XSPR(31,339,798), XSPR_MASK, PPC860, { RT } }, 3636130561Sobrien{ "mfm_tw", XSPR(31,339,799), XSPR_MASK, PPC860, { RT } }, 3637130561Sobrien{ "mfmi_dbcam", XSPR(31,339,816), XSPR_MASK, PPC860, { RT } }, 3638130561Sobrien{ "mfmi_dbram0",XSPR(31,339,817), XSPR_MASK, PPC860, { RT } }, 3639130561Sobrien{ "mfmi_dbram1",XSPR(31,339,818), XSPR_MASK, PPC860, { RT } }, 3640130561Sobrien{ "mfmd_dbcam", XSPR(31,339,824), XSPR_MASK, PPC860, { RT } }, 3641130561Sobrien{ "mfmd_dbram0",XSPR(31,339,825), XSPR_MASK, PPC860, { RT } }, 3642130561Sobrien{ "mfmd_dbram1",XSPR(31,339,826), XSPR_MASK, PPC860, { RT } }, 3643130561Sobrien{ "mfummcr0", XSPR(31,339,936), XSPR_MASK, PPC750, { RT } }, 3644130561Sobrien{ "mfupmc1", XSPR(31,339,937), XSPR_MASK, PPC750, { RT } }, 3645130561Sobrien{ "mfupmc2", XSPR(31,339,938), XSPR_MASK, PPC750, { RT } }, 3646130561Sobrien{ "mfusia", XSPR(31,339,939), XSPR_MASK, PPC750, { RT } }, 3647130561Sobrien{ "mfummcr1", XSPR(31,339,940), XSPR_MASK, PPC750, { RT } }, 3648130561Sobrien{ "mfupmc3", XSPR(31,339,941), XSPR_MASK, PPC750, { RT } }, 3649130561Sobrien{ "mfupmc4", XSPR(31,339,942), XSPR_MASK, PPC750, { RT } }, 3650130561Sobrien{ "mfzpr", XSPR(31,339,944), XSPR_MASK, PPC403, { RT } }, 3651130561Sobrien{ "mfccr0", XSPR(31,339,947), XSPR_MASK, PPC405, { RT } }, 365260484Sobrien{ "mfmmcr0", XSPR(31,339,952), XSPR_MASK, PPC750, { RT } }, 365360484Sobrien{ "mfpmc1", XSPR(31,339,953), XSPR_MASK, PPC750, { RT } }, 365477298Sobrien{ "mfsgr", XSPR(31,339,953), XSPR_MASK, PPC403, { RT } }, 365560484Sobrien{ "mfpmc2", XSPR(31,339,954), XSPR_MASK, PPC750, { RT } }, 365677298Sobrien{ "mfdcwr", XSPR(31,339,954), XSPR_MASK, PPC403, { RT } }, 365760484Sobrien{ "mfsia", XSPR(31,339,955), XSPR_MASK, PPC750, { RT } }, 365877298Sobrien{ "mfsler", XSPR(31,339,955), XSPR_MASK, PPC405, { RT } }, 365960484Sobrien{ "mfmmcr1", XSPR(31,339,956), XSPR_MASK, PPC750, { RT } }, 366077298Sobrien{ "mfsu0r", XSPR(31,339,956), XSPR_MASK, PPC405, { RT } }, 366160484Sobrien{ "mfpmc3", XSPR(31,339,957), XSPR_MASK, PPC750, { RT } }, 366260484Sobrien{ "mfpmc4", XSPR(31,339,958), XSPR_MASK, PPC750, { RT } }, 3663130561Sobrien{ "mficdbdr", XSPR(31,339,979), XSPR_MASK, PPC403, { RT } }, 3664130561Sobrien{ "mfevpr", XSPR(31,339,982), XSPR_MASK, PPC403, { RT } }, 3665130561Sobrien{ "mfcdbcr", XSPR(31,339,983), XSPR_MASK, PPC403, { RT } }, 3666130561Sobrien{ "mfpit", XSPR(31,339,987), XSPR_MASK, PPC403, { RT } }, 3667130561Sobrien{ "mftbhi", XSPR(31,339,988), XSPR_MASK, PPC403, { RT } }, 3668130561Sobrien{ "mftblo", XSPR(31,339,989), XSPR_MASK, PPC403, { RT } }, 3669130561Sobrien{ "mfsrr2", XSPR(31,339,990), XSPR_MASK, PPC403, { RT } }, 3670130561Sobrien{ "mfsrr3", XSPR(31,339,991), XSPR_MASK, PPC403, { RT } }, 3671130561Sobrien{ "mfl2cr", XSPR(31,339,1017), XSPR_MASK, PPC750, { RT } }, 3672130561Sobrien{ "mfdccr", XSPR(31,339,1018), XSPR_MASK, PPC403, { RT } }, 3673130561Sobrien{ "mficcr", XSPR(31,339,1019), XSPR_MASK, PPC403, { RT } }, 3674130561Sobrien{ "mfictc", XSPR(31,339,1019), XSPR_MASK, PPC750, { RT } }, 3675130561Sobrien{ "mfpbl1", XSPR(31,339,1020), XSPR_MASK, PPC403, { RT } }, 3676130561Sobrien{ "mfthrm1", XSPR(31,339,1020), XSPR_MASK, PPC750, { RT } }, 3677130561Sobrien{ "mfpbu1", XSPR(31,339,1021), XSPR_MASK, PPC403, { RT } }, 3678130561Sobrien{ "mfthrm2", XSPR(31,339,1021), XSPR_MASK, PPC750, { RT } }, 3679130561Sobrien{ "mfpbl2", XSPR(31,339,1022), XSPR_MASK, PPC403, { RT } }, 3680130561Sobrien{ "mfthrm3", XSPR(31,339,1022), XSPR_MASK, PPC750, { RT } }, 3681130561Sobrien{ "mfpbu2", XSPR(31,339,1023), XSPR_MASK, PPC403, { RT } }, 3682130561Sobrien{ "mfspr", X(31,339), X_MASK, COM, { RT, SPR } }, 368360484Sobrien 3684130561Sobrien{ "lwax", X(31,341), X_MASK, PPC64, { RT, RA0, RB } }, 368560484Sobrien 368689857Sobrien{ "dst", XDSS(31,342,0), XDSS_MASK, PPCVEC, { RA, RB, STRM } }, 368789857Sobrien{ "dstt", XDSS(31,342,1), XDSS_MASK, PPCVEC, { RA, RB, STRM } }, 368889857Sobrien 3689130561Sobrien{ "lhax", X(31,343), X_MASK, COM, { RT, RA0, RB } }, 369060484Sobrien 3691130561Sobrien{ "lhaxe", X(31,351), X_MASK, BOOKE64, { RT, RA0, RB } }, 369289857Sobrien 369389857Sobrien{ "dstst", XDSS(31,374,0), XDSS_MASK, PPCVEC, { RA, RB, STRM } }, 369489857Sobrien{ "dststt", XDSS(31,374,1), XDSS_MASK, PPCVEC, { RA, RB, STRM } }, 369589857Sobrien 3696130561Sobrien{ "dccci", X(31,454), XRT_MASK, PPC403|PPC440, { RA, RB } }, 369760484Sobrien 369860484Sobrien{ "abs", XO(31,360,0,0), XORB_MASK, M601, { RT, RA } }, 369960484Sobrien{ "abs.", XO(31,360,0,1), XORB_MASK, M601, { RT, RA } }, 370060484Sobrien{ "abso", XO(31,360,1,0), XORB_MASK, M601, { RT, RA } }, 370160484Sobrien{ "abso.", XO(31,360,1,1), XORB_MASK, M601, { RT, RA } }, 370260484Sobrien 370360484Sobrien{ "divs", XO(31,363,0,0), XO_MASK, M601, { RT, RA, RB } }, 370460484Sobrien{ "divs.", XO(31,363,0,1), XO_MASK, M601, { RT, RA, RB } }, 370560484Sobrien{ "divso", XO(31,363,1,0), XO_MASK, M601, { RT, RA, RB } }, 370660484Sobrien{ "divso.", XO(31,363,1,1), XO_MASK, M601, { RT, RA, RB } }, 370760484Sobrien 370860484Sobrien{ "tlbia", X(31,370), 0xffffffff, PPC, { 0 } }, 370960484Sobrien 371060484Sobrien{ "lwaux", X(31,373), X_MASK, PPC64, { RT, RAL, RB } }, 371160484Sobrien 371260484Sobrien{ "lhaux", X(31,375), X_MASK, COM, { RT, RAL, RB } }, 371360484Sobrien 371489857Sobrien{ "lhauxe", X(31,383), X_MASK, BOOKE64, { RT, RAL, RB } }, 371589857Sobrien 371689857Sobrien{ "mtdcrx", X(31,387), X_MASK, BOOKE, { RA, RS } }, 371789857Sobrien 3718130561Sobrien{ "dcblc", X(31,390), X_MASK, PPCCHLK, { CT, RA, RB }}, 3719130561Sobrien 372089857Sobrien{ "subfe64", XO(31,392,0,0), XO_MASK, BOOKE64, { RT, RA, RB } }, 372189857Sobrien{ "subfe64o",XO(31,392,1,0), XO_MASK, BOOKE64, { RT, RA, RB } }, 372289857Sobrien 372389857Sobrien{ "adde64", XO(31,394,0,0), XO_MASK, BOOKE64, { RT, RA, RB } }, 372489857Sobrien{ "adde64o", XO(31,394,1,0), XO_MASK, BOOKE64, { RT, RA, RB } }, 372589857Sobrien 3726130561Sobrien{ "dcblce", X(31,398), X_MASK, PPCCHLK64, { CT, RA, RB }}, 3727130561Sobrien 372889857Sobrien{ "slbmte", X(31,402), XRA_MASK, PPC64, { RS, RB } }, 372989857Sobrien 3730130561Sobrien{ "sthx", X(31,407), X_MASK, COM, { RS, RA0, RB } }, 373160484Sobrien 3732218822Sdim{ "cmpb", X(31,508), X_MASK, POWER6, { RA, RS, RB } }, 3733218822Sdim 373460484Sobrien{ "lfqx", X(31,791), X_MASK, POWER2, { FRT, RA, RB } }, 373560484Sobrien 3736218822Sdim{ "lfdpx", X(31,791), X_MASK, POWER6, { FRT, RA, RB } }, 3737218822Sdim 373860484Sobrien{ "lfqux", X(31,823), X_MASK, POWER2, { FRT, RA, RB } }, 373960484Sobrien 374060484Sobrien{ "stfqx", X(31,919), X_MASK, POWER2, { FRS, RA, RB } }, 374160484Sobrien 3742218822Sdim{ "stfdpx", X(31,919), X_MASK, POWER6, { FRS, RA, RB } }, 3743218822Sdim 374460484Sobrien{ "stfqux", X(31,951), X_MASK, POWER2, { FRS, RA, RB } }, 374560484Sobrien 374660484Sobrien{ "orc", XRC(31,412,0), X_MASK, COM, { RA, RS, RB } }, 374760484Sobrien{ "orc.", XRC(31,412,1), X_MASK, COM, { RA, RS, RB } }, 374860484Sobrien 374960484Sobrien{ "sradi", XS(31,413,0), XS_MASK, PPC64, { RA, RS, SH6 } }, 375060484Sobrien{ "sradi.", XS(31,413,1), XS_MASK, PPC64, { RA, RS, SH6 } }, 375160484Sobrien 3752130561Sobrien{ "sthxe", X(31,415), X_MASK, BOOKE64, { RS, RA0, RB } }, 375389857Sobrien 375460484Sobrien{ "slbie", X(31,434), XRTRA_MASK, PPC64, { RB } }, 375560484Sobrien 375660484Sobrien{ "ecowx", X(31,438), X_MASK, PPC, { RT, RA, RB } }, 375760484Sobrien 375860484Sobrien{ "sthux", X(31,439), X_MASK, COM, { RS, RAS, RB } }, 375960484Sobrien 376089857Sobrien{ "sthuxe", X(31,447), X_MASK, BOOKE64, { RS, RAS, RB } }, 376189857Sobrien 3762218822Sdim{ "cctpl", 0x7c210b78, 0xffffffff, CELL, { 0 }}, 3763218822Sdim{ "cctpm", 0x7c421378, 0xffffffff, CELL, { 0 }}, 3764218822Sdim{ "cctph", 0x7c631b78, 0xffffffff, CELL, { 0 }}, 3765218822Sdim{ "db8cyc", 0x7f9ce378, 0xffffffff, CELL, { 0 }}, 3766218822Sdim{ "db10cyc", 0x7fbdeb78, 0xffffffff, CELL, { 0 }}, 3767218822Sdim{ "db12cyc", 0x7fdef378, 0xffffffff, CELL, { 0 }}, 3768218822Sdim{ "db16cyc", 0x7ffffb78, 0xffffffff, CELL, { 0 }}, 376960484Sobrien{ "mr", XRC(31,444,0), X_MASK, COM, { RA, RS, RBS } }, 377060484Sobrien{ "or", XRC(31,444,0), X_MASK, COM, { RA, RS, RB } }, 377160484Sobrien{ "mr.", XRC(31,444,1), X_MASK, COM, { RA, RS, RBS } }, 377260484Sobrien{ "or.", XRC(31,444,1), X_MASK, COM, { RA, RS, RB } }, 377360484Sobrien 3774130561Sobrien{ "mtexisr", XSPR(31,451,64), XSPR_MASK, PPC403, { RS } }, 3775130561Sobrien{ "mtexier", XSPR(31,451,66), XSPR_MASK, PPC403, { RS } }, 3776130561Sobrien{ "mtbr0", XSPR(31,451,128), XSPR_MASK, PPC403, { RS } }, 3777130561Sobrien{ "mtbr1", XSPR(31,451,129), XSPR_MASK, PPC403, { RS } }, 3778130561Sobrien{ "mtbr2", XSPR(31,451,130), XSPR_MASK, PPC403, { RS } }, 3779130561Sobrien{ "mtbr3", XSPR(31,451,131), XSPR_MASK, PPC403, { RS } }, 3780130561Sobrien{ "mtbr4", XSPR(31,451,132), XSPR_MASK, PPC403, { RS } }, 3781130561Sobrien{ "mtbr5", XSPR(31,451,133), XSPR_MASK, PPC403, { RS } }, 3782130561Sobrien{ "mtbr6", XSPR(31,451,134), XSPR_MASK, PPC403, { RS } }, 3783130561Sobrien{ "mtbr7", XSPR(31,451,135), XSPR_MASK, PPC403, { RS } }, 3784130561Sobrien{ "mtbear", XSPR(31,451,144), XSPR_MASK, PPC403, { RS } }, 3785130561Sobrien{ "mtbesr", XSPR(31,451,145), XSPR_MASK, PPC403, { RS } }, 3786130561Sobrien{ "mtiocr", XSPR(31,451,160), XSPR_MASK, PPC403, { RS } }, 3787130561Sobrien{ "mtdmacr0", XSPR(31,451,192), XSPR_MASK, PPC403, { RS } }, 3788130561Sobrien{ "mtdmact0", XSPR(31,451,193), XSPR_MASK, PPC403, { RS } }, 3789130561Sobrien{ "mtdmada0", XSPR(31,451,194), XSPR_MASK, PPC403, { RS } }, 3790130561Sobrien{ "mtdmasa0", XSPR(31,451,195), XSPR_MASK, PPC403, { RS } }, 3791130561Sobrien{ "mtdmacc0", XSPR(31,451,196), XSPR_MASK, PPC403, { RS } }, 3792130561Sobrien{ "mtdmacr1", XSPR(31,451,200), XSPR_MASK, PPC403, { RS } }, 3793130561Sobrien{ "mtdmact1", XSPR(31,451,201), XSPR_MASK, PPC403, { RS } }, 3794130561Sobrien{ "mtdmada1", XSPR(31,451,202), XSPR_MASK, PPC403, { RS } }, 3795130561Sobrien{ "mtdmasa1", XSPR(31,451,203), XSPR_MASK, PPC403, { RS } }, 3796130561Sobrien{ "mtdmacc1", XSPR(31,451,204), XSPR_MASK, PPC403, { RS } }, 3797130561Sobrien{ "mtdmacr2", XSPR(31,451,208), XSPR_MASK, PPC403, { RS } }, 3798130561Sobrien{ "mtdmact2", XSPR(31,451,209), XSPR_MASK, PPC403, { RS } }, 3799130561Sobrien{ "mtdmada2", XSPR(31,451,210), XSPR_MASK, PPC403, { RS } }, 3800130561Sobrien{ "mtdmasa2", XSPR(31,451,211), XSPR_MASK, PPC403, { RS } }, 3801130561Sobrien{ "mtdmacc2", XSPR(31,451,212), XSPR_MASK, PPC403, { RS } }, 3802130561Sobrien{ "mtdmacr3", XSPR(31,451,216), XSPR_MASK, PPC403, { RS } }, 3803130561Sobrien{ "mtdmact3", XSPR(31,451,217), XSPR_MASK, PPC403, { RS } }, 3804130561Sobrien{ "mtdmada3", XSPR(31,451,218), XSPR_MASK, PPC403, { RS } }, 3805130561Sobrien{ "mtdmasa3", XSPR(31,451,219), XSPR_MASK, PPC403, { RS } }, 3806130561Sobrien{ "mtdmacc3", XSPR(31,451,220), XSPR_MASK, PPC403, { RS } }, 3807130561Sobrien{ "mtdmasr", XSPR(31,451,224), XSPR_MASK, PPC403, { RS } }, 3808130561Sobrien{ "mtdcr", X(31,451), X_MASK, PPC403 | BOOKE, { SPR, RS } }, 380960484Sobrien 381089857Sobrien{ "subfze64",XO(31,456,0,0), XORB_MASK, BOOKE64, { RT, RA } }, 381189857Sobrien{ "subfze64o",XO(31,456,1,0), XORB_MASK, BOOKE64, { RT, RA } }, 381289857Sobrien 381360484Sobrien{ "divdu", XO(31,457,0,0), XO_MASK, PPC64, { RT, RA, RB } }, 381460484Sobrien{ "divdu.", XO(31,457,0,1), XO_MASK, PPC64, { RT, RA, RB } }, 381560484Sobrien{ "divduo", XO(31,457,1,0), XO_MASK, PPC64, { RT, RA, RB } }, 381660484Sobrien{ "divduo.", XO(31,457,1,1), XO_MASK, PPC64, { RT, RA, RB } }, 381760484Sobrien 381889857Sobrien{ "addze64", XO(31,458,0,0), XORB_MASK, BOOKE64, { RT, RA } }, 381989857Sobrien{ "addze64o",XO(31,458,1,0), XORB_MASK, BOOKE64, { RT, RA } }, 382089857Sobrien 382160484Sobrien{ "divwu", XO(31,459,0,0), XO_MASK, PPC, { RT, RA, RB } }, 382260484Sobrien{ "divwu.", XO(31,459,0,1), XO_MASK, PPC, { RT, RA, RB } }, 382360484Sobrien{ "divwuo", XO(31,459,1,0), XO_MASK, PPC, { RT, RA, RB } }, 382460484Sobrien{ "divwuo.", XO(31,459,1,1), XO_MASK, PPC, { RT, RA, RB } }, 382560484Sobrien 3826130561Sobrien{ "mtmq", XSPR(31,467,0), XSPR_MASK, M601, { RS } }, 3827130561Sobrien{ "mtxer", XSPR(31,467,1), XSPR_MASK, COM, { RS } }, 3828130561Sobrien{ "mtlr", XSPR(31,467,8), XSPR_MASK, COM, { RS } }, 3829130561Sobrien{ "mtctr", XSPR(31,467,9), XSPR_MASK, COM, { RS } }, 3830130561Sobrien{ "mttid", XSPR(31,467,17), XSPR_MASK, POWER, { RS } }, 3831130561Sobrien{ "mtdsisr", XSPR(31,467,18), XSPR_MASK, COM, { RS } }, 3832130561Sobrien{ "mtdar", XSPR(31,467,19), XSPR_MASK, COM, { RS } }, 3833130561Sobrien{ "mtrtcu", XSPR(31,467,20), XSPR_MASK, COM, { RS } }, 3834130561Sobrien{ "mtrtcl", XSPR(31,467,21), XSPR_MASK, COM, { RS } }, 3835130561Sobrien{ "mtdec", XSPR(31,467,22), XSPR_MASK, COM, { RS } }, 3836130561Sobrien{ "mtsdr0", XSPR(31,467,24), XSPR_MASK, POWER, { RS } }, 3837130561Sobrien{ "mtsdr1", XSPR(31,467,25), XSPR_MASK, COM, { RS } }, 3838130561Sobrien{ "mtsrr0", XSPR(31,467,26), XSPR_MASK, COM, { RS } }, 3839130561Sobrien{ "mtsrr1", XSPR(31,467,27), XSPR_MASK, COM, { RS } }, 3840218822Sdim{ "mtcfar", XSPR(31,467,28), XSPR_MASK, POWER6, { RS } }, 3841130561Sobrien{ "mtpid", XSPR(31,467,48), XSPR_MASK, BOOKE, { RS } }, 3842130561Sobrien{ "mtpid", XSPR(31,467,945), XSPR_MASK, PPC403, { RS } }, 3843130561Sobrien{ "mtdecar", XSPR(31,467,54), XSPR_MASK, BOOKE, { RS } }, 3844130561Sobrien{ "mtcsrr0", XSPR(31,467,58), XSPR_MASK, BOOKE, { RS } }, 3845130561Sobrien{ "mtcsrr1", XSPR(31,467,59), XSPR_MASK, BOOKE, { RS } }, 3846130561Sobrien{ "mtdear", XSPR(31,467,61), XSPR_MASK, BOOKE, { RS } }, 3847130561Sobrien{ "mtdear", XSPR(31,467,981), XSPR_MASK, PPC403, { RS } }, 3848130561Sobrien{ "mtesr", XSPR(31,467,62), XSPR_MASK, BOOKE, { RS } }, 3849130561Sobrien{ "mtesr", XSPR(31,467,980), XSPR_MASK, PPC403, { RS } }, 3850130561Sobrien{ "mtivpr", XSPR(31,467,63), XSPR_MASK, BOOKE, { RS } }, 3851130561Sobrien{ "mtcmpa", XSPR(31,467,144), XSPR_MASK, PPC860, { RS } }, 3852130561Sobrien{ "mtcmpb", XSPR(31,467,145), XSPR_MASK, PPC860, { RS } }, 3853130561Sobrien{ "mtcmpc", XSPR(31,467,146), XSPR_MASK, PPC860, { RS } }, 3854130561Sobrien{ "mtcmpd", XSPR(31,467,147), XSPR_MASK, PPC860, { RS } }, 3855130561Sobrien{ "mticr", XSPR(31,467,148), XSPR_MASK, PPC860, { RS } }, 3856130561Sobrien{ "mtder", XSPR(31,467,149), XSPR_MASK, PPC860, { RS } }, 3857130561Sobrien{ "mtcounta", XSPR(31,467,150), XSPR_MASK, PPC860, { RS } }, 3858130561Sobrien{ "mtcountb", XSPR(31,467,151), XSPR_MASK, PPC860, { RS } }, 3859130561Sobrien{ "mtcmpe", XSPR(31,467,152), XSPR_MASK, PPC860, { RS } }, 3860130561Sobrien{ "mtcmpf", XSPR(31,467,153), XSPR_MASK, PPC860, { RS } }, 3861130561Sobrien{ "mtcmpg", XSPR(31,467,154), XSPR_MASK, PPC860, { RS } }, 3862130561Sobrien{ "mtcmph", XSPR(31,467,155), XSPR_MASK, PPC860, { RS } }, 3863130561Sobrien{ "mtlctrl1", XSPR(31,467,156), XSPR_MASK, PPC860, { RS } }, 3864130561Sobrien{ "mtlctrl2", XSPR(31,467,157), XSPR_MASK, PPC860, { RS } }, 3865130561Sobrien{ "mtictrl", XSPR(31,467,158), XSPR_MASK, PPC860, { RS } }, 3866130561Sobrien{ "mtbar", XSPR(31,467,159), XSPR_MASK, PPC860, { RS } }, 3867130561Sobrien{ "mtvrsave", XSPR(31,467,256), XSPR_MASK, PPCVEC, { RS } }, 3868130561Sobrien{ "mtusprg0", XSPR(31,467,256), XSPR_MASK, BOOKE, { RS } }, 3869218822Sdim{ "mtsprg", XSPR(31,467,256), XSPRG_MASK,PPC, { SPRG, RS } }, 3870130561Sobrien{ "mtsprg0", XSPR(31,467,272), XSPR_MASK, PPC, { RS } }, 3871130561Sobrien{ "mtsprg1", XSPR(31,467,273), XSPR_MASK, PPC, { RS } }, 3872130561Sobrien{ "mtsprg2", XSPR(31,467,274), XSPR_MASK, PPC, { RS } }, 3873130561Sobrien{ "mtsprg3", XSPR(31,467,275), XSPR_MASK, PPC, { RS } }, 3874130561Sobrien{ "mtsprg4", XSPR(31,467,276), XSPR_MASK, PPC405 | BOOKE, { RS } }, 3875130561Sobrien{ "mtsprg5", XSPR(31,467,277), XSPR_MASK, PPC405 | BOOKE, { RS } }, 3876130561Sobrien{ "mtsprg6", XSPR(31,467,278), XSPR_MASK, PPC405 | BOOKE, { RS } }, 3877130561Sobrien{ "mtsprg7", XSPR(31,467,279), XSPR_MASK, PPC405 | BOOKE, { RS } }, 3878130561Sobrien{ "mtasr", XSPR(31,467,280), XSPR_MASK, PPC64, { RS } }, 3879130561Sobrien{ "mtear", XSPR(31,467,282), XSPR_MASK, PPC, { RS } }, 3880130561Sobrien{ "mttbl", XSPR(31,467,284), XSPR_MASK, PPC, { RS } }, 3881130561Sobrien{ "mttbu", XSPR(31,467,285), XSPR_MASK, PPC, { RS } }, 3882130561Sobrien{ "mtdbsr", XSPR(31,467,304), XSPR_MASK, BOOKE, { RS } }, 3883130561Sobrien{ "mtdbsr", XSPR(31,467,1008), XSPR_MASK, PPC403, { RS } }, 3884130561Sobrien{ "mtdbcr0", XSPR(31,467,308), XSPR_MASK, BOOKE, { RS } }, 3885130561Sobrien{ "mtdbcr0", XSPR(31,467,1010), XSPR_MASK, PPC405, { RS } }, 3886130561Sobrien{ "mtdbcr1", XSPR(31,467,309), XSPR_MASK, BOOKE, { RS } }, 3887130561Sobrien{ "mtdbcr1", XSPR(31,467,957), XSPR_MASK, PPC405, { RS } }, 3888130561Sobrien{ "mtdbcr2", XSPR(31,467,310), XSPR_MASK, BOOKE, { RS } }, 3889130561Sobrien{ "mtiac1", XSPR(31,467,312), XSPR_MASK, BOOKE, { RS } }, 3890130561Sobrien{ "mtiac1", XSPR(31,467,1012), XSPR_MASK, PPC403, { RS } }, 3891130561Sobrien{ "mtiac2", XSPR(31,467,313), XSPR_MASK, BOOKE, { RS } }, 3892130561Sobrien{ "mtiac2", XSPR(31,467,1013), XSPR_MASK, PPC403, { RS } }, 3893130561Sobrien{ "mtiac3", XSPR(31,467,314), XSPR_MASK, BOOKE, { RS } }, 3894130561Sobrien{ "mtiac3", XSPR(31,467,948), XSPR_MASK, PPC405, { RS } }, 3895130561Sobrien{ "mtiac4", XSPR(31,467,315), XSPR_MASK, BOOKE, { RS } }, 3896130561Sobrien{ "mtiac4", XSPR(31,467,949), XSPR_MASK, PPC405, { RS } }, 3897130561Sobrien{ "mtdac1", XSPR(31,467,316), XSPR_MASK, BOOKE, { RS } }, 3898130561Sobrien{ "mtdac1", XSPR(31,467,1014), XSPR_MASK, PPC403, { RS } }, 3899130561Sobrien{ "mtdac2", XSPR(31,467,317), XSPR_MASK, BOOKE, { RS } }, 3900130561Sobrien{ "mtdac2", XSPR(31,467,1015), XSPR_MASK, PPC403, { RS } }, 3901130561Sobrien{ "mtdvc1", XSPR(31,467,318), XSPR_MASK, BOOKE, { RS } }, 3902130561Sobrien{ "mtdvc1", XSPR(31,467,950), XSPR_MASK, PPC405, { RS } }, 3903130561Sobrien{ "mtdvc2", XSPR(31,467,319), XSPR_MASK, BOOKE, { RS } }, 3904130561Sobrien{ "mtdvc2", XSPR(31,467,951), XSPR_MASK, PPC405, { RS } }, 3905130561Sobrien{ "mttsr", XSPR(31,467,336), XSPR_MASK, BOOKE, { RS } }, 3906130561Sobrien{ "mttsr", XSPR(31,467,984), XSPR_MASK, PPC403, { RS } }, 3907130561Sobrien{ "mttcr", XSPR(31,467,340), XSPR_MASK, BOOKE, { RS } }, 3908130561Sobrien{ "mttcr", XSPR(31,467,986), XSPR_MASK, PPC403, { RS } }, 3909130561Sobrien{ "mtivor0", XSPR(31,467,400), XSPR_MASK, BOOKE, { RS } }, 3910130561Sobrien{ "mtivor1", XSPR(31,467,401), XSPR_MASK, BOOKE, { RS } }, 3911130561Sobrien{ "mtivor2", XSPR(31,467,402), XSPR_MASK, BOOKE, { RS } }, 3912130561Sobrien{ "mtivor3", XSPR(31,467,403), XSPR_MASK, BOOKE, { RS } }, 3913130561Sobrien{ "mtivor4", XSPR(31,467,404), XSPR_MASK, BOOKE, { RS } }, 3914130561Sobrien{ "mtivor5", XSPR(31,467,405), XSPR_MASK, BOOKE, { RS } }, 3915130561Sobrien{ "mtivor6", XSPR(31,467,406), XSPR_MASK, BOOKE, { RS } }, 3916130561Sobrien{ "mtivor7", XSPR(31,467,407), XSPR_MASK, BOOKE, { RS } }, 3917130561Sobrien{ "mtivor8", XSPR(31,467,408), XSPR_MASK, BOOKE, { RS } }, 3918130561Sobrien{ "mtivor9", XSPR(31,467,409), XSPR_MASK, BOOKE, { RS } }, 3919130561Sobrien{ "mtivor10", XSPR(31,467,410), XSPR_MASK, BOOKE, { RS } }, 3920130561Sobrien{ "mtivor11", XSPR(31,467,411), XSPR_MASK, BOOKE, { RS } }, 3921130561Sobrien{ "mtivor12", XSPR(31,467,412), XSPR_MASK, BOOKE, { RS } }, 3922130561Sobrien{ "mtivor13", XSPR(31,467,413), XSPR_MASK, BOOKE, { RS } }, 3923130561Sobrien{ "mtivor14", XSPR(31,467,414), XSPR_MASK, BOOKE, { RS } }, 3924130561Sobrien{ "mtivor15", XSPR(31,467,415), XSPR_MASK, BOOKE, { RS } }, 3925130561Sobrien{ "mtspefscr", XSPR(31,467,512), XSPR_MASK, PPCSPE, { RS } }, 3926130561Sobrien{ "mtbbear", XSPR(31,467,513), XSPR_MASK, PPCBRLK, { RS } }, 3927130561Sobrien{ "mtbbtar", XSPR(31,467,514), XSPR_MASK, PPCBRLK, { RS } }, 3928130561Sobrien{ "mtivor32", XSPR(31,467,528), XSPR_MASK, PPCSPE, { RS } }, 3929130561Sobrien{ "mtivor33", XSPR(31,467,529), XSPR_MASK, PPCSPE, { RS } }, 3930130561Sobrien{ "mtivor34", XSPR(31,467,530), XSPR_MASK, PPCSPE, { RS } }, 3931130561Sobrien{ "mtivor35", XSPR(31,467,531), XSPR_MASK, PPCPMR, { RS } }, 3932130561Sobrien{ "mtibatu", XSPR(31,467,528), XSPRBAT_MASK, PPC, { SPRBAT, RS } }, 3933130561Sobrien{ "mtibatl", XSPR(31,467,529), XSPRBAT_MASK, PPC, { SPRBAT, RS } }, 3934130561Sobrien{ "mtdbatu", XSPR(31,467,536), XSPRBAT_MASK, PPC, { SPRBAT, RS } }, 3935130561Sobrien{ "mtdbatl", XSPR(31,467,537), XSPRBAT_MASK, PPC, { SPRBAT, RS } }, 3936130561Sobrien{ "mtmcsrr0", XSPR(31,467,570), XSPR_MASK, PPCRFMCI, { RS } }, 3937130561Sobrien{ "mtmcsrr1", XSPR(31,467,571), XSPR_MASK, PPCRFMCI, { RS } }, 3938130561Sobrien{ "mtmcsr", XSPR(31,467,572), XSPR_MASK, PPCRFMCI, { RS } }, 3939130561Sobrien{ "mtummcr0", XSPR(31,467,936), XSPR_MASK, PPC750, { RS } }, 3940130561Sobrien{ "mtupmc1", XSPR(31,467,937), XSPR_MASK, PPC750, { RS } }, 3941130561Sobrien{ "mtupmc2", XSPR(31,467,938), XSPR_MASK, PPC750, { RS } }, 3942130561Sobrien{ "mtusia", XSPR(31,467,939), XSPR_MASK, PPC750, { RS } }, 3943130561Sobrien{ "mtummcr1", XSPR(31,467,940), XSPR_MASK, PPC750, { RS } }, 3944130561Sobrien{ "mtupmc3", XSPR(31,467,941), XSPR_MASK, PPC750, { RS } }, 3945130561Sobrien{ "mtupmc4", XSPR(31,467,942), XSPR_MASK, PPC750, { RS } }, 3946130561Sobrien{ "mtzpr", XSPR(31,467,944), XSPR_MASK, PPC403, { RS } }, 3947130561Sobrien{ "mtccr0", XSPR(31,467,947), XSPR_MASK, PPC405, { RS } }, 3948130561Sobrien{ "mtmmcr0", XSPR(31,467,952), XSPR_MASK, PPC750, { RS } }, 3949130561Sobrien{ "mtsgr", XSPR(31,467,953), XSPR_MASK, PPC403, { RS } }, 3950130561Sobrien{ "mtpmc1", XSPR(31,467,953), XSPR_MASK, PPC750, { RS } }, 3951130561Sobrien{ "mtdcwr", XSPR(31,467,954), XSPR_MASK, PPC403, { RS } }, 3952130561Sobrien{ "mtpmc2", XSPR(31,467,954), XSPR_MASK, PPC750, { RS } }, 3953130561Sobrien{ "mtsler", XSPR(31,467,955), XSPR_MASK, PPC405, { RS } }, 3954130561Sobrien{ "mtsia", XSPR(31,467,955), XSPR_MASK, PPC750, { RS } }, 3955130561Sobrien{ "mtsu0r", XSPR(31,467,956), XSPR_MASK, PPC405, { RS } }, 3956130561Sobrien{ "mtmmcr1", XSPR(31,467,956), XSPR_MASK, PPC750, { RS } }, 3957130561Sobrien{ "mtpmc3", XSPR(31,467,957), XSPR_MASK, PPC750, { RS } }, 3958130561Sobrien{ "mtpmc4", XSPR(31,467,958), XSPR_MASK, PPC750, { RS } }, 3959130561Sobrien{ "mticdbdr", XSPR(31,467,979), XSPR_MASK, PPC403, { RS } }, 3960130561Sobrien{ "mtevpr", XSPR(31,467,982), XSPR_MASK, PPC403, { RS } }, 3961130561Sobrien{ "mtcdbcr", XSPR(31,467,983), XSPR_MASK, PPC403, { RS } }, 3962130561Sobrien{ "mtpit", XSPR(31,467,987), XSPR_MASK, PPC403, { RS } }, 3963130561Sobrien{ "mttbhi", XSPR(31,467,988), XSPR_MASK, PPC403, { RS } }, 3964130561Sobrien{ "mttblo", XSPR(31,467,989), XSPR_MASK, PPC403, { RS } }, 3965130561Sobrien{ "mtsrr2", XSPR(31,467,990), XSPR_MASK, PPC403, { RS } }, 3966130561Sobrien{ "mtsrr3", XSPR(31,467,991), XSPR_MASK, PPC403, { RS } }, 3967130561Sobrien{ "mtl2cr", XSPR(31,467,1017), XSPR_MASK, PPC750, { RS } }, 3968130561Sobrien{ "mtdccr", XSPR(31,467,1018), XSPR_MASK, PPC403, { RS } }, 3969130561Sobrien{ "mticcr", XSPR(31,467,1019), XSPR_MASK, PPC403, { RS } }, 3970130561Sobrien{ "mtictc", XSPR(31,467,1019), XSPR_MASK, PPC750, { RS } }, 3971130561Sobrien{ "mtpbl1", XSPR(31,467,1020), XSPR_MASK, PPC403, { RS } }, 3972130561Sobrien{ "mtthrm1", XSPR(31,467,1020), XSPR_MASK, PPC750, { RS } }, 3973130561Sobrien{ "mtpbu1", XSPR(31,467,1021), XSPR_MASK, PPC403, { RS } }, 3974130561Sobrien{ "mtthrm2", XSPR(31,467,1021), XSPR_MASK, PPC750, { RS } }, 3975130561Sobrien{ "mtpbl2", XSPR(31,467,1022), XSPR_MASK, PPC403, { RS } }, 3976130561Sobrien{ "mtthrm3", XSPR(31,467,1022), XSPR_MASK, PPC750, { RS } }, 3977130561Sobrien{ "mtpbu2", XSPR(31,467,1023), XSPR_MASK, PPC403, { RS } }, 3978130561Sobrien{ "mtspr", X(31,467), X_MASK, COM, { SPR, RS } }, 397960484Sobrien 398060484Sobrien{ "dcbi", X(31,470), XRT_MASK, PPC, { RA, RB } }, 398160484Sobrien 398260484Sobrien{ "nand", XRC(31,476,0), X_MASK, COM, { RA, RS, RB } }, 398360484Sobrien{ "nand.", XRC(31,476,1), X_MASK, COM, { RA, RS, RB } }, 398460484Sobrien 398589857Sobrien{ "dcbie", X(31,478), XRT_MASK, BOOKE64, { RA, RB } }, 398689857Sobrien 3987130561Sobrien{ "dcread", X(31,486), X_MASK, PPC403|PPC440, { RT, RA, RB }}, 398860484Sobrien 3989130561Sobrien{ "mtpmr", X(31,462), X_MASK, PPCPMR, { PMR, RS }}, 3990130561Sobrien 3991130561Sobrien{ "icbtls", X(31,486), X_MASK, PPCCHLK, { CT, RA, RB }}, 3992130561Sobrien 399360484Sobrien{ "nabs", XO(31,488,0,0), XORB_MASK, M601, { RT, RA } }, 399489857Sobrien{ "subfme64",XO(31,488,0,0), XORB_MASK, BOOKE64, { RT, RA } }, 399560484Sobrien{ "nabs.", XO(31,488,0,1), XORB_MASK, M601, { RT, RA } }, 399660484Sobrien{ "nabso", XO(31,488,1,0), XORB_MASK, M601, { RT, RA } }, 399789857Sobrien{ "subfme64o",XO(31,488,1,0), XORB_MASK, BOOKE64, { RT, RA } }, 399860484Sobrien{ "nabso.", XO(31,488,1,1), XORB_MASK, M601, { RT, RA } }, 399960484Sobrien 400060484Sobrien{ "divd", XO(31,489,0,0), XO_MASK, PPC64, { RT, RA, RB } }, 400160484Sobrien{ "divd.", XO(31,489,0,1), XO_MASK, PPC64, { RT, RA, RB } }, 400260484Sobrien{ "divdo", XO(31,489,1,0), XO_MASK, PPC64, { RT, RA, RB } }, 400360484Sobrien{ "divdo.", XO(31,489,1,1), XO_MASK, PPC64, { RT, RA, RB } }, 400460484Sobrien 400589857Sobrien{ "addme64", XO(31,490,0,0), XORB_MASK, BOOKE64, { RT, RA } }, 400689857Sobrien{ "addme64o",XO(31,490,1,0), XORB_MASK, BOOKE64, { RT, RA } }, 400789857Sobrien 400860484Sobrien{ "divw", XO(31,491,0,0), XO_MASK, PPC, { RT, RA, RB } }, 400960484Sobrien{ "divw.", XO(31,491,0,1), XO_MASK, PPC, { RT, RA, RB } }, 401060484Sobrien{ "divwo", XO(31,491,1,0), XO_MASK, PPC, { RT, RA, RB } }, 401160484Sobrien{ "divwo.", XO(31,491,1,1), XO_MASK, PPC, { RT, RA, RB } }, 401260484Sobrien 4013130561Sobrien{ "icbtlse", X(31,494), X_MASK, PPCCHLK64, { CT, RA, RB }}, 4014130561Sobrien 401560484Sobrien{ "slbia", X(31,498), 0xffffffff, PPC64, { 0 } }, 401660484Sobrien 401760484Sobrien{ "cli", X(31,502), XRB_MASK, POWER, { RT, RA } }, 401860484Sobrien 401989857Sobrien{ "stdcxe.", XRC(31,511,1), X_MASK, BOOKE64, { RS, RA, RB } }, 402089857Sobrien 402160484Sobrien{ "mcrxr", X(31,512), XRARB_MASK|(3<<21), COM, { BF } }, 402260484Sobrien 4023130561Sobrien{ "bblels", X(31,518), X_MASK, PPCBRLK, { 0 }}, 4024130561Sobrien{ "mcrxr64", X(31,544), XRARB_MASK|(3<<21), BOOKE64, { BF } }, 402589857Sobrien 402660484Sobrien{ "clcs", X(31,531), XRB_MASK, M601, { RT, RA } }, 402760484Sobrien 4028218822Sdim{ "ldbrx", X(31,532), X_MASK, CELL, { RT, RA0, RB } }, 4029218822Sdim 4030130561Sobrien{ "lswx", X(31,533), X_MASK, PPCCOM, { RT, RA0, RB } }, 403160484Sobrien{ "lsx", X(31,533), X_MASK, PWRCOM, { RT, RA, RB } }, 403260484Sobrien 4033130561Sobrien{ "lwbrx", X(31,534), X_MASK, PPCCOM, { RT, RA0, RB } }, 403460484Sobrien{ "lbrx", X(31,534), X_MASK, PWRCOM, { RT, RA, RB } }, 403560484Sobrien 4036130561Sobrien{ "lfsx", X(31,535), X_MASK, COM, { FRT, RA0, RB } }, 403760484Sobrien 403860484Sobrien{ "srw", XRC(31,536,0), X_MASK, PPCCOM, { RA, RS, RB } }, 403960484Sobrien{ "sr", XRC(31,536,0), X_MASK, PWRCOM, { RA, RS, RB } }, 404060484Sobrien{ "srw.", XRC(31,536,1), X_MASK, PPCCOM, { RA, RS, RB } }, 404160484Sobrien{ "sr.", XRC(31,536,1), X_MASK, PWRCOM, { RA, RS, RB } }, 404260484Sobrien 404360484Sobrien{ "rrib", XRC(31,537,0), X_MASK, M601, { RA, RS, RB } }, 404460484Sobrien{ "rrib.", XRC(31,537,1), X_MASK, M601, { RA, RS, RB } }, 404560484Sobrien 404660484Sobrien{ "srd", XRC(31,539,0), X_MASK, PPC64, { RA, RS, RB } }, 404760484Sobrien{ "srd.", XRC(31,539,1), X_MASK, PPC64, { RA, RS, RB } }, 404860484Sobrien 404960484Sobrien{ "maskir", XRC(31,541,0), X_MASK, M601, { RA, RS, RB } }, 405060484Sobrien{ "maskir.", XRC(31,541,1), X_MASK, M601, { RA, RS, RB } }, 405160484Sobrien 4052130561Sobrien{ "lwbrxe", X(31,542), X_MASK, BOOKE64, { RT, RA0, RB } }, 405389857Sobrien 4054130561Sobrien{ "lfsxe", X(31,543), X_MASK, BOOKE64, { FRT, RA0, RB } }, 405589857Sobrien 4056130561Sobrien{ "bbelr", X(31,550), X_MASK, PPCBRLK, { 0 }}, 4057130561Sobrien 405860484Sobrien{ "tlbsync", X(31,566), 0xffffffff, PPC, { 0 } }, 405960484Sobrien 406060484Sobrien{ "lfsux", X(31,567), X_MASK, COM, { FRT, RAS, RB } }, 406160484Sobrien 406289857Sobrien{ "lfsuxe", X(31,575), X_MASK, BOOKE64, { FRT, RAS, RB } }, 406389857Sobrien 406460484Sobrien{ "mfsr", X(31,595), XRB_MASK|(1<<20), COM32, { RT, SR } }, 406560484Sobrien 4066130561Sobrien{ "lswi", X(31,597), X_MASK, PPCCOM, { RT, RA0, NB } }, 4067130561Sobrien{ "lsi", X(31,597), X_MASK, PWRCOM, { RT, RA0, NB } }, 406860484Sobrien 4069130561Sobrien{ "lwsync", XSYNC(31,598,1), 0xffffffff, PPC, { 0 } }, 407089857Sobrien{ "ptesync", XSYNC(31,598,2), 0xffffffff, PPC64, { 0 } }, 4071130561Sobrien{ "msync", X(31,598), 0xffffffff, BOOKE, { 0 } }, 407289857Sobrien{ "sync", X(31,598), XSYNC_MASK, PPCCOM, { LS } }, 407360484Sobrien{ "dcs", X(31,598), 0xffffffff, PWRCOM, { 0 } }, 407460484Sobrien 4075130561Sobrien{ "lfdx", X(31,599), X_MASK, COM, { FRT, RA0, RB } }, 407660484Sobrien 4077130561Sobrien{ "lfdxe", X(31,607), X_MASK, BOOKE64, { FRT, RA0, RB } }, 407889857Sobrien 4079218822Sdim{ "mffgpr", XRC(31,607,0), XRA_MASK, POWER6, { FRT, RB } }, 4080218822Sdim 408160484Sobrien{ "mfsri", X(31,627), X_MASK, PWRCOM, { RT, RA, RB } }, 408260484Sobrien 408360484Sobrien{ "dclst", X(31,630), XRB_MASK, PWRCOM, { RS, RA } }, 408460484Sobrien 408560484Sobrien{ "lfdux", X(31,631), X_MASK, COM, { FRT, RAS, RB } }, 408660484Sobrien 408789857Sobrien{ "lfduxe", X(31,639), X_MASK, BOOKE64, { FRT, RAS, RB } }, 408889857Sobrien 408960484Sobrien{ "mfsrin", X(31,659), XRA_MASK, PPC32, { RT, RB } }, 409060484Sobrien 4091218822Sdim{ "stdbrx", X(31,660), X_MASK, CELL, { RS, RA0, RB } }, 4092218822Sdim 4093130561Sobrien{ "stswx", X(31,661), X_MASK, PPCCOM, { RS, RA0, RB } }, 4094130561Sobrien{ "stsx", X(31,661), X_MASK, PWRCOM, { RS, RA0, RB } }, 409560484Sobrien 4096130561Sobrien{ "stwbrx", X(31,662), X_MASK, PPCCOM, { RS, RA0, RB } }, 4097130561Sobrien{ "stbrx", X(31,662), X_MASK, PWRCOM, { RS, RA0, RB } }, 409860484Sobrien 4099130561Sobrien{ "stfsx", X(31,663), X_MASK, COM, { FRS, RA0, RB } }, 410060484Sobrien 410160484Sobrien{ "srq", XRC(31,664,0), X_MASK, M601, { RA, RS, RB } }, 410260484Sobrien{ "srq.", XRC(31,664,1), X_MASK, M601, { RA, RS, RB } }, 410360484Sobrien 410460484Sobrien{ "sre", XRC(31,665,0), X_MASK, M601, { RA, RS, RB } }, 410560484Sobrien{ "sre.", XRC(31,665,1), X_MASK, M601, { RA, RS, RB } }, 410660484Sobrien 4107130561Sobrien{ "stwbrxe", X(31,670), X_MASK, BOOKE64, { RS, RA0, RB } }, 410889857Sobrien 4109130561Sobrien{ "stfsxe", X(31,671), X_MASK, BOOKE64, { FRS, RA0, RB } }, 411089857Sobrien 411160484Sobrien{ "stfsux", X(31,695), X_MASK, COM, { FRS, RAS, RB } }, 411260484Sobrien 411360484Sobrien{ "sriq", XRC(31,696,0), X_MASK, M601, { RA, RS, SH } }, 411460484Sobrien{ "sriq.", XRC(31,696,1), X_MASK, M601, { RA, RS, SH } }, 411560484Sobrien 411689857Sobrien{ "stfsuxe", X(31,703), X_MASK, BOOKE64, { FRS, RAS, RB } }, 411789857Sobrien 4118130561Sobrien{ "stswi", X(31,725), X_MASK, PPCCOM, { RS, RA0, NB } }, 4119130561Sobrien{ "stsi", X(31,725), X_MASK, PWRCOM, { RS, RA0, NB } }, 412060484Sobrien 4121130561Sobrien{ "stfdx", X(31,727), X_MASK, COM, { FRS, RA0, RB } }, 412260484Sobrien 412360484Sobrien{ "srlq", XRC(31,728,0), X_MASK, M601, { RA, RS, RB } }, 412460484Sobrien{ "srlq.", XRC(31,728,1), X_MASK, M601, { RA, RS, RB } }, 412560484Sobrien 412660484Sobrien{ "sreq", XRC(31,729,0), X_MASK, M601, { RA, RS, RB } }, 412760484Sobrien{ "sreq.", XRC(31,729,1), X_MASK, M601, { RA, RS, RB } }, 412860484Sobrien 4129130561Sobrien{ "stfdxe", X(31,735), X_MASK, BOOKE64, { FRS, RA0, RB } }, 413089857Sobrien 4131218822Sdim{ "mftgpr", XRC(31,735,0), XRA_MASK, POWER6, { RT, FRB } }, 4132218822Sdim 4133130561Sobrien{ "dcba", X(31,758), XRT_MASK, PPC405 | BOOKE, { RA, RB } }, 413477298Sobrien 413560484Sobrien{ "stfdux", X(31,759), X_MASK, COM, { FRS, RAS, RB } }, 413660484Sobrien 413760484Sobrien{ "srliq", XRC(31,760,0), X_MASK, M601, { RA, RS, SH } }, 413860484Sobrien{ "srliq.", XRC(31,760,1), X_MASK, M601, { RA, RS, SH } }, 413960484Sobrien 414089857Sobrien{ "dcbae", X(31,766), XRT_MASK, BOOKE64, { RA, RB } }, 414189857Sobrien 414289857Sobrien{ "stfduxe", X(31,767), X_MASK, BOOKE64, { FRS, RAS, RB } }, 414389857Sobrien 414489857Sobrien{ "tlbivax", X(31,786), XRT_MASK, BOOKE, { RA, RB } }, 4145130561Sobrien{ "tlbivaxe",X(31,787), XRT_MASK, BOOKE64, { RA, RB } }, 414689857Sobrien 4147218822Sdim{ "lwzcix", X(31,789), X_MASK, POWER6, { RT, RA0, RB } }, 4148218822Sdim 4149130561Sobrien{ "lhbrx", X(31,790), X_MASK, COM, { RT, RA0, RB } }, 415060484Sobrien 415160484Sobrien{ "sraw", XRC(31,792,0), X_MASK, PPCCOM, { RA, RS, RB } }, 415260484Sobrien{ "sra", XRC(31,792,0), X_MASK, PWRCOM, { RA, RS, RB } }, 415360484Sobrien{ "sraw.", XRC(31,792,1), X_MASK, PPCCOM, { RA, RS, RB } }, 415460484Sobrien{ "sra.", XRC(31,792,1), X_MASK, PWRCOM, { RA, RS, RB } }, 415560484Sobrien 415660484Sobrien{ "srad", XRC(31,794,0), X_MASK, PPC64, { RA, RS, RB } }, 415760484Sobrien{ "srad.", XRC(31,794,1), X_MASK, PPC64, { RA, RS, RB } }, 415860484Sobrien 4159130561Sobrien{ "lhbrxe", X(31,798), X_MASK, BOOKE64, { RT, RA0, RB } }, 416089857Sobrien 4161130561Sobrien{ "ldxe", X(31,799), X_MASK, BOOKE64, { RT, RA0, RB } }, 4162130561Sobrien{ "lduxe", X(31,831), X_MASK, BOOKE64, { RT, RA0, RB } }, 416389857Sobrien 416460484Sobrien{ "rac", X(31,818), X_MASK, PWRCOM, { RT, RA, RB } }, 416560484Sobrien 4166218822Sdim{ "lhzcix", X(31,821), X_MASK, POWER6, { RT, RA0, RB } }, 4167218822Sdim 416889857Sobrien{ "dss", XDSS(31,822,0), XDSS_MASK, PPCVEC, { STRM } }, 416999461Sobrien{ "dssall", XDSS(31,822,1), XDSS_MASK, PPCVEC, { 0 } }, 417089857Sobrien 417160484Sobrien{ "srawi", XRC(31,824,0), X_MASK, PPCCOM, { RA, RS, SH } }, 417260484Sobrien{ "srai", XRC(31,824,0), X_MASK, PWRCOM, { RA, RS, SH } }, 417360484Sobrien{ "srawi.", XRC(31,824,1), X_MASK, PPCCOM, { RA, RS, SH } }, 417460484Sobrien{ "srai.", XRC(31,824,1), X_MASK, PWRCOM, { RA, RS, SH } }, 417560484Sobrien 417689857Sobrien{ "slbmfev", X(31,851), XRA_MASK, PPC64, { RT, RB } }, 417789857Sobrien 4178218822Sdim{ "lbzcix", X(31,853), X_MASK, POWER6, { RT, RA0, RB } }, 4179218822Sdim 4180130561Sobrien{ "mbar", X(31,854), X_MASK, BOOKE, { MO } }, 418160484Sobrien{ "eieio", X(31,854), 0xffffffff, PPC, { 0 } }, 418260484Sobrien 4183218822Sdim{ "lfiwax", X(31,855), X_MASK, POWER6, { FRT, RA0, RB } }, 418460484Sobrien 4185218822Sdim{ "ldcix", X(31,885), X_MASK, POWER6, { RT, RA0, RB } }, 4186218822Sdim 4187218822Sdim{ "tlbsx", XRC(31,914,0), X_MASK, PPC403|BOOKE, { RTO, RA, RB } }, 4188218822Sdim{ "tlbsx.", XRC(31,914,1), X_MASK, PPC403|BOOKE, { RTO, RA, RB } }, 4189218822Sdim{ "tlbsxe", XRC(31,915,0), X_MASK, BOOKE64, { RTO, RA, RB } }, 4190218822Sdim{ "tlbsxe.", XRC(31,915,1), X_MASK, BOOKE64, { RTO, RA, RB } }, 4191218822Sdim 419289857Sobrien{ "slbmfee", X(31,915), XRA_MASK, PPC64, { RT, RB } }, 419389857Sobrien 4194218822Sdim{ "stwcix", X(31,917), X_MASK, POWER6, { RS, RA0, RB } }, 4195218822Sdim 4196130561Sobrien{ "sthbrx", X(31,918), X_MASK, COM, { RS, RA0, RB } }, 419760484Sobrien 419860484Sobrien{ "sraq", XRC(31,920,0), X_MASK, M601, { RA, RS, RB } }, 419960484Sobrien{ "sraq.", XRC(31,920,1), X_MASK, M601, { RA, RS, RB } }, 420060484Sobrien 420160484Sobrien{ "srea", XRC(31,921,0), X_MASK, M601, { RA, RS, RB } }, 420260484Sobrien{ "srea.", XRC(31,921,1), X_MASK, M601, { RA, RS, RB } }, 420360484Sobrien 420460484Sobrien{ "extsh", XRC(31,922,0), XRB_MASK, PPCCOM, { RA, RS } }, 420560484Sobrien{ "exts", XRC(31,922,0), XRB_MASK, PWRCOM, { RA, RS } }, 420660484Sobrien{ "extsh.", XRC(31,922,1), XRB_MASK, PPCCOM, { RA, RS } }, 420760484Sobrien{ "exts.", XRC(31,922,1), XRB_MASK, PWRCOM, { RA, RS } }, 420860484Sobrien 4209130561Sobrien{ "sthbrxe", X(31,926), X_MASK, BOOKE64, { RS, RA0, RB } }, 421089857Sobrien 4211130561Sobrien{ "stdxe", X(31,927), X_MASK, BOOKE64, { RS, RA0, RB } }, 421289857Sobrien 421377298Sobrien{ "tlbrehi", XTLB(31,946,0), XTLB_MASK, PPC403, { RT, RA } }, 421477298Sobrien{ "tlbrelo", XTLB(31,946,1), XTLB_MASK, PPC403, { RT, RA } }, 4215218822Sdim{ "tlbre", X(31,946), X_MASK, PPC403|BOOKE, { RSO, RAOPT, SHO } }, 421660484Sobrien 4217218822Sdim{ "sthcix", X(31,949), X_MASK, POWER6, { RS, RA0, RB } }, 4218218822Sdim 421960484Sobrien{ "sraiq", XRC(31,952,0), X_MASK, M601, { RA, RS, SH } }, 422060484Sobrien{ "sraiq.", XRC(31,952,1), X_MASK, M601, { RA, RS, SH } }, 422160484Sobrien 422260484Sobrien{ "extsb", XRC(31,954,0), XRB_MASK, PPC, { RA, RS} }, 422360484Sobrien{ "extsb.", XRC(31,954,1), XRB_MASK, PPC, { RA, RS} }, 422460484Sobrien 422589857Sobrien{ "stduxe", X(31,959), X_MASK, BOOKE64, { RS, RAS, RB } }, 422689857Sobrien 4227130561Sobrien{ "iccci", X(31,966), XRT_MASK, PPC403|PPC440, { RA, RB } }, 422860484Sobrien 422977298Sobrien{ "tlbwehi", XTLB(31,978,0), XTLB_MASK, PPC403, { RT, RA } }, 423077298Sobrien{ "tlbwelo", XTLB(31,978,1), XTLB_MASK, PPC403, { RT, RA } }, 4231130561Sobrien{ "tlbwe", X(31,978), X_MASK, PPC403|BOOKE, { RSO, RAOPT, SHO } }, 4232130561Sobrien{ "tlbld", X(31,978), XRTRA_MASK, PPC, { RB } }, 423360484Sobrien 4234218822Sdim{ "stbcix", X(31,981), X_MASK, POWER6, { RS, RA0, RB } }, 4235218822Sdim 423660484Sobrien{ "icbi", X(31,982), XRT_MASK, PPC, { RA, RB } }, 423760484Sobrien 4238130561Sobrien{ "stfiwx", X(31,983), X_MASK, PPC, { FRS, RA0, RB } }, 423960484Sobrien 4240130561Sobrien{ "extsw", XRC(31,986,0), XRB_MASK, PPC64 | BOOKE64,{ RA, RS } }, 4241130561Sobrien{ "extsw.", XRC(31,986,1), XRB_MASK, PPC64, { RA, RS } }, 424260484Sobrien 4243130561Sobrien{ "icread", X(31,998), XRT_MASK, PPC403|PPC440, { RA, RB } }, 424460484Sobrien 424589857Sobrien{ "icbie", X(31,990), XRT_MASK, BOOKE64, { RA, RB } }, 4246130561Sobrien{ "stfiwxe", X(31,991), X_MASK, BOOKE64, { FRS, RA0, RB } }, 424789857Sobrien 424860484Sobrien{ "tlbli", X(31,1010), XRTRA_MASK, PPC, { RB } }, 424960484Sobrien 4250218822Sdim{ "stdcix", X(31,1013), X_MASK, POWER6, { RS, RA0, RB } }, 4251218822Sdim 4252218822Sdim{ "dcbzl", XOPL(31,1014,1), XRT_MASK,POWER4, { RA, RB } }, 425360484Sobrien{ "dcbz", X(31,1014), XRT_MASK, PPC, { RA, RB } }, 425460484Sobrien{ "dclz", X(31,1014), XRT_MASK, PPC, { RA, RB } }, 425560484Sobrien 425689857Sobrien{ "dcbze", X(31,1022), XRT_MASK, BOOKE64, { RA, RB } }, 425789857Sobrien 425877298Sobrien{ "lvebx", X(31, 7), X_MASK, PPCVEC, { VD, RA, RB } }, 425977298Sobrien{ "lvehx", X(31, 39), X_MASK, PPCVEC, { VD, RA, RB } }, 426077298Sobrien{ "lvewx", X(31, 71), X_MASK, PPCVEC, { VD, RA, RB } }, 426177298Sobrien{ "lvsl", X(31, 6), X_MASK, PPCVEC, { VD, RA, RB } }, 426277298Sobrien{ "lvsr", X(31, 38), X_MASK, PPCVEC, { VD, RA, RB } }, 426377298Sobrien{ "lvx", X(31, 103), X_MASK, PPCVEC, { VD, RA, RB } }, 426477298Sobrien{ "lvxl", X(31, 359), X_MASK, PPCVEC, { VD, RA, RB } }, 426577298Sobrien{ "stvebx", X(31, 135), X_MASK, PPCVEC, { VS, RA, RB } }, 426677298Sobrien{ "stvehx", X(31, 167), X_MASK, PPCVEC, { VS, RA, RB } }, 426777298Sobrien{ "stvewx", X(31, 199), X_MASK, PPCVEC, { VS, RA, RB } }, 426877298Sobrien{ "stvx", X(31, 231), X_MASK, PPCVEC, { VS, RA, RB } }, 426977298Sobrien{ "stvxl", X(31, 487), X_MASK, PPCVEC, { VS, RA, RB } }, 427077298Sobrien 4271218822Sdim/* New load/store left/right index vector instructions that are in the Cell only. */ 4272218822Sdim{ "lvlx", X(31, 519), X_MASK, CELL, { VD, RA0, RB } }, 4273218822Sdim{ "lvlxl", X(31, 775), X_MASK, CELL, { VD, RA0, RB } }, 4274218822Sdim{ "lvrx", X(31, 551), X_MASK, CELL, { VD, RA0, RB } }, 4275218822Sdim{ "lvrxl", X(31, 807), X_MASK, CELL, { VD, RA0, RB } }, 4276218822Sdim{ "stvlx", X(31, 647), X_MASK, CELL, { VS, RA0, RB } }, 4277218822Sdim{ "stvlxl", X(31, 903), X_MASK, CELL, { VS, RA0, RB } }, 4278218822Sdim{ "stvrx", X(31, 679), X_MASK, CELL, { VS, RA0, RB } }, 4279218822Sdim{ "stvrxl", X(31, 935), X_MASK, CELL, { VS, RA0, RB } }, 4280218822Sdim 4281130561Sobrien{ "lwz", OP(32), OP_MASK, PPCCOM, { RT, D, RA0 } }, 4282130561Sobrien{ "l", OP(32), OP_MASK, PWRCOM, { RT, D, RA0 } }, 428360484Sobrien 428460484Sobrien{ "lwzu", OP(33), OP_MASK, PPCCOM, { RT, D, RAL } }, 4285130561Sobrien{ "lu", OP(33), OP_MASK, PWRCOM, { RT, D, RA0 } }, 428660484Sobrien 4287130561Sobrien{ "lbz", OP(34), OP_MASK, COM, { RT, D, RA0 } }, 428860484Sobrien 428960484Sobrien{ "lbzu", OP(35), OP_MASK, COM, { RT, D, RAL } }, 429060484Sobrien 4291130561Sobrien{ "stw", OP(36), OP_MASK, PPCCOM, { RS, D, RA0 } }, 4292130561Sobrien{ "st", OP(36), OP_MASK, PWRCOM, { RS, D, RA0 } }, 429360484Sobrien 429460484Sobrien{ "stwu", OP(37), OP_MASK, PPCCOM, { RS, D, RAS } }, 4295130561Sobrien{ "stu", OP(37), OP_MASK, PWRCOM, { RS, D, RA0 } }, 429660484Sobrien 4297130561Sobrien{ "stb", OP(38), OP_MASK, COM, { RS, D, RA0 } }, 429860484Sobrien 429960484Sobrien{ "stbu", OP(39), OP_MASK, COM, { RS, D, RAS } }, 430060484Sobrien 4301130561Sobrien{ "lhz", OP(40), OP_MASK, COM, { RT, D, RA0 } }, 430260484Sobrien 430360484Sobrien{ "lhzu", OP(41), OP_MASK, COM, { RT, D, RAL } }, 430460484Sobrien 4305130561Sobrien{ "lha", OP(42), OP_MASK, COM, { RT, D, RA0 } }, 430660484Sobrien 430760484Sobrien{ "lhau", OP(43), OP_MASK, COM, { RT, D, RAL } }, 430860484Sobrien 4309130561Sobrien{ "sth", OP(44), OP_MASK, COM, { RS, D, RA0 } }, 431060484Sobrien 431160484Sobrien{ "sthu", OP(45), OP_MASK, COM, { RS, D, RAS } }, 431260484Sobrien 431360484Sobrien{ "lmw", OP(46), OP_MASK, PPCCOM, { RT, D, RAM } }, 4314130561Sobrien{ "lm", OP(46), OP_MASK, PWRCOM, { RT, D, RA0 } }, 431560484Sobrien 4316130561Sobrien{ "stmw", OP(47), OP_MASK, PPCCOM, { RS, D, RA0 } }, 4317130561Sobrien{ "stm", OP(47), OP_MASK, PWRCOM, { RS, D, RA0 } }, 431860484Sobrien 4319130561Sobrien{ "lfs", OP(48), OP_MASK, COM, { FRT, D, RA0 } }, 432060484Sobrien 432160484Sobrien{ "lfsu", OP(49), OP_MASK, COM, { FRT, D, RAS } }, 432260484Sobrien 4323130561Sobrien{ "lfd", OP(50), OP_MASK, COM, { FRT, D, RA0 } }, 432460484Sobrien 432560484Sobrien{ "lfdu", OP(51), OP_MASK, COM, { FRT, D, RAS } }, 432660484Sobrien 4327130561Sobrien{ "stfs", OP(52), OP_MASK, COM, { FRS, D, RA0 } }, 432860484Sobrien 432960484Sobrien{ "stfsu", OP(53), OP_MASK, COM, { FRS, D, RAS } }, 433060484Sobrien 4331130561Sobrien{ "stfd", OP(54), OP_MASK, COM, { FRS, D, RA0 } }, 433260484Sobrien 433360484Sobrien{ "stfdu", OP(55), OP_MASK, COM, { FRS, D, RAS } }, 433460484Sobrien 4335130561Sobrien{ "lq", OP(56), OP_MASK, POWER4, { RTQ, DQ, RAQ } }, 433660484Sobrien 4337130561Sobrien{ "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA0 } }, 433860484Sobrien 4339130561Sobrien{ "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA0 } }, 4340130561Sobrien 4341218822Sdim{ "lfdp", OP(57), OP_MASK, POWER6, { FRT, D, RA0 } }, 4342218822Sdim 4343130561Sobrien{ "lbze", DEO(58,0), DE_MASK, BOOKE64, { RT, DE, RA0 } }, 434489857Sobrien{ "lbzue", DEO(58,1), DE_MASK, BOOKE64, { RT, DE, RAL } }, 4345130561Sobrien{ "lhze", DEO(58,2), DE_MASK, BOOKE64, { RT, DE, RA0 } }, 434689857Sobrien{ "lhzue", DEO(58,3), DE_MASK, BOOKE64, { RT, DE, RAL } }, 4347130561Sobrien{ "lhae", DEO(58,4), DE_MASK, BOOKE64, { RT, DE, RA0 } }, 434889857Sobrien{ "lhaue", DEO(58,5), DE_MASK, BOOKE64, { RT, DE, RAL } }, 4349130561Sobrien{ "lwze", DEO(58,6), DE_MASK, BOOKE64, { RT, DE, RA0 } }, 435089857Sobrien{ "lwzue", DEO(58,7), DE_MASK, BOOKE64, { RT, DE, RAL } }, 4351130561Sobrien{ "stbe", DEO(58,8), DE_MASK, BOOKE64, { RS, DE, RA0 } }, 435289857Sobrien{ "stbue", DEO(58,9), DE_MASK, BOOKE64, { RS, DE, RAS } }, 4353130561Sobrien{ "sthe", DEO(58,10), DE_MASK, BOOKE64, { RS, DE, RA0 } }, 435489857Sobrien{ "sthue", DEO(58,11), DE_MASK, BOOKE64, { RS, DE, RAS } }, 4355130561Sobrien{ "stwe", DEO(58,14), DE_MASK, BOOKE64, { RS, DE, RA0 } }, 435689857Sobrien{ "stwue", DEO(58,15), DE_MASK, BOOKE64, { RS, DE, RAS } }, 435789857Sobrien 4358130561Sobrien{ "ld", DSO(58,0), DS_MASK, PPC64, { RT, DS, RA0 } }, 435960484Sobrien 436060484Sobrien{ "ldu", DSO(58,1), DS_MASK, PPC64, { RT, DS, RAL } }, 436160484Sobrien 4362130561Sobrien{ "lwa", DSO(58,2), DS_MASK, PPC64, { RT, DS, RA0 } }, 436360484Sobrien 4364218822Sdim{ "dadd", XRC(59,2,0), X_MASK, POWER6, { FRT, FRA, FRB } }, 4365218822Sdim{ "dadd.", XRC(59,2,1), X_MASK, POWER6, { FRT, FRA, FRB } }, 4366218822Sdim 4367218822Sdim{ "dqua", ZRC(59,3,0), Z2_MASK, POWER6, { FRT, FRA, FRB, RMC } }, 4368218822Sdim{ "dqua.", ZRC(59,3,1), Z2_MASK, POWER6, { FRT, FRA, FRB, RMC } }, 4369218822Sdim 437060484Sobrien{ "fdivs", A(59,18,0), AFRC_MASK, PPC, { FRT, FRA, FRB } }, 437160484Sobrien{ "fdivs.", A(59,18,1), AFRC_MASK, PPC, { FRT, FRA, FRB } }, 437260484Sobrien 437360484Sobrien{ "fsubs", A(59,20,0), AFRC_MASK, PPC, { FRT, FRA, FRB } }, 437460484Sobrien{ "fsubs.", A(59,20,1), AFRC_MASK, PPC, { FRT, FRA, FRB } }, 437560484Sobrien 437660484Sobrien{ "fadds", A(59,21,0), AFRC_MASK, PPC, { FRT, FRA, FRB } }, 437760484Sobrien{ "fadds.", A(59,21,1), AFRC_MASK, PPC, { FRT, FRA, FRB } }, 437860484Sobrien 437960484Sobrien{ "fsqrts", A(59,22,0), AFRAFRC_MASK, PPC, { FRT, FRB } }, 438060484Sobrien{ "fsqrts.", A(59,22,1), AFRAFRC_MASK, PPC, { FRT, FRB } }, 438160484Sobrien 4382218822Sdim{ "fres", A(59,24,0), AFRALFRC_MASK, PPC, { FRT, FRB, A_L } }, 4383218822Sdim{ "fres.", A(59,24,1), AFRALFRC_MASK, PPC, { FRT, FRB, A_L } }, 438460484Sobrien 438560484Sobrien{ "fmuls", A(59,25,0), AFRB_MASK, PPC, { FRT, FRA, FRC } }, 438660484Sobrien{ "fmuls.", A(59,25,1), AFRB_MASK, PPC, { FRT, FRA, FRC } }, 438760484Sobrien 4388218822Sdim{ "frsqrtes", A(59,26,0), AFRALFRC_MASK,POWER5, { FRT, FRB, A_L } }, 4389218822Sdim{ "frsqrtes.",A(59,26,1), AFRALFRC_MASK,POWER5, { FRT, FRB, A_L } }, 4390218822Sdim 439160484Sobrien{ "fmsubs", A(59,28,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, 439260484Sobrien{ "fmsubs.", A(59,28,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, 439360484Sobrien 439460484Sobrien{ "fmadds", A(59,29,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, 439560484Sobrien{ "fmadds.", A(59,29,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, 439660484Sobrien 439760484Sobrien{ "fnmsubs", A(59,30,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, 439860484Sobrien{ "fnmsubs.",A(59,30,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, 439960484Sobrien 440060484Sobrien{ "fnmadds", A(59,31,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, 440160484Sobrien{ "fnmadds.",A(59,31,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, 440260484Sobrien 4403218822Sdim{ "dmul", XRC(59,34,0), X_MASK, POWER6, { FRT, FRA, FRB } }, 4404218822Sdim{ "dmul.", XRC(59,34,1), X_MASK, POWER6, { FRT, FRA, FRB } }, 4405218822Sdim 4406218822Sdim{ "drrnd", ZRC(59,35,0), Z2_MASK, POWER6, { FRT, FRA, FRB, RMC } }, 4407218822Sdim{ "drrnd.", ZRC(59,35,1), Z2_MASK, POWER6, { FRT, FRA, FRB, RMC } }, 4408218822Sdim 4409218822Sdim{ "dscli", ZRC(59,66,0), Z_MASK, POWER6, { FRT, FRA, SH16 } }, 4410218822Sdim{ "dscli.", ZRC(59,66,1), Z_MASK, POWER6, { FRT, FRA, SH16 } }, 4411218822Sdim 4412218822Sdim{ "dquai", ZRC(59,67,0), Z2_MASK, POWER6, { TE, FRT, FRB, RMC } }, 4413218822Sdim{ "dquai.", ZRC(59,67,1), Z2_MASK, POWER6, { TE, FRT, FRB, RMC } }, 4414218822Sdim 4415218822Sdim{ "dscri", ZRC(59,98,0), Z_MASK, POWER6, { FRT, FRA, SH16 } }, 4416218822Sdim{ "dscri.", ZRC(59,98,1), Z_MASK, POWER6, { FRT, FRA, SH16 } }, 4417218822Sdim 4418218822Sdim{ "drintx", ZRC(59,99,0), Z2_MASK, POWER6, { R, FRT, FRB, RMC } }, 4419218822Sdim{ "drintx.", ZRC(59,99,1), Z2_MASK, POWER6, { R, FRT, FRB, RMC } }, 4420218822Sdim 4421218822Sdim{ "dcmpo", X(59,130), X_MASK, POWER6, { BF, FRA, FRB } }, 4422218822Sdim 4423218822Sdim{ "dtstex", X(59,162), X_MASK, POWER6, { BF, FRA, FRB } }, 4424218822Sdim{ "dtstdc", Z(59,194), Z_MASK, POWER6, { BF, FRA, DCM } }, 4425218822Sdim{ "dtstdg", Z(59,226), Z_MASK, POWER6, { BF, FRA, DGM } }, 4426218822Sdim 4427218822Sdim{ "drintn", ZRC(59,227,0), Z2_MASK, POWER6, { R, FRT, FRB, RMC } }, 4428218822Sdim{ "drintn.", ZRC(59,227,1), Z2_MASK, POWER6, { R, FRT, FRB, RMC } }, 4429218822Sdim 4430218822Sdim{ "dctdp", XRC(59,258,0), X_MASK, POWER6, { FRT, FRB } }, 4431218822Sdim{ "dctdp.", XRC(59,258,1), X_MASK, POWER6, { FRT, FRB } }, 4432218822Sdim 4433218822Sdim{ "dctfix", XRC(59,290,0), X_MASK, POWER6, { FRT, FRB } }, 4434218822Sdim{ "dctfix.", XRC(59,290,1), X_MASK, POWER6, { FRT, FRB } }, 4435218822Sdim 4436218822Sdim{ "ddedpd", XRC(59,322,0), X_MASK, POWER6, { SP, FRT, FRB } }, 4437218822Sdim{ "ddedpd.", XRC(59,322,1), X_MASK, POWER6, { SP, FRT, FRB } }, 4438218822Sdim 4439218822Sdim{ "dxex", XRC(59,354,0), X_MASK, POWER6, { FRT, FRB } }, 4440218822Sdim{ "dxex.", XRC(59,354,1), X_MASK, POWER6, { FRT, FRB } }, 4441218822Sdim 4442218822Sdim{ "dsub", XRC(59,514,0), X_MASK, POWER6, { FRT, FRA, FRB } }, 4443218822Sdim{ "dsub.", XRC(59,514,1), X_MASK, POWER6, { FRT, FRA, FRB } }, 4444218822Sdim 4445218822Sdim{ "ddiv", XRC(59,546,0), X_MASK, POWER6, { FRT, FRA, FRB } }, 4446218822Sdim{ "ddiv.", XRC(59,546,1), X_MASK, POWER6, { FRT, FRA, FRB } }, 4447218822Sdim 4448218822Sdim{ "dcmpu", X(59,642), X_MASK, POWER6, { BF, FRA, FRB } }, 4449218822Sdim 4450218822Sdim{ "dtstsf", X(59,674), X_MASK, POWER6, { BF, FRA, FRB } }, 4451218822Sdim 4452218822Sdim{ "drsp", XRC(59,770,0), X_MASK, POWER6, { FRT, FRB } }, 4453218822Sdim{ "drsp.", XRC(59,770,1), X_MASK, POWER6, { FRT, FRB } }, 4454218822Sdim 4455218822Sdim{ "dcffix", XRC(59,802,0), X_MASK, POWER6, { FRT, FRB } }, 4456218822Sdim{ "dcffix.", XRC(59,802,1), X_MASK, POWER6, { FRT, FRB } }, 4457218822Sdim 4458218822Sdim{ "denbcd", XRC(59,834,0), X_MASK, POWER6, { S, FRT, FRB } }, 4459218822Sdim{ "denbcd.", XRC(59,834,1), X_MASK, POWER6, { S, FRT, FRB } }, 4460218822Sdim 4461218822Sdim{ "diex", XRC(59,866,0), X_MASK, POWER6, { FRT, FRA, FRB } }, 4462218822Sdim{ "diex.", XRC(59,866,1), X_MASK, POWER6, { FRT, FRA, FRB } }, 4463218822Sdim 446460484Sobrien{ "stfq", OP(60), OP_MASK, POWER2, { FRS, D, RA } }, 446560484Sobrien 446660484Sobrien{ "stfqu", OP(61), OP_MASK, POWER2, { FRS, D, RA } }, 446760484Sobrien 4468218822Sdim{ "stfdp", OP(61), OP_MASK, POWER6, { FRT, D, RA0 } }, 4469218822Sdim 4470130561Sobrien{ "lde", DEO(62,0), DE_MASK, BOOKE64, { RT, DES, RA0 } }, 4471130561Sobrien{ "ldue", DEO(62,1), DE_MASK, BOOKE64, { RT, DES, RA0 } }, 4472130561Sobrien{ "lfse", DEO(62,4), DE_MASK, BOOKE64, { FRT, DES, RA0 } }, 447389857Sobrien{ "lfsue", DEO(62,5), DE_MASK, BOOKE64, { FRT, DES, RAS } }, 4474130561Sobrien{ "lfde", DEO(62,6), DE_MASK, BOOKE64, { FRT, DES, RA0 } }, 447589857Sobrien{ "lfdue", DEO(62,7), DE_MASK, BOOKE64, { FRT, DES, RAS } }, 4476130561Sobrien{ "stde", DEO(62,8), DE_MASK, BOOKE64, { RS, DES, RA0 } }, 447789857Sobrien{ "stdue", DEO(62,9), DE_MASK, BOOKE64, { RS, DES, RAS } }, 4478130561Sobrien{ "stfse", DEO(62,12), DE_MASK, BOOKE64, { FRS, DES, RA0 } }, 447989857Sobrien{ "stfsue", DEO(62,13), DE_MASK, BOOKE64, { FRS, DES, RAS } }, 4480130561Sobrien{ "stfde", DEO(62,14), DE_MASK, BOOKE64, { FRS, DES, RA0 } }, 448189857Sobrien{ "stfdue", DEO(62,15), DE_MASK, BOOKE64, { FRS, DES, RAS } }, 448289857Sobrien 4483130561Sobrien{ "std", DSO(62,0), DS_MASK, PPC64, { RS, DS, RA0 } }, 448460484Sobrien 448560484Sobrien{ "stdu", DSO(62,1), DS_MASK, PPC64, { RS, DS, RAS } }, 448660484Sobrien 4487130561Sobrien{ "stq", DSO(62,2), DS_MASK, POWER4, { RSQ, DS, RA0 } }, 4488130561Sobrien 448960484Sobrien{ "fcmpu", X(63,0), X_MASK|(3<<21), COM, { BF, FRA, FRB } }, 449060484Sobrien 4491218822Sdim{ "daddq", XRC(63,2,0), X_MASK, POWER6, { FRT, FRA, FRB } }, 4492218822Sdim{ "daddq.", XRC(63,2,1), X_MASK, POWER6, { FRT, FRA, FRB } }, 4493218822Sdim 4494218822Sdim{ "dquaq", ZRC(63,3,0), Z2_MASK, POWER6, { FRT, FRA, FRB, RMC } }, 4495218822Sdim{ "dquaq.", ZRC(63,3,1), Z2_MASK, POWER6, { FRT, FRA, FRB, RMC } }, 4496218822Sdim 4497218822Sdim{ "fcpsgn", XRC(63,8,0), X_MASK, POWER6, { FRT, FRA, FRB } }, 4498218822Sdim{ "fcpsgn.", XRC(63,8,1), X_MASK, POWER6, { FRT, FRA, FRB } }, 4499218822Sdim 450060484Sobrien{ "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } }, 450160484Sobrien{ "frsp.", XRC(63,12,1), XRA_MASK, COM, { FRT, FRB } }, 450260484Sobrien 450360484Sobrien{ "fctiw", XRC(63,14,0), XRA_MASK, PPCCOM, { FRT, FRB } }, 450460484Sobrien{ "fcir", XRC(63,14,0), XRA_MASK, POWER2, { FRT, FRB } }, 450560484Sobrien{ "fctiw.", XRC(63,14,1), XRA_MASK, PPCCOM, { FRT, FRB } }, 450660484Sobrien{ "fcir.", XRC(63,14,1), XRA_MASK, POWER2, { FRT, FRB } }, 450760484Sobrien 450860484Sobrien{ "fctiwz", XRC(63,15,0), XRA_MASK, PPCCOM, { FRT, FRB } }, 450960484Sobrien{ "fcirz", XRC(63,15,0), XRA_MASK, POWER2, { FRT, FRB } }, 451060484Sobrien{ "fctiwz.", XRC(63,15,1), XRA_MASK, PPCCOM, { FRT, FRB } }, 451160484Sobrien{ "fcirz.", XRC(63,15,1), XRA_MASK, POWER2, { FRT, FRB } }, 451260484Sobrien 451360484Sobrien{ "fdiv", A(63,18,0), AFRC_MASK, PPCCOM, { FRT, FRA, FRB } }, 451460484Sobrien{ "fd", A(63,18,0), AFRC_MASK, PWRCOM, { FRT, FRA, FRB } }, 451560484Sobrien{ "fdiv.", A(63,18,1), AFRC_MASK, PPCCOM, { FRT, FRA, FRB } }, 451660484Sobrien{ "fd.", A(63,18,1), AFRC_MASK, PWRCOM, { FRT, FRA, FRB } }, 451760484Sobrien 451860484Sobrien{ "fsub", A(63,20,0), AFRC_MASK, PPCCOM, { FRT, FRA, FRB } }, 451960484Sobrien{ "fs", A(63,20,0), AFRC_MASK, PWRCOM, { FRT, FRA, FRB } }, 452060484Sobrien{ "fsub.", A(63,20,1), AFRC_MASK, PPCCOM, { FRT, FRA, FRB } }, 452160484Sobrien{ "fs.", A(63,20,1), AFRC_MASK, PWRCOM, { FRT, FRA, FRB } }, 452260484Sobrien 452360484Sobrien{ "fadd", A(63,21,0), AFRC_MASK, PPCCOM, { FRT, FRA, FRB } }, 452460484Sobrien{ "fa", A(63,21,0), AFRC_MASK, PWRCOM, { FRT, FRA, FRB } }, 452560484Sobrien{ "fadd.", A(63,21,1), AFRC_MASK, PPCCOM, { FRT, FRA, FRB } }, 452660484Sobrien{ "fa.", A(63,21,1), AFRC_MASK, PWRCOM, { FRT, FRA, FRB } }, 452760484Sobrien 452860484Sobrien{ "fsqrt", A(63,22,0), AFRAFRC_MASK, PPCPWR2, { FRT, FRB } }, 452960484Sobrien{ "fsqrt.", A(63,22,1), AFRAFRC_MASK, PPCPWR2, { FRT, FRB } }, 453060484Sobrien 453160484Sobrien{ "fsel", A(63,23,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, 453260484Sobrien{ "fsel.", A(63,23,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, 453360484Sobrien 4534218822Sdim{ "fre", A(63,24,0), AFRALFRC_MASK, POWER5, { FRT, FRB, A_L } }, 4535218822Sdim{ "fre.", A(63,24,1), AFRALFRC_MASK, POWER5, { FRT, FRB, A_L } }, 4536218822Sdim 453760484Sobrien{ "fmul", A(63,25,0), AFRB_MASK, PPCCOM, { FRT, FRA, FRC } }, 453860484Sobrien{ "fm", A(63,25,0), AFRB_MASK, PWRCOM, { FRT, FRA, FRC } }, 453960484Sobrien{ "fmul.", A(63,25,1), AFRB_MASK, PPCCOM, { FRT, FRA, FRC } }, 454060484Sobrien{ "fm.", A(63,25,1), AFRB_MASK, PWRCOM, { FRT, FRA, FRC } }, 454160484Sobrien 4542218822Sdim{ "frsqrte", A(63,26,0), AFRALFRC_MASK, PPC, { FRT, FRB, A_L } }, 4543218822Sdim{ "frsqrte.",A(63,26,1), AFRALFRC_MASK, PPC, { FRT, FRB, A_L } }, 454460484Sobrien 454560484Sobrien{ "fmsub", A(63,28,0), A_MASK, PPCCOM, { FRT,FRA,FRC,FRB } }, 454660484Sobrien{ "fms", A(63,28,0), A_MASK, PWRCOM, { FRT,FRA,FRC,FRB } }, 454760484Sobrien{ "fmsub.", A(63,28,1), A_MASK, PPCCOM, { FRT,FRA,FRC,FRB } }, 454860484Sobrien{ "fms.", A(63,28,1), A_MASK, PWRCOM, { FRT,FRA,FRC,FRB } }, 454960484Sobrien 455060484Sobrien{ "fmadd", A(63,29,0), A_MASK, PPCCOM, { FRT,FRA,FRC,FRB } }, 455160484Sobrien{ "fma", A(63,29,0), A_MASK, PWRCOM, { FRT,FRA,FRC,FRB } }, 455260484Sobrien{ "fmadd.", A(63,29,1), A_MASK, PPCCOM, { FRT,FRA,FRC,FRB } }, 455360484Sobrien{ "fma.", A(63,29,1), A_MASK, PWRCOM, { FRT,FRA,FRC,FRB } }, 455460484Sobrien 455560484Sobrien{ "fnmsub", A(63,30,0), A_MASK, PPCCOM, { FRT,FRA,FRC,FRB } }, 455660484Sobrien{ "fnms", A(63,30,0), A_MASK, PWRCOM, { FRT,FRA,FRC,FRB } }, 455760484Sobrien{ "fnmsub.", A(63,30,1), A_MASK, PPCCOM, { FRT,FRA,FRC,FRB } }, 455860484Sobrien{ "fnms.", A(63,30,1), A_MASK, PWRCOM, { FRT,FRA,FRC,FRB } }, 455960484Sobrien 456060484Sobrien{ "fnmadd", A(63,31,0), A_MASK, PPCCOM, { FRT,FRA,FRC,FRB } }, 456160484Sobrien{ "fnma", A(63,31,0), A_MASK, PWRCOM, { FRT,FRA,FRC,FRB } }, 456260484Sobrien{ "fnmadd.", A(63,31,1), A_MASK, PPCCOM, { FRT,FRA,FRC,FRB } }, 456360484Sobrien{ "fnma.", A(63,31,1), A_MASK, PWRCOM, { FRT,FRA,FRC,FRB } }, 456460484Sobrien 456560484Sobrien{ "fcmpo", X(63,32), X_MASK|(3<<21), COM, { BF, FRA, FRB } }, 456660484Sobrien 4567218822Sdim{ "dmulq", XRC(63,34,0), X_MASK, POWER6, { FRT, FRA, FRB } }, 4568218822Sdim{ "dmulq.", XRC(63,34,1), X_MASK, POWER6, { FRT, FRA, FRB } }, 4569218822Sdim 4570218822Sdim{ "drrndq", ZRC(63,35,0), Z2_MASK, POWER6, { FRT, FRA, FRB, RMC } }, 4571218822Sdim{ "drrndq.", ZRC(63,35,1), Z2_MASK, POWER6, { FRT, FRA, FRB, RMC } }, 4572218822Sdim 457360484Sobrien{ "mtfsb1", XRC(63,38,0), XRARB_MASK, COM, { BT } }, 457460484Sobrien{ "mtfsb1.", XRC(63,38,1), XRARB_MASK, COM, { BT } }, 457560484Sobrien 457660484Sobrien{ "fneg", XRC(63,40,0), XRA_MASK, COM, { FRT, FRB } }, 457760484Sobrien{ "fneg.", XRC(63,40,1), XRA_MASK, COM, { FRT, FRB } }, 457860484Sobrien 457960484Sobrien{ "mcrfs", X(63,64), XRB_MASK|(3<<21)|(3<<16), COM, { BF, BFA } }, 458060484Sobrien 4581218822Sdim{ "dscliq", ZRC(63,66,0), Z_MASK, POWER6, { FRT, FRA, SH16 } }, 4582218822Sdim{ "dscliq.", ZRC(63,66,1), Z_MASK, POWER6, { FRT, FRA, SH16 } }, 4583218822Sdim 4584218822Sdim{ "dquaiq", ZRC(63,67,0), Z2_MASK, POWER6, { TE, FRT, FRB, RMC } }, 4585218822Sdim{ "dquaiq.", ZRC(63,67,1), Z2_MASK, POWER6, { FRT, FRA, FRB, RMC } }, 4586218822Sdim 458760484Sobrien{ "mtfsb0", XRC(63,70,0), XRARB_MASK, COM, { BT } }, 458860484Sobrien{ "mtfsb0.", XRC(63,70,1), XRARB_MASK, COM, { BT } }, 458960484Sobrien 459060484Sobrien{ "fmr", XRC(63,72,0), XRA_MASK, COM, { FRT, FRB } }, 459160484Sobrien{ "fmr.", XRC(63,72,1), XRA_MASK, COM, { FRT, FRB } }, 459260484Sobrien 4593218822Sdim{ "dscriq", ZRC(63,98,0), Z_MASK, POWER6, { FRT, FRA, SH16 } }, 4594218822Sdim{ "dscriq.", ZRC(63,98,1), Z_MASK, POWER6, { FRT, FRA, SH16 } }, 459560484Sobrien 4596218822Sdim{ "drintxq", ZRC(63,99,0), Z2_MASK, POWER6, { R, FRT, FRB, RMC } }, 4597218822Sdim{ "drintxq.",ZRC(63,99,1), Z2_MASK, POWER6, { R, FRT, FRB, RMC } }, 4598218822Sdim 4599218822Sdim{ "dcmpoq", X(63,130), X_MASK, POWER6, { BF, FRA, FRB } }, 4600218822Sdim 4601218822Sdim{ "mtfsfi", XRC(63,134,0), XWRA_MASK|(3<<21)|(1<<11), COM, { BFF, U, W } }, 4602218822Sdim{ "mtfsfi.", XRC(63,134,1), XWRA_MASK|(3<<21)|(1<<11), COM, { BFF, U, W } }, 4603218822Sdim 460460484Sobrien{ "fnabs", XRC(63,136,0), XRA_MASK, COM, { FRT, FRB } }, 460560484Sobrien{ "fnabs.", XRC(63,136,1), XRA_MASK, COM, { FRT, FRB } }, 460660484Sobrien 4607218822Sdim{ "dtstexq", X(63,162), X_MASK, POWER6, { BF, FRA, FRB } }, 4608218822Sdim{ "dtstdcq", Z(63,194), Z_MASK, POWER6, { BF, FRA, DCM } }, 4609218822Sdim{ "dtstdgq", Z(63,226), Z_MASK, POWER6, { BF, FRA, DGM } }, 4610218822Sdim 4611218822Sdim{ "drintnq", ZRC(63,227,0), Z2_MASK, POWER6, { R, FRT, FRB, RMC } }, 4612218822Sdim{ "drintnq.",ZRC(63,227,1), Z2_MASK, POWER6, { R, FRT, FRB, RMC } }, 4613218822Sdim 4614218822Sdim{ "dctqpq", XRC(63,258,0), X_MASK, POWER6, { FRT, FRB } }, 4615218822Sdim{ "dctqpq.", XRC(63,258,1), X_MASK, POWER6, { FRT, FRB } }, 4616218822Sdim 461760484Sobrien{ "fabs", XRC(63,264,0), XRA_MASK, COM, { FRT, FRB } }, 461860484Sobrien{ "fabs.", XRC(63,264,1), XRA_MASK, COM, { FRT, FRB } }, 461960484Sobrien 4620218822Sdim{ "dctfixq", XRC(63,290,0), X_MASK, POWER6, { FRT, FRB } }, 4621218822Sdim{ "dctfixq.",XRC(63,290,1), X_MASK, POWER6, { FRT, FRB } }, 4622218822Sdim 4623218822Sdim{ "ddedpdq", XRC(63,322,0), X_MASK, POWER6, { SP, FRT, FRB } }, 4624218822Sdim{ "ddedpdq.",XRC(63,322,1), X_MASK, POWER6, { SP, FRT, FRB } }, 4625218822Sdim 4626218822Sdim{ "dxexq", XRC(63,354,0), X_MASK, POWER6, { FRT, FRB } }, 4627218822Sdim{ "dxexq.", XRC(63,354,1), X_MASK, POWER6, { FRT, FRB } }, 4628218822Sdim 4629218822Sdim{ "frin", XRC(63,392,0), XRA_MASK, POWER5, { FRT, FRB } }, 4630218822Sdim{ "frin.", XRC(63,392,1), XRA_MASK, POWER5, { FRT, FRB } }, 4631218822Sdim{ "friz", XRC(63,424,0), XRA_MASK, POWER5, { FRT, FRB } }, 4632218822Sdim{ "friz.", XRC(63,424,1), XRA_MASK, POWER5, { FRT, FRB } }, 4633218822Sdim{ "frip", XRC(63,456,0), XRA_MASK, POWER5, { FRT, FRB } }, 4634218822Sdim{ "frip.", XRC(63,456,1), XRA_MASK, POWER5, { FRT, FRB } }, 4635218822Sdim{ "frim", XRC(63,488,0), XRA_MASK, POWER5, { FRT, FRB } }, 4636218822Sdim{ "frim.", XRC(63,488,1), XRA_MASK, POWER5, { FRT, FRB } }, 4637218822Sdim 4638218822Sdim{ "dsubq", XRC(63,514,0), X_MASK, POWER6, { FRT, FRA, FRB } }, 4639218822Sdim{ "dsubq.", XRC(63,514,1), X_MASK, POWER6, { FRT, FRA, FRB } }, 4640218822Sdim 4641218822Sdim{ "ddivq", XRC(63,546,0), X_MASK, POWER6, { FRT, FRA, FRB } }, 4642218822Sdim{ "ddivq.", XRC(63,546,1), X_MASK, POWER6, { FRT, FRA, FRB } }, 4643218822Sdim 464460484Sobrien{ "mffs", XRC(63,583,0), XRARB_MASK, COM, { FRT } }, 464560484Sobrien{ "mffs.", XRC(63,583,1), XRARB_MASK, COM, { FRT } }, 464660484Sobrien 4647218822Sdim{ "dcmpuq", X(63,642), X_MASK, POWER6, { BF, FRA, FRB } }, 464860484Sobrien 4649218822Sdim{ "dtstsfq", X(63,674), X_MASK, POWER6, { BF, FRA, FRB } }, 4650218822Sdim 4651218822Sdim{ "mtfsf", XFL(63,711,0), XFL_MASK, COM, { FLM, FRB, XFL_L, W } }, 4652218822Sdim{ "mtfsf.", XFL(63,711,1), XFL_MASK, COM, { FLM, FRB, XFL_L, W } }, 4653218822Sdim 4654218822Sdim{ "drdpq", XRC(63,770,0), X_MASK, POWER6, { FRT, FRB } }, 4655218822Sdim{ "drdpq.", XRC(63,770,1), X_MASK, POWER6, { FRT, FRB } }, 4656218822Sdim 4657218822Sdim{ "dcffixq", XRC(63,802,0), X_MASK, POWER6, { FRT, FRB } }, 4658218822Sdim{ "dcffixq.",XRC(63,802,1), X_MASK, POWER6, { FRT, FRB } }, 4659218822Sdim 466060484Sobrien{ "fctid", XRC(63,814,0), XRA_MASK, PPC64, { FRT, FRB } }, 466160484Sobrien{ "fctid.", XRC(63,814,1), XRA_MASK, PPC64, { FRT, FRB } }, 466260484Sobrien 466360484Sobrien{ "fctidz", XRC(63,815,0), XRA_MASK, PPC64, { FRT, FRB } }, 466460484Sobrien{ "fctidz.", XRC(63,815,1), XRA_MASK, PPC64, { FRT, FRB } }, 466560484Sobrien 4666218822Sdim{ "denbcdq", XRC(63,834,0), X_MASK, POWER6, { S, FRT, FRB } }, 4667218822Sdim{ "denbcdq.",XRC(63,834,1), X_MASK, POWER6, { S, FRT, FRB } }, 4668218822Sdim 466960484Sobrien{ "fcfid", XRC(63,846,0), XRA_MASK, PPC64, { FRT, FRB } }, 467060484Sobrien{ "fcfid.", XRC(63,846,1), XRA_MASK, PPC64, { FRT, FRB } }, 467160484Sobrien 4672218822Sdim{ "diexq", XRC(63,866,0), X_MASK, POWER6, { FRT, FRA, FRB } }, 4673218822Sdim{ "diexq.", XRC(63,866,1), X_MASK, POWER6, { FRT, FRA, FRB } }, 4674218822Sdim 467560484Sobrien}; 467660484Sobrien 467760484Sobrienconst int powerpc_num_opcodes = 467860484Sobrien sizeof (powerpc_opcodes) / sizeof (powerpc_opcodes[0]); 467960484Sobrien 468060484Sobrien/* The macro table. This is only used by the assembler. */ 468160484Sobrien 468260484Sobrien/* The expressions of the form (-x ! 31) & (x | 31) have the value 0 468360484Sobrien when x=0; 32-x when x is between 1 and 31; are negative if x is 468460484Sobrien negative; and are 32 or more otherwise. This is what you want 468560484Sobrien when, for instance, you are emulating a right shift by a 468660484Sobrien rotate-left-and-mask, because the underlying instructions support 468760484Sobrien shifts of size 0 but not shifts of size 32. By comparison, when 468860484Sobrien extracting x bits from some word you want to use just 32-x, because 468960484Sobrien the underlying instructions don't support extracting 0 bits but do 469060484Sobrien support extracting the whole word (32 bits in this case). */ 469160484Sobrien 469260484Sobrienconst struct powerpc_macro powerpc_macros[] = { 469360484Sobrien{ "extldi", 4, PPC64, "rldicr %0,%1,%3,(%2)-1" }, 469460484Sobrien{ "extldi.", 4, PPC64, "rldicr. %0,%1,%3,(%2)-1" }, 469560484Sobrien{ "extrdi", 4, PPC64, "rldicl %0,%1,(%2)+(%3),64-(%2)" }, 469660484Sobrien{ "extrdi.", 4, PPC64, "rldicl. %0,%1,(%2)+(%3),64-(%2)" }, 469760484Sobrien{ "insrdi", 4, PPC64, "rldimi %0,%1,64-((%2)+(%3)),%3" }, 469860484Sobrien{ "insrdi.", 4, PPC64, "rldimi. %0,%1,64-((%2)+(%3)),%3" }, 469960484Sobrien{ "rotrdi", 3, PPC64, "rldicl %0,%1,(-(%2)!63)&((%2)|63),0" }, 470060484Sobrien{ "rotrdi.", 3, PPC64, "rldicl. %0,%1,(-(%2)!63)&((%2)|63),0" }, 470160484Sobrien{ "sldi", 3, PPC64, "rldicr %0,%1,%2,63-(%2)" }, 470260484Sobrien{ "sldi.", 3, PPC64, "rldicr. %0,%1,%2,63-(%2)" }, 470360484Sobrien{ "srdi", 3, PPC64, "rldicl %0,%1,(-(%2)!63)&((%2)|63),%2" }, 470460484Sobrien{ "srdi.", 3, PPC64, "rldicl. %0,%1,(-(%2)!63)&((%2)|63),%2" }, 470560484Sobrien{ "clrrdi", 3, PPC64, "rldicr %0,%1,0,63-(%2)" }, 470660484Sobrien{ "clrrdi.", 3, PPC64, "rldicr. %0,%1,0,63-(%2)" }, 470760484Sobrien{ "clrlsldi",4, PPC64, "rldic %0,%1,%3,(%2)-(%3)" }, 470860484Sobrien{ "clrlsldi.",4, PPC64, "rldic. %0,%1,%3,(%2)-(%3)" }, 470960484Sobrien 471060484Sobrien{ "extlwi", 4, PPCCOM, "rlwinm %0,%1,%3,0,(%2)-1" }, 471160484Sobrien{ "extlwi.", 4, PPCCOM, "rlwinm. %0,%1,%3,0,(%2)-1" }, 4712130561Sobrien{ "extrwi", 4, PPCCOM, "rlwinm %0,%1,((%2)+(%3))&((%2)+(%3)<>32),32-(%2),31" }, 4713130561Sobrien{ "extrwi.", 4, PPCCOM, "rlwinm. %0,%1,((%2)+(%3))&((%2)+(%3)<>32),32-(%2),31" }, 471460484Sobrien{ "inslwi", 4, PPCCOM, "rlwimi %0,%1,(-(%3)!31)&((%3)|31),%3,(%2)+(%3)-1" }, 471560484Sobrien{ "inslwi.", 4, PPCCOM, "rlwimi. %0,%1,(-(%3)!31)&((%3)|31),%3,(%2)+(%3)-1"}, 471660484Sobrien{ "insrwi", 4, PPCCOM, "rlwimi %0,%1,32-((%2)+(%3)),%3,(%2)+(%3)-1" }, 471760484Sobrien{ "insrwi.", 4, PPCCOM, "rlwimi. %0,%1,32-((%2)+(%3)),%3,(%2)+(%3)-1"}, 471860484Sobrien{ "rotrwi", 3, PPCCOM, "rlwinm %0,%1,(-(%2)!31)&((%2)|31),0,31" }, 471960484Sobrien{ "rotrwi.", 3, PPCCOM, "rlwinm. %0,%1,(-(%2)!31)&((%2)|31),0,31" }, 472060484Sobrien{ "slwi", 3, PPCCOM, "rlwinm %0,%1,%2,0,31-(%2)" }, 472160484Sobrien{ "sli", 3, PWRCOM, "rlinm %0,%1,%2,0,31-(%2)" }, 472260484Sobrien{ "slwi.", 3, PPCCOM, "rlwinm. %0,%1,%2,0,31-(%2)" }, 472360484Sobrien{ "sli.", 3, PWRCOM, "rlinm. %0,%1,%2,0,31-(%2)" }, 472460484Sobrien{ "srwi", 3, PPCCOM, "rlwinm %0,%1,(-(%2)!31)&((%2)|31),%2,31" }, 472560484Sobrien{ "sri", 3, PWRCOM, "rlinm %0,%1,(-(%2)!31)&((%2)|31),%2,31" }, 472660484Sobrien{ "srwi.", 3, PPCCOM, "rlwinm. %0,%1,(-(%2)!31)&((%2)|31),%2,31" }, 472760484Sobrien{ "sri.", 3, PWRCOM, "rlinm. %0,%1,(-(%2)!31)&((%2)|31),%2,31" }, 472860484Sobrien{ "clrrwi", 3, PPCCOM, "rlwinm %0,%1,0,0,31-(%2)" }, 472960484Sobrien{ "clrrwi.", 3, PPCCOM, "rlwinm. %0,%1,0,0,31-(%2)" }, 473060484Sobrien{ "clrlslwi",4, PPCCOM, "rlwinm %0,%1,%3,(%2)-(%3),31-(%3)" }, 473160484Sobrien{ "clrlslwi.",4, PPCCOM, "rlwinm. %0,%1,%3,(%2)-(%3),31-(%3)" }, 473260484Sobrien}; 473360484Sobrien 473460484Sobrienconst int powerpc_num_macros = 473560484Sobrien sizeof (powerpc_macros) / sizeof (powerpc_macros[0]); 4736