ppc.h revision 89857
160484Sobrien/* ppc.h -- Header file for PowerPC opcode table 289857Sobrien Copyright 1994, 1995, 1999, 2000, 2001 Free Software Foundation, Inc. 360484Sobrien Written by Ian Lance Taylor, Cygnus Support 460484Sobrien 560484SobrienThis file is part of GDB, GAS, and the GNU binutils. 660484Sobrien 760484SobrienGDB, GAS, and the GNU binutils are free software; you can redistribute 860484Sobrienthem and/or modify them under the terms of the GNU General Public 960484SobrienLicense as published by the Free Software Foundation; either version 1060484Sobrien1, or (at your option) any later version. 1160484Sobrien 1260484SobrienGDB, GAS, and the GNU binutils are distributed in the hope that they 1360484Sobrienwill be useful, but WITHOUT ANY WARRANTY; without even the implied 1460484Sobrienwarranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See 1560484Sobrienthe GNU General Public License for more details. 1660484Sobrien 1760484SobrienYou should have received a copy of the GNU General Public License 1860484Sobrienalong with this file; see the file COPYING. If not, write to the Free 1960484SobrienSoftware Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 2060484Sobrien 2160484Sobrien#ifndef PPC_H 2260484Sobrien#define PPC_H 2360484Sobrien 2460484Sobrien/* The opcode table is an array of struct powerpc_opcode. */ 2560484Sobrien 2660484Sobrienstruct powerpc_opcode 2760484Sobrien{ 2860484Sobrien /* The opcode name. */ 2960484Sobrien const char *name; 3060484Sobrien 3160484Sobrien /* The opcode itself. Those bits which will be filled in with 3260484Sobrien operands are zeroes. */ 3360484Sobrien unsigned long opcode; 3460484Sobrien 3560484Sobrien /* The opcode mask. This is used by the disassembler. This is a 3660484Sobrien mask containing ones indicating those bits which must match the 3760484Sobrien opcode field, and zeroes indicating those bits which need not 3860484Sobrien match (and are presumably filled in by operands). */ 3960484Sobrien unsigned long mask; 4060484Sobrien 4160484Sobrien /* One bit flags for the opcode. These are used to indicate which 4260484Sobrien specific processors support the instructions. The defined values 4360484Sobrien are listed below. */ 4460484Sobrien unsigned long flags; 4560484Sobrien 4660484Sobrien /* An array of operand codes. Each code is an index into the 4760484Sobrien operand table. They appear in the order which the operands must 4860484Sobrien appear in assembly code, and are terminated by a zero. */ 4960484Sobrien unsigned char operands[8]; 5060484Sobrien}; 5160484Sobrien 5260484Sobrien/* The table itself is sorted by major opcode number, and is otherwise 5360484Sobrien in the order in which the disassembler should consider 5460484Sobrien instructions. */ 5560484Sobrienextern const struct powerpc_opcode powerpc_opcodes[]; 5660484Sobrienextern const int powerpc_num_opcodes; 5760484Sobrien 5860484Sobrien/* Values defined for the flags field of a struct powerpc_opcode. */ 5960484Sobrien 6060484Sobrien/* Opcode is defined for the PowerPC architecture. */ 6160484Sobrien#define PPC_OPCODE_PPC (01) 6260484Sobrien 6360484Sobrien/* Opcode is defined for the POWER (RS/6000) architecture. */ 6460484Sobrien#define PPC_OPCODE_POWER (02) 6560484Sobrien 6660484Sobrien/* Opcode is defined for the POWER2 (Rios 2) architecture. */ 6760484Sobrien#define PPC_OPCODE_POWER2 (04) 6860484Sobrien 6960484Sobrien/* Opcode is only defined on 32 bit architectures. */ 7060484Sobrien#define PPC_OPCODE_32 (010) 7160484Sobrien 7260484Sobrien/* Opcode is only defined on 64 bit architectures. */ 7360484Sobrien#define PPC_OPCODE_64 (020) 7460484Sobrien 7560484Sobrien/* Opcode is supported by the Motorola PowerPC 601 processor. The 601 7660484Sobrien is assumed to support all PowerPC (PPC_OPCODE_PPC) instructions, 7760484Sobrien but it also supports many additional POWER instructions. */ 7860484Sobrien#define PPC_OPCODE_601 (040) 7960484Sobrien 8060484Sobrien/* Opcode is supported in both the Power and PowerPC architectures 8160484Sobrien (ie, compiler's -mcpu=common or assembler's -mcom). */ 8260484Sobrien#define PPC_OPCODE_COMMON (0100) 8360484Sobrien 8460484Sobrien/* Opcode is supported for any Power or PowerPC platform (this is 8560484Sobrien for the assembler's -many option, and it eliminates duplicates). */ 8660484Sobrien#define PPC_OPCODE_ANY (0200) 8760484Sobrien 8860484Sobrien/* Opcode is supported as part of the 64-bit bridge. */ 8960484Sobrien#define PPC_OPCODE_64_BRIDGE (0400) 9060484Sobrien 9177298Sobrien/* Opcode is supported by Altivec Vector Unit */ 9289857Sobrien#define PPC_OPCODE_ALTIVEC (01000) 9377298Sobrien 9489857Sobrien/* Opcode is supported by PowerPC 403 processor. */ 9589857Sobrien#define PPC_OPCODE_403 (02000) 9689857Sobrien 9789857Sobrien/* Opcode is supported by PowerPC BookE processor. */ 9889857Sobrien#define PPC_OPCODE_BOOKE (04000) 9989857Sobrien 10089857Sobrien/* Opcode is only supported by 64-bit PowerPC BookE processor. */ 10189857Sobrien#define PPC_OPCODE_BOOKE64 (010000) 10289857Sobrien 10360484Sobrien/* A macro to extract the major opcode from an instruction. */ 10460484Sobrien#define PPC_OP(i) (((i) >> 26) & 0x3f) 10560484Sobrien 10660484Sobrien/* The operands table is an array of struct powerpc_operand. */ 10760484Sobrien 10860484Sobrienstruct powerpc_operand 10960484Sobrien{ 11060484Sobrien /* The number of bits in the operand. */ 11160484Sobrien int bits; 11260484Sobrien 11360484Sobrien /* How far the operand is left shifted in the instruction. */ 11460484Sobrien int shift; 11560484Sobrien 11660484Sobrien /* Insertion function. This is used by the assembler. To insert an 11760484Sobrien operand value into an instruction, check this field. 11860484Sobrien 11960484Sobrien If it is NULL, execute 12060484Sobrien i |= (op & ((1 << o->bits) - 1)) << o->shift; 12160484Sobrien (i is the instruction which we are filling in, o is a pointer to 12260484Sobrien this structure, and op is the opcode value; this assumes twos 12360484Sobrien complement arithmetic). 12460484Sobrien 12560484Sobrien If this field is not NULL, then simply call it with the 12660484Sobrien instruction and the operand value. It will return the new value 12760484Sobrien of the instruction. If the ERRMSG argument is not NULL, then if 12860484Sobrien the operand value is illegal, *ERRMSG will be set to a warning 12960484Sobrien string (the operand will be inserted in any case). If the 13060484Sobrien operand value is legal, *ERRMSG will be unchanged (most operands 13160484Sobrien can accept any value). */ 13260484Sobrien unsigned long (*insert) PARAMS ((unsigned long instruction, long op, 13389857Sobrien int dialect, 13460484Sobrien const char **errmsg)); 13560484Sobrien 13660484Sobrien /* Extraction function. This is used by the disassembler. To 13760484Sobrien extract this operand type from an instruction, check this field. 13860484Sobrien 13960484Sobrien If it is NULL, compute 14060484Sobrien op = ((i) >> o->shift) & ((1 << o->bits) - 1); 14160484Sobrien if ((o->flags & PPC_OPERAND_SIGNED) != 0 14260484Sobrien && (op & (1 << (o->bits - 1))) != 0) 14360484Sobrien op -= 1 << o->bits; 14460484Sobrien (i is the instruction, o is a pointer to this structure, and op 14560484Sobrien is the result; this assumes twos complement arithmetic). 14660484Sobrien 14760484Sobrien If this field is not NULL, then simply call it with the 14860484Sobrien instruction value. It will return the value of the operand. If 14960484Sobrien the INVALID argument is not NULL, *INVALID will be set to 15060484Sobrien non-zero if this operand type can not actually be extracted from 15160484Sobrien this operand (i.e., the instruction does not match). If the 15260484Sobrien operand is valid, *INVALID will not be changed. */ 15389857Sobrien long (*extract) PARAMS ((unsigned long instruction, int dialect, 15489857Sobrien int *invalid)); 15560484Sobrien 15660484Sobrien /* One bit syntax flags. */ 15760484Sobrien unsigned long flags; 15860484Sobrien}; 15960484Sobrien 16060484Sobrien/* Elements in the table are retrieved by indexing with values from 16160484Sobrien the operands field of the powerpc_opcodes table. */ 16260484Sobrien 16360484Sobrienextern const struct powerpc_operand powerpc_operands[]; 16460484Sobrien 16560484Sobrien/* Values defined for the flags field of a struct powerpc_operand. */ 16660484Sobrien 16760484Sobrien/* This operand takes signed values. */ 16860484Sobrien#define PPC_OPERAND_SIGNED (01) 16960484Sobrien 17060484Sobrien/* This operand takes signed values, but also accepts a full positive 17160484Sobrien range of values when running in 32 bit mode. That is, if bits is 17260484Sobrien 16, it takes any value from -0x8000 to 0xffff. In 64 bit mode, 17360484Sobrien this flag is ignored. */ 17460484Sobrien#define PPC_OPERAND_SIGNOPT (02) 17560484Sobrien 17660484Sobrien/* This operand does not actually exist in the assembler input. This 17760484Sobrien is used to support extended mnemonics such as mr, for which two 17860484Sobrien operands fields are identical. The assembler should call the 17960484Sobrien insert function with any op value. The disassembler should call 18060484Sobrien the extract function, ignore the return value, and check the value 18160484Sobrien placed in the valid argument. */ 18260484Sobrien#define PPC_OPERAND_FAKE (04) 18360484Sobrien 18460484Sobrien/* The next operand should be wrapped in parentheses rather than 18560484Sobrien separated from this one by a comma. This is used for the load and 18660484Sobrien store instructions which want their operands to look like 18760484Sobrien reg,displacement(reg) 18860484Sobrien */ 18960484Sobrien#define PPC_OPERAND_PARENS (010) 19060484Sobrien 19160484Sobrien/* This operand may use the symbolic names for the CR fields, which 19260484Sobrien are 19360484Sobrien lt 0 gt 1 eq 2 so 3 un 3 19460484Sobrien cr0 0 cr1 1 cr2 2 cr3 3 19560484Sobrien cr4 4 cr5 5 cr6 6 cr7 7 19660484Sobrien These may be combined arithmetically, as in cr2*4+gt. These are 19760484Sobrien only supported on the PowerPC, not the POWER. */ 19860484Sobrien#define PPC_OPERAND_CR (020) 19960484Sobrien 20060484Sobrien/* This operand names a register. The disassembler uses this to print 20160484Sobrien register names with a leading 'r'. */ 20260484Sobrien#define PPC_OPERAND_GPR (040) 20360484Sobrien 20460484Sobrien/* This operand names a floating point register. The disassembler 20560484Sobrien prints these with a leading 'f'. */ 20660484Sobrien#define PPC_OPERAND_FPR (0100) 20760484Sobrien 20860484Sobrien/* This operand is a relative branch displacement. The disassembler 20960484Sobrien prints these symbolically if possible. */ 21060484Sobrien#define PPC_OPERAND_RELATIVE (0200) 21160484Sobrien 21260484Sobrien/* This operand is an absolute branch address. The disassembler 21360484Sobrien prints these symbolically if possible. */ 21460484Sobrien#define PPC_OPERAND_ABSOLUTE (0400) 21560484Sobrien 21660484Sobrien/* This operand is optional, and is zero if omitted. This is used for 21760484Sobrien the optional BF and L fields in the comparison instructions. The 21860484Sobrien assembler must count the number of operands remaining on the line, 21960484Sobrien and the number of operands remaining for the opcode, and decide 22060484Sobrien whether this operand is present or not. The disassembler should 22160484Sobrien print this operand out only if it is not zero. */ 22260484Sobrien#define PPC_OPERAND_OPTIONAL (01000) 22360484Sobrien 22460484Sobrien/* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand 22560484Sobrien is omitted, then for the next operand use this operand value plus 22660484Sobrien 1, ignoring the next operand field for the opcode. This wretched 22760484Sobrien hack is needed because the Power rotate instructions can take 22860484Sobrien either 4 or 5 operands. The disassembler should print this operand 22960484Sobrien out regardless of the PPC_OPERAND_OPTIONAL field. */ 23060484Sobrien#define PPC_OPERAND_NEXT (02000) 23160484Sobrien 23260484Sobrien/* This operand should be regarded as a negative number for the 23360484Sobrien purposes of overflow checking (i.e., the normal most negative 23460484Sobrien number is disallowed and one more than the normal most positive 23560484Sobrien number is allowed). This flag will only be set for a signed 23660484Sobrien operand. */ 23760484Sobrien#define PPC_OPERAND_NEGATIVE (04000) 23877298Sobrien 23977298Sobrien/* This operand names a vector unit register. The disassembler 24077298Sobrien prints these with a leading 'v'. */ 24177298Sobrien#define PPC_OPERAND_VR (010000) 24277298Sobrien 24389857Sobrien/* This operand is for the DS field in a DS form instruction. */ 24489857Sobrien#define PPC_OPERAND_DS (020000) 24560484Sobrien 24660484Sobrien/* The POWER and PowerPC assemblers use a few macros. We keep them 24760484Sobrien with the operands table for simplicity. The macro table is an 24860484Sobrien array of struct powerpc_macro. */ 24960484Sobrien 25060484Sobrienstruct powerpc_macro 25160484Sobrien{ 25260484Sobrien /* The macro name. */ 25360484Sobrien const char *name; 25460484Sobrien 25560484Sobrien /* The number of operands the macro takes. */ 25660484Sobrien unsigned int operands; 25760484Sobrien 25860484Sobrien /* One bit flags for the opcode. These are used to indicate which 25960484Sobrien specific processors support the instructions. The values are the 26060484Sobrien same as those for the struct powerpc_opcode flags field. */ 26160484Sobrien unsigned long flags; 26260484Sobrien 26360484Sobrien /* A format string to turn the macro into a normal instruction. 26460484Sobrien Each %N in the string is replaced with operand number N (zero 26560484Sobrien based). */ 26660484Sobrien const char *format; 26760484Sobrien}; 26860484Sobrien 26960484Sobrienextern const struct powerpc_macro powerpc_macros[]; 27060484Sobrienextern const int powerpc_num_macros; 27160484Sobrien 27260484Sobrien#endif /* PPC_H */ 273