tc-i386.h revision 33973
1/* tc-i386.h -- Header file for tc-i386.c
2   Copyright (C) 1989, 92, 93, 94, 95, 96, 1997 Free Software Foundation.
3
4   This file is part of GAS, the GNU Assembler.
5
6   GAS is free software; you can redistribute it and/or modify
7   it under the terms of the GNU General Public License as published by
8   the Free Software Foundation; either version 2, or (at your option)
9   any later version.
10
11   GAS is distributed in the hope that it will be useful,
12   but WITHOUT ANY WARRANTY; without even the implied warranty of
13   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14   GNU General Public License for more details.
15
16   You should have received a copy of the GNU General Public License
17   along with GAS; see the file COPYING.  If not, write to the Free
18   Software Foundation, 59 Temple Place - Suite 330, Boston, MA
19   02111-1307, USA.  */
20
21#ifndef TC_I386
22#define TC_I386 1
23
24#ifdef ANSI_PROTOTYPES
25struct fix;
26#endif
27
28#define TARGET_BYTES_BIG_ENDIAN	0
29
30#ifdef TE_LYNX
31#define TARGET_FORMAT		"coff-i386-lynx"
32#endif
33
34#ifdef BFD_ASSEMBLER
35/* This is used to determine relocation types in tc-i386.c.  The first
36   parameter is the current relocation type, the second one is the desired
37   type.  The idea is that if the original type is already some kind of PIC
38   relocation, we leave it alone, otherwise we give it the desired type */
39
40#define TC_RELOC(X,Y) (((X) != BFD_RELOC_386_PLT32 && \
41	   (X) != BFD_RELOC_386_GOTOFF && \
42	   (X) != BFD_RELOC_386_GOT32 && \
43	   (X) != BFD_RELOC_386_GOTPC) ? Y : X)
44
45#define tc_fix_adjustable(X)  tc_i386_fix_adjustable(X)
46extern int tc_i386_fix_adjustable PARAMS ((struct fix *));
47
48/* This is the relocation type for direct references to GLOBAL_OFFSET_TABLE.
49 * It comes up in complicated expressions such as
50 * _GLOBAL_OFFSET_TABLE_+[.-.L284], which cannot be expressed normally with
51 * the regular expressions.  The fixup specified here when used at runtime
52 * implies that we should add the address of the GOT to the specified location,
53 * and as a result we have simplified the expression into something we can use.
54 */
55#define TC_RELOC_GLOBAL_OFFSET_TABLE BFD_RELOC_386_GOTPC
56
57/* This expression evaluates to false if the relocation is for a local object
58   for which we still want to do the relocation at runtime.  True if we
59   are willing to perform this relocation while building the .o file.
60   This is only used for pcrel relocations, so GOTOFF does not need to be
61   checked here.  I am not sure if some of the others are ever used with
62   pcrel, but it is easier to be safe than sorry. */
63
64#define TC_RELOC_RTSYM_LOC_FIXUP(FIX)  \
65  ((FIX)->fx_r_type != BFD_RELOC_386_PLT32 \
66   && (FIX)->fx_r_type != BFD_RELOC_386_GOT32 \
67   && (FIX)->fx_r_type != BFD_RELOC_386_GOTPC)
68
69#define TARGET_ARCH		bfd_arch_i386
70
71#ifdef OBJ_AOUT
72#ifdef TE_FreeBSD
73#define TARGET_FORMAT		"a.out-i386-freebsd"
74#endif
75#ifdef TE_NetBSD
76#define TARGET_FORMAT		"a.out-i386-netbsd"
77#endif
78#ifdef TE_386BSD
79#define TARGET_FORMAT		"a.out-i386-bsd"
80#endif
81#ifdef TE_LINUX
82#define TARGET_FORMAT		"a.out-i386-linux"
83#endif
84#ifdef TE_Mach
85#define TARGET_FORMAT		"a.out-mach3"
86#endif
87#ifdef TE_DYNIX
88#define TARGET_FORMAT		"a.out-i386-dynix"
89#endif
90#ifndef TARGET_FORMAT
91#define TARGET_FORMAT		"a.out-i386"
92#endif
93#endif /* OBJ_AOUT */
94
95#ifdef OBJ_ELF
96#define TARGET_FORMAT		"elf32-i386"
97#endif
98
99#ifdef OBJ_MAYBE_ELF
100#ifdef OBJ_MAYBE_COFF
101extern const char *i386_target_format PARAMS ((void));
102#define TARGET_FORMAT i386_target_format ()
103#endif
104#endif
105
106#else /* ! BFD_ASSEMBLER */
107
108/* COFF STUFF */
109
110#define COFF_MAGIC I386MAGIC
111#define BFD_ARCH bfd_arch_i386
112#define COFF_FLAGS F_AR32WR
113#define TC_COUNT_RELOC(x) ((x)->fx_addsy || (x)->fx_r_type==7)
114#define TC_FORCE_RELOCATION(x) ((x)->fx_r_type==7)
115#define TC_COFF_FIX2RTYPE(fixP) tc_coff_fix2rtype(fixP)
116extern short tc_coff_fix2rtype PARAMS ((struct fix *));
117#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep(frag)
118extern int tc_coff_sizemachdep PARAMS ((fragS *frag));
119#define SUB_SEGMENT_ALIGN(SEG) 2
120#define TC_RVA_RELOC 7
121/* Need this for PIC relocations */
122#define NEED_FX_R_TYPE
123
124
125#ifdef TE_386BSD
126/* The BSDI linker apparently rejects objects with a machine type of
127   M_386 (100).  */
128#define AOUT_MACHTYPE 0
129#else
130#define AOUT_MACHTYPE 100
131#endif
132
133#undef REVERSE_SORT_RELOCS
134
135#endif /* ! BFD_ASSEMBLER */
136
137#ifdef BFD_ASSEMBLER
138#define NO_RELOC BFD_RELOC_NONE
139#else
140#define NO_RELOC 0
141#endif
142#define tc_coff_symbol_emit_hook(a)	;	/* not used */
143
144#ifndef BFD_ASSEMBLER
145#ifndef OBJ_AOUT
146#ifndef TE_PE
147/* Local labels starts with .L */
148#define LOCAL_LABEL(name) (name[0] == '.' \
149		 && (name[1] == 'L' || name[1] == 'X' || name[1] == '.'))
150#endif
151#endif
152#endif
153
154#define LOCAL_LABELS_FB 1
155
156#define tc_aout_pre_write_hook(x)	{;}	/* not used */
157#define tc_crawl_symbol_chain(a)	{;}	/* not used */
158#define tc_headers_hook(a)		{;}	/* not used */
159
160#define MAX_OPERANDS 3		/* max operands per insn */
161#define MAX_PREFIXES 5		/* max prefixes per opcode */
162#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn */
163#define MAX_MEMORY_OPERANDS 2	/* max memory ref per insn (lcall uses 2) */
164
165/* we define the syntax here (modulo base,index,scale syntax) */
166#define REGISTER_PREFIX '%'
167#define IMMEDIATE_PREFIX '$'
168#define ABSOLUTE_PREFIX '*'
169#define PREFIX_SEPERATOR '/'
170
171#define TWO_BYTE_OPCODE_ESCAPE 0x0f
172#define NOP_OPCODE (char) 0x90
173
174/* register numbers */
175#define EBP_REG_NUM 5
176#define ESP_REG_NUM 4
177
178/* modrm_byte.regmem for twobyte escape */
179#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
180/* index_base_byte.index for no index register addressing */
181#define NO_INDEX_REGISTER ESP_REG_NUM
182/* index_base_byte.base for no base register addressing */
183#define NO_BASE_REGISTER EBP_REG_NUM
184
185/* these are the att as opcode suffixes, making movl --> mov, for example */
186#define DWORD_OPCODE_SUFFIX 'l'
187#define WORD_OPCODE_SUFFIX  'w'
188#define BYTE_OPCODE_SUFFIX  'b'
189
190/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
191#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
192#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
193
194#define END_OF_INSN '\0'
195
196/*
197  When an operand is read in it is classified by its type.  This type includes
198  all the possible ways an operand can be used.  Thus, '%eax' is both 'register
199  # 0' and 'The Accumulator'.  In our language this is expressed by OR'ing
200  'Reg32' (any 32 bit register) and 'Acc' (the accumulator).
201  Operands are classified so that we can match given operand types with
202  the opcode table in i386-opcode.h.
203  */
204#define Unknown 0x0
205/* register */
206#define Reg8    0x1		/* 8 bit reg */
207#define Reg16   0x2		/* 16 bit reg */
208#define Reg32   0x4		/* 32 bit reg */
209#define Reg     (Reg8|Reg16|Reg32)	/* gen'l register */
210#define WordReg (Reg16|Reg32)	/* for push/pop operands */
211/* immediate */
212#define Imm8    0x8		/* 8 bit immediate */
213#define Imm8S	0x10		/* 8 bit immediate sign extended */
214#define Imm16   0x20		/* 16 bit immediate */
215#define Imm32   0x40		/* 32 bit immediate */
216#define Imm1    0x80		/* 1 bit immediate */
217#define ImmUnknown Imm32	/* for unknown expressions */
218#define Imm     (Imm8|Imm8S|Imm16|Imm32)	/* gen'l immediate */
219/* memory */
220#define Disp8   0x200		/* 8 bit displacement (for jumps) */
221#define Disp16  0x400		/* 16 bit displacement */
222#define Disp32  0x800		/* 32 bit displacement */
223#define Disp    (Disp8|Disp16|Disp32)	/* General displacement */
224#define DispUnknown Disp32	/* for unknown size displacements */
225#define Mem8    0x1000
226#define Mem16   0x2000
227#define Mem32   0x4000
228#define BaseIndex 0x8000
229#define Mem     (Disp|Mem8|Mem16|Mem32|BaseIndex)	/* General memory */
230#define WordMem   (Mem16|Mem32|Disp|BaseIndex)
231#define ByteMem   (Mem8|Disp|BaseIndex)
232/* specials */
233#define InOutPortReg 0x10000	/* register to hold in/out port addr = dx */
234#define ShiftCount 0x20000	/* register to hold shift cound = cl */
235#define Control 0x40000		/* Control register */
236#define Debug   0x80000		/* Debug register */
237#define Test    0x100000	/* Test register */
238#define FloatReg 0x200000	/* Float register */
239#define FloatAcc 0x400000	/* Float stack top %st(0) */
240#define SReg2   0x800000	/* 2 bit segment register */
241#define SReg3   0x1000000	/* 3 bit segment register */
242#define Acc     0x2000000	/* Accumulator %al or %ax or %eax */
243#define ImplicitRegister (InOutPortReg|ShiftCount|Acc|FloatAcc)
244#define JumpAbsolute 0x4000000
245#define Abs8  0x08000000
246#define Abs16 0x10000000
247#define Abs32 0x20000000
248#define Abs (Abs8|Abs16|Abs32)
249#define RegMMX 0x40000000	/* MMX register */
250
251#define Byte (Reg8|Imm8|Imm8S)
252#define Word (Reg16|Imm16)
253#define DWord (Reg32|Imm32)
254
255#define SMALLEST_DISP_TYPE(num) \
256    fits_in_signed_byte(num) ? (Disp8|Disp32|Abs8|Abs32) : (Disp32|Abs32)
257
258typedef struct
259{
260  /* instruction name sans width suffix ("mov" for movl insns) */
261  char *name;
262
263  /* how many operands */
264  unsigned int operands;
265
266  /* base_opcode is the fundamental opcode byte with a optional prefix(es). */
267  unsigned int base_opcode;
268
269  /* extension_opcode is the 3 bit extension for group <n> insns.
270     If this template has no extension opcode (the usual case) use None */
271  unsigned char extension_opcode;
272#define None 0xff		/* If no extension_opcode is possible. */
273
274  /* the bits in opcode_modifier are used to generate the final opcode from
275     the base_opcode.  These bits also are used to detect alternate forms of
276     the same instruction */
277  unsigned int opcode_modifier;
278
279  /* opcode_modifier bits: */
280#define W        0x1		/* set if operands are words or dwords */
281#define D        0x2		/* D = 0 if Reg --> Regmem; D = 1 if Regmem --> Reg */
282  /* direction flag for floating insns:  MUST BE 0x400 */
283#define FloatD 0x400
284  /* shorthand */
285#define DW (D|W)
286#define ShortForm 0x10		/* register is in low 3 bits of opcode */
287#define ShortFormW 0x20		/* ShortForm and W bit is 0x8 */
288#define Seg2ShortForm 0x40	/* encoding of load segment reg insns */
289#define Seg3ShortForm 0x80	/* fs/gs segment register insns. */
290#define Jump 0x100		/* special case for jump insns. */
291#define JumpInterSegment 0x200	/* special case for intersegment leaps/calls */
292  /* 0x400 CANNOT BE USED since it's already used by FloatD above */
293#define DONT_USE 0x400
294#define NoModrm 0x800
295#define Modrm 0x1000
296#define imulKludge 0x2000
297#define JumpByte 0x4000
298#define JumpDword 0x8000
299#define ReverseRegRegmem 0x10000
300#define Data16 0x20000		/* needs data prefix if in 32-bit mode */
301#define Data32 0x40000		/* needs data prefix if in 16-bit mode */
302#define iclrKludge 0x80000	/* used to convert clr to xor */
303
304  /* (opcode_modifier & COMES_IN_ALL_SIZES) is true if the
305     instuction comes in byte, word, and dword sizes and is encoded into
306     machine code in the canonical way. */
307#define COMES_IN_ALL_SIZES (W)
308
309  /* (opcode_modifier & COMES_IN_BOTH_DIRECTIONS) indicates that the
310     source and destination operands can be reversed by setting either
311     the D (for integer insns) or the FloatD (for floating insns) bit
312     in base_opcode. */
313#define COMES_IN_BOTH_DIRECTIONS (D|FloatD)
314
315  /* operand_types[i] describes the type of operand i.  This is made
316     by OR'ing together all of the possible type masks.  (e.g.
317     'operand_types[i] = Reg|Imm' specifies that operand i can be
318     either a register or an immediate operand */
319  unsigned int operand_types[3];
320}
321template;
322
323/*
324  'templates' is for grouping together 'template' structures for opcodes
325  of the same name.  This is only used for storing the insns in the grand
326  ole hash table of insns.
327  The templates themselves start at START and range up to (but not including)
328  END.
329  */
330typedef struct
331  {
332    template *start;
333    template *end;
334  } templates;
335
336/* these are for register name --> number & type hash lookup */
337typedef struct
338  {
339    char *reg_name;
340    unsigned int reg_type;
341    unsigned int reg_num;
342  }
343
344reg_entry;
345
346typedef struct
347  {
348    char *seg_name;
349    unsigned int seg_prefix;
350  }
351
352seg_entry;
353
354/* these are for prefix name --> prefix code hash lookup */
355typedef struct
356  {
357    char *prefix_name;
358    unsigned char prefix_code;
359  }
360
361prefix_entry;
362
363/* 386 operand encoding bytes:  see 386 book for details of this. */
364typedef struct
365  {
366    unsigned regmem:3;		/* codes register or memory operand */
367    unsigned reg:3;		/* codes register operand (or extended opcode) */
368    unsigned mode:2;		/* how to interpret regmem & reg */
369  }
370
371modrm_byte;
372
373/* 386 opcode byte to code indirect addressing. */
374typedef struct
375  {
376    unsigned base:3;
377    unsigned index:3;
378    unsigned scale:2;
379  }
380
381base_index_byte;
382
383/* The name of the global offset table generated by the compiler. Allow
384   this to be overridden if need be. */
385#ifndef GLOBAL_OFFSET_TABLE_NAME
386#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
387#endif
388
389#ifdef BFD_ASSEMBLER
390void i386_validate_fix PARAMS ((struct fix *));
391#define TC_VALIDATE_FIX(FIXP,SEGTYPE,SKIP) i386_validate_fix(FIXP)
392#endif
393
394#endif /* TC_I386 */
395
396#define md_operand(x)
397
398extern const struct relax_type md_relax_table[];
399#define TC_GENERIC_RELAX_TABLE md_relax_table
400
401
402extern int flag_16bit_code;
403
404#define md_do_align(n, fill, len, max, around)				\
405if ((n) && !need_pass_2							\
406    && (!(fill) || ((char)*(fill) == (char)0x90 && (len) == 1))		\
407    && now_seg != data_section && now_seg != bss_section)		\
408  {									\
409    char *p;								\
410    p = frag_var (rs_align_code, 15, 1, (relax_substateT) max,		\
411		  (symbolS *) 0, (offsetT) (n), (char *) 0);		\
412    *p = 0x90;								\
413    goto around;							\
414  }
415
416extern void i386_align_code PARAMS ((fragS *, int));
417
418#define HANDLE_ALIGN(fragP)						\
419if (fragP->fr_type == rs_align_code) 					\
420  i386_align_code (fragP, (fragP->fr_next->fr_address			\
421			   - fragP->fr_address				\
422			   - fragP->fr_fix));
423
424/* call md_apply_fix3 with segment instead of md_apply_fix */
425#define MD_APPLY_FIX3
426
427void i386_print_statistics PARAMS ((FILE *));
428#define tc_print_statistics i386_print_statistics
429
430#define md_number_to_chars number_to_chars_littleendian
431
432#ifdef SCO_ELF
433#define tc_init_after_args() sco_id ()
434extern void sco_id PARAMS ((void));
435#endif
436
437/* end of tc-i386.h */
438