1/* 2 * Copyright (c) 2009 Apple Inc. All rights reserved. 3 * 4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ 5 * 6 * This file contains Original Code and/or Modifications of Original Code 7 * as defined in and that are subject to the Apple Public Source License 8 * Version 2.0 (the 'License'). You may not use this file except in 9 * compliance with the License. The rights granted to you under the License 10 * may not be used to create, or enable the creation or redistribution of, 11 * unlawful or unlicensed copies of an Apple operating system, or to 12 * circumvent, violate, or enable the circumvention or violation of, any 13 * terms of an Apple operating system software license agreement. 14 * 15 * Please obtain a copy of the License at 16 * http://www.opensource.apple.com/apsl/ and read it before using this file. 17 * 18 * The Original Code and all software distributed under the License are 19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER 20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, 21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, 22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. 23 * Please see the License for the specific language governing rights and 24 * limitations under the License. 25 * 26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ 27 */ 28/* 29* @OSF_COPYRIGHT@ 30*/ 31/* 32* Mach Operating System 33* Copyright (c) 1991,1990,1989,1988 Carnegie Mellon University 34* All Rights Reserved. 35* 36* Permission to use, copy, modify and distribute this software and its 37* documentation is hereby granted, provided that both the copyright 38* notice and this permission notice appear in all copies of the 39* software, derivative works or modified versions, and any portions 40* thereof, and that both notices appear in supporting documentation. 41* 42* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 43* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR 44* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 45* 46* Carnegie Mellon requests users of this software to return to 47* 48* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 49* School of Computer Science 50* Carnegie Mellon University 51* Pittsburgh PA 15213-3890 52* 53* any improvements or extensions that they make and grant Carnegie Mellon 54* the rights to redistribute these changes. 55*/ 56/* 57*/ 58 59/* 60* Hardware trap/fault handler. 61 */ 62 63#include <types.h> 64#include <i386/eflags.h> 65#include <i386/trap.h> 66#include <i386/pmap.h> 67#include <i386/fpu.h> 68#include <i386/misc_protos.h> /* panic_io_port_read() */ 69 70#include <mach/exception.h> 71#include <mach/kern_return.h> 72#include <mach/vm_param.h> 73#include <mach/i386/thread_status.h> 74 75#include <kern/kern_types.h> 76#include <kern/processor.h> 77#include <kern/thread.h> 78#include <kern/task.h> 79#include <kern/sched.h> 80#include <kern/sched_prim.h> 81#include <kern/exception.h> 82#include <kern/spl.h> 83#include <kern/misc_protos.h> 84#include <kern/debug.h> 85 86#include <sys/kdebug.h> 87 88#include <string.h> 89 90#include <i386/postcode.h> 91#include <i386/mp_desc.h> 92#include <i386/proc_reg.h> 93#if CONFIG_MCA 94#include <i386/machine_check.h> 95#endif 96#include <mach/i386/syscall_sw.h> 97 98#include <machine/pal_routines.h> 99#include <libkern/OSAtomic.h> 100 101extern void kprintf_break_lock(void); 102extern void kprint_state(x86_saved_state64_t *saved_state); 103void panic_64(x86_saved_state_t *, int, const char *, boolean_t); 104 105extern volatile int panic_double_fault_cpu; 106 107 108#if defined(__x86_64__) && DEBUG 109/* 110 * K64 debug - fatal handler for debug code in the trap vectors. 111 */ 112extern void 113panic_idt64(x86_saved_state_t *rsp); 114void 115panic_idt64(x86_saved_state_t *rsp) 116{ 117 kprint_state(saved_state64(rsp)); 118 panic("panic_idt64"); 119} 120#endif 121 122#ifdef __i386__ 123static void 124panic_32(__unused int code, __unused int pc, __unused const char *msg, boolean_t do_mca_dump, boolean_t do_bt) 125{ 126 struct i386_tss *my_ktss = current_ktss(); 127 128 /* Set postcode (DEBUG only) */ 129 postcode(pc); 130 131 /* 132 * Issue an I/O port read if one has been requested - this is an 133 * event logic analyzers can use as a trigger point. 134 */ 135 panic_io_port_read(); 136 137 /* 138 * Break kprintf lock in case of recursion, 139 * and record originally faulted instruction address. 140 */ 141 kprintf_break_lock(); 142 143 if (do_mca_dump) { 144#if CONFIG_MCA 145 /* 146 * Dump the contents of the machine check MSRs (if any). 147 */ 148 mca_dump(); 149#endif 150 } 151 152#if MACH_KDP 153 /* 154 * Print backtrace leading to first fault: 155 */ 156 if (do_bt) 157 panic_i386_backtrace((void *) my_ktss->ebp, 10, NULL, FALSE, NULL); 158#endif 159 160 panic("%s at 0x%08x, code:0x%x, " 161 "registers:\n" 162 "CR0: 0x%08x, CR2: 0x%08x, CR3: 0x%08x, CR4: 0x%08x\n" 163 "EAX: 0x%08x, EBX: 0x%08x, ECX: 0x%08x, EDX: 0x%08x\n" 164 "ESP: 0x%08x, EBP: 0x%08x, ESI: 0x%08x, EDI: 0x%08x\n" 165 "EFL: 0x%08x, EIP: 0x%08x%s\n", 166 msg, 167 my_ktss->eip, code, 168 (uint32_t)get_cr0(), (uint32_t)get_cr2(), (uint32_t)get_cr3(), (uint32_t)get_cr4(), 169 my_ktss->eax, my_ktss->ebx, my_ktss->ecx, my_ktss->edx, 170 my_ktss->esp, my_ktss->ebp, my_ktss->esi, my_ktss->edi, 171 my_ktss->eflags, my_ktss->eip, virtualized ? " VMM" : ""); 172} 173 174/* 175 * Called from locore on a special reserved stack after a double-fault 176 * is taken in kernel space. 177 * Kernel stack overflow is one route here. 178 */ 179void 180panic_double_fault32(int code) 181{ 182 (void)OSCompareAndSwap((UInt32) -1, (UInt32) cpu_number(), (volatile UInt32 *)&panic_double_fault_cpu); 183 panic_32(code, PANIC_DOUBLE_FAULT, "Double fault", FALSE, TRUE); 184} 185 186/* 187 * Called from locore on a special reserved stack after a machine-check 188 */ 189void 190panic_machine_check32(int code) 191{ 192 panic_32(code, PANIC_MACHINE_CHECK, "Machine-check", TRUE, FALSE); 193} 194#endif /* __i386__ */ 195 196void 197panic_64(x86_saved_state_t *sp, __unused int pc, __unused const char *msg, boolean_t do_mca_dump) 198{ 199 /* Set postcode (DEBUG only) */ 200 postcode(pc); 201 202 /* 203 * Issue an I/O port read if one has been requested - this is an 204 * event logic analyzers can use as a trigger point. 205 */ 206 panic_io_port_read(); 207 208 209 /* 210 * Break kprintf lock in case of recursion, 211 * and record originally faulted instruction address. 212 */ 213 kprintf_break_lock(); 214 215 if (do_mca_dump) { 216#if CONFIG_MCA 217 /* 218 * Dump the contents of the machine check MSRs (if any). 219 */ 220 mca_dump(); 221#endif 222 } 223 224#ifdef __i386__ 225 /* 226 * Dump the interrupt stack frame at last kernel entry. 227 */ 228 if (is_saved_state64(sp)) { 229 x86_saved_state64_t *ss64p = saved_state64(sp); 230 panic("%s trapno:0x%x, err:0x%qx, " 231 "registers:\n" 232 "CR0: 0x%08x, CR2: 0x%08x, CR3: 0x%08x, CR4: 0x%08x\n" 233 "RAX: 0x%016qx, RBX: 0x%016qx, RCX: 0x%016qx, RDX: 0x%016qx\n" 234 "RSP: 0x%016qx, RBP: 0x%016qx, RSI: 0x%016qx, RDI: 0x%016qx\n" 235 "R8: 0x%016qx, R9: 0x%016qx, R10: 0x%016qx, R11: 0x%016qx\n" 236 "R12: 0x%016qx, R13: 0x%016qx, R14: 0x%016qx, R15: 0x%016qx\n" 237 "RFL: 0x%016qx, RIP: 0x%016qx, CR2: 0x%016qx%s\n", 238 msg, 239 ss64p->isf.trapno, ss64p->isf.err, 240 (uint32_t)get_cr0(), (uint32_t)get_cr2(), (uint32_t)get_cr3(), (uint32_t)get_cr4(), 241 ss64p->rax, ss64p->rbx, ss64p->rcx, ss64p->rdx, 242 ss64p->isf.rsp, ss64p->rbp, ss64p->rsi, ss64p->rdi, 243 ss64p->r8, ss64p->r9, ss64p->r10, ss64p->r11, 244 ss64p->r12, ss64p->r13, ss64p->r14, ss64p->r15, 245 ss64p->isf.rflags, ss64p->isf.rip, ss64p->cr2, 246 virtualized ? " VMM" : ""); 247 } else { 248 x86_saved_state32_t *ss32p = saved_state32(sp); 249 panic("%s at 0x%08x, trapno:0x%x, err:0x%x," 250 "registers:\n" 251 "CR0: 0x%08x, CR2: 0x%08x, CR3: 0x%08x, CR4: 0x%08x\n" 252 "EAX: 0x%08x, EBX: 0x%08x, ECX: 0x%08x, EDX: 0x%08x\n" 253 "ESP: 0x%08x, EBP: 0x%08x, ESI: 0x%08x, EDI: 0x%08x\n" 254 "EFL: 0x%08x, EIP: 0x%08x%s\n", 255 msg, 256 ss32p->eip, ss32p->trapno, ss32p->err, 257 (uint32_t)get_cr0(), (uint32_t)get_cr2(), (uint32_t)get_cr3(), (uint32_t)get_cr4(), 258 ss32p->eax, ss32p->ebx, ss32p->ecx, ss32p->edx, 259 ss32p->uesp, ss32p->ebp, ss32p->esi, ss32p->edi, 260 ss32p->efl, ss32p->eip, virtualized ? " VMM" : ""); 261 } 262#else 263 x86_saved_state64_t *regs = saved_state64(sp); 264 panic("%s at 0x%016llx, registers:\n" 265 "CR0: 0x%016lx, CR2: 0x%016lx, CR3: 0x%016lx, CR4: 0x%016lx\n" 266 "RAX: 0x%016llx, RBX: 0x%016llx, RCX: 0x%016llx, RDX: 0x%016llx\n" 267 "RSP: 0x%016llx, RBP: 0x%016llx, RSI: 0x%016llx, RDI: 0x%016llx\n" 268 "R8: 0x%016llx, R9: 0x%016llx, R10: 0x%016llx, R11: 0x%016llx\n" 269 "R12: 0x%016llx, R13: 0x%016llx, R14: 0x%016llx, R15: 0x%016llx\n" 270 "RFL: 0x%016llx, RIP: 0x%016llx, CS: 0x%016llx, SS: 0x%016llx\n" 271 "Error code: 0x%016llx%s\n", 272 msg, 273 regs->isf.rip, 274 get_cr0(), get_cr2(), get_cr3_raw(), get_cr4(), 275 regs->rax, regs->rbx, regs->rcx, regs->rdx, 276 regs->isf.rsp, regs->rbp, regs->rsi, regs->rdi, 277 regs->r8, regs->r9, regs->r10, regs->r11, 278 regs->r12, regs->r13, regs->r14, regs->r15, 279 regs->isf.rflags, regs->isf.rip, regs->isf.cs & 0xFFFF, regs->isf.ss & 0xFFFF, 280 regs->isf.err, virtualized ? " VMM" : ""); 281#endif 282} 283 284void 285panic_double_fault64(x86_saved_state_t *sp) 286{ 287 (void)OSCompareAndSwap((UInt32) -1, (UInt32) cpu_number(), (volatile UInt32 *)&panic_double_fault_cpu); 288 panic_64(sp, PANIC_DOUBLE_FAULT, "Double fault", FALSE); 289 290} 291void 292 293panic_machine_check64(x86_saved_state_t *sp) 294{ 295 panic_64(sp, PANIC_MACHINE_CHECK, "Machine Check", TRUE); 296 297} 298