1/*
2 * Copyright (c) 2000-2009 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
31
32#ifndef	_I386_MACHINE_ROUTINES_H_
33#define	_I386_MACHINE_ROUTINES_H_
34
35#include <mach/mach_types.h>
36#include <mach/boolean.h>
37#include <kern/kern_types.h>
38#include <pexpert/pexpert.h>
39
40#include <sys/cdefs.h>
41#include <sys/appleapiopts.h>
42
43__BEGIN_DECLS
44
45#ifdef XNU_KERNEL_PRIVATE
46
47/* are we a 64 bit platform ? */
48
49boolean_t ml_is64bit(void);
50
51/* is this a 64bit thread? */
52
53boolean_t ml_thread_is64bit(thread_t);
54
55/* is this a 64bit thread? */
56
57boolean_t ml_state_is64bit(void *);
58
59/* set state of fpu save area for signal handling */
60
61void	ml_fp_setvalid(boolean_t);
62
63void	ml_cpu_set_ldt(int);
64
65/* Interrupt handling */
66
67/* Initialize Interrupts */
68void    ml_init_interrupt(void);
69
70/* Generate a fake interrupt */
71void ml_cause_interrupt(void);
72
73/* Initialize Interrupts */
74void ml_install_interrupt_handler(
75    void *nub,
76    int source,
77    void *target,
78    IOInterruptHandler handler,
79    void *refCon);
80
81void ml_get_timebase(unsigned long long *timestamp);
82void ml_init_lock_timeout(void);
83void ml_init_delay_spin_threshold(int);
84
85boolean_t ml_delay_should_spin(uint64_t interval);
86
87vm_offset_t
88ml_static_ptovirt(
89	vm_offset_t);
90
91void ml_static_mfree(
92	vm_offset_t,
93	vm_size_t);
94
95/* boot memory allocation */
96vm_offset_t ml_static_malloc(
97	vm_size_t size);
98
99/* virtual to physical on wired pages */
100vm_offset_t ml_vtophys(
101	vm_offset_t vaddr);
102
103vm_size_t ml_nofault_copy(
104	vm_offset_t virtsrc, vm_offset_t virtdst, vm_size_t size);
105
106/* Machine topology info */
107uint64_t ml_cpu_cache_size(unsigned int level);
108uint64_t ml_cpu_cache_sharing(unsigned int level);
109
110/* Initialize the maximum number of CPUs */
111void ml_init_max_cpus(
112	unsigned long max_cpus);
113
114extern void	ml_cpu_up(void);
115extern void	ml_cpu_down(void);
116
117void bzero_phys_nc(
118				   addr64_t phys_address,
119				   uint32_t length);
120
121#if	defined(PEXPERT_KERNEL_PRIVATE) || defined(MACH_KERNEL_PRIVATE)
122/* IO memory map services */
123
124/* Map memory map IO space */
125vm_offset_t ml_io_map(
126	vm_offset_t phys_addr,
127	vm_size_t size);
128
129
130void	ml_get_bouncepool_info(
131			       vm_offset_t *phys_addr,
132			       vm_size_t   *size);
133/* Indicates if spinlock, IPI and other timeouts should be suspended */
134boolean_t machine_timeout_suspended(void);
135#endif /* PEXPERT_KERNEL_PRIVATE || MACH_KERNEL_PRIVATE  */
136
137/* Warm up a CPU to receive an interrupt */
138kern_return_t ml_interrupt_prewarm(uint64_t deadline);
139
140#endif /* XNU_KERNEL_PRIVATE */
141
142#ifdef KERNEL_PRIVATE
143
144/* Type for the Time Base Enable function */
145typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);
146
147/* Type for the IPI Hander */
148typedef void (*ipi_handler_t)(void);
149
150/* Struct for ml_processor_register */
151struct ml_processor_info {
152	cpu_id_t			cpu_id;
153	boolean_t			boot_cpu;
154	vm_offset_t			start_paddr;
155	boolean_t			supports_nap;
156	unsigned long		l2cr_value;
157	time_base_enable_t	time_base_enable;
158};
159
160typedef struct ml_processor_info ml_processor_info_t;
161
162
163/* Register a processor */
164kern_return_t
165ml_processor_register(
166        cpu_id_t        cpu_id,
167        uint32_t        lapic_id,
168        processor_t     *processor_out,
169        boolean_t       boot_cpu,
170	boolean_t       start );
171
172/* PCI config cycle probing */
173boolean_t ml_probe_read(
174	vm_offset_t paddr,
175	unsigned int *val);
176boolean_t ml_probe_read_64(
177	addr64_t paddr,
178	unsigned int *val);
179
180/* Read physical address byte */
181unsigned int ml_phys_read_byte(
182	vm_offset_t paddr);
183unsigned int ml_phys_read_byte_64(
184	addr64_t paddr);
185
186/* Read physical address half word */
187unsigned int ml_phys_read_half(
188	vm_offset_t paddr);
189unsigned int ml_phys_read_half_64(
190	addr64_t paddr);
191
192/* Read physical address word*/
193unsigned int ml_phys_read(
194	vm_offset_t paddr);
195unsigned int ml_phys_read_64(
196	addr64_t paddr);
197unsigned int ml_phys_read_word(
198	vm_offset_t paddr);
199unsigned int ml_phys_read_word_64(
200	addr64_t paddr);
201
202/* Read physical address double word */
203unsigned long long ml_phys_read_double(
204	vm_offset_t paddr);
205unsigned long long ml_phys_read_double_64(
206	addr64_t paddr);
207
208/* Write physical address byte */
209void ml_phys_write_byte(
210	vm_offset_t paddr, unsigned int data);
211void ml_phys_write_byte_64(
212	addr64_t paddr, unsigned int data);
213
214/* Write physical address half word */
215void ml_phys_write_half(
216	vm_offset_t paddr, unsigned int data);
217void ml_phys_write_half_64(
218	addr64_t paddr, unsigned int data);
219
220/* Write physical address word */
221void ml_phys_write(
222	vm_offset_t paddr, unsigned int data);
223void ml_phys_write_64(
224	addr64_t paddr, unsigned int data);
225void ml_phys_write_word(
226	vm_offset_t paddr, unsigned int data);
227void ml_phys_write_word_64(
228	addr64_t paddr, unsigned int data);
229
230/* Write physical address double word */
231void ml_phys_write_double(
232	vm_offset_t paddr, unsigned long long data);
233void ml_phys_write_double_64(
234	addr64_t paddr, unsigned long long data);
235
236/* Struct for ml_cpu_get_info */
237struct ml_cpu_info {
238	uint32_t	vector_unit;
239	uint32_t	cache_line_size;
240	uint32_t	l1_icache_size;
241	uint32_t	l1_dcache_size;
242	uint32_t	l2_settings;
243	uint32_t	l2_cache_size;
244	uint32_t	l3_settings;
245	uint32_t	l3_cache_size;
246};
247
248typedef struct ml_cpu_info ml_cpu_info_t;
249
250/* Get processor info */
251void ml_cpu_get_info(ml_cpu_info_t *ml_cpu_info);
252
253void ml_thread_policy(
254	thread_t thread,
255	unsigned policy_id,
256	unsigned policy_info);
257
258#define MACHINE_GROUP					0x00000001
259#define MACHINE_NETWORK_GROUP			0x10000000
260#define MACHINE_NETWORK_WORKLOOP		0x00000001
261#define MACHINE_NETWORK_NETISR			0x00000002
262
263/* Return the maximum number of CPUs set by ml_init_max_cpus() */
264int ml_get_max_cpus(
265	void);
266
267/*
268 * The following are in pmCPU.c not machine_routines.c.
269 */
270extern void ml_set_maxsnoop(uint32_t maxdelay);
271extern unsigned ml_get_maxsnoop(void);
272extern void ml_set_maxbusdelay(uint32_t mdelay);
273extern uint32_t ml_get_maxbusdelay(void);
274extern void ml_set_maxintdelay(uint64_t mdelay);
275extern uint64_t ml_get_maxintdelay(void);
276extern boolean_t ml_get_interrupt_prewake_applicable(void);
277
278
279extern uint64_t tmrCvt(uint64_t time, uint64_t conversion);
280
281extern uint64_t ml_cpu_int_event_time(void);
282
283#endif /* KERNEL_PRIVATE */
284
285/* Get Interrupts Enabled */
286boolean_t ml_get_interrupts_enabled(void);
287
288/* Set Interrupts Enabled */
289boolean_t ml_set_interrupts_enabled(boolean_t enable);
290
291/* Check if running at interrupt context */
292boolean_t ml_at_interrupt_context(void);
293
294/* Zero bytes starting at a physical address */
295void bzero_phys(
296	addr64_t phys_address,
297	uint32_t length);
298
299/* Bytes available on current stack */
300vm_offset_t ml_stack_remaining(void);
301
302#if CONFIG_COUNTERS
303void ml_get_csw_threads(thread_t * /*old*/, thread_t * /*new*/);
304#endif /* CONFIG_COUNTERS */
305
306__END_DECLS
307
308#ifdef	XNU_KERNEL_PRIVATE
309
310boolean_t ml_fpu_avx_enabled(void);
311
312void interrupt_latency_tracker_setup(void);
313void interrupt_reset_latency_stats(void);
314void interrupt_populate_latency_stats(char *, unsigned);
315void ml_get_power_state(boolean_t *, boolean_t *);
316
317#endif /* XNU_KERNEL_PRIVATE */
318#endif /* _I386_MACHINE_ROUTINES_H_ */
319