1/* ********************************************************************* 2 * SB1250 Board Support Package 3 * 4 * Board-specific initialization File: VCS_INIT.S 5 * 6 * This module contains the assembly-language part of the init 7 * code for this board support package. The routine 8 * "board_earlyinit" lives here. 9 * 10 * This board support package is for operation in the Verilog 11 * simulator. 12 * 13 * Author: Mitch Lichtenberg 14 * 15 ********************************************************************* 16 * 17 * Copyright 2000,2001,2002,2003 18 * Broadcom Corporation. All rights reserved. 19 * 20 * This software is furnished under license and may be used and 21 * copied only in accordance with the following terms and 22 * conditions. Subject to these conditions, you may download, 23 * copy, install, use, modify and distribute modified or unmodified 24 * copies of this software in source and/or binary form. No title 25 * or ownership is transferred hereby. 26 * 27 * 1) Any source code used, modified or distributed must reproduce 28 * and retain this copyright notice and list of conditions 29 * as they appear in the source file. 30 * 31 * 2) No right is granted to use any trade name, trademark, or 32 * logo of Broadcom Corporation. The "Broadcom Corporation" 33 * name may not be used to endorse or promote products derived 34 * from this software without the prior written permission of 35 * Broadcom Corporation. 36 * 37 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 38 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 39 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 40 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 41 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 42 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 43 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 44 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 45 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 46 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 47 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 48 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 49 * THE POSSIBILITY OF SUCH DAMAGE. 50 ********************************************************************* */ 51 52 53#include "sbmips.h" 54#include "bsp_config.h" 55#include "cpu_config.h" 56#include "mipsmacros.h" 57#include "bcm1480_regs.h" 58#include "bcm1480_scd.h" 59#include "bcm1480_draminit.h" 60#include "jedec.h" 61#include "vcs1280.h" 62 63 .text 64 65/* ********************************************************************* 66 * Macros 67 ********************************************************************* */ 68 69 70 71/* ********************************************************************* 72 * BOARD_EARLYINIT() 73 * 74 * Initialize board registers. This is the earliest 75 * time the BSP gets control. This routine cannot assume that 76 * memory is operational, and therefore all code in this routine 77 * must run from registers only. The $ra register must not 78 * be modified, as it contains the return address. 79 * 80 * This routine will be called from uncached space, before 81 * the caches are initialized. If you want to make 82 * subroutine calls from here, you must use the CALLKSEG1 macro. 83 * 84 * Among other things, this is where the GPIO registers get 85 * programmed to make on-board LEDs function, or other startup 86 * that has to be done before anything will work. 87 * 88 * Input parameters: 89 * nothing 90 * 91 * Return value: 92 * nothing 93 ********************************************************************* */ 94 95LEAF(board_earlyinit) 96 97 98 j ra 99 100END(board_earlyinit) 101 102 103/* ********************************************************************* 104 * BOARD_DRAMINFO 105 * 106 * Return the address of the DRAM information table. Note that 107 * the address must be obtained in a position-independent way, 108 * so avoid the use of the "la" instruction. 109 * 110 * Input parameters: 111 * nothing 112 * 113 * Return value: 114 * v0 - DRAM info table, return 0 to use default table 115 ********************************************************************* */ 116 117LEAF(board_draminfo) 118 119 120 # 121 # This board has soldered-down memory. (?) 122 # 123 124 la v0,dramtab 125 j ra 126 127 128 /* 129 * Regular DRAM for regular Bigsurs 130 */ 131 132dramtab: 133 134 /* 135 * 64-bit channels. Channel 0: 256 MB 136 * 137 * Model's memory emulates Micron MT46V64M16TG-6 138 * 139 * 13 Rows 140 * 10 columns 141 * 2 banks 142 * 143 * tCK=6ns rfsh=64Khz CASLat=2.5 tRAS=42 tRP=18.0 tRRD=12.0 tRCD=18.0 tRFC=n/a tRC=n/a 144 */ 145 146 DRAM_GLOBALS(CFG_DRAM_INTERLEAVE) 147 148 DRAM_CHAN_CFG(MC_CHAN0, DRT10(6,0), DRT10(3,0), MC_64BIT_CHAN, JEDEC, CASCHECK, CFG_DRAM_CSINTERLEAVE, CFG_DRAM_ECC, 0) 149 DRAM_CS_GEOM(MC_CS0, 13, 10, 2, 0) 150 DRAM_CS_TIMING(DRT10(6,0), JEDEC_RFSH_64khz, JEDEC_CASLAT_25, 0, 42, DRT4(18,0), DRT4(12,0), DRT4(18,0), 0, 0) 151 DRAM_CS_GEOM(MC_CS2, 13, 10, 2, 0) 152 DRAM_CS_TIMING(DRT10(6,0), JEDEC_RFSH_64khz, JEDEC_CASLAT_25, 0, 42, DRT4(18,0), DRT4(12,0), DRT4(18,0), 0, 0) 153 154 DRAM_CHAN_CFG(MC_CHAN1, DRT10(6,0), DRT10(3,0), MC_64BIT_CHAN, JEDEC, CASCHECK, CFG_DRAM_CSINTERLEAVE, CFG_DRAM_ECC, 0) 155 DRAM_CS_GEOM(MC_CS0, 13, 10, 2, 0) 156 DRAM_CS_TIMING(DRT10(6,0), JEDEC_RFSH_64khz, JEDEC_CASLAT_25, 0, 42, DRT4(18,0), DRT4(12,0), DRT4(18,0), 0, 0) 157 DRAM_CS_GEOM(MC_CS2, 13, 10, 2, 0) 158 DRAM_CS_TIMING(DRT10(6,0), JEDEC_RFSH_64khz, JEDEC_CASLAT_25, 0, 42, DRT4(18,0), DRT4(12,0), DRT4(18,0), 0, 0) 159 160/* 161 DRAM_CHAN_CFG(MC_CHAN1, DRT10(8,0), MC_64BIT_CHAN, JEDEC, CASCHECK, CFG_DRAM_CSINTERLEAVE, CFG_DRAM_ECC, 0) 162 DRAM_CS_SPD(MC_CS0,0,CFG_DRAM_SMBUS_CHANNEL,CFG_DRAM_SMBUS_BASE) 163 DRAM_CS_SPD(MC_CS2,0,CFG_DRAM_SMBUS_CHANNEL,CFG_DRAM_SMBUS_BASE+1) 164*/ 165 DRAM_EOT 166 167 168END(board_draminfo) 169 170 171 172/* ********************************************************************* 173 * BOARD_SETLEDS(x) 174 * 175 * Set LEDs for boot-time progress indication. Not used if 176 * the board does not have progress LEDs. This routine 177 * must not call any other routines, since it may be invoked 178 * either from KSEG0 or KSEG1 and it may be invoked 179 * whether or not the icache is operational. 180 * 181 * Input parameters: 182 * a0 - LED value (8 bits per character, 4 characters) 183 * 184 * Return value: 185 * nothing 186 * 187 * Registers used: 188 * t0,t1,t2,t3 189 ********************************************************************* */ 190 191 192LEAF(board_setleds) 193 194 j ra 195 196END(board_setleds) 197 198