1/* ********************************************************************* 2 * Broadcom Common Firmware Environment (CFE) 3 * 4 * Board device initialization File: swarm_pci.c 5 * 6 * This is the part of the board support package for boards 7 * that support PCI. It describes the board-specific slots/devices 8 * and wiring thereof. 9 * 10 ********************************************************************* 11 * 12 * Copyright 2000,2001,2002,2003 13 * Broadcom Corporation. All rights reserved. 14 * 15 * This software is furnished under license and may be used and 16 * copied only in accordance with the following terms and 17 * conditions. Subject to these conditions, you may download, 18 * copy, install, use, modify and distribute modified or unmodified 19 * copies of this software in source and/or binary form. No title 20 * or ownership is transferred hereby. 21 * 22 * 1) Any source code used, modified or distributed must reproduce 23 * and retain this copyright notice and list of conditions 24 * as they appear in the source file. 25 * 26 * 2) No right is granted to use any trade name, trademark, or 27 * logo of Broadcom Corporation. The "Broadcom Corporation" 28 * name may not be used to endorse or promote products derived 29 * from this software without the prior written permission of 30 * Broadcom Corporation. 31 * 32 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 33 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 34 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 35 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 36 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 37 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 38 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 39 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 40 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 41 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 42 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 43 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 44 * THE POSSIBILITY OF SUCH DAMAGE. 45 ********************************************************************* */ 46 47#include "lib_types.h" 48 49#include "pcireg.h" 50#include "pcivar.h" 51#include "pci_internal.h" 52 53/* PCI interrupt mapping on the BCM912500 (SWARM) board: 54 Only device ids 5 and 6 are implemented as PCI connectors, and 55 the only on-board device has id 7 (USB bridge). 56 57 Slot IDSEL DevID INT{A,B,C,D} shift 58 (PHB) - 0 {A,-,-,-} 0 59 (LHB) - 1 {-,-,-,-} 0 60 0 16 5 {A,B,C,D} 0 (identity) 61 1 17 6 {B,C,D,A} 1 (A->B, B->C, C->D, D->A) 62 (USB) 18 7 {C,D,-,-} 2 (A->C, B->D, C->A, D->B) 63 - 3 (A->D, B->A, C->B, D->C) 64 65 Device 1 is the LDT host bridge. By giving it a shift of 0, 66 the normal rotation algorithm gives the correct result for devices 67 on the secondary bus of the LDT host bridge (bus 1). Firmware 68 must program the API 10ll LDT-PCI bridge so that the normal 69 rotation algorithm gives correct results for its secondary (bus 2): 70 71 0 16 0 {A,B,C,D} 0 (identity) 72 1 17 1 {B,C,D,A} 1 (A->B, B->C, C->D, D->A) 73*/ 74 75extern int _pciverbose; 76 77/* Return the base shift of a slot or device on the motherboard. 78 This is board specific, for the SWARM (BCM912500E) only. */ 79uint8_t 80pci_int_shift_0(pcitag_t tag) 81{ 82 int bus, device; 83 84 pci_break_tag(tag, NULL, &bus, &device, NULL); 85 86 if (bus != 0) 87 return 0; 88 switch (device) { 89 case 0: 90 return 0; 91 case 5: case 6: case 7: 92 return ((device - 5) % 4); 93 default: 94 return 0; 95 } 96} 97 98/* Return the mapping of a SWARM device/function interrupt to an 99 interrupt line. For the SB-1250, return 1-4 to indicate the 100 pci_inta - pci_intd inputs to the interrupt mapper, respectively, 101 or 0 if there is no mapping. This is board specific, and the 102 version below is for SWARM (BCM912500E), 32-bit slots only. */ 103uint8_t 104pci_int_map_0(pcitag_t tag) 105{ 106 pcireg_t data; 107 int pin, bus, device; 108 109 data = pci_conf_read(tag, PCI_BPARAM_INTERRUPT_REG); 110 pin = PCI_INTERRUPT_PIN(data); 111 if (pin == 0) { 112 /* No IRQ used. */ 113 return 0; 114 } 115 if (pin > 4) { 116 if (_pciverbose >= 1) 117 pci_tagprintf(tag, "pci_map_int: bad interrupt pin %d\n", pin); 118 return 0; 119 } 120 121 pci_break_tag(tag, NULL, &bus, &device, NULL); 122 123 if (bus != 0) 124 return 0; 125 126 switch (device) { 127 case 0: 128 case 5: case 6: case 7: 129 return (((pin - 1) + pci_int_shift_0(tag)) % 4) + 1; 130 default: 131 return 0; 132 } 133} 134