1/* ********************************************************************* 2 * Broadcom Common Firmware Environment (CFE) 3 * 4 * README 5 * 6 * Author: Mitch Lichtenberg 7 * 8 ********************************************************************* 9 * 10 * Copyright 2000,2001,2002,2003 11 * Broadcom Corporation. All rights reserved. 12 * 13 * This software is furnished under license and may be used and 14 * copied only in accordance with the following terms and 15 * conditions. Subject to these conditions, you may download, 16 * copy, install, use, modify and distribute modified or unmodified 17 * copies of this software in source and/or binary form. No title 18 * or ownership is transferred hereby. 19 * 20 * 1) Any source code used, modified or distributed must reproduce 21 * and retain this copyright notice and list of conditions 22 * as they appear in the source file. 23 * 24 * 2) No right is granted to use any trade name, trademark, or 25 * logo of Broadcom Corporation. The "Broadcom Corporation" 26 * name may not be used to endorse or promote products derived 27 * from this software without the prior written permission of 28 * Broadcom Corporation. 29 * 30 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 31 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 32 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 33 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 34 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 35 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 36 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 37 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 38 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 39 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 40 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 41 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 42 * THE POSSIBILITY OF SUCH DAMAGE. 43 ********************************************************************* */ 44 45RELEASE NOTES FOR: CFE version 1.4.2 46 47------------------------------------------------------------------------------ 48INTRODUCTION 49------------------------------------------------------------------------------ 50 51This directory contains Broadcom's Broadband processor division 52"Common Firmware Environment," or CFE. (pronounce it 'cafe' if you like) 53 54It is intended to be a flexible toolkit of CPU initialization and 55bootstrap code for use on processors like the SB1250 and its derivatives. 56 57CFE contains the following important features: 58 59 * Easy to port to new SB1250/BCM1480 designs 60 * Initializes CPUs, caches, memory controllers, and peripherals 61 * Built-in device drivers for SB1250 SOC peripherals 62 * Several console choices, including serial ports, ROM 63 emulators, JTAG, etc. 64 * Environment storage in NV EEPROM, flash, etc. 65 * Supports big or little endian operation 66 * Supports 32-bit and 64-bit processors 67 * Support for network bootstrap. Network protocols supported 68 include IP,ARP,ICMP,UDP,DHCP,TFTP. 69 * Support for disk bootstrap. 70 * Provides an external API for boot loaders and startup programs 71 * Simple user interface. UI is easy to remove for embedded apps. 72 73See the file 'TODO' for a list of things that are being considered 74as CFE matures. 75 76There is some documentation in PDF format in the docs/ directory. 77 78------------------------------------------------------------------------ 79 80Directory organization 81---------------------- 82 83CFE is laid out to make it easy to build and maintain versions for 84different boards at the same time. The directories at this level 85are the build areas for ports of CFE: 86 87 cfe/ Main CFE source tree 88 build/ The "new" build tree location 89 90The 'build' directory contains build areas for various 91targets, and the skeletal Makefiles that build them. This 92directory has subdirectories by vendor, so you can create 93your own directory here and avoid hassles with merging changes. 94 95 build/broadcom/bcm91480ht/ BCM1480 evaulation board - "BIG DIPPER" 96 build/broadcom/bcm91280e/ BCM1480 evaluation board - "CUPERTINO" 97 build/broadcom/bcm91480b/ BCM1480 evaluation board - "BIG SUR" 98 build/broadcom/swarm/ BCM1250 evaluation board - "SWARM" 99 build/broadcom/sentosa/ BCM1250 evaluation board - "SENTOSA" 100 build/broadcom/rhone/ BCM1125 evaluation board - "RHONE" 101 build/broadcom/bcm1250cpci BCM1250 evaluation board - "BCM1250CPCI" 102 build/broadcom/vcs/ Verilog simulator version 103 build/broadcom/sim/ Functional Simulator 104 build/broadcom/tiny/ Minimal version of CFE 105 106The 'arch' directory contains architecture-specific stuff: 107 108 cfe/arch Top of architecture tree 109 cfe/arch/mips All MIPS-related subdirectories 110 cfe/arch/mips/cpu CPU-specfic subdirectories 111 cfe/arch/mips/board Board-specific subdirectories 112 cfe/arch/mips/common Common MIPS-related sources 113 114For the SWARM platform, the following directories are of interest: 115 116 cfe/arch/mips/cpu/sb1250 117 cfe/arch/mips/board/swarm 118 cfe/arch/mips/common 119 120For the SENTOSA platform, the following directories are of interest: 121 122 cfe/arch/mips/cpu/sb1250 123 cfe/arch/mips/board/sentosa 124 cfe/arch/mips/common 125 126For the RHONE platform, the following directories are of interest: 127 128 cfe/arch/mips/cpu/sb1250 129 cfe/arch/mips/board/rhone 130 cfe/arch/mips/common 131 132For the BCM91480B platform, the following directories are of interest: 133 134 cfe/arch/mips/cpu/bcm1480 135 cfe/arch/mips/board/bcm91480b 136 cfe/arch/mips/common 137 138For the BCM91280E platform, the following directories are of interest: 139 140 cfe/arch/mips/cpu/bcm1480 141 cfe/arch/mips/board/bcm91280e 142 cfe/arch/mips/common 143 144For the BCM91480HT platform, the following directories are of interest: 145 146 cfe/arch/mips/cpu/bcm1480 147 cfe/arch/mips/board/bcm91480ht 148 cfe/arch/mips/common 149 150Platform-independent sources continue to live in the cfe/ 151directory and its subdirectories: 152 153 cfe/docs/ Documentation in PDF format 154 155 cfe/arch/ Platform-specific directories 156 157 cfe/dev/ Device drivers for consoles and boot storage 158 cfe/include/ Common include files 159 cfe/lib/ Common library routines 160 cfe/main/ Main program 161 cfe/net/ Network subsystem (IP, DHCP, TFTP, etc.) 162 cfe/pci/ PCI and LDT configuration 163 cfe/ui/ User interface 164 cfe/applets/ Test "applets" for firmware API 165 cfe/verif/ Stuff for running chip verification tests 166 cfe/hosttools/ Tools built on the host 167 cfe/vendor/ Vendor extensions to CFE 168 169 cfe/x86emu/ X86 emulator for VGA initialization 170 cfe/pccons/ PC console routines 171 172 173Building CFE 174------------ 175 176To build the firmware for the swarm (BCM1250 evaluation board) 177for example: 178 179 cd swarm ; gmake all ; cd .. 180 181This will produce: 182 183 swarm/cfe Executable file 184 swarm/cfe.flash Network flash update file 185 swarm/cfe.srec Motorola S-records 186 swarm/cfe.map Linker map file 187 188------------------------------------------------------------------------------ 189CHANGES SINCE PREVIOUS VERSION (1.4.1) 190------------------------------------------------------------------------------ 191 192* CAS 6 support for DDR2. Both 32-bit and 64-bit (ganged) channels are supported. 193 194* Large memory (DDR2 >= 4GB) support. Tested on BCM91480B board with 4GB DDR2: 195 - 64-bit (ganged) channels. 196 - Zero channel interleave/Zero chip select interleave. 197 - Full channel interleave/Zero chip select interleave. 198 - Zero channel interleave/Full chip select interleave. 199 - Full channel interleave/Full chip select interleave. 200 201* Update of cfe/applets to work with current (410) and older (25x) toolchains. 202 - Applets are simple programs to test callbacks into CFE. 203 - These compiled programs can be loaded via the TFTP loader in CFE which will 204 call APIs in CFE. 205 206* Bug fixes: 207 - UART C/D now have correct absolute and relative addresses 208 (change from UM100 to UM101). 209 - Fused disabled CPUs now are stated as such in startup banner. 210 (this is the case when system_revision says it's a 4 core part and 2 or more cores 211 are fused disabled). 212 - Minor updates of files to work with newer toolchain (410) that were not being 213 compiled. 214 215------------------------------------------------------------------------------ 216CHANGES SINCE PREVIOUS VERSION (1.4.0) 217------------------------------------------------------------------------------ 218 219* Added support for HT1000/HT2000 on Big Dipper. 220 - HT1000/HT2000 bridge configuration and discovery 221 - HT1000 PCI-X bus card support 222 - HT2000 PCI-X and PCI-E bus card support 223 - HT1000/HT2000 internal device discovery: SATA (Frodo), USB, IDE, Ethernet 224 Note: USB, IDE, and Ethernet have not been fully tested. They will be 225 revisited on the next release. 226 227------------------------------------------------------------------------------ 228CHANGES SINCE PREVIOUS VERSION (1.3.3) 229------------------------------------------------------------------------------ 230 231* Support for sb1-elf toolchain version 4.1.0 added. 232 233* Add support for boards with no ODT chip selects and has DRAM at cs 0/1, 2/3, etc. 234 This is for 1480-based boards only. 235 236* Add BCM112x B0 and BCM1250 C3 support. This includes 1Gb DRAM support for 237 sb1250_draminit.c 238 239* HSP Cleanup. Moved HSP oriented ui command to ui_hspcmds.c (from ui_pmcmds.c) 240 241* HSP Cleanup. All HSP oriented functions moved to new bcm1480_hsp_utils.c/h 3). 242 Created new HSP ui routines and APIs for error detection on SPI4 and HT 4). 243 Added PM remote loopback functionality through connected system. 244 245------------------------------------------------------------------------------ 246CHANGES SINCE PREVIOUS VERSION (1.3.2) 247------------------------------------------------------------------------------ 248 249* Initial support for the BCM91480HT "Big Dipper" evaluation board has been 250 added. 251 252 This is an ATX-style BCM1480 eval board with 32-bit DDR2 DIMMs. 253 254* BCM1480 DRAM init feature: A new flag option to configure the MC for boards 255 with no ODT chip selects. The flag is MCFLAG_NO_ODT_CS. 256 257* CFE_CMD_DEV_ENUM API function now supported. 258 259* CFE_CMD_ENV_DEL API now correctly delete variables from the nonvolatile 260 device as well as CFE's internal structures. 261 262------------------------------------------------------------------------------ 263CHANGES SINCE PREVIOUS VERSION (1.3.1) 264------------------------------------------------------------------------------ 265 266* Update bcm1480_pci_machdep.c. HSP buffer allocation updated to be 267 within hardware spec. 268 269------------------------------------------------------------------------------ 270CHANGES SINCE PREVIOUS VERSION (1.3.0) 271------------------------------------------------------------------------------ 272 273* Support for the BCM91280E "CUPERTINO" evaluation board has been added. 274 275* SB1250 DRAM init feature: A new flag option to set Output Drive Strength to 276 "reduced strength" for DDR. 277 278* BCM1480 DRAM init feature: A new flag option to set Output Drive Strength to 279 "reduced strength" for DDR and DDR2. 280 281* Boards with non-parallel termination require SSTL_2 class 1 type for address 282 & data operations and reduced Output Drive Strength at the DRAM. 283 284 The Sentosa, Rhone, and Shorty have been updated for the above changes. 285 286* Add a new CPU type BCM1158 (one core, half cache, one HT port) to cpu info 287 code and banner display. 288 289* HT CSR updates: txN_htio_txphitcnt bits 7:0 (npc_phitcnt) has a range from 290 10..30. The init code now sets it at minimum of 10. 291 292 Since npc_phitcnt = npc_ceiling - npc_floor + 1, npc_floor is now 0xC9 293 (from 0xC5). 294 295* Packet Manager Diagnostic Updates: 296 297 Added random payload test cases for packet manager. 298 299 Added additional PM debug functionality. 300 301 Added first pass PM Hash & Route loop-back diag. 302 - HR block initialization. 303 - Basic framework for HR packet loop-back testing. 304 - HR path and rule table pass thru tests. Map PMO(0-16) to PMI(0-16). 305 - HR IVC routing diag test case. 306 - HR payload word routing diag test case (including offset adjust). 307 - Path table "one-hot" bitmap routing diag test. 308 - Support for HR "next destination" hardware debug feature. 309 310------------------------------------------------------------------------------ 311CHANGES SINCE PREVIOUS VERSION (1.3.0) 312------------------------------------------------------------------------------ 313 314* Support for the BCM91280E "CUPERTINO" evaluation board has been added. 315 316* SB1250 DRAM init feature: A new flag option to set Output Drive Strength to 317 "reduced strength" for DDR. 318 319* BCM1480 DRAM init feature: A new flag option to set Output Drive Strength to 320 "reduced strength" for DDR and DDR2. 321 322* Boards with non-parallel termination require SSTL_2 class 1 type for address 323 & data operations and reduced Output Drive Strength at the DRAM. 324 325 The Sentosa, Rhone, and Shorty have been updated for the above changes. 326 327* Add a new CPU type BCM1158 (one core, half cache, one HT port) to cpu info 328 code and banner display. 329 330* HT CSR updates: txN_htio_txphitcnt bits 7:0 (npc_phitcnt) has a range from 331 10..30. The init code now sets it at minimum of 10. 332 333 Since npc_phitcnt = npc_ceiling - npc_floor + 1, npc_floor is now 0xC9 334 (from 0xC5). 335 336* Packet Manager Diagnostic Updates: 337 338 Added random payload test cases for packet manager. 339 340 Added additional PM debug functionality. 341 342 Added first pass PM Hash & Route loop-back diag. 343 - HR block initialization. 344 - Basic framework for HR packet loop-back testing. 345 - HR path and rule table pass thru tests. Map PMO(0-16) to PMI(0-16). 346 - HR IVC routing diag test case. 347 - HR payload word routing diag test case (including offset adjust). 348 - Path table "one-hot" bitmap routing diag test. 349 - Support for HR "next destination" hardware debug feature. 350 351------------------------------------------------------------------------------ 352CHANGES SINCE PREVIOUS VERSION (1.2.5) 353------------------------------------------------------------------------------ 354 355* BCM1480 memory init routine improvements to support new features on the 356 BCM1480 pass B0. New features include: dynamic ODT, frequency range control 357 for the DLL, 2T addr/command signaling and DQo/DQSo quarter cycle shift. 358 359* BCM1480 memory init routine improvements to support existing features. 360 These include: channel interleaving, chip select interleaving, "data capture 361 window" calculation, and DDR2 registered DIMMs/mini-DIMMs. 362 363* Improve memorytest command to do "walking 1s", "walking 0s", etc.. 364 365* Added support for BCM1480-based systems using DIMMs and 4GB of memory. 366 367* Added support to select slowest chip select to configure MC when there are 368 multiple chip selects of different memory speeds. 369 370------------------------------------------------------------------------------ 371CHANGES SINCE PREVIOUS VERSION (1.2.4) 372------------------------------------------------------------------------------ 373 374This is a minor release. 375 376* Set maximum speed of DRAM for the BCM91480B evaluation board to 200MHz. 377 (the DRAM init table has a "speed limit" flag to prevent the memory system 378 from running faster than the board is electrically capable of). You 379 can modify the bcm91480b_init.S to change this speed if you need to. 380 381* Fixed some problems in the flash engine and flash driver that were 382 introduced in 1.2.4. These problems were mostly related to 5836 designs 383 and 16-bit flash chips. 384 385* Added some more Broadcom parts to the tables in the PCI scan/display code. 386 387------------------------------------------------------------------------------ 388CHANGES SINCE PREVIOUS VERSION (1.2.3) 389------------------------------------------------------------------------------ 390 391* The makefiles have been reworked to allow easy selection of SMbus 392 devices, similar to the scheme that is used today for PCI devices. You 393 can now include a SMBDEVS macro in your board file to list the SMbus 394 devices that should be built for your board. 395 396* Since the conversion to "all 32 bit" versions, a new bug has been 397 introduced that was preventing the upper halves of 64-bit registers 398 from being saved when calling into CFE from a 64-bit application. 399 This can prevent 64-bit SMP Linux from booting properly. This has 400 been fixed (see the macros in arch/mips/commin/include/mipsmacros.h) 401 and the API entry and exception files (apientry.S, exception.S). 402 403* New callouts have been added in init_mips.S: 404 405 CPUCFG_EARLYINIT can override the default board_earlyinit 406 CPUCFG_DRAMINFO can override the default board_draminfo 407 CPUCFG_PREDRAMINIT is new; it is called just before board_draminfo 408 to give the board package a chance to work around bugs or do 409 other preparation. 410 411* The CPU packages have been modified to have a single interface for 412 dealing with cache ops. A new include file, cpu_cache.h, has macros 413 and prototypes for cache invalidation and flush routines. All the 414 device drivers that support noncoherent I/O have been modified to use 415 these macros. 416 417* The BCM1480 boards have had numerous small fixes, including: 418 419 - Basic initialization of certain node controller registers 420 - Better PCI, PCI-X support. Some basic support for BCM1480 421 parts in device mode has been introduced. The pci_map_window 422 routines and related calls have been implemented. 423 424* A new environment variable, RESTART, has been added. If you set this 425 either from a program or permanently, when a program does a soft 426 restart to CFE, CFE will run the commands in this environment 427 variable. So, for example, before Linux exits you could set this 428 to restart Linux. 429 430* The PCI vendor and device tables have been reduced in size considerably 431 to save memory. 432 433* The USB code has been reworked to be more resilient to devices being 434 disconnected while they are active. 435 436* The USB Ethernet device driver now expects a "stub" device to 437 be instantiated similar to the USB Serial device. With this change 438 you can unplug and re-plug a USB Ethernet device and it will 439 use the same device name. 440 441* A new CFE "filesystem" supporting XMODEM transfers has been added. If 442 configured, you can boot or flash from the serial port using 443 the XMODEM protocol, like this: 444 445 CFE> flash -fs=xmodem uart0: 446 447 At present, only XMODEM CRC mode is allowed. Non-CRC won't work. 448 449 450* The Flash engine has been modified to handle more combinations of 451 endianness and 16 vs 8 bit devices. 452 453* The board packages for the Enterprise Switch group's MPC8240 and MPC8245 454 boards (BCM98245CPCI "BMW" and "Mousse") have been added. These 455 versions can be used on the control processors for certain StrataXGS 456 switch chassis. 457 458 459------------------------------------------------------------------------------ 460CHANGES SINCE PREVIOUS VERSION (1.2.2) 461------------------------------------------------------------------------------ 462 463This is a minor CFE release. 464 465 * To work around some issues with the fuses on BCM1480 A2 parts, 466 support for S0 (the original preproduction samples) has been 467 disabled completely. If you have a BCM1480 S0 evaluation 468 board or a board with a BCM1480 S0, you should re-enable 469 the conditional compile define _BCM1480_S0_WORKAROUNDS_ 470 (see arch/mips/cpu/bcm1480/Makefile). The most important 471 workaround this enables is the restrictions on available MCLK 472 clock divisors in the S0 parts. 473 474 [Note that "BCM1480" includes BCM1255, BCM1280, BCM1455, BCM1480, 475 and the other chips in this family.] 476 477 * The BCM1480 DRAM init routine has been improved to handle higher 478 DDR2 DRAM speeds. The changes are also in the BCM91480B evaluation 479 board init routines. 480 481 * The USB ethernet drivers have been separated out into smaller drivers. 482 483 * A bug in the multiprocessor initialization of the BCM1480 has been 484 corrected that can sometimes cause cache line to be evicted to 485 the flash area. If this line contains a particular sequence 486 of bytes, it can switch the flash in to erase, CFI, or programming 487 modes unintentionally. 488 489------------------------------------------------------------------------------ 490CHANGES SINCE PREVIOUS VERSION (1.2.1) 491------------------------------------------------------------------------------ 492 493 * The test program for the ScanLogic SL11 chip on the BCM1250CPCI 494 and BCM91125PCIX boards has been rewritten. Eventually, this chip 495 will have the same support as the OHCI drivers and thus support 496 booting from USB thumb drives, USB consoles, etc. 497 498 * Lots of infrastructure improvements in the USB code, mostly 499 changes to the device infrastructure and updates to the serial 500 driver to support more bizarre USB serial ports. 501 502 * The USB Ethernet driver has been greatly improved. 503 504 * BCM91480A/B board support has been greatly improved. The config 505 switch settings have been standardized, with new constants 506 added to map the switches to their functions. 507 508 * Both PCMCIA channels are now supported on the BCM91480B board. 509 510 * On the BCM91480B, Config switch settings can now be used to selectively 511 disable extra CPUs, allowing the BCM91480B board to behave as if it 512 had a BCM1280 CPU stuffed on it. 513 514 * Numerous improvements to the BCM5836/BCM4704 support, particularly 515 in the ara of PCI. 516 517 * Header files have been updated for the BCM1480 family. Customers should 518 use the new header files in their applications. 519 520 * CFE was not restoring the KX bit setting in the status register 521 when the user API was invoked. 522 523 * The exception message (crash dump) now includes the CPU number. 524 525 * The exception handlers were not being restored properly on a soft 526 restart to CFE (for example, when you reboot from Linux). This 527 causes trouble if you want to boot again without a hardware reset. 528 This problem has been fixed. 529 530 * Many, many improvements to the BCM1480 DRAM init routine. Customers 531 should definitely take the new version if possible. Timing 532 calculations have been improved, and more interleaving options 533 are now supported. 534 535 * The BCM1480 packet manager now has some test commands and example code 536 to initialize the high speed ports. 537 538 * The BCM1480 HyperTransport interface now supports a new environment 539 variable, LDT_LINKWIDTH, to configure the width of the interface to 540 8 or 16 bits. The default is 16 bits. 541 542 * The BCM1250 DRAM init routine has been improved to calculate 543 the tRCw, tRCR, and tCwCr values in a more consistent way. 544 545 * The flash drivers have been updated to work properly in 16-bit mode 546 on the BCM5836/4704 processors, for big or little endian operation. 547 548 549------------------------------------------------------------------------------ 550CHANGES SINCE PREVIOUS VERSION (1.1.1) 551------------------------------------------------------------------------------ 552 553 [Note: This ia another MAJOR new CFE release. There have been 554 source file changes to nearly all of CFE's files to re-enable 555 64-bit address support while CFE remains a 32-bit app]. 556 557 * MAJOR NEW FEATURE: 64-bit API, 64-bit ELF 558 559 Since CFE can no longer be built as a native 64-bit 560 application due to toolchain changes, special support 561 needed to be added throughout CFE for 64-bit support 562 within the 32-bit version of CFE. 563 564 *ALL* external pointers (values who could possibly reference 565 data beyond CFE's data segment) are declared as the 566 basic type "hsaddr_t" with access functions and macros 567 in "lib_hssubr.h". 568 569 Unfortunately, this change affected 100+ source files, including 570 all the device drivers and some API functions. Since CFE's 571 API allows applications like the Linux kernel to pass 64-bit 572 pointers (for example, console output or starting the other 573 CPUs), CFE needs to pass all 64 bits of the pointers around. 574 575 There are two new macros, PTR2HSADDR and HSADDR2PTR, that 576 are used to convert between hsaddr_t and regular pointers 577 when you know that the pointer is within CFE's data segment. 578 There are also two variants of memcpy, called 579 hs_memcpy_to_hs and hs_memcpy_from_hs, to copy data to/from 580 buffers that might be outside CFE's data segment. 581 582 * More BCM1480/1455/1280/1255 support. 583 584 The include files and board support packages have been improved 585 as we continue to test the early samples. 586 587 Some typos have been found and fixed, particularly in the 588 packet manager headers (bcm1480_hr.h, bcm1480_pm.h) 589 590 * BCM1480 DRAM init routine improvements. 591 592 Support for DDR2 SPD's has been added. In addition, the 593 timing calculations have been improved for DDR2 memories. 594 595 DDR2 memory init tables now require a "distance" parameter 596 that specifies the relative location of a chip select 597 along the memory bus. This is used to determine which 598 chip has on-die termination (ODT) enabled. 599 600 Support for channel interleaving (64-bit channels only) has 601 been added. 602 603 * Support for the BCM91480B evaluation board has been added. 604 605 This is an ATX-style 1480 eval board with DDR2 memory. 606 607 * Bug Fix: The BCM1250/BCM1480 ethernet driver was not 608 waiting long enough after configuration for the PHY to 609 settle, particularly at gigabit speed. As a result, it 610 often took two tries to get an address from the DHCP 611 server. This has been fixed by starting the PHY earlier. 612 613 * The chip type detection code and display routines have 614 been substantially rewritten. Hopefully they make sense now. 615 616 * Lots of old uses of __long64 have been removed. They are 617 no longer relevant 618 619------------------------------------------------------------------------------ 620CHANGES SINCE PREVIOUS VERSION (1.0.40) 621------------------------------------------------------------------------------ 622 [Note: This is a MAJOR new CFE release. There have been source file 623 changes to nearly all of CFE's files to accomodate new tools 624 and a new relocation method. On the whole, the source changes are 625 minor but there are a lot of them!] 626 627 * MAJOR NEW FEATURE: New relocation method 628 629 CFE's relocation method has been changed to use System-V PIC format 630 instead of the old "embedded-pic". The old method is deprecated 631 in current GCC versions and will be deleted entirely in the future, 632 so CFE had to be modified to relocate without using embedded-pic. 633 To make this work, the low-level startup code, many of the macros 634 in the code, and several other places have been touched or 635 rewritten. The include file "cfe.h" must now be _before_ other 636 include files to set up certain macros properly. 637 638 * No more 64-bit versions 639 640 Since the SVR4 PIC toolchain does not support relocatable 64-bit 641 libraries, there are now no more 64-bit native versions of CFE. 642 (pointers and longs are 32 bits, and long longs are 64 bits). 643 644 CFE now runs with KX set in the status register all the time. 645 646 You can still access 64-bit data with the "d", "e", "u", 647 and other commands. To make this work, the old "lib_hssubr.S" 648 (hyperspace subroutines) has been ressurected. 649 650 NOTE: This has temporarily broken loading 64-bit ELF files, we will 651 revisit this in a future release. 652 653 * Processor and chipset support for the BCM1480/BCM1455/BCM1280/BCM1255 654 chips. Look in the arch/mips/chipset/sibyte and arch/mips/cpu/bcm1480 655 directories for the new files. The include files are believed 656 to be accurate as of the current user's manual revision and errata. 657 658 Notes specific to the 1480 release: 659 660 - In general, the 1480 package is very new and subject to 661 rapid change as we continue to check out the chip. 662 - The DRAM initialization code is still new and has some 663 missing features, including SPD support for DDR-II. 664 - 4-channel 32-bit mode has not been tested. 665 666 * Preliminary board support package for the BCM91480A, the 667 eval platform for the BCM1480 and BCM1280 chips. This 668 package is for evaluation use only, there will be another 669 CFE release for this board once the eval platforms are 670 generally available. 671 672 * Processor and chipset support for the BCM5836 low-end MIPS32 673 processor. Look in the arch/mips/chipset/bcmsb and arch/mips/cpu/bcmcore 674 directories for the new files. 675 676 * Board support package for the BCM91125CPCI 677 module has been added. This is an 1125-based CPCI card. 678 679 * Board support package for the BCM95836CPCI 680 module has been added. This is an 5836-based CPCI card. 681 682 * Board support packe for the BCM91125PCIX has been added. This 683 is an ATX board with a BCM1125 and an HT-to-PCIX bridge. 684 685 * The include files for the BCM1255, BCM1280, BCM1455, BCM1480 686 are now in the arch/mips/chipset/sibyte/include area. Preliminary 687 support for these new chips have been added to appropriate 688 areas in the source tree (dram init, etc.). More updates 689 in this area for the next version. 690 691 * Some preliminary support for compressing CFE has been added. It is 692 not fully baked yet, but customers can examine it to see if it 693 will be useful. With this feature, most of CFE is compressed 694 via gzip and a boot-loader-loader decompresses the firmware 695 and transfers it to memory. Look for "ZipStart" 696 697 * The flashop engine (assembly stub used to batch flash commands) 698 has been updated to support Intel flash buffered write commands. 699 This should dramatically improve write speed when using Intel 700 flash parts. 701 702 * The kit generation procedures we use to make the CFE kit files have 703 been included in the release/ directory of CFE. You can use these 704 procedures to package your own CFE releases. 705 706 * The Algorithmics P5064 and P6064 boards have been removed. 707 708 709------------------------------------------------------------------------------ 710CHANGES SINCE PREVIOUS VERSION (1.0.38) 711------------------------------------------------------------------------------ 712 713 [Note: It's been a while since a new CFE release was made, so 714 customers should also read the 1.0.38 differences in the section 715 after this one.] 716 717 * Support for the new BCM91125F evaluation board has been introduced 718 719 * In anticipation of the BCM1x80/BCM1x55 chips, the SiByte-specific 720 files have been moved into their own "chipset" directory. 721 The Ethernet controller driver, UARTs, and other common modules that used 722 to live in arch/mips/cpu/sb1250 are now in arch/mips/chipset/sibyte 723 724 * The 'tiny' board target (minimalistic BCM1250 board) has been 725 fixed so that it builds again. 726 727 * The SMBus interface has a new level of abstraction. If your code 728 uses the BCM1250 SMBus device drivers in CFE, you may need 729 to make some changes to your board_device_init() routine 730 (see the code in the SWARM or Sentosa port for an example). 731 Basically, before devices are instantiated you should be 732 sure you create SMBus buses as follows: 733 734 cfe_add_smbus(&sb1250_smbus,A_SMB_BASE(0),0); 735 cfe_add_smbus(&sb1250_smbus,A_SMB_BASE(1),0); 736 737 Then instantiate your devices "normally." SMBuses get numbered 738 from zero in the order they are instantiated via cfe_add_smbus. 739 740 The new SMBus code moves all the SMBus-device-specific routines 741 into processor/architecture independent places and leaves 742 the actual SMBus protocol code in the host chip-specific 743 area. You can now write bit-bang SMBus host routines 744 or use other SMBus host controllers and re-use CFE's 745 pre-existing device drivers for nvram/tod/temperature chips. 746 747 * The Sentosa board's memory timing has been increased to run 748 the memory at 133MHz (max speed depending on core clock) 749 750 * M-Systems(tm) DiskOnChip(tm) support. If you have signed the 751 NDA with M-Systems and have access to their DiskOnChip 752 boot driver kit (BDK), CFE can access configured M-Systems 753 flash devices. You need to provide certain files from the 754 M-Systems BDK and place them in the cfe/msys directory, 755 then set CFG_MSYS=1 in your Makefile. 756 757 * The code in the BCM1250 cache init routines for supporting the 758 ancient A0..A7 parts with "binned" caches (preproduction parts 759 with partial caches) has been removed, since the BCM1250 is 760 in full production now. 761 762 * BCM1250 Pass1 support has been disabled. 763 764 * The 'mkflashimage' program should now work properly when compiled 765 under Cygwin. 766 767 * New device drivers for the DS1743 RTC/NVRAM, Intel i82559 Ethernet, 768 RealTek rtl8139 Ethernet, and a "C" version of the flash update engine. 769 770 * The PromICE console driver lets you specify whether your PromICE 771 is connected in direct mode (write line attached) or not, 772 instead of using a compile-time constant. 773 774 * The Ethernet routines have been rearranged to move common packet 775 manipulation, address parsing, and other non-device routines into 776 a common place. 777 778 * The PCI/HyperTransport init routines for the BCM1250 have been 779 improved to handle additional topologies and configurations. 780 781 782------------------------------------------------------------------------------ 783CHANGES SINCE PREVIOUS VERSION (1.0.37) 784------------------------------------------------------------------------------ 785 786 * The BCM1250 memory initialization routine has been updated to 787 calculate tRCD and tRCR/tRCW more accurately when the 788 parameter is not supplied by the SPD. Even if you do not update 789 all of CFE, you should retrofit this change into your CFE if 790 you notice any memory timing problems. 791 792 * The console F12 key macro should work properly now to either 793 repeat the previous command or execute the command in the F12 794 environment variable. 795 796 * TFTP's retries and timeouts are now measured in ticks. The TFTP 797 timeouts are also stored in globals that you can modify 798 in your board_devs routine. 799 800 * A new user command, "reserve", has been added to reserve memory 801 and not communicate it to the operating system. So, you could 802 take a chunk of memory, reserve it, and then boot Linux and 803 Linux would not add that chunk to the boot map. 804 805 * The PCI initialization code has been reworked to break out 806 machine-dependent and machine-independent stuff more clearly. 807 808 * New drivers have been included for the BCM4401 PCI fast ethernet 809 and BCM570x PCI gigabit ethernet controllers. 810 811 * The NS16550 serial driver has been enhanced to take the crystal 812 frequency (NS16550_HZ) as a parameter. Good for boards that use 813 nonstandard clocks or have multiple different 16550's. 814 815 * The various "cpu_config.h" files have CPUCFG_ARCHNAME and 816 CPUCFG_ELFTYPE defined to break out the processor architecture and 817 ELF header type into cpu-specific include files. 818 819 * The Algorithmics P5064 and P6064 ports now compile again, but are 820 probably broken. Assume you'll have to make changes if you want to 821 get these working on your hardware! 822 823 824------------------------------------------------------------------------------ 825CHANGES SINCE PREVIOUS VERSION (1.0.36) 826------------------------------------------------------------------------------ 827 828 * The Makefile for the BCM1250CPCI version has been modified 829 to support building dual-endian versions of CFE. 830 831 * Some cleanup has been done in the source files in preparation 832 for the release to the public (non-NDA) web site. 833 834 * The PCI enumeration code has been modified to deal with 835 more than one host "port". To do this, the tag format has 836 been changed slightly - routines that include pcivar.h 837 would probably need some changes. 838 839 * A typo in lib_physio.h has been fixed - writing 64-bit values 840 to 64-bit uncached addresses was being done with a 32-bit store. 841 842 * The most recent BCM1250 system include files have been incorporated 843 into the source tree. 844 845 * sbmips.h (MIPS processor stuff) has been enhanced to include a 846 bunch of macros and inlines for accessing CP0 registers. 847 848 * FCRAM support in the DRAM init routines has been improved. 849 850 * The startup messages now recognize Rev.C silicon. 851 852 * A new include file, endian.h, contains the "truth" about the 853 endianness (for use by #ifdefs in the code). 854 855 * Device drivers for PCI Ethernet controllers and other devices have 856 been modified to use common macros for address manipulation. 857 858 * The makefile now recognizes a new "CHIPSET" directory, to go 859 along with "CPU" and "BOARD" - future versions of CFE will 860 show some device driver files moving into this area of 861 the tree (under arch/mips/chipset) so that, for example, 862 the BCM14xx and BCM12xx console drivers can live in one place. 863 864 * The command processor has been hacked yet again to make it behave 865 more like a shell. In particular, quoting behaviour should once 866 again be working. 867 868------------------------------------------------------------------------------ 869CHANGES SINCE PREVIOUS VERSION (1.0.35) 870------------------------------------------------------------------------------ 871 872 * The license has been modified to be "GPL compatible." This 873 means that you should be able to incorporate parts of CFE 874 into a GPL'd program without license hassles. 875 876 * The Hypertransport initialization code in CFE now supports both 877 the LDT 0.17 and the HyperTransport 1.03 styles of fabric 878 initialization. There is a new flag, ldt_rev_017, that can be 879 included in the value of the PCI_OPTIONS environment variable. If 880 that flag is set, the 0.17 initialization procedure will be used. 881 Otherwise, the 1.03 procedure is followed. There is also a new 882 configuration option, CFG_LDT_REV_017, that sets the default value 883 of the ldt_rev_017 attribute. This option is specified in the 884 Makefile. 885 886 You must choose the initialization procedure properly, either by 887 default or by making a permanent assignment to PCI_OPTIONS, to 888 match the type of devices present on your HyperTransport chain. 889 If the choice is incorrect, the system can fail to initialize the 890 Hypertransport links and may hang at startup while attempting to 891 do so. 892 893 If set to '1', fabric initialization will be appropriate for 894 the HyperTransport 0.17 specification. The SP1011 HT->PCI bridge 895 can only operate in 0.17 mode, and standard Makefiles for boards 896 with SP1011s make this the default. 897 898 If set to '0', fabric initalization will be approprate for the 1.01 899 (and later) specification. The PLX 7520 HT->PCI-X bridge can only 900 operate in this mode. Standard Makefiles for boards with only HT 901 expansion connectors make this the default. 902 903 Either setting is acceptable when communicating with another 904 BCM1250 in a double-hosted chain, but both ends must agree. 905 906 * CFE now supports initialization of HyperTransport fabrics that 907 include the PLX 7520 HT->PCI-X chip. For link speeds other than 908 200 MHz, the 1.03 initialization option (above) must be used. 909 910 * The BCM1250CPCI port had incorrectly programmed the GPIO interrupt 911 mask register, preventing Linux from being able to use the on-board 912 IDE interface. This has been fixed. 913 914 * Some 64-bit/32-bit issues have been fixed in the "flashop engine" 915 that is used for programming flash devices. In particular, 64-bit 916 ops are used when manipulating addresses in 64-bit mode. 917 918 * The default values for the drive strengths and skews for the 919 DRAM controllers have been modified to be more reasonable for 920 currently shipping parts. 921 922 * The workarounds for known bugs in the BCM1125's memory controller 923 have been made a run-time check. 924 925 * The command line parser has been substantially rewritten to be more 926 shell-like in its expansion of environment variables. In particular 927 you can now set an environment variable to include multiple CFE 928 commands. 929 930 * The command line parser supports "aliases" - if the first word of 931 a command line matches an environment variable, it will be expanded 932 even if there is no preceding dollar sign. For example, you can 933 now do: 934 935 CFE> setenv start "ifconfig eth0 -auto; boot -elf server:myprogram" 936 937 and later just type "start" to start the program. 938 939 PLEASE NOTE: If you define an alias that has the same name as a built-in 940 command, you will need to quote the command to prevent the expansion 941 from occuring: 942 943 CFE> setenv e "ifconfig eth0 -auto" 944 CFE> e (this will run the "ifconfig" command) 945 CFE> 'e' (this will run the "edit memory" command) 946 947 * By enabling an option, CFG_URLS in your bsp_config.h file, CFE can 948 now process file names in URL syntax. This option defaults to OFF 949 to use the current syntax. When enabled, you can use boot files 950 in the following format: 951 952 CFE> boot -elf tftp://servername/path/to/filename 953 CFE> boot -elf fat://ide0.0/path/to/filename 954 CFE> boot -elf rawfs://flash0.os 955 956 This syntax works with the "boot", "load", and "flash" commands. 957 958 * You can now boot from an HTTP server by enabling "CFG_HTTPFS" in 959 your bsp_config.h file. This also requires TCP support (define CFG_TCP). 960 961 CFE> boot -elf -http servername:path/to/binary (old syntax) 962 CFE> boot -elf http://servername/path/to/binary (URL syntax) 963 964 965------------------------------------------------------------------------------ 966CHANGES SINCE PREVIOUS VERSION (1.0.34) 967------------------------------------------------------------------------------ 968 969 * CFE now builds using the "sb1-elf" toolchain by default. 970 It will still build using mips64-sb1sim, but it is recommended 971 that you switch to the new toolchain. 972 973 * The BCM1125E port now uses the SPD EEPROM to store memory 974 parameters. If the EEPROM is not programmed, a default memory 975 table will be used. 976 977 * For versions of the 1250 and 1125 that are step A0 (anything but 978 pass1) or newer, PCI code now configures HyperTransport 979 interrupts for level triggered mode. For older versions, 980 configuration is for edge triggered mode as before. 981 982 * If CFE is used to load an operating system such as Linux that 983 relies on CFE's configuration of interrupts, be sure to use only 984 versions of that operating system that can deal with level 985 triggered HyperTransport interrupts (must issue EOIs). 986 987 * Exceptions now display the CAUSE field symbolically, displaying 988 the exception name along with the CAUSE register value. 989 990 * A number of fixes have been made to the SB1250 include files, 991 including the addition of BCM1125 DMA features and some additional 992 constants for the drive strength registers. 993 994 * Some additional test code has been placed in the firmware's 995 ethernet driver for testing FIFO mode. 996 997 * The memory initialization routines have had an off-by-one 998 error corrected that can cause the memory to be run slower 999 than the rated maximum. 1000 1001 * The memory initialization routines will not operate properly 1002 on the BCM1125 without recompiling (the #ifdef _SB11XX_ is gone) 1003 1004 * The memory initialization routines were losing precision 1005 in the calculation of tCpuClk, so the calculation has been 1006 adjusted to avoid the precision loss. 1007 1008 * The #ifdef _SB11XX_ in the l2 cache routines is no longer 1009 necessary. 1010 1011 * The ethernet driver and the PHY commands now preserve the state 1012 of the GENC pin while doing MII commands. 1013 1014 * The command line recall should work more like you expect - if you 1015 recall the most recent command, it is NOT added to the history, 1016 and if you recall any previous command, it IS added. 1017 1018 * Some fixes have been made to the USB ethernet drivers. 1019 1020 * The flash driver now handles some broken AMD flash parts 1021 better (some AMD parts have reversed sector tables, 1022 that need to be sorted in the other order before they 1023 can be used). 1024 1025 1026 1027------------------------------------------------------------------------------ 1028CHANGES SINCE PREVIOUS VERSION (1.0.32) 1029------------------------------------------------------------------------------ 1030 1031 * Support has been included for the BCM1125 and the errata 1032 that is relevant for the firmware. In particular, there are 1033 workarounds for a couple of memory controller issues that affect 1034 the BCM112x (and only the 112x, this does not affect the BCM1250). 1035 1036 * The system include files have been updated to include constants and 1037 macros that are useful for BCM1125 users, including support for the 1038 new Ethernet DMA features, data mover features, etc. 1039 1040 * The BCM1250CPCI port now enables memory ECC by default. 1041 1042 * Autoboot support. CFE now has a new feature to allow a board package 1043 to supply a list of boot devices to try. For example, you can now 1044 say "first try PCMCIA, then the IDE disk, then the flash device, 1045 then the network." You configure the autoboot list in your 1046 board_devs.c file by calling "cfe_add_autoboot" one or more times 1047 (see swarm_devs.c for an example). 1048 1049 You can then either use the "autoboot" UI command (put it in your 1050 STARTUP environment) or call cfe_autoboot() at the end of 1051 board_final_init() to enable automatic bootstrap. 1052 1053 Additional documentation will be placed in the manual for this, but 1054 is not there at this release. 1055 1056 * setjmp has been renamed "lib_setjmp" to prevent future versions 1057 of GCC from doing things that assume how setjmp work. 1058 1059 * The include files have been modified to allow you to select which 1060 chip features will be present. This can help you avoid using 1061 features that your chip does not have, such as using pass2 features 1062 on a pass1 chip, etc. See the comments in include/sb1250_defs.h 1063 for an explanation of the possible selections. The default is 1064 to include all constants for all chips. 1065 1066 * The ethernet driver now preserves the value of the 'genc' bit 1067 on the MDIO pins. Previously it would always set this bit to zero. 1068 1069 * The DRAM init routines (and some other places) let you specify the 1070 reference clock in hertz via SB1250_REFCLK_HZ. The reference clock 1071 affects timing calculations, so if your reference clock is very 1072 nonstandard, you should change this. 1073 1074 * The DRAM init routines include support for BCM112x processors. 1075 1076 * The DRAM init routine will now automatically disable CS interleaving 1077 on large memory systems that use more thena 1GB of memory per 1078 chip-select. 1079 1080 * The ARP implementation was sending incorrect response messages to 1081 inbound ARP requests. This fix should easily apply to 1082 older versions of CFE. (see net/net_arp.c) 1083 1084 * The DHCP implementation makes more information available after 1085 configuring from a DHCP server. 1086 1087 Parameter #130 is a CFE extension that will be placed in the "BOOT_SCRIPT" 1088 environment variable. 1089 1090 Parameter #133 is a CFE extension that will be placed in the "BOOT_OPTIONS" 1091 environment variable. 1092 1093 You can use these variables any way you like. For example, you could 1094 set up an autoboot to read a batch file whose name is specified in 1095 the DHCP server's configuration file. Individual hosts can then 1096 have their own private scripts. 1097 1098 * PCI/LDT configuration has had numerous changes; among them the removal 1099 of many device and vendor codes from the text database. This 1100 reduces CFE's size significantly, but you won't get a pretty 1101 message when you install your 8-year-old obscure PCI mouse accelerator 1102 anymore. 1103 1104 1105------------------------------------------------------------------------------ 1106CHANGES SINCE PREVIOUS VERSION (1.0.30) 1107------------------------------------------------------------------------------ 1108 1109 * The memory initialization routines have been improved. The 1110 r2wIdle_twocycles bit is now always set to work around a silicon 1111 bug, and two bits in the include files (sb1250_mc.h) were 1112 reversed. The new draminit module does a better job at 1113 calculating timing and will take into account a new global 1114 parameter (tROUNDTRIP) which represents the total round trip 1115 time in nanoseconds from the pins on the 1250 out to the 1116 memory and back. Using this new module is HIGHLY RECOMMENDED. 1117 1118 * The 'memconfig' program has been improved - it uses the actual 1119 copy of draminit and can be used to calculate memory 1120 parameters outside of CFE to be sure they make sense. 1121 Use "memconfig -i" for interactive mode. 1122 1123 * The UART driver for the console has been changed to include a fix 1124 for errata 1956, which can cause the baud rate register to be 1125 written with bad data, particularly at high "odd" (ending in 50, 1126 like 550, 650, 750) speeds. 1127 1128 * The flash driver has been rewritten. The new driver is called 1129 "newflash" and the implementation is in dev/dev_newflash.c. 1130 The new flash driver is smaller and simpler than the old one, and 1131 supports some new features, including: 1132 1133 - Partitioning - you can instantiate sub-flash devices by breaking 1134 a large flash part into pieces, which will have names such 1135 as "flash0.boot", "flash0.os", "flash0.nvram", etc. 1136 1137 - Support for using flash as NVRAM is much improved. You use 1138 the above partitioning scheme to create a partition for the 1139 NVRAM and attach the NVRAM subsystem to that. There is no 1140 "hidden" reserved sectors anymore. 1141 1142 - New flash algorithm code - all of the flash operations are 1143 in a single assembly file, dev_flashop_engine.S, which is 1144 relocated to RAM when CFE is running from the flash. 1145 1146 - The probe code has changed. You will need to specify the 1147 bus width (usually 8 bits for BCM1250 parts) and the flash 1148 part width (16-bits or 8-bits). You would specify 16 bit flash 1149 widths if your 16-bit part is in "8-bit mode.". 1150 1151 The old flash driver (dev_flash.c) is still there for use by older 1152 firmware ports. 1153 1154 * The memory enum API has been improved to let you enumerate all 1155 memory blocks (not just available DRAM). You can add your own 1156 regions to the arena during initialization and query them from 1157 applications. 1158 1159 * There is a new device driver for the National Semiconductor 1160 DP83815 PCI Ethernet chipsets. It is getting hard to find 1161 Intel/Digital DC21143 cards, this is the replacement. 1162 1163 * The concept of "full names" and "boot names" has been removed. 1164 All device drivers now have only one name. 1165 1166 * Support for the RHONE board is now included in the source 1167 distribution and binaries are on the web site. The RHONE is 1168 a SENTOSA-like board that includes a BCM1125 processor. 1169 1170 * Support for the BCM1250CPCI board is now included in the source 1171 distribution and binaries are on the web site. The BCM1250CPCI is 1172 a SWARM-like board that fits into a CompactPCI chassis. 1173 1174 * Routines to display information about the CPU type have been added 1175 to the common BCM1250 sources. Most board packages now call this 1176 during initialization to print out CPU revision information. 1177 1178 * A number of the commands that used to start "test" such as 1179 "test flash" have been either removed or relocated to 1180 other files (most of these things lived in "cfe_tests.c"). 1181 These were old test routines used to check out internal 1182 CFE features are are no longer needed. 1183 1184 * The "memorytest" command (in 64-bit firmware versions) has been 1185 enhanced slightly to let you specify the cacheability attribute. 1186 -cca=5 will do cached accesses, which promotes lots of evict 1187 activity. 1188 1189 * The include files have been updated in a few places to reflect 1190 the user's manual. 1191 1192 * A USB host stack is now available in the firmware. The host stack 1193 works with OHCI-compatible host controllers and supports USB hubs, 1194 keyboards, some mass storage devices, a serial port device, and 1195 a couple of Ethernet controllers. It's there mostly for 1196 your amusement, we don't really support this actively. 1197 1198 * The VGA Console system has been improved to include support for the 1199 USB keyboard. It is now possible to build a version of CFE that 1200 will display on a VGA and take its input from a USB keyboard 1201 (no serial port!). Linux can be compiled to "take over" 1202 the VGA and keyboard, so you can almost have that "PC" experience 1203 you've always wanted with your SWARM. (or not.) Like the USB 1204 support, it's for your amusement, we don't support this actively. 1205 1206 1207------------------------------------------------------------------------------ 1208CHANGES SINCE PREVIOUS VERSION (1.0.29) 1209------------------------------------------------------------------------------ 1210 1211 * A missing routine in init_ram.S has been added. This is required 1212 for the CFG_RAMAPP version (a RAM version of CFE you can load from a 1213 TFTP server). 1214 1215 * A simple cache error handler has been added to the firmware. 1216 1217 * There is a new defined, _SERIAL_PORT_LEDS_ that you can put in the 1218 swarm_init.S file (or copy into your own board's init routines) to 1219 send the LED messages to the serial port. 1220 1221------------------------------------------------------------------------------ 1222CHANGES SINCE PREVIOUS VERSION (1.0.27) 1223------------------------------------------------------------------------------ 1224 1225 * A simple TCP stack has been added to the firmware. If you define 1226 CFG_TCP=1, this stack will be added to the firmware build. 1227 Note that this stack is unfinished, largely untested, 1228 and is not meant to provide high performance. As of this version, 1229 several important TCP features are not implemented, including 1230 slow-start, fast-retransmit, round-trip-delay calculation, 1231 out-of-band data, etc. It works well enough for simple interactive 1232 applications (a miniature rlogin client is included) and may be 1233 sufficient for a simple httpd. This stack will be improved over 1234 time; it is meant for amusement purposes only at this time. 1235 1236 * Support has been added for the ST Micro clock chips present 1237 on newer SWARM (rev3) boards. This chip replaces the Xicor X1241 1238 on previous versions. The environment variables are now 1239 stored in a second Microchip 24LC128 on SMBus1. 1240 1241 * A new bsp_config.h option, CFG_UNIPROCESSOR_CPU0, has been 1242 added. If this is set to '1' and CFG_MULTI_CPUS=0 (uniprocessor mode) 1243 then the firmware will switch the CPU into "uniprocessor CPU0" 1244 mode, making it look more like an 1125 (it will actually report 1245 itself as an 1150, since 512KB of L2 cache are available). 1246 1247 * Moved the exception vectors into RAM. For relocatable versions 1248 of CFE, the exception vectors are now in RAM. Previously, 1249 exceptions were handled by the ROM version whether or not the 1250 firmware was relocated, causing all sorts of problems, including 1251 running the wrong code after an exception. As a result, CFE is much 1252 more robust now at handling exceptions when the GP register 1253 has been trashed, since it can recover the GP value from a low-memory 1254 vector. The PromICE (BOOTRAM) version does not use RAM exception 1255 vectors. This change also paves the way for building versions 1256 of CFE that include a real interrupt handler, should that be required. 1257 1258 * The exception register dump now includes the register names as 1259 well as the numbers. 1260 1261 * Support has been added to the Ethernet driver for the quirks of the 1262 BCM5421 PHY (the quirks only affect A0 silicon). 1263 1264 * If you run the multiprocessor version of CFE on a single-processor 1265 chip (for example, a 1250 that has been restarted in uniprocessor mode), 1266 it will not hang when starting the secondary core. Error codes will 1267 be returned to applications that attempt to start the secondary 1268 cores. 1269 1270 * The cache operations now include routines for invalidating 1271 or flushing ranges. This is of limited use on the 1250. 1272 1273 * A simple cache error handler has been added. It will display 1274 'Cerr' on the LEDs. 1275 1276 * The DRAM init routines now have better support for large memory 1277 systems, using an external decoder on the chip select lines. 1278 1279 * Support has been added to the flash driver for 16-bit Intel-style 1280 flash parts, and "burst mode" on the pass2 generic bus interface. 1281 1282 * The X86 emulator in the VGA init code has been enhanced to include 1283 some previously unimplemented instructions. 1284 1285 1286------------------------------------------------------------------------------ 1287CHANGES SINCE PREVIOUS VERSION (1.0.26) 1288------------------------------------------------------------------------------ 1289 1290 * The memory initialization code has been dramatically improved. 1291 It now supports calculating all of the timing parameters using 1292 the CPU speed and the timing data in the SPD ROMs on the DIMMs. 1293 You can also specify this information from the datasheets for 1294 systems with soldered-down memory. 1295 1296 Better support has been added for non-JEDEC memory types 1297 such as FCRAMs and SGRAMs, and this information is also stored 1298 in the "initialization table." 1299 1300 Systems with more than 1GB of physical memory are now supported 1301 correctly by the dram init routines. The MC_CS_START/END registers 1302 were being programmed incorrectly. A limitation of the current 1303 design is that memory DIMMs must not be broken across the 1GB 1304 line (for example, in MSB-CS mode, do not install a 512M DIMM, 1305 a 128M DIMM, and a 512M DIMM). 1306 1307 NOTE: TO MAKE THIS CHANGE, COMPATIBILITY WITH OLD DRAM INIT 1308 TABLES HAS BEEN BROKEN! 1309 1310 You should re-read the CFE manual for information about the new 1311 DRAM init table format, which now contains multiple record types 1312 to describe memory channels, chip select information, timing 1313 information, and geometries. As more features are added to 1314 the memory init routine in the future, new record types can be 1315 added. 1316 1317 * An bug in the L2 cache flush routine has been fixed 1318 that might cause some boards to hang at the "L12F" 1319 display on the LEDs. The bug can occur depending on 1320 the previous contents of the cache (presumably garbage). 1321 In rare circumstances, an ALU overflow can occur because 1322 of an incorrect 'dadd' instruction that should have been 'daddu' 1323 1324 * All of the BSPs have been updated to support the new memory init 1325 routine. This involves changes to the bsp_config.h files and 1326 the various board_init.S files. 1327 1328 * The memory initialization routine now returns the memory size 1329 in megabytes, not bytes. This prevents overflows on large memory 1330 systems using 32-bit firmware. 1331 1332 * An L2 cache diagnostic is now included. It is only run for 1333 pass2 parts, since the tag format has changed. If a quadrant 1334 of the cache fails the diagnostic, it will be disabled. 1335 1336 * Support for downloading binaries to SENTOSA boards over the PCI 1337 bus is now included. Enable the CFG_DOWNLOAD parameter 1338 in the makefile to add the required object files and 1339 source. See the manual for more information about how to 1340 use this feature. 1341 1342 * A better (but still not ideal) memory diagnostic is included 1343 in the 64-bit firmware. The "memorytest" command will 1344 test all memory not used by CFE. 1345 1346 * The Ethernet interface will be reset when an OS like Linux 1347 exits. In previous versions Linux would not probe 1348 the Ethernet if the kernel was restarted, since the 1349 Ethernet address register was not reset. 1350 1351 * Numerous improvements have been made to the LDT configuration 1352 routines. 1353 1354 * The real-time clock driver for the ST Micro part used on the 1355 SENTOSA boards is now included. 1356 1357 * It is possible to build a variant of CFE that runs in DRAM 1358 (to be loaded like an application program) by setting the 1359 configuration parameter "CFG_RAMAPP=1" in your Makefile. 1360 When this option is used, the resulting CFE binary 1361 skips the CPU and DRAM initialization, but continues to install 1362 its device drivers. You can use CFE like a big runtime 1363 library or as a framework for diagnostics or other small apps. 1364 1365------------------------------------------------------------------------------ 1366CHANGES SINCE PREVIOUS VERSION (1.0.25) 1367------------------------------------------------------------------------------ 1368 1369 * More improvements to the directory structure, moving architecture-specific 1370 code and macros into appropriate subdirectories. 1371 1372 * The new "Sentosa" evaluation board is now a supported target. 1373 1374 * More macros to customize 32 vs 64-bit implementations For example, 1375 certain CPU-specific things like ERET and hazard avoidance have 1376 been moved to each CPU's cpu_config.h file. 1377 1378 * For the SWARM target, you can now build a "bi-endian" 1379 firmware image. This actually contains two different 1380 versions of CFE with some magic code at the exception 1381 vectors to transfer control to the appropriate version 1382 depending on system endianness. See the 'biend' target 1383 in swarm/Makefile, arch/mips/common/include/mipsmacros.h, 1384 arch/mips/common/src/init_mips.S, and the documentation. 1385 1386 * The "filesystem" calls have been moved into cfe_filesys.c and are 1387 now functions, not macros. There is a 'hook' facility to allow 1388 you to intercept I/O calls to do preprocessing on data received 1389 from the filesys. 1390 1391 * A 'hook' has been created for zlib (compressed file support). If you 1392 compile with CFG_ZLIB=1 in your Makefile, CFE will support the 1393 "-z" switch on the 'boot' and 'load' commands. This can be used 1394 to load compressed binaries, elf files, and s-records. 1395 1396 * A new 'build' directory has been created. This directory and 1397 its subdirectories will contain the makefiles and object file areas 1398 for supported builds. You can create your own directories in there 1399 for your ports, and this should ease merge headaches. 1400 1401 * The 'dump', 'edit' and 'disassemble' commands now gracefully 1402 trap exceptions that occur when you mistype addresses. CFE will no 1403 longer reboot in these cases. Over time we'll use this feature 1404 to catch more exceptions. 1405 1406 * The "-p" (physical) switch for the dump, edit, and disassemble 1407 commands now makes uncached references to the addresses you specify. 1408 It used to make cached references. 1409 1410 * Non-relocatable builds work again. There was a bug in one of the 1411 macros used in init_mips.S 1412 1413 * A new include file, sb1250_draminit.h, has been created to hold 1414 structures and constants for the DRAM init code. For example, 1415 the DRAMINFO macro, which was duplicated in all the board packages, 1416 has been moved here. 1417 1418 * The DRAM init code now uses the upper bit (bit 7) of the SMBus 1419 device address to indicate which SMBus channel the SPDs are on. 1420 this way you can use both SMBus channels for SPD ROMs. There 1421 are macros in sb1250_draminit.h to take apart the SMBus 1422 device ID into the channel # and device. 1423 1424 * The DRAM init code now supports chipselect interleaving 1425 by setting the CFG_DRAM_CSINTERLEAVE value in bsp_config.h 1426 You set this value to the number of bits of chip selects 1427 you want to interleave (0=none, 1=CS0/CS1, 2=CS0/1/2/3) 1428 1429 * The flash device has been substantially rewritten. It now supports 1430 Intel-style flash, 16-bit devices (not particularly useful on 1431 the 1250), and "manual" sectoring for JEDEC flash devices that 1432 do not have CFI support. Usage of the flash for NVRAM (environment) 1433 storage has been substantially improved and tested. 1434 1435 * There's a #define in the SWARM init module (swarm_init.S) to cause 1436 the LED messages to go to the serial port. #define _SERIAL_PORT_LEDS_ 1437 if you want to use it. 1438 1439 * The environment storage format has changed slightly, but 1440 in a backward-compatible way. It is now possible to store 1441 TLVs whose data portions is more than 255 bytes, and a 1442 portion of the TLV code range has been reserved for 1443 customer use. 1444 1445 * The VGA initialization code is once again alive on the SWARM board. 1446 (In the processs, it got broken for the P5064. Oh, well.) There's 1447 still no USB keyboard support, but adventurous souls that want to 1448 put text out on a VGA display can now do that, at least for some 1449 of the cards we've tried. 1450 1451 * The real-time-clock commands were not properly setting the clock 1452 to "military time" mode, affecting the notion of AM and PM. 1453 1454 * The real-time-clock code has been divided into two pieces, 1455 the user-interface and a standard CFE driver. This is to 1456 make things easier when supporting different RTC chips. 1457 1458 * Calls through the "init table" in init_mips.S that must take place 1459 after relocation should use the new CALLINIT_RELOC macro. this 1460 macro makes use of the text relocation amount (mem_textreloc) 1461 and the GP register, so care must be taken when using it. If 1462 you don't use this macro, however, you can end up running the code 1463 non-relocated even though you've gone and moved it! Basically, 1464 pointers stored in the text segment (like the init table) are 1465 not fixed up, so fixups must be applied manually. 1466 1467 * The installboot program in the ./hosttools directory has been 1468 improved to be actually useful for installing bootstraps on 1469 disks. You can compile this program under Linux and use it to 1470 put a boot sector and boot program on an IDE disk, then boot 1471 from that disk via CFE. 1472 1473 * The FAT filesystem code should now properly detect whether the 1474 underlying disk has or doesn't have a partition table. This 1475 can be a problem with CF flash cards - they are 1476 formatted at the factory with partition tables, but if 1477 reformatted under Windows 2000, the partition table will be 1478 eliminated (more like a floppy). 1479 1480 * The FAT filesystem code should now correctly find files stored 1481 in subdirectories (below the root) 1482 1483 1484------------------------------------------------------------------------------ 1485SPECIAL NOTE FOR RELEASES STARTING WITH 1.0.25 1486------------------------------------------------------------------------------ 1487 1488 * The directory structure of the CFE firmware has changed 1489 substantially starting with 1.0.25. You will notice many 1490 changes, including: 1491 1492 - Board, CPU, and architecture-specific files are now 1493 in their own directories. 1494 1495 - The makefile is distributed among several subdirectories 1496 1497 - Wherever possible, code has been made more generic. 1498 1499 - Some user-interface code has been changed. 1500 1501 These changes are in anticipation of the use of CFE on 1502 future Broadcom processors and reference designs. 1503 1504 Should you wish, you can also make use of this new organization 1505 to port CFE to other MIPS designs, and with some difficulty 1506 to non-MIPS designs as well. 1507 1508 * The build procedure has been modified to allow you to 1509 build the object files into an arbitrary directory 1510 that is not related to the source directories. 1511 1512 * The release that contains this reorganization is now 1513 called "1.0.xx" 1514 1515 * The documentation (docs/cfe.pdf) contains important information 1516 related to the change in the directory structure. 1517 1518 * The code reorganization that goes with this change is not 1519 fully complete, so expect some additional changes in the 1520 future, including: 1521 1522 - A way to conditionally remove all the debug/bringup 1523 code specific to the BCM1250 1524 1525 - New include files to abstract certain aspects of device 1526 I/O, especially for PCI devices 1527 1528 - A potential change in the default location that the 1529 default CFE builds take place. They are currently in 1530 their familiar locations to make it easier for 1531 you (customers) to incorporate your code. 1532 1533 * Please let me know if this new directory organization 1534 has caused major headaches. 1535 1536 * The license text has been updated. 1537 1538 1539------------------------------------------------------------------------------ 1540CHANGES SINCE PREVIOUS VERSION (0.0.23) 1541------------------------------------------------------------------------------ 1542 1543 * The directory layout has been substantially modified 1544 (see above) 1545 1546 * The user interface for the memory-related commands, 1547 (dump, edit, disassemble) have been improved. They 1548 remember the previous address and length and now 1549 have simple switches (-p, -v) to deal with physical 1550 and virtual (kernel or useg) addresses. 1551 1552 * The PCI configuration option has moved from bsp_config.h 1553 to the Makefile 1554 1555 * Some initialization of UI modules have been moved 1556 out of cfe_main.c and into board-specific startup 1557 files. 1558 1559 * The Algorithmics P5064 port has been resurrected to 1560 verify the build procedure for other designs. 1561 1562 * There are new commands to deal with the SWARM board's 1563 Xicor X1241 real time clock. See "show time, set time, set date" 1564 1565------------------------------------------------------------------------------ 1566CHANGES SINCE PREVIOUS VERSION (0.0.21) 1567------------------------------------------------------------------------------ 1568 1569 * The memory initialization module (sb1250_draminit.c) 1570 had a bug where it was not setting the START/END 1571 registers properly when using double-sided DIMMs. 1572 This is the most important fix in this release. 1573 1574 * The cfe_ioctl() internal routine now takes the 'offset' 1575 parameter for the iocb. This is used by programs and 1576 extensions inside the firmware. 1577 1578 * The CMD PCI0648 chip has been added to the list of 1579 PCI devices probed by the IDE routines. 1580 1581 * A "vendor commands" file has been added to the 1582 vendor/ directory. Some other changes have been 1583 made to "un-static" variables useful to vendor 1584 extensions. 1585 1586 1587 1588------------------------------------------------------------------------------ 1589CHANGES SINCE PREVIOUS VERSION (0.0.19, 0.0.20) 1590------------------------------------------------------------------------------ 1591 1592 * The "C" memory initialization code introduced in 0.0.19 1593 has been improved to calculate refresh timing based on 1594 CPU speed. In the future, additional timing parameters will 1595 be automatically calculated, particularly for DIMMS. 1596 If you have special values for the clock config register you 1597 can now specify those in your bsp_config.h file. 1598 1599 * The PCI subsystem now reads an environment variable PCI_OPTIONS 1600 which contains a comma-separated list of flags to control 1601 PCI startup. You can prefix an option name with "no" to 1602 turn off an option. Currently the following flags are defined: 1603 1604 verbose Be very verbose while probing 1605 ldt_prefetch Turn on prefetching from the Sturgeon bridges 1606 1607 The default is to enable ldt_prefetch. 1608 1609 Some SWARM boards appear to have a problem related to 1610 prefetch across the HyperTransport (LDT) bus. If you experience 1611 DMA failures with devices connected to the PCI slots behind 1612 the Sturgeon bridge, you may wish to disable prefetching 1613 to work around this issue. To do this, set the 1614 PCI_OPTIONS environment variable as follows: 1615 1616 CFE> setenv -p PCI_OPTIONS "noldt_prefetch" 1617 1618 (reboot for changes to take effect) 1619 1620 Board support packages should be modified to add the NVRAM 1621 device and call cfe_set_envdevice() in the board_console_init() 1622 routine instead of board_device_init(), since the PCI 1623 init code is done before device initialization. 1624 1625 1626 * A number of improvements have been made to the Tulip (Intel 21143) 1627 device driver. 1628 1629 * The SB1250 include files have had some minor fixes. In particular, 1630 the correct values are now used for the interframe gap in the MAC. 1631 1632 * The SB1250 Ethernet driver was erroneously setting the M_MAC_FC_SEL 1633 bit in all full-duplex modes. M_MAC_FC_SEL is only supposed to be 1634 used to force pause frames. 1635 1636 * The SWARM board package supports Rev2 SWARM boards, which 1637 have all 4 configuration bits on the configuration switch (SW2) 1638 1639 * A better memory test is now part of the 64-bit CFE, 1640 see the "memorytest" command. 1641 1642 * The 'flash2.m4' file was missing from the 0.0.19 distribution. 1643 1644 1645------------------------------------------------------------------------------ 1646CHANGES SINCE PREVIOUS VERSION (0.0.17, 0.0.18) 1647------------------------------------------------------------------------------ 1648 1649 * The memory initialization code has been rewritten in "C". 1650 It should be much easier to read and more flexible now, 1651 supporting more memory configurations. In particular, 1652 if you have CFG_DRAM_INTERLEAVE set, CFE will automatically 1653 use port interleaving if the DIMMs on adjacent channels 1654 are of the same type and geometry. 1655 1656 * There is a new 'save' command that invokes a TFTP client 1657 for writing regions of memory to a TFTP server. 1658 You should ensure that your TFTP server is capable of 1659 write access before using this feature. 1660 1661 * The API functions for the cache flush routines have been 1662 filled in, so the bitmask in the iocb.iocb_flags field 1663 for determining which type of cache flush to do should 1664 behave as the documentation indicates. 1665 1666 * For customers wishing to extend CFE's APIs, a new 1667 directory "vendor/" has been added to the tree. 1668 If CFG_VENDOR_EXTENSIONS is defined, IOCBs above 1669 the value CFE_FW_CMD_VENDOR_USE will be redirected to 1670 a vendor-specific dispatch area. You can implement 1671 custom IOCB functions there. 1672 1673 * On the C3 platform there is some code to send the 1674 4-character LED messages to the serial port. If your 1675 design does not include a 4-character LED, you can 1676 incorporate this into your code to see the LED messages. 1677 1678 * Many improvements have been made to the Tulip (DC21143) driver. 1679 1680 * The disassembler has been modified to create far fewer 1681 initialized pointers, increasing the amount of space 1682 available in the GP area. 1683 1684 * The value in the A1 register for the primary processor 1685 startup is now zero. Eventually you'll be able to pass 1686 a parameter here like you can to CPU1. 1687 1688 * The "-addr" and "-max" switches to the "load -raw" 1689 command now work. 1690 1691------------------------------------------------------------------------------ 1692CHANGES SINCE PREVIOUS VERSION (0.0.16) 1693------------------------------------------------------------------------------ 1694 1695 * The LDT initialization code has been improved. LDT 1696 operation should be much more reliable on SWARM 1697 boards. 1698 * If you set the configuration switch to zero, CFE was 1699 still trying to access PCI space on SWARM boards. 1700 This has been fixed. 1701 1702------------------------------------------------------------------------------ 1703CHANGES SINCE PREVIOUS VERSION (0.0.15) 1704------------------------------------------------------------------------------ 1705 1706BUGS FIXED 1707 1708 * If you don't initialize the PCI bus, CFE was still trying to 1709 read configuration space to configure PCI devices. This has been 1710 fixed. 1711 1712------------------------------------------------------------------------------ 1713CHANGES SINCE PREVIOUS MAJOR VERSION (0.0.10) 1714------------------------------------------------------------------------------ 1715 1716BUGS FIXED 1717 1718 * The DRAM CAS latency now defaults to 2.5 for 500MHz 1719 operation. 1720 * To work around a PASS1 bug (see the errata) some portions 1721 of the multi-CPU startup have been changed. See the 1722 stuff in init_mips.S in the _SB1250_PASS1_WORKAROUNDS_ 1723 blocks. 1724 1725NEW FEATURES 1726 1727 * The build procedure now uses 'mkflashimage' to build 1728 a header on the front of a flash image. This is 1729 used to prevent you from flashing an invalid file 1730 over a running CFE. 1731 * Many improvements in the PCI/LDT configuration code. 1732 * The DC21143 (Tulip) driver has been improved. 1733 * The IDE driver has been revamped to perform a little 1734 better and work in either endianness without 1735 unnecessary byte swapping. 1736 * The PCMCIA driver has been updated to support the SWARM 1737 * A new switch "-p" is required on SETENV to set the 1738 environment in the NVRAM. It now defaults to storing 1739 in RAM only unless this switch is supplied. 1740 * The environment variable "STARTUP" can be used to run 1741 some commands at boot time. 1742 * You can put multiple commands on a command line by 1743 separating them with semicolons 1744 * The configuration switch can now configure some 1745 aspects of CFE at run time. See the manual. 1746 1747KNOWN PROBLEMS 1748 1749 * The flash update erases the entire device, not just the 1750 sectors it needs. 1751 * IDE disks work on real hardware, but ATAPI devices don't. 1752 The Generic Bus timing registers probably need to be tweaked. 1753 1754 1755------------------------------------------------------------------------------ 1756RUNNING CFE UNDER THE FUNCTIONAL SIMULATOR 1757------------------------------------------------------------------------------ 1758 1759One goal for the functional simulator is for it to more-or-less completely 1760emulate the functionality and peripherals available on the "SWARM" 1761BCM12500 checkout board. 1762 1763The configuration files in the swarm/ directory contain the current 1764port of CFE to the evaluation board. 1765 1766Heed this warning: 1767 1768NOTE: CFE and the functional simulator are often out of sync, so be sure 1769 to read these release notes for information on running CFE on 1770 older versions of the simulator. 1771 1772* Compiling CFE for use under the functional simulator 1773 1774 Because the functional simulator is significantly slower than real 1775 hardware (on a 900MHz PC it operates at the equivalent of 500Khz) 1776 it is important to define the following symbols before compiling 1777 the firmware (place this in the Makefile, see the comments there): 1778 1779 CFLAGS += -D_FUNCSIM_ -D_FASTEMUL_ 1780 1781 You can also build the simulator in the 'sim' target directory 1782 where these symbols are already defined. 1783 1784 These two preprocessor symbols _FUNCSIM_ and _FASTEMUL_ change the 1785 timing loops to be appropriate for the slow processor and eliminate 1786 certain parts of the cache initialization , since the simulated caches 1787 start in an initialized state. 1788 1789 Don't forget to remove this before running on real hardware! 1790 1791* Running CFE under the functional simulator. 1792 1793 To run the simulator using the new sb1250-run script (part of the 1794 1.9.1 and later toolchains), you can do: 1795 1796 #!/bin/sh 1797 sb1250-run \ 1798 --with-boot-flash-file cfe.srec \ 1799 --with-boot-flash-type ram \ 1800 --no-file \ 1801 --with-swarm-devs \ 1802 --with-sample-pci-devs \ 1803 --with-swarm-ide \ 1804 --with-swarm-ide-disk0-file disk0.dsk \ 1805 --with-swarm-ide-disk0-size 60 \ 1806 --with-memory-config 2x32 \ 1807 --with-swarm-rtc-eeprom-file x1240rom.bin 1808 1809 In this configuration, CFE will have "null" back-ends for the Ethernet 1810 and use standard I/O for the console. It is a convenient way 1811 to verify that CFE is operational, but it does not provide a good 1812 way to load programs. See the next section for configuring 1813 network operation. 1814 1815 PCI and LDT configuration are supported under the 1.8.12 and newer 1816 toolchains. 1817 1818* Simulated hardware description: 1819 1820This command and the devices file will configure the simulator as follows: 1821 1822 * 64MB of memory in one DIMM, as two 32MB DIMMs 1823 * Two Serial Presence Detect modules at SMBus Channel 0 address 0x54 1824 * A Xicor X1240 clock/eeprom module on SMBus Channel 1 (device "eeprom0") 1825 * A four-character LED at 0x100A0000 1826 * A 60MB IDE disk at 0x100B0000 (device "ide0") 1827 * 4MB of flash at 0x1FC00000 (device "flash0") 1828 * Two UARTs on the BCM12500 (devices "uart0", "uart1") 1829 * Three Ethernet devices (devices "eth0", "eth1", and "eth2") 1830 1831 * The Xicor's EEPROM contents will be stored in a local file 1832 called "x1240rom.bin" 1833 * The IDE disk's contents will be stored in the local file "disk0.dsk" 1834 * The flash at 0x1FC00000 will read the file "cfe.srec" when the 1835 simulator starts. 1836 * The flash at 0x1FC00000 is set to behave like SRAM. You can use this 1837 area to load other programs into the boot ROM and set breakpoints when 1838 running under GDB. If you want the flash to behave like real flash, 1839 edit sb1250-run command above and change the flash-type to "flash" 1840 1841 1842If successful, you should see the following when you start 1843the simulator: 1844 1845---------------------------------------------------------------------- 1846 1847# ./runcfe 1848Disk 0: 60MB, 122 Cyl 16 Head 63 Sect: File disk1.dsk 1849Loading S-Record file cfe.srec (offset 0x00000000) 1850Finished loading file. 1851sim: cpu model mips:sb-1, word size 64, addr size 64, big endian 1852 1853CFE version 0.0.10 for CSWARM-SIM (32bit,MP,BE) 1854Build Date: Wed Jun 20 07:02:57 PDT 2001 (...) 1855Copyright (C) 2000,2001 Broadcom Corporation. All Rights Reserved. 1856 1857Initializing Arena. 1858Initializing Devices. 1859SysCfg: 0000000000480500 [PLL_DIV: 10, IOB0_DIV: CPUCLK/4, IOB1_DIV: CPUCLK/3] 1860Config switch: 0 1861CPU type 0x1040101: 500KHz 1862Total memory: 0x4000000 bytes (64MB) 1863 1864Total memory used by CFE: 0x81E00000 - 0x81F06290 (1073808) 1865Initialized Data: 0x81E00000 - 0x81E04020 (16416) 1866BSS Area: 0x81E04020 - 0x81E04290 (624) 1867Local Heap: 0x81E04290 - 0x81F04290 (1048576) 1868Stack Area: 0x81F04290 - 0x81F06290 (8192) 1869Text (code) segment: 0x9FC00000 - 0x9FC26720 (157472) 1870Boot area (physical): 0x01F07000 - 0x01F47000 1871Relocation Factor: I:00000000 - D:00000000 1872 1873CFE> 1874 1875 1876---------------------------------------------------------------------- 1877 1878------------------------------------------------------------------------------ 1879NETWORK BOOTSTRAP 1880------------------------------------------------------------------------------ 1881 1882CFE includes an Ethernet driver, so you should be able to use 1883the "simether-live" program to access the live network. The program 1884"simether-live" feeds packets from your real network into the simulated 1885Ethernet devices of the functional simulator. To use this, you will need 1886to activate the simulator's "backends." Invoke the simulator with the 1887following command: 1888 1889 #!/bin/sh 1890 sb1250-run \ 1891 --with-boot-flash-file cfe.srec \ 1892 --with-boot-flash-type ram \ 1893 --no-file \ 1894 --with-swarm-devs \ 1895 --with-sample-pci-devs \ 1896 --with-swarm-ide \ 1897 --with-sockets-for-io \ 1898 --stream-socket-base-addr "0.0.0.0:10100" \ 1899 --sim-wait-after-init \ 1900 --with-swarm-ide-disk0-file disk0.dsk \ 1901 --with-swarm-ide-disk0-size 60 \ 1902 --with-memory-config 2x32 \ 1903 --with-swarm-rtc-eeprom-file x1240rom.bin 1904 1905 1906The simulator wll start up as follows: 1907 1908---------------------------------------------------------------------- 1909/sb1250sio/backend_a: listening on TCP socket 0.0.0.0:10100 1910/sb1250sio/backend_b: listening on TCP socket 0.0.0.0:10101 1911/sb1250jtag/backend: listening on TCP socket 0.0.0.0:10102 1912/sb1250eth@0x10064000/backend: listening on TCP socket 0.0.0.0:10103 1913/sb1250eth@0x10065000/backend: listening on TCP socket 0.0.0.0:10104 1914/sb1250eth@0x10066000/backend: listening on TCP socket 0.0.0.0:10105 1915Disk 0: 60MB, 122 Cyl 16 Head 63 Sect: File disk0.dsk 1916Loading S-Record file cfe.srec (offset 0x00000000) 1917Finished loading file. 1918sim: cpu model mips:sb-1, word size 64, addr size 64, big endian 1919sb1-elf-run: initialization complete. 1920sb1-elf-run: hit return to run... 1921---------------------------------------------------------------------- 1922 1923The messages from the simulator in the form 1924 1925 /device/backend: listening on TCP socket 0.0.0.0:xxxxx 1926 1927let you know how to connect external programs to the simulator. 1928 1929In this case, the console will be connected to port 10100, since 1930it is the serial port's "backend_a" device. Start another window 1931and run the "conn" program to connect to the serial port 1932as follows: 1933 1934 $ conn localhost 10100 1935 1936The Ethernets will also be available as TCP sockets. In this case, 1937MAC 0 (ast SB1250 physical address 10064000) has a socket at 193810103. To connect to this socket, create another shell window 1939and "su" to super-user mode. Run the simether-live 1940program as follows: 1941 1942 # simether-live localhost:10103 eth0 1943 1944(replace 'eth0' with the name of your Ethernet interface). 1945 1946Now, let the simulator begin execution by pressing "return" 1947in the simulator's window. CFE should start up and display 1948its startup messages in the window you ran "conn" in. 1949 1950If you are running more than one copy of the simulator on 1951your network, you can set the hardware address for the Ethernet 1952port by typing: 1953 1954 CFE> setenv ETH0_HWADDR 40:00:00:11:22:33 1955 1956(replace 11-22-33 with a unique value for your network). If you 1957have configured the EEPROM device file, this setting will be 1958persistent across restarts of the simulator. 1959 1960If you configure a DHCP server on your network, you should be 1961able to: 1962 1963 CFE> ifconfig eth0 -auto 1964 1965Or, you can manually configure the network: 1966 1967 CFE> ifconfig eth0 -addr=192.168.168.168 -mask=255.255.255.0 \ 1968 -gw=192.168.168.1 -dns=192.168.168.240 1969 1970(the backslash is just for this document - you should type the entire 1971command on one line). 1972 1973Then, you can boot a program from your TFTP server: 1974 1975 CFE> boot -elf myserver:path/filename 1976 1977You'll need the -elf switch if the program you're loading is in 1978ELF format. Eventually, CFE will do this automatically. 1979 1980 1981------------------------------------------------------------------------------ 1982LOADING CFE INTO THE FUNCTIONAL SIMULATOR'S DEBUGGER 1983------------------------------------------------------------------------------ 1984 1985The 'debugcfe' script in the sim/ directory will invoke 1986sb1250-run to generate hardware description files, and then 1987run CFE under the debugger and step to the first instruction. 1988 1989------------------------------------------------------------------------------ 1990SIMULATOR HACK: LOADING LARGE IMAGES 1991------------------------------------------------------------------------------ 1992 1993Loading large programs via TFTP can be painfully slow in the 1994simulator. To work around this, the simulator's bsp includes 1995an additional flash device called 'flash2'. This flash is 1996mapped in the address space normally occupied by the PCMCIA 1997adapter and is 64MB in size. 1998 1999You can instantiate a flash device in the simulator to live at 2000that same address and pre-load a binary file into it. CFE 2001can then be used to boot that file using the "raw" file system 2002loader. 2003 2004The files "runcfe" and "runcfe_withnet" in the sim/ directory 2005have been provided for this purpose. For example, to boot 2006Linux in the simulator using this method, you can do: 2007 2008 ./runcfe /path/to/my/vmlinux 2009 2010(this assumes you have "cfe.srec" in your current directory 2011from a recent CFE build, you can modify the shell script 2012if you want it located somewhere else). 2013 2014When CFE starts, you can do: 2015 2016 CFE> boot -elf -rawfs flash2: 2017 2018This will cause CFE to read bytes sequentially from the 2019flash2 device and parse them as an ELF file. The additional 2020hardware configuration information in the "flash2.m4" 2021file (loaded via the "runcfe" script) will cause the file 2022you choose to live at the PCMCIA flash address 0xB1000000). 2023 2024You can also use this same technique to load elf files via 2025the simulated disk, but it is much slower. To do this, modify 2026the shell script "runcfe" to point the disk container 2027file (it's called "disk0.dsk" in the sample) to your binary. 2028Then you can do: 2029 2030 CFE> boot -elf -rawfs ide0: 2031 2032to read the binary in from the disk. Flash emulation is 2033much faster and is the preferred way to load binaries 2034into the simulator quickly. 2035