1/**
2 * \file
3 * \brief Bootstrap the kernel for ARMv7 processors.  This code is
4 *      entered from the bootloader (typically arm_molly, RedBoot,
5 *      etc.).
6 */
7/*
8 * Copyright (c) 2009,2016 ETH Zurich.
9 * All rights reserved.
10 *
11 * This file is distributed under the terms in the attached LICENSE file.
12 * If you do not find this file, copies can be found by writing to:
13 * ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group.
14 */
15
16#ifndef __ASSEMBLER__
17#define __ASSEMBLER__   1
18#endif
19
20#include <barrelfish_kpi/flags_arch.h> // ARM_MODE_MASK
21#include <offsets.h> // KERNEL_STACK_SIZE
22#include <asmoffsets.h>
23
24    .globl start, target_mpid
25
26    .bss
27    .align 8
28// This stack is used by the boot driver on every core - the CPU driver has
29// its own stack on each core.  This means that two boot drivers shouldn't run
30// simultaneously, unless and until we change this.
31boot_stack:
32    .space KERNEL_STACK_SIZE, 0
33boot_stack_top:
34
35    .section .text
36    .arm
37
38    .extern got_base
39
40// On ARM platforms that don't implement their own boot protocol (e.g.
41// simulators), all cores will start executing here, and it's up to us to park
42// the non-BSP cores.
43start:
44    // On entry:
45    //
46    // MMU disabled
47    // Caches in unknown state, but no lockdown
48    // No TLB lockdown.
49    // CPU is in a privileged mode.
50    //
51
52    // Switch to system mode, with aborts and interrupts off.
53    cpsid aif, #ARM_MODE_SYS
54
55    // Init stack
56    ldr sp, =boot_stack_top
57
58    ldr PIC_REGISTER, =got_base
59
60    // Check to see if we're core 0.
61    mrc p15, 0, r3, c0, c0, 5
62    and r3, r3, #0xffffff
63    cmp r3, #0
64
65    // If not, wait for the BSP to wake us up.
66    bne wait_for_bsp
67
68    // Prepare argument
69    b boot_bsp_core
70    b halt
71
72wait_for_bsp:
73    // Get the address of our mailbox.  Right now there's only one.
74    ldr r4, got_boot_records
75    ldr r0, [PIC_REGISTER, r4]
76
77    // r3 - MPID
78    wfe
79
80    // Check whether we're the core that's being woken.  If not, go back to
81    // sleep.
82    ldr r4, [r0, #OFFSETOF_BOOT_TARGET_MPID]
83    cmp r3, r4
84    bne wait_for_bsp
85
86    // Pass the boot record to boot_app_core()
87    b boot_app_core
88    b halt
89
90// The GOT offset of the boot record (mailbox) table.
91    .type got_boot_records, STT_OBJECT
92got_boot_records:
93    .word boot_records(GOT)
94