1/** 2 * \file 3 * \brief Private memory region layout for the Cortex-A9 MPCore 4 */ 5 6/* 7 * Copyright (c) 2016 ETH Zurich. 8 * All rights reserved. 9 * 10 * This file is distributed under the terms in the attached LICENSE file. 11 * If you do not find this file, copies can be found by writing to: 12 * ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group. 13 */ 14 15/* Offsets taken from ARM Cortex A9 MPCore TRM Table 1-3. */ 16 17#ifndef A9MPCORE_MAP_H 18#define A9MPCORE_MAP_H 19 20#define A9MPCORE_SCU_OFFSET 0x0000 21#define A9MPCORE_SCU_SIZE 0x0100 22 23#define A9MPCORE_GIC_CPU_OFFSET 0x0100 24#define A9MPCORE_GIC_CPU_SIZE 0x0100 25 26#define A9MPCORE_TIMER_GBL_OFFSET 0x0200 27#define A9MPCORE_TIMER_GBL_SIZE 0x0100 28 29#define A9MPCORE_TIMER_LCL_OFFSET 0x0600 30#define A9MPCORE_TIMER_LCL_SIZE 0x0100 31 32#define A9MPCORE_GIC_DIST_OFFSET 0x1000 33#define A9MPCORE_GIC_DIST_SIZE 0x1000 34 35#endif /* A9MPCORE_MAP_H */ 36