1/**
2 * \file
3 * \brief
4 */
5
6/*
7 * Copyright (c) 2010, ETH Zurich.
8 * All rights reserved.
9 *
10 * This file is distributed under the terms in the attached LICENSE file.
11 * If you do not find this file, copies can be found by writing to:
12 * ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group.
13 */
14
15#ifndef ARCH_X86_BARRELFISH_KPI_SPINLOCKS_H
16#define ARCH_X86_BARRELFISH_KPI_SPINLOCKS_H
17
18#include <stdint.h> // for uint32_t
19
20/** \brief spinlock */
21typedef volatile uint32_t spinlock_t;
22
23static inline void acquire_spinlock(spinlock_t *lock)
24{
25#ifdef __k1om__
26    /* The Xeon Phi does not support pause instruction. we use delay instead
27     * which does the same thing as pause but with a variable amount of delay.
28     * 750 cycles for now.
29     */
30    uint32_t wait_cyc = 750;
31    __asm__ __volatile__("0:\n\t"
32                    "cmpl $0, %0\n\t"
33                    "je 1f\n\t"
34                    "delay %1\n\t"
35                    "jmp 0b\n\t"
36                    "1:\n\t"
37                    "lock btsl $0, %0\n\t"
38                    "jc 0b\n\t"
39                    : "+m" (*lock), "=r"(wait_cyc) : : "memory", "cc");
40#else
41    __asm__ __volatile__("0:\n\t"
42                    "cmpl $0, %0\n\t"
43                    "je 1f\n\t"
44                    "pause\n\t"
45                    "jmp 0b\n\t"
46                    "1:\n\t"
47                    "lock btsl $0, %0\n\t"
48                    "jc 0b\n\t"
49                    : "+m" (*lock) : : "memory", "cc");
50#endif
51}
52
53static inline void release_spinlock(spinlock_t *lock)
54{
55    __asm__ __volatile__("movl $0, %0\n\t"
56                    : "+m" (*lock) : : "memory" );
57}
58
59#endif
60