1/*
2 * Copyright (c) 2013, University of Washington. All rights reserved.
3 *
4 * This file is distributed under the terms in the attached LICENSE file.
5 * If you do not find this file, copies can be found by writing to:
6 * ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group.
7 */
8
9/*
10 * pci_sr_iov_cap.dev
11 *
12 * DESCRIPTION: PCI SR-IOV Extended Capability
13 * 
14 * Numbers in comments refer to the Single Root I/O Virtualization and
15 * Sharing Specification, Revision 1.1, January 20, 2010.
16 */
17
18device pci_sr_iov_cap lsbfirst ( addr base ) "PCI SR-IOV Extended Capability" {
19
20  // 3.3.1
21  register hdr ro addr( base, 0x00 ) "Extended Capabilities Header" {
22    id	   16  "PCI Express Extended Capability ID";
23    ver	   4   "Capability Version";
24    next   12  "Next Capability Offset";
25  };
26
27  // 3.3.2
28  register caps ro addr( base, 0x04 ) "SR-IOV Capabilities" {
29    vf_migration   1	 "VF Migration Capable";
30    ari_preserved  1	 "ARI Capable Hierarchy Preserved";
31    _		   19;
32    vf_mig_int	   11	 "VF Migration Interrupt Message Number";
33  };
34
35  // 3.3.3
36  register ctrl rw addr( base, 0x08 ) "SR-IOV Control" {
37    vf_enable	   	 1	 "VF Enable";
38    vf_mig_enable  	 1	 "VF Migration Enable";
39    vf_mig_int_enable	 1	 "VF Migration Interrupt Enable";
40    vf_mse		 1	 "VF MSE";
41    ari_capable		 1	 "ARI Capable Hierarchy";
42    _			 11;
43  };
44
45  // 3.3.4
46  register status rw addr( base, 0x0a ) "SR-IOV Status" {
47    vf_migration     1	   "VF Migration Status";
48    _		     15 mbz;
49  };
50
51  // 3.3.5
52  register initialvfs ro addr( base, 0x0c ) "InitialVFs" type(uint16);
53  // 3.3.6
54  register totalvfs ro addr( base, 0x0e ) "TotalVFs" type(uint16);
55  // 3.3.7
56  register numvfs rw addr( base, 0x10 ) "NumVFs" type(uint16);
57  // 3.3.8
58  register fdl ro addr( base, 0x12 ) "Function Dependency Link" type(uint8);
59  // 3.3.9
60  register offset ro addr( base, 0x14 ) "First VF Offset" type(uint16);
61  // 3.3.10
62  register stride ro addr( base, 0x16 ) "VF Stride" type(uint16);
63  // 3.3.11
64  register devid ro addr( base, 0x1a ) "VF Device ID" type(uint16);
65
66  // 3.3.12
67  register sup_psize ro addr( base, 0x1c ) "Supported Page Sizes" type(uint32);
68  // 3.3.13
69  register sys_psize rw addr( base, 0x20 ) "System Page Size" type(uint32);
70
71  // 3.3.14
72  regarray vf_bar rw addr( base, 0x24 ) [6] "VF BAR" type(uint32);
73
74  // 3.3.15
75  register vf_mig_state ro addr( base, 0x3c ) "VF Migration State Array Offset" {
76    bir	   3		"VF Migration State BIR";
77    offset 29		"VF Migration State Offset";
78  };
79
80};
81