1/* 2 * Copyright (c) 2008, ETH Zurich. All rights reserved. 3 * 4 * This file is distributed under the terms in the attached LICENSE file. 5 * If you do not find this file, copies can be found by writing to: 6 * ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group. 7 */ 8 9/* 10 * ac97_ext_codec.dev 11 * 12 * DESCRIPTION: AC'97 Extended Codec Register Set 13 * 14 * Numbers in comments refer to the Intel Audio Codec '97 specification, 15 * revision 2.3 revision 1.0, April, 2002 16 */ 17 18device ac97_ext_codec msbfirst ( io base ) "AC97 Extended Codec" { 19 20 // 5.9.1 21 register classrev ro io( base, 0x60 ) "Codec class/rev" { 22 rv 8 "Revision ID"; 23 cl 5 "Codec compatibility class"; 24 _ 3 rsvd; 25 }; 26 register pcisvid ro io( base, 0x62 ) "PCI SVID" type(uint16); 27 register pcisid ro io( base, 0x64 ) "PCI SID" type(uint16); 28 29 // 5.9.2 30 constants fncode "Function code" { 31 dac1 = 0 "DAC 1 (master out)"; 32 dac2 = 1 "DAC 2 (aux out)"; 33 dac3 = 2 "DAC 3 (C/LFE)"; 34 spdif = 3 "S/PDIF out"; 35 phone = 4 "Phone in"; 36 mic1 = 5 "Mic 1 (mic select=0)"; 37 mic2 = 6 "Mic 2 (mic select=1)"; 38 line = 7 "Line in"; 39 cd = 8 "CD in"; 40 video = 9 "Video in"; 41 aux = 10 "Aux in"; 42 mono = 11 "Mono out"; 43 }; 44 register fnsel io( base, 0x66 ) "Function select" { 45 tr 1 "Tip or ring select"; 46 fc 4 type(fncode) "Function code"; 47 _ 11 rsvd; 48 }; 49 register fninf io( base, 0x68 ) "Function information" { 50 fip 1 "Function information present"; 51 _ 3 rsvd; 52 iv 1 "Information valid"; 53 dl 5 "Buffer delays in 20.84us units"; 54 inv 1 "Inversion"; 55 g 5 "Gain or attenuation"; 56 }; 57 constants jackloc "Connector/jack location" { 58 rear = 0 "Rear I/O panel"; 59 front = 1 "Front panel"; 60 mother = 2 "Motherboard"; 61 dock = 3 "Dock/External"; 62 none = 7 "No connection"; 63 }; 64 65 register sensedet io( base, 0x6a ) "Sense details" { 66 sr 6 ro "Sense result"; 67 or 2 rw "Sense result order bits"; 68 // XXX These have complicated meanings not specified here (yet) 69 s 5 ro "Sensed bits"; 70 st 3 rw type(jackloc) "Connector/jack location"; 71 }; 72 73 // 5.9.3 74 constants slot "Slot mapping descriptor" { 75 s0 = 0 "None/not implemented"; 76 s34 = 3 "Slot 3/4 (3 for mono)"; 77 s69 = 6 "Slot 6/9 (6 for mono)"; 78 s7 = 7 "Slot 7,8 (7 for mono)"; 79 sa = 10 "Slot 10/11 (10 for mono)"; 80 }; 81 register dacslot io ( base, 0x6c ) "DAC slot mapping" { 82 _ 4; 83 cld 4 type(slot) "DAC 3 (center/LFE)"; 84 sd 4 type(slot) "DAC 2 (surround)"; 85 fd 4 type(slot) "DAC 1 (front/headphone)"; 86 }; 87 register adcslot io ( base, 0x6e ) "ADC slot mapping" { 88 mv 1 "Mapping valid"; 89 _ 7; 90 ima 4 type(slot) "Independent mic"; 91 lia 4 type(slot) "Line in"; 92 }; 93}; 94 95 96