1/* 2 * Copyright (c) 2007-2013 ETH Zurich. 3 * All rights reserved. 4 * 5 * This file is distributed under the terms in the attached LICENSE file. 6 * If you do not find this file, copies can be found by writing to: 7 * ETH Zurich D-INFK, Haldeneggsteig 4, CH-8092 Zurich. Attn: Systems Group. 8 */ 9 10/* 11 * ======================================================================= 12 * This file contains the definitions of the data structures used by the 13 * OHCI Host Controller. This data structures are hardware defined and 14 * have to be outlined in this way. Additional fields can be added at the 15 * end of the data structures 16 * ======================================================================= 17 */ 18 19#ifndef USB_OHCI_H_ 20#define USB_OHCI_H_ 21 22 23#include <usb/usb.h> 24#include <usb/usb_error.h> 25#include <usb/usb_descriptor.h> 26#include <usb_hub.h> 27 28/* 29 * ------------------------------------------------------------------------ 30 * OHCI Host Controller Communication Area 31 * ------------------------------------------------------------------------ 32 * A structure in shared main memory established by the Host 33 * Controller Driver (HCD). This structure is used for 34 * communication between the HCD and the Host Controller. 35 * The HCD maintains a pointer to this structure in the Host 36 * Controller. 37 * 38 * Alignment Constraints: must be 256 byte aligned 39 * 40 * Fields: 41 * - interrupt_table: pointers to the interrupt ed lists there are 32 of 42 * them at a granularity of 1ms each. 43 * - frame_number: the current USB frame number 44 * - pad_1: is set to 0 when the HC updates the frame number 45 * - done_head: pointer to the completed transfer descriptors 46 * - reserved: reserved for use by host controler 47 */ 48#define USB_OHCI_NO_IRQS 32 49#define USB_OHCI_HCCA_RESERVED 116 50#define USB_OHCI_HCCA_ALIGN 256 51#define USB_OHCI_HCCA_SIZE 256 52struct usb_ohci_hcca { 53 usb_paddr_t hcca_interrupt_table[USB_OHCI_NO_IRQS]; 54 volatile uint16_t hcca_frame_number; 55 volatile uint16_t hcca_pad_1; 56 usb_paddr_t hcca_done_head; 57 volatile uint8_t _reserved[USB_OHCI_HCCA_RESERVED]; 58} __aligned(USB_OHCI_HCCA_ALIGN); 59 60// typedef for the HCCA struct 61typedef struct usb_ohci_hcca usb_ohci_hcca_t; 62 63/* 64 * The LSb of hcca_done_head is set to 1 when there was an unmasked 65 * HcInterruptStatus set at the time when hcca_done_head was written 66 */ 67#define USB_OHCI_HCCA_UNMASKED_IRQ(hcca) (hcca->hcca_done_head & 0x1) 68 69 70 71/* 72 * ------------------------------------------------------------------------ 73 * OHCI Host Controller Endpoint Descriptor (Section 4.2) 74 * ------------------------------------------------------------------------ 75 * A memory structure which describes information necessary for 76 * the Host Controller to communicate (via Transfer 77 * Descriptors) with a device Endpoint. An Endpoint Descriptor 78 * includes a Transfer Descriptor pointer. 79 * 80 * Alignment Constraints: 16 byte aligned 81 * 82 * Fields: 83 * - ed_control: control flags of the endpoint 84 * - max_packet_size: maximum number of bytes supported (sent or receive) 85 * - td_format: format of the transfer descriptors of this EP 86 * - skip: flag indicating if the HC skips the EP 87 * - direction: data flow direction: IN | OUT | TD-dependent 88 * - endpoint_number: address of this EP within the USB device (function) 89 * - function_address: address of this USB device (function) on the USB 90 * - ed_tailP: phys pointer to a transfer descriptor of this EP 91 * - ed_headP: phys pointer to a transfer descriptor of this EP 92 * + flags: HALTED | CARRY 93 * - ed_nextED: physical pointer to the next EP descriptor 94 * 95 * Extra Fields: 96 * - next: virtual pointer to the next ED of the list 97 * - prev: virtual pointer to the previous ED of the list 98 * - obj_next: virtual pointer to the next ED 99 * - ed_self: physical address of this endpoint descriptor 100 */ 101#define USB_OHCI_ED_ALIGN 16 102#define USB_OHCI_ED_HW_SIZE 16 103 104struct usb_ohci_ed_ctrl { 105 volatile uint8_t _unused : 5; 106 volatile uint16_t max_packet_size : 11; 107 volatile uint8_t td_format : 1; 108 volatile uint8_t skip : 1; 109 volatile uint8_t speed : 1; 110 volatile uint8_t direction : 2; 111 volatile uint8_t endpoint_number : 4; 112 volatile uint8_t function_address : 7; 113 }; 114 115struct usb_ohci_ed { 116 struct usb_ohci_ed_ctrl ed_control; 117 usb_paddr_t ed_tailP; 118 usb_paddr_t ed_headP; 119 usb_paddr_t ed_nextED; 120 121 /* extra fields */ 122 struct usb_ohci_ed *next; 123 struct usb_ohci_ed *prev; 124 struct usb_ohci_ed *obj_next; 125 usb_paddr_t ed_self; 126}__aligned(USB_OHCI_ED_ALIGN); 127 128typedef struct usb_ohci_ed usb_ohci_ed_t; 129typedef struct usb_ohci_ed_ctrl usb_ohci_ed_ctrl_t; 130 131// Dataflow directions of the endpoint 132#define USB_OHCI_ED_DIRECTION_OUT 1 133#define USB_OHCI_ED_DIRECTION_IN 2 134#define USB_OHCI_ED_DIRECTION_FROM_TD 0 135#define USB_OHCI_ED_DIRECTION_FROM_TD_ 3 136 137// Possible formats of the transfer descriptors 138#define USB_OHCI_ED_FORMAT_GENERAL 0 139#define USB_OHCI_ED_FORMAT_ISOCHR 1 140 141// Endpoint Speeds 142#define USB_OHCI_ED_FULLSPEED 0 143#define USB_OHCI_ED_LOWSPEED 1 144 145// Endpoint halted or carry bits 146#define USB_OHCI_EP_HALTED(_ep) (((_ep)->ed_headP) & 0x01) 147#define USB_OHCI_EP_CARRY(_ep) (((_ep)->ed_headP) & 0x02) 148 149/* 150 * check if the endpoint has transfer descriptors. 151 * the TDs are 16 byte aligned, thus the last 4 bits are always zero, 152 * we have to mask here, because the headP contains two flags. 153 * if headP and tailP have the same value, then there is no TD 154 */ 155#define USB_OHCI_EP_HAS_TD(headP, tailP) (((headP ^ tailP) & (~0xF)) != 0) 156 157 158/* 159 * ------------------------------------------------------------------------ 160 * OHCI Host Controller Transfer Descriptor (Section 4.3) 161 * ------------------------------------------------------------------------ 162 * A memory structure which describes information necessary for 163 * the Host Controller to transfer a block of data to or from a 164 * device endpoint. 165 * 166 * Alignment Constraints: 16 byte aligned 167 * 168 * Fields: 169 * - td_control 170 * - condition_code: status of the TD's last atempted transaction 171 * - error_count: number of errors happened for this transaction 172 * - data_toggle: updated after each successfull transmission 173 * - delay_interrupt: delay / disable the completition interrupt 174 * - direction_pid: direction of dataflow for this transfer 175 * - rounding: flag indicating if the last packet must fit exactly 176 * - td_current_buffer: physical pointer to the buffer 177 * - td_nextTD: physical pointer to the next transfer descriptor 178 * - td_buffer_end: physical pointer to the last byte in the buffer 179 * 180 * Extra Fields: 181 * - buf: buffer space for small transfer (max. 64 bytes) 182 * - obj_next: virtual pointer to the next td 183 * - alt_next: alternative virtual next pointer 184 * - td_self: physical address of this endpoint 185 * - len: length of the data block of this transfer 186 */ 187#define USB_OHCI_TD_ALIGN 16 188 189struct usb_ohci_td_ctrl { 190 volatile uint8_t condition_code : 4; 191 volatile uint8_t error_count : 2; 192 volatile uint8_t data_toggle : 2; 193 volatile uint8_t delay_interrupt : 3; 194 volatile uint8_t direction_pid : 2; 195 volatile uint8_t rounding : 1; 196 volatile uint32_t _unused : 18; 197}; 198 199struct usb_ohci_td { 200 struct usb_ohci_td_ctrl td_control; 201 usb_paddr_t td_current_buffer; 202 usb_paddr_t td_nextTD; 203 usb_paddr_t td_buffer_end; 204 205 /* extra fields */ 206 uint8_t buf[64]; 207 struct usb_ohci_td *obj_next; 208 struct usb_ohci_td *alt_next; 209 usb_paddr_t td_self; 210 uint32_t len; 211} __aligned(USB_OHCI_TD_ALIGN); 212 213typedef struct usb_ohci_td_ctrl usb_ohci_td_ctrl_t; 214typedef struct usb_ohci_td usb_ohci_td_t; 215 216// Transfer data flow direction 217#define USB_OHCI_PID_SETUP 0 218#define USB_OHCI_PID_IN 1 219#define USB_OHCI_PID_OUT 2 220#define USB_OHCI_PID_RESERVERD 3 221 222// disable the interrupts for this transfer 223#define USB_OHCI_TD_DISABLE_IRQ 7 224 225// TD integrated buffer offset 226#define USB_OHCI_TD_BUFFER_OFFSET 16 227#define USB_OHCI_TD_BUFFER_SIZE 64 228 229/* 230 * ------------------------------------------------------------------------ 231 * OHCI Host Controller Transfer Descriptor for ISOCHRONOUS transfers 232 * ------------------------------------------------------------------------ 233 * 234 * Alignment Constraints: must be 32 byte aligned 235 * 236 * Fields: 237 * - condition_code: status of the TD's last atempted transaction 238 * - frame_count: number of data packets in this TD (0=1, 7=8) 239 * - delay_interrupt: delay / disable the completition interrupt 240 * - starting_frame: frame number of the first data packet to be sent 241 * - buf_page_0: physical page number of the first byte of the data buffer 242 * - nextTD: pointer to the next isochr. transfer descriptor 243 * - buffer_end: physical address of the last byte in the buffer 244 * - offset_psw: offset or completition code of an isochr. data packet 245 * - condition_code: the condition code of the isochronus packet 246 * - size: length of the isochronus packet 247 * 248 * Extra Fields: 249 * - obj_next: virtual pointer to the next itd 250 * - itd_self: physical addres of this transfer descriptor 251 * - frames: number of frames 252 */ 253#define USB_OHCI_ISOCHRONUS_TD_OFFSETS 8 254#define USB_OHCI_ISOCHRONUS_TD_ALIGN 32 255 256union usb_ohci_td_offset { 257 volatile uint16_t offset; 258 259 struct { 260 volatile uint8_t condition_code : 4; 261 volatile uint8_t zero : 1; 262 volatile uint16_t size : 11; 263 } psw; 264}; 265 266struct usb_ohci_itd { 267 volatile uint8_t condiction_code : 4; 268 volatile uint8_t frame_count : 4; 269 volatile uint8_t delay_interrupt : 3; 270 volatile uint8_t unused : 5; 271 volatile uint16_t starting_frame; 272 usb_paddr_t buf_page_0; 273 usb_paddr_t nextTD; 274 usb_paddr_t buffer_end; 275 union usb_ohci_td_offset offset_psw[USB_OHCI_ISOCHRONUS_TD_OFFSETS]; 276 277 /* extra fields */ 278 struct ohci_itd *obj_next; 279 usb_paddr_t itd_self; 280 uint8_t frames; 281}__aligned(USB_OHCI_ISOCHRONUS_TD_ALIGN); 282 283typedef struct usb_ohci_itd usb_ohci_itd_t; 284 285// size and alignment constraints 286#define USB_OHCI_OFFSET(id) (id + (1*(id % 2)) -(1*!(id % 2))) 287 288// ohci status codes 289#define USB_OHCI_STATUS_OK 0x00 290#define USB_OHCI_STATUS_CRC_ERROR 0x01 291#define USB_OHCI_STATUS_BIT_STUFFING 0x02 292#define USB_OHCI_STATUS_DATA_TOGGLE_MISMATCH 0x03 293#define USB_OHCI_STATUS_STALL 0x04 294#define USB_OHCI_STATUS_DEVICE_NOT_RESPONDING 0x05 295#define USB_OHCI_STATUS_PID_CHECK_FAILURE 0x06 296#define USB_OHCI_STATUS_UNEXPECTED_PID 0x07 297#define USB_OHCI_STATUS_DATA_OVERRUN 0x08 298#define USB_OHCI_STATUS_DATA_UNDERRUN 0x09 299#define USB_OHCI_STATUS_BUFFER_OVERRUN 0x0C 300#define USB_OHCI_STATUS_BUFFER_UNDERRUN 0x0D 301 302// Special delays we have to wait when changing certain registers 303#define USB_OHCI_DELAY_POWER_ENABLE 5 304#define USB_OHCI_DELAY_READ_DESCR 5 305 306/* 307 * there are 32 possible interrupt list. each of which consits of 308 * interrupt EDs and an ISOCHR at the end. 309 */ 310#define USB_OHCI_NO_EP_DESCRIPTORS (2*USB_OHCI_NO_IRQS) 311 312#define USB_OHCI_PAGE_SIZE 0x1000 313#define USB_OHCI_PAGE(x) ((x) &~ 0xfff) 314#define USB_OHCI_PAGE_OFFSET(x) ((x) & 0xfff) 315#define USB_OHCI_PAGE_MASK(x) ((x) & 0xfff) 316 317// the OHCI controller supports maximum 127 devices 318#define USB_OHCI_MAX_DEVICES 127 319 320/* ENDPOINT TYPE CODES */ 321#define USB_OHCI_EP_TYPE_ISOC 0 322#define USB_OHCI_EP_TYPE_INTR 1 323#define USB_OHCI_EP_TYPE_CTRL 2 324#define USB_OHCI_EP_TYPE_BULK 3 325 326 327#define USB_OHCI_INTERRUPT_ENDPOINT 1 328 329/* 330 * ------------------------------------------------------------------------ 331 * OHCI Host Controller Configuration Descriptor 332 * ------------------------------------------------------------------------ 333 * When there is a GetConfiguration request executed then the reply contains 334 * the configuration descriptor, interface descriptor and endpoint 335 * descriptor. 336 * 337 * Fields: 338 * - status: configuration descriptor 339 * - port_status: interface descriptor 340 * - ep_desc: endpoint descriptor 341 */ 342 union usb_ohci_hub_desc { 343 struct usb_status status; 344 struct usb_hub_port_status port_status; 345 struct usb_hub_descriptor hub_descriptor; 346 uint8_t temp[128]; 347}; 348 349 350/* 351 * ------------------------------------------------------------------------ 352 * OHCI Host Controller Configuration Descriptor 353 * ------------------------------------------------------------------------ 354 * When there is a GetConfiguration request executed then the reply contains 355 * the configuration descriptor, interface descriptor and endpoint 356 * descriptor. 357 * 358 * Fields: 359 * - confg_desc: configuration descriptor 360 * - iface_desc: interface descriptor 361 * - ep_desc: endpoint descriptor 362 */ 363struct usb_ohci_config_desc { 364 struct usb_config_descriptor config_desc; 365 struct usb_interface_descriptor iface_desc; 366 struct usb_endpoint_descriptor ep_desc; 367} __packed; 368 369/* 370 * ------------------------------------------------------------------------ 371 * OHCI Host Controller Configuration Descriptor 372 * ------------------------------------------------------------------------ 373 * When there is a GetConfiguration request executed then the reply contains 374 * the configuration descriptor, interface descriptor and endpoint 375 * descriptor. 376 * 377 * TODO: REVISE 378 * 379 * Fields: 380 * - confg_desc: configuration descriptor 381 * - iface_desc: interface descriptor 382 * - ep_desc: endpoint descriptor 383 */ 384typedef struct usb_ohci_hc { 385 struct ohci_t *ohci_base; 386 union usb_ohci_hub_desc root_hub_desc; 387 uint8_t root_hub_num_ports; 388 uint8_t root_hub_intr_data[32]; 389 uint8_t root_hub_address; 390 uint8_t root_hub_config; 391 uint32_t enabled_intrs; /* enabled interrupts */ 392 393 struct usb_device *devices[USB_OHCI_MAX_DEVICES]; 394 395 struct usb_ohci_hcca *hcca; 396 struct usb_ohci_ed *qh_ctrl_last; 397 struct usb_ohci_ed *qh_ctrl_first; 398 struct usb_ohci_ed *qh_bulk_last; 399 struct usb_ohci_ed *qh_bulk_first; 400 struct usb_ohci_ed *qh_isoc_last; 401 struct usb_ohci_ed *qh_intr_last[USB_OHCI_NO_EP_DESCRIPTORS]; 402 403 struct usb_ohci_ed *qh_ed_free; 404 struct usb_ohci_td *qh_td_free; 405 struct usb_ohci_itd *qh_itd_free; 406 407 uint16_t intr_stats[USB_OHCI_NO_EP_DESCRIPTORS]; //keeps track of the interrupt transfes 408 409 struct usb_host_controller *controller; 410 411 uint16_t id_vendor; 412 413 char vendor[16]; 414 415} usb_ohci_hc_t; 416 417/* 418 * ------------------------------------------------------------------------ 419 * OHCI Host Controller Function Prototypes 420 * ------------------------------------------------------------------------ 421 */ 422usb_error_t usb_ohci_init(usb_ohci_hc_t *sc, uintptr_t base); 423void usb_ohci_detach(usb_ohci_hc_t *sc); 424void usb_ohci_interrupt(usb_ohci_hc_t *sc); 425 426#endif /* _USB_OHCI_H_ */ 427