1/*-
2 * Copyright 2009 Solarflare Communications Inc.  All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26#ifndef _SYS_SIENA_IMPL_H
27#define	_SYS_SIENA_IMPL_H
28
29#include "efx.h"
30#include "efx_regs.h"
31#include "efx_mcdi.h"
32#include "siena_flash.h"
33
34#ifdef	__cplusplus
35extern "C" {
36#endif
37
38#if EFSYS_OPT_PHY_PROPS
39
40/* START MKCONFIG GENERATED SienaPhyHeaderPropsBlock a8db1f8eb5106efd */
41typedef enum siena_phy_prop_e {
42	SIENA_PHY_NPROPS
43} siena_phy_prop_t;
44
45/* END MKCONFIG GENERATED SienaPhyHeaderPropsBlock */
46
47#endif  /* EFSYS_OPT_PHY_PROPS */
48
49#define	SIENA_NVRAM_CHUNK 0x80
50
51extern	__checkReturn	int
52siena_nic_probe(
53	__in		efx_nic_t *enp);
54
55#if EFSYS_OPT_PCIE_TUNE
56
57extern	__checkReturn	int
58siena_nic_pcie_extended_sync(
59	__in		efx_nic_t *enp);
60
61#endif
62
63extern	__checkReturn	int
64siena_nic_reset(
65	__in		efx_nic_t *enp);
66
67extern	__checkReturn	int
68siena_nic_init(
69	__in		efx_nic_t *enp);
70
71#if EFSYS_OPT_DIAG
72
73extern	__checkReturn	int
74siena_nic_register_test(
75	__in		efx_nic_t *enp);
76
77#endif	/* EFSYS_OPT_DIAG */
78
79extern			void
80siena_nic_fini(
81	__in		efx_nic_t *enp);
82
83extern			void
84siena_nic_unprobe(
85	__in		efx_nic_t *enp);
86
87#define	SIENA_SRAM_ROWS	0x12000
88
89extern			void
90siena_sram_init(
91	__in		efx_nic_t *enp);
92
93#if EFSYS_OPT_DIAG
94
95extern	__checkReturn	int
96siena_sram_test(
97	__in		efx_nic_t *enp,
98	__in		efx_sram_pattern_fn_t func);
99
100#endif	/* EFSYS_OPT_DIAG */
101
102
103#if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
104
105extern	__checkReturn		int
106siena_nvram_partn_size(
107	__in			efx_nic_t *enp,
108	__in			unsigned int partn,
109	__out			size_t *sizep);
110
111extern	__checkReturn		int
112siena_nvram_partn_lock(
113	__in			efx_nic_t *enp,
114	__in			unsigned int partn);
115
116extern	__checkReturn		int
117siena_nvram_partn_read(
118	__in			efx_nic_t *enp,
119	__in			unsigned int partn,
120	__in			unsigned int offset,
121	__out_bcount(size)	caddr_t data,
122	__in			size_t size);
123
124extern	__checkReturn		int
125siena_nvram_partn_erase(
126	__in			efx_nic_t *enp,
127	__in			unsigned int partn,
128	__in			unsigned int offset,
129	__in			size_t size);
130
131extern	__checkReturn		int
132siena_nvram_partn_write(
133	__in			efx_nic_t *enp,
134	__in			unsigned int partn,
135	__in			unsigned int offset,
136	__out_bcount(size)	caddr_t data,
137	__in			size_t size);
138
139extern				void
140siena_nvram_partn_unlock(
141	__in			efx_nic_t *enp,
142	__in			unsigned int partn);
143
144extern	__checkReturn		int
145siena_nvram_get_dynamic_cfg(
146	__in			efx_nic_t *enp,
147	__in			unsigned int index,
148	__in			boolean_t vpd,
149	__out			siena_mc_dynamic_config_hdr_t **dcfgp,
150	__out			size_t *sizep);
151
152#endif	/* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
153
154#if EFSYS_OPT_NVRAM
155
156#if EFSYS_OPT_DIAG
157
158extern	__checkReturn		int
159siena_nvram_test(
160	__in			efx_nic_t *enp);
161
162#endif	/* EFSYS_OPT_DIAG */
163
164extern	__checkReturn		int
165siena_nvram_size(
166	__in			efx_nic_t *enp,
167	__in			efx_nvram_type_t type,
168	__out			size_t *sizep);
169
170extern	__checkReturn		int
171siena_nvram_get_version(
172	__in			efx_nic_t *enp,
173	__in			efx_nvram_type_t type,
174	__out			uint32_t *subtypep,
175	__out_ecount(4)		uint16_t version[4]);
176
177extern	__checkReturn		int
178siena_nvram_rw_start(
179	__in			efx_nic_t *enp,
180	__in			efx_nvram_type_t type,
181	__out			size_t *pref_chunkp);
182
183extern	__checkReturn		int
184siena_nvram_read_chunk(
185	__in			efx_nic_t *enp,
186	__in			efx_nvram_type_t type,
187	__in			unsigned int offset,
188	__out_bcount(size)	caddr_t data,
189	__in			size_t size);
190
191extern	 __checkReturn		int
192siena_nvram_erase(
193	__in			efx_nic_t *enp,
194	__in			efx_nvram_type_t type);
195
196extern	__checkReturn		int
197siena_nvram_write_chunk(
198	__in			efx_nic_t *enp,
199	__in			efx_nvram_type_t type,
200	__in			unsigned int offset,
201	__in_bcount(size)	caddr_t data,
202	__in			size_t size);
203
204extern				void
205siena_nvram_rw_finish(
206	__in			efx_nic_t *enp,
207	__in			efx_nvram_type_t type);
208
209extern	__checkReturn		int
210siena_nvram_set_version(
211	__in			efx_nic_t *enp,
212	__in			efx_nvram_type_t type,
213	__out			uint16_t version[4]);
214
215#endif	/* EFSYS_OPT_NVRAM */
216
217#if EFSYS_OPT_VPD
218
219extern	__checkReturn		int
220siena_vpd_init(
221	__in			efx_nic_t *enp);
222
223extern	__checkReturn		int
224siena_vpd_size(
225	__in			efx_nic_t *enp,
226	__out			size_t *sizep);
227
228extern	__checkReturn		int
229siena_vpd_read(
230	__in			efx_nic_t *enp,
231	__out_bcount(size)	caddr_t data,
232	__in			size_t size);
233
234extern	__checkReturn		int
235siena_vpd_verify(
236	__in			efx_nic_t *enp,
237	__in_bcount(size)	caddr_t data,
238	__in			size_t size);
239
240extern	__checkReturn		int
241siena_vpd_reinit(
242	__in			efx_nic_t *enp,
243	__in_bcount(size)	caddr_t data,
244	__in			size_t size);
245
246extern	__checkReturn		int
247siena_vpd_get(
248	__in			efx_nic_t *enp,
249	__in_bcount(size)	caddr_t data,
250	__in			size_t size,
251	__inout			efx_vpd_value_t *evvp);
252
253extern	__checkReturn		int
254siena_vpd_set(
255	__in			efx_nic_t *enp,
256	__in_bcount(size)	caddr_t data,
257	__in			size_t size,
258	__in			efx_vpd_value_t *evvp);
259
260extern	__checkReturn		int
261siena_vpd_next(
262	__in			efx_nic_t *enp,
263	__in_bcount(size)	caddr_t data,
264	__in			size_t size,
265	__out			efx_vpd_value_t *evvp,
266	__inout			unsigned int *contp);
267
268extern __checkReturn		int
269siena_vpd_write(
270	__in			efx_nic_t *enp,
271	__in_bcount(size)	caddr_t data,
272	__in			size_t size);
273
274extern				void
275siena_vpd_fini(
276	__in			efx_nic_t *enp);
277
278#endif	/* EFSYS_OPT_VPD */
279
280typedef struct siena_link_state_s {
281	uint32_t		sls_adv_cap_mask;
282	uint32_t		sls_lp_cap_mask;
283	unsigned int 		sls_fcntl;
284	efx_link_mode_t		sls_link_mode;
285#if EFSYS_OPT_LOOPBACK
286	efx_loopback_type_t	sls_loopback;
287#endif
288	boolean_t		sls_mac_up;
289} siena_link_state_t;
290
291extern			void
292siena_phy_link_ev(
293	__in		efx_nic_t *enp,
294	__in		efx_qword_t *eqp,
295	__out		efx_link_mode_t *link_modep);
296
297extern	__checkReturn	int
298siena_phy_get_link(
299	__in		efx_nic_t *enp,
300	__out		siena_link_state_t *slsp);
301
302extern	__checkReturn	int
303siena_phy_power(
304	__in		efx_nic_t *enp,
305	__in		boolean_t on);
306
307extern	__checkReturn	int
308siena_phy_reconfigure(
309	__in		efx_nic_t *enp);
310
311extern	__checkReturn	int
312siena_phy_verify(
313	__in		efx_nic_t *enp);
314
315extern	__checkReturn	int
316siena_phy_oui_get(
317	__in		efx_nic_t *enp,
318	__out		uint32_t *ouip);
319
320#if EFSYS_OPT_PHY_STATS
321
322extern					void
323siena_phy_decode_stats(
324	__in				efx_nic_t *enp,
325	__in				uint32_t vmask,
326	__in_opt			efsys_mem_t *esmp,
327	__out_opt			uint64_t *smaskp,
328	__out_ecount_opt(EFX_PHY_NSTATS)	uint32_t *stat);
329
330extern	__checkReturn			int
331siena_phy_stats_update(
332	__in				efx_nic_t *enp,
333	__in				efsys_mem_t *esmp,
334	__out_ecount(EFX_PHY_NSTATS)	uint32_t *stat);
335
336#endif	/* EFSYS_OPT_PHY_STATS */
337
338#if EFSYS_OPT_PHY_PROPS
339
340#if EFSYS_OPT_NAMES
341
342extern		const char __cs *
343siena_phy_prop_name(
344	__in	efx_nic_t *enp,
345	__in	unsigned int id);
346
347#endif	/* EFSYS_OPT_NAMES */
348
349extern	__checkReturn	int
350siena_phy_prop_get(
351	__in		efx_nic_t *enp,
352	__in		unsigned int id,
353	__in		uint32_t flags,
354	__out		uint32_t *valp);
355
356extern	__checkReturn	int
357siena_phy_prop_set(
358	__in		efx_nic_t *enp,
359	__in		unsigned int id,
360	__in		uint32_t val);
361
362#endif	/* EFSYS_OPT_PHY_PROPS */
363
364#if EFSYS_OPT_PHY_BIST
365
366extern	__checkReturn		int
367siena_phy_bist_start(
368	__in			efx_nic_t *enp,
369	__in			efx_phy_bist_type_t type);
370
371extern	__checkReturn		int
372siena_phy_bist_poll(
373	__in			efx_nic_t *enp,
374	__in			efx_phy_bist_type_t type,
375	__out			efx_phy_bist_result_t *resultp,
376	__out_opt __drv_when(count > 0, __notnull)
377	uint32_t 	*value_maskp,
378	__out_ecount_opt(count)	__drv_when(count > 0, __notnull)
379	unsigned long	*valuesp,
380	__in			size_t count);
381
382extern				void
383siena_phy_bist_stop(
384	__in			efx_nic_t *enp,
385	__in			efx_phy_bist_type_t type);
386
387#endif	/* EFSYS_OPT_PHY_BIST */
388
389extern	__checkReturn	int
390siena_mac_poll(
391	__in		efx_nic_t *enp,
392	__out		efx_link_mode_t *link_modep);
393
394extern	__checkReturn	int
395siena_mac_up(
396	__in		efx_nic_t *enp,
397	__out		boolean_t *mac_upp);
398
399extern	__checkReturn	int
400siena_mac_reconfigure(
401	__in	efx_nic_t *enp);
402
403#if EFSYS_OPT_LOOPBACK
404
405extern	__checkReturn	int
406siena_mac_loopback_set(
407	__in		efx_nic_t *enp,
408	__in		efx_link_mode_t link_mode,
409	__in		efx_loopback_type_t loopback_type);
410
411#endif	/* EFSYS_OPT_LOOPBACK */
412
413#if EFSYS_OPT_MAC_STATS
414
415extern	__checkReturn			int
416siena_mac_stats_clear(
417	__in				efx_nic_t *enp);
418
419extern	__checkReturn			int
420siena_mac_stats_upload(
421	__in				efx_nic_t *enp,
422	__in				efsys_mem_t *esmp);
423
424extern	__checkReturn			int
425siena_mac_stats_periodic(
426	__in				efx_nic_t *enp,
427	__in				efsys_mem_t *esmp,
428	__in				uint16_t period_ms,
429	__in				boolean_t events);
430
431extern	__checkReturn			int
432siena_mac_stats_update(
433	__in				efx_nic_t *enp,
434	__in				efsys_mem_t *esmp,
435	__out_ecount(EFX_MAC_NSTATS)	efsys_stat_t *stat,
436	__out_opt			uint32_t *generationp);
437
438#endif	/* EFSYS_OPT_MAC_STATS */
439
440extern	__checkReturn	int
441siena_mon_reset(
442	__in		efx_nic_t *enp);
443
444extern	__checkReturn	int
445siena_mon_reconfigure(
446	__in		efx_nic_t *enp);
447
448#if EFSYS_OPT_MON_STATS
449
450extern					void
451siena_mon_decode_stats(
452	__in				efx_nic_t *enp,
453	__in				uint32_t dmask,
454	__in_opt			efsys_mem_t *esmp,
455	__out_opt				uint32_t *vmaskp,
456	__out_ecount_opt(EFX_MON_NSTATS)	efx_mon_stat_value_t *value);
457
458extern	__checkReturn			int
459siena_mon_ev(
460	__in				efx_nic_t *enp,
461	__in				efx_qword_t *eqp,
462	__out				efx_mon_stat_t *idp,
463	__out				efx_mon_stat_value_t *valuep);
464
465extern	__checkReturn			int
466siena_mon_stats_update(
467	__in				efx_nic_t *enp,
468	__in				efsys_mem_t *esmp,
469	__out_ecount(EFX_MON_NSTATS)	efx_mon_stat_value_t *values);
470
471#endif	/* EFSYS_OPT_MON_STATS */
472
473#ifdef	__cplusplus
474}
475#endif
476
477#endif	/* _SYS_SIENA_IMPL_H */
478