1/* 2 * Copyright (C) 2010 The Android Open Source Project 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in 12 * the documentation and/or other materials provided with the 13 * distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#include <aboot/io.h> 30 31static unsigned gpio_base[6] = { 32 0x4A310000, 33 0x48055000, 34 0x48057000, 35 0x48059000, 36 0x4805B000, 37 0x4805D000 38}; 39 40#define GPIO_CTRL 0x130 41#define GPIO_OE 0x134 42#define GPIO_DATAIN 0x138 43#define GPIO_DATAOUT 0x13C 44#define GPIO_CLEAR 0x190 45#define GPIO_SET 0x194 46 47void gpio_write(unsigned gpio, unsigned set) 48{ 49 unsigned base = gpio_base[ gpio / 32 ]; 50 unsigned bit = 1 << (gpio % 32); 51 52 /* ensure that this GPIO bank is enabled */ 53 writel(0, base + GPIO_CTRL); 54 55 /* enable output for this gpio */ 56 writel(readl(base + GPIO_OE) & (~bit), base + GPIO_OE); 57 58 /* set or clear the bit */ 59 writel(bit, base + (set ? GPIO_SET : GPIO_CLEAR)); 60} 61 62unsigned gpio_read(unsigned gpio) 63{ 64 unsigned base = gpio_base[ gpio / 32 ]; 65 unsigned bit = 1 << (gpio % 32); 66 67 /* ensure that this GPIO bank is enabled */ 68 /* writel(0, base + GPIO_CTRL); */ 69 70 if(readl(base + GPIO_OE) & bit) { 71 return (readl(base + GPIO_DATAIN) & bit) != 0; 72 } else { 73 return (readl(base + GPIO_DATAOUT) & bit) != 0; 74 } 75} 76