1/*
2 * Copyright (c) 2014 ETH Zurich.
3 * All rights reserved.
4 *
5 * This file is distributed under the terms in the attached LICENSE file.
6 * If you do not find this file, copies can be found by writing to:
7 * ETH Zurich D-INFK, Universitaetsstrasse 6, CH-8092 Zurich. Attn: Systems Group.
8 */
9
10#ifndef DMA_DEVICE_INTERNAL_H
11#define DMA_DEVICE_INTERNAL_H
12
13#include <dma/dma_device.h>
14
15/*
16 *
17 */
18typedef errval_t (*register_memory_fn_t)(struct dma_device *chan,
19                                         struct capref frame);
20typedef errval_t (*deregister_memory_fn_t)(struct dma_device *chan,
21                                           struct capref frame);
22typedef errval_t (*dev_poll_fn_t)(struct dma_device *dev);
23
24/**
25 *
26 */
27struct dma_device_fn
28{
29    register_memory_fn_t register_memory;
30    deregister_memory_fn_t deregister_memory;
31    dev_poll_fn_t poll;
32};
33
34/**
35 * Represents the generic part of a DMA device
36 */
37struct dma_device
38{
39    dma_dev_id_t id;                ///< device id
40    dma_dev_st_t state;             ///< device state
41    dma_dev_type_t type;            ///< stores the device type
42    struct dma_mem mmio;            ///< MMIO register mappings
43
44    struct {
45        struct dma_channel **c;     ///< DMA channel pointers
46        uint8_t count;              ///< Number of channels of this device
47        uint8_t next;               ///< Next channel to allocate for requests
48    } channels;                     ///< Channel information
49
50    dma_irq_t irq_type;
51
52    struct dma_device_fn f;
53};
54
55#endif /* DMA_DEVICE_INTERNAL_H */
56