1/*===-- udivsi3.S - 32-bit unsigned integer divide ------------------------===// 2 * 3 * The LLVM Compiler Infrastructure 4 * 5 * This file is dual licensed under the MIT and the University of Illinois Open 6 * Source Licenses. See LICENSE.TXT for details. 7 * 8 *===----------------------------------------------------------------------===// 9 * 10 * This file implements the __udivsi3 (32-bit unsigned integer divide) 11 * function for the ARM 32-bit architecture. 12 * 13 *===----------------------------------------------------------------------===*/ 14 15#include "../assembly.h" 16 17 .syntax unified 18 .text 19 20 .p2align 2 21DEFINE_AEABI_FUNCTION_ALIAS(__aeabi_uidiv, __udivsi3) 22 23@ unsigned int __udivsi3(unsigned int divident, unsigned int divisor) 24@ Calculate and return the quotient of the (unsigned) division. 25 26DEFINE_COMPILERRT_FUNCTION(__udivsi3) 27#if __ARM_ARCH_EXT_IDIV__ 28 tst r1, r1 29 beq LOCAL_LABEL(divby0) 30 udiv r0, r0, r1 31 bx lr 32#else 33 cmp r1, #1 34 bcc LOCAL_LABEL(divby0) 35 IT(eq) 36 JMPc(lr, eq) 37 cmp r0, r1 38 ITT(cc) 39 movcc r0, #0 40 JMPc(lr, cc) 41 /* 42 * Implement division using binary long division algorithm. 43 * 44 * r0 is the numerator, r1 the denominator. 45 * 46 * The code before JMP computes the correct shift I, so that 47 * r0 and (r1 << I) have the highest bit set in the same position. 48 * At the time of JMP, ip := .Ldiv0block - 12 * I. 49 * This depends on the fixed instruction size of block. 50 * For ARM mode, this is 12 Bytes, for THUMB mode 14 Bytes. 51 * 52 * block(shift) implements the test-and-update-quotient core. 53 * It assumes (r0 << shift) can be computed without overflow and 54 * that (r0 << shift) < 2 * r1. The quotient is stored in r3. 55 */ 56 57# ifdef __ARM_FEATURE_CLZ 58 clz ip, r0 59 clz r3, r1 60 /* r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. */ 61 sub r3, r3, ip 62 adr ip, LOCAL_LABEL(div0block) 63 sub ip, ip, r3, lsl #2 64 sub ip, ip, r3, lsl #3 65 mov r3, #0 66 bx ip 67# else 68 mov r2, r0 69 adr ip, LOCAL_LABEL(div0block) 70 71 lsr r3, r2, #16 72 cmp r3, r1 73 movhs r2, r3 74 subhs ip, ip, #(16 * 12) 75 76 lsr r3, r2, #8 77 cmp r3, r1 78 movhs r2, r3 79 subhs ip, ip, #(8 * 12) 80 81 lsr r3, r2, #4 82 cmp r3, r1 83 movhs r2, r3 84 subhs ip, #(4 * 12) 85 86 lsr r3, r2, #2 87 cmp r3, r1 88 movhs r2, r3 89 subhs ip, ip, #(2 * 12) 90 91 /* Last block, no need to update r2 or r3. */ 92 cmp r1, r2, lsr #1 93 subls ip, ip, #(1 * 12) 94 95 mov r3, #0 96 97 JMP(ip) 98# endif 99 100#define IMM # 101 102#define block(shift) \ 103 cmp r0, r1, lsl IMM shift; \ 104 ITT(hs); \ 105 WIDE(addhs) r3, r3, IMM (1 << shift); \ 106 WIDE(subhs) r0, r0, r1, lsl IMM shift 107 108 block(31) 109 block(30) 110 block(29) 111 block(28) 112 block(27) 113 block(26) 114 block(25) 115 block(24) 116 block(23) 117 block(22) 118 block(21) 119 block(20) 120 block(19) 121 block(18) 122 block(17) 123 block(16) 124 block(15) 125 block(14) 126 block(13) 127 block(12) 128 block(11) 129 block(10) 130 block(9) 131 block(8) 132 block(7) 133 block(6) 134 block(5) 135 block(4) 136 block(3) 137 block(2) 138 block(1) 139LOCAL_LABEL(div0block): 140 block(0) 141 142 mov r0, r3 143 JMP(lr) 144#endif /* __ARM_ARCH_EXT_IDIV__ */ 145 146LOCAL_LABEL(divby0): 147 mov r0, #0 148#ifdef __ARM_EABI__ 149 b __aeabi_idiv0 150#else 151 JMP(lr) 152#endif 153 154END_COMPILERRT_FUNCTION(__udivsi3) 155