1/* 2 * Copyright (c) 2016, ETH Zurich. 3 * All rights reserved. 4 * 5 * This file is distributed under the terms in the attached LICENSE file. 6 * If you do not find this file, copies can be found by writing to: 7 * ETH Zurich D-INFK, Universitaetstr 6, CH-8092 Zurich. Attn: Systems Group. 8 */ 9 10#ifndef __GIC_V3_H__ 11#define __GIC_V3_H__ 12 13#include <stdbool.h> 14#include <stdint.h> 15#include <stddef.h> 16#include <barrelfish_kpi/types.h> 17 18/* 19 * generic interrupt controller functionality 20 */ 21void gic_init(void); // 22void gic_distributor_init(void); 23void gic_cpu_interface_init(void); 24void gic_cpu_interface_enable(void); // 25void gic_cpu_interface_disable(void); 26void gic_enable_interrupt(uint32_t int_id, uint8_t cpu_targets, uint16_t prio, 27 bool edge_triggered, bool one_to_n); 28void gic_disable_all_irqs(void); 29uint32_t gic_get_active_irq(void); // 30void gic_ack_irq(uint32_t irq); // 31void gic_raise_softirq(uint8_t cpumask, uint8_t irq); // 32size_t gic_cpu_count(void); 33 34 35#endif // __GIC_V3_H__ 36