1/*
2 * Copyright (c) 2013, ETH Zurich.
3 * All rights reserved.
4 *
5 * This file is distributed under the terms in the attached LICENSE file.
6 * If you do not find this file, copies can be found by writing to:
7 * ETH Zurich D-INFK, Haldeneggsteig 4, CH-8092 Zurich. Attn: Systems Group.
8 */
9
10#ifndef __GIC_H__
11#define __GIC_H__
12
13#include <stdbool.h>
14#include <stdint.h>
15#include <stddef.h>
16
17// Helpers for enabling interrupts
18#define GIC_IRQ_PRIO_LOWEST       (0xF)
19#define GIC_IRQ_CPU_TRG_ALL       (0x3) // For two cores on the PandaBoard
20#define GIC_IRQ_CPU_TRG_BSP       (0x1)
21#define GIC_IRQ_EDGE_TRIGGERED    (0x1)
22#define GIC_IRQ_LEVEL_SENSITIVE   (0x0)
23#define GIC_IRQ_1_TO_N            (0x1)
24#define GIC_IRQ_N_TO_N            (0x0)
25
26/*
27 * generic interrupt controller functionality
28 */
29void     gic_init(void);
30void     gic_distributor_init(void);
31void     gic_cpu_interface_init(void);
32void     gic_cpu_interface_enable(void);
33void     gic_cpu_interface_disable(void);
34void     gic_enable_interrupt(uint32_t int_id, uint8_t cpu_targets, uint16_t prio,
35                              bool edge_triggered, bool one_to_n);
36void     gic_disable_all_irqs(void);
37uint32_t gic_get_active_irq(void);
38void     gic_ack_irq(uint32_t irq);
39void     gic_raise_softirq(uint8_t cpumask, uint8_t irq);
40size_t   gic_cpu_count(void);
41
42#endif // __GIC_H__
43