1/** 2 * \file 3 * \brief Arch specific definition of the registers, can be included by anyone. 4 * Definitions shared by kernel and user 5 */ 6 7/* 8 * Copyright (c) 2010, 2011, ETH Zurich. 9 * All rights reserved. 10 * 11 * This file is distributed under the terms in the attached LICENSE file. 12 * If you do not find this file, copies can be found by writing to: 13 * ETH Zurich D-INFK, Haldeneggsteig 4, CH-8092 Zurich. Attn: Systems Group. 14 */ 15 16#ifndef TARGET_X86_32_BARRELFISH_KPI_REGISTERS_H 17#define TARGET_X86_32_BARRELFISH_KPI_REGISTERS_H 18 19#include <barrelfish_kpi/eflags_arch.h> // for USER_EFLAGS 20#include <barrelfish_kpi/types.h> // for lvaddr_t 21 22/** \brief Number of registers to be saved for this architecture 23 * 24 * This is the same as ARCH_NUMREGS, but it is used by assembler stubs, so needs 25 * to be defined here as a constant. 26 */ 27#define X86_32_NUM_REGS 12 28 29#ifndef __ASSEMBLER__ 30 31struct registers_x86_32 { 32 uint32_t eax, ebx, ecx, edx, esi, edi, ebp, esp, eip, eflags, cs, ss; 33 uint16_t fs, gs; ///< Only meaningful segment selectors in 32-bit mode 34}; 35 36struct registers_fpu_x86_32 { 37 // Should be aligned at 16-byte boundary, according to Intel 38 // description of FXRSTOR instruction. 39 // 16 bytes of padding 40 uint8_t registers[512 + 16] __attribute__ ((aligned (16))); 41}; 42 43static inline void 44registers_x86_32_set_entry(struct registers_x86_32 *regs, lvaddr_t entry) 45{ 46 regs->eip = entry; 47 regs->cs = USER_CS; 48 regs->ss = USER_SS; 49 regs->eflags = USER_EFLAGS; 50} 51 52static inline void 53registers_x86_32_set_param(struct registers_x86_32 *regs, uint32_t param) 54{ 55 regs->eax = param; 56} 57 58static inline void 59registers_x86_32_get_param(struct registers_x86_32 *regs, uint32_t *param) 60{ 61 *param = regs->eax; 62} 63 64static inline uint32_t 65registers_x86_32_get_ip(struct registers_x86_32 *regs) 66{ 67 return regs->eip; 68} 69 70static inline uint32_t 71registers_x86_32_get_sp(struct registers_x86_32 *regs) 72{ 73 return regs->esp; 74} 75 76#endif // __ASSEMBLER__ 77#endif // TARGET_X86_32_BARRELFISH_KPI_REGISTERS_H 78