1/*-
2 * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28
29#ifndef	_FENV_H_
30#define	_FENV_H_
31
32#include <sys/cdefs.h>
33#include <sys/_types.h>
34
35/*
36 * To preserve binary compatibility with FreeBSD 5.3, we pack the
37 * mxcsr into some reserved fields, rather than changing sizeof(fenv_t).
38 */
39typedef struct {
40	__uint16_t	__control;
41	__uint16_t      __mxcsr_hi;
42	__uint16_t	__status;
43	__uint16_t      __mxcsr_lo;
44	__uint32_t	__tag;
45	char		__other[16];
46} fenv_t;
47
48#define	__get_mxcsr(env)	(((env).__mxcsr_hi << 16) |	\
49				 ((env).__mxcsr_lo))
50#define	__set_mxcsr(env, x)	do {				\
51	(env).__mxcsr_hi = (__uint32_t)(x) >> 16;		\
52	(env).__mxcsr_lo = (__uint16_t)(x);			\
53} while (0)
54
55typedef	__uint16_t	fexcept_t;
56
57/* Exception flags */
58#define	FE_INVALID	0x01
59#define	FE_DENORMAL	0x02
60#define	FE_DIVBYZERO	0x04
61#define	FE_OVERFLOW	0x08
62#define	FE_UNDERFLOW	0x10
63#define	FE_INEXACT	0x20
64#define	FE_ALL_EXCEPT	(FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \
65			 FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
66
67/* Rounding modes */
68#define	FE_TONEAREST	0x0000
69#define	FE_DOWNWARD	0x0400
70#define	FE_UPWARD	0x0800
71#define	FE_TOWARDZERO	0x0c00
72#define	_ROUND_MASK	(FE_TONEAREST | FE_DOWNWARD | \
73			 FE_UPWARD | FE_TOWARDZERO)
74
75/*
76 * As compared to the x87 control word, the SSE unit's control word
77 * has the rounding control bits offset by 3 and the exception mask
78 * bits offset by 7.
79 */
80#define	_SSE_ROUND_SHIFT	3
81#define	_SSE_EMASK_SHIFT	7
82
83__BEGIN_DECLS
84
85/* After testing for SSE support once, we cache the result in __has_sse. */
86enum __sse_support { __SSE_YES, __SSE_NO, __SSE_UNK };
87extern enum __sse_support __has_sse;
88int __test_sse(void);
89#ifdef __SSE__
90#define	__HAS_SSE()	1
91#else
92#define	__HAS_SSE()	(__has_sse == __SSE_YES ||			\
93			 (__has_sse == __SSE_UNK && __test_sse()))
94#endif
95
96/* Default floating-point environment */
97extern const fenv_t	__fe_dfl_env;
98#define	FE_DFL_ENV	(&__fe_dfl_env)
99
100#define	__fldcw(__cw)		__asm __volatile("fldcw %0" : : "m" (__cw))
101#define	__fldenv(__env)		__asm __volatile("fldenv %0" : : "m" (__env))
102#define	__fldenvx(__env)	__asm __volatile("fldenv %0" : : "m" (__env)  \
103				: "st", "st(1)", "st(2)", "st(3)", "st(4)",   \
104				"st(5)", "st(6)", "st(7)")
105#define	__fnclex()		__asm __volatile("fnclex")
106#define	__fnstenv(__env)	__asm __volatile("fnstenv %0" : "=m" (*(__env)))
107#define	__fnstcw(__cw)		__asm __volatile("fnstcw %0" : "=m" (*(__cw)))
108#define	__fnstsw(__sw)		__asm __volatile("fnstsw %0" : "=am" (*(__sw)))
109#define	__fwait()		__asm __volatile("fwait")
110#define	__ldmxcsr(__csr)	__asm __volatile("ldmxcsr %0" : : "m" (__csr))
111#define	__stmxcsr(__csr)	__asm __volatile("stmxcsr %0" : "=m" (*(__csr)))
112
113static __inline int
114feclearexcept(int __excepts)
115{
116	fenv_t __env;
117	int __mxcsr;
118
119	if (__excepts == FE_ALL_EXCEPT) {
120		__fnclex();
121	} else {
122		__fnstenv(&__env);
123		__env.__status &= ~__excepts;
124		__fldenv(__env);
125	}
126	if (__HAS_SSE()) {
127		__stmxcsr(&__mxcsr);
128		__mxcsr &= ~__excepts;
129		__ldmxcsr(__mxcsr);
130	}
131	return (0);
132}
133
134static __inline int
135fegetexceptflag(fexcept_t *__flagp, int __excepts)
136{
137	int __mxcsr;
138        __uint16_t __status;
139
140	__fnstsw(&__status);
141	if (__HAS_SSE())
142		__stmxcsr(&__mxcsr);
143	else
144		__mxcsr = 0;
145	*__flagp = (__mxcsr | __status) & __excepts;
146	return (0);
147}
148
149int fesetexceptflag(const fexcept_t *__flagp, int __excepts);
150int feraiseexcept(int __excepts);
151
152static __inline int
153fetestexcept(int __excepts)
154{
155	int __mxcsr;
156        __uint16_t __status;
157
158	__fnstsw(&__status);
159	if (__HAS_SSE())
160		__stmxcsr(&__mxcsr);
161	else
162		__mxcsr = 0;
163	return ((__status | __mxcsr) & __excepts);
164}
165
166static __inline int
167fegetround(void)
168{
169	int __control;
170
171	/*
172	 * We assume that the x87 and the SSE unit agree on the
173	 * rounding mode.  Reading the control word on the x87 turns
174	 * out to be about 5 times faster than reading it on the SSE
175	 * unit on an Opteron 244.
176	 */
177	__fnstcw(&__control);
178	return (__control & _ROUND_MASK);
179}
180
181static __inline int
182fesetround(int __round)
183{
184	int __mxcsr, __control;
185
186	if (__round & ~_ROUND_MASK)
187		return (-1);
188
189	__fnstcw(&__control);
190	__control &= ~_ROUND_MASK;
191	__control |= __round;
192	__fldcw(__control);
193
194	if (__HAS_SSE()) {
195		__stmxcsr(&__mxcsr);
196		__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
197		__mxcsr |= __round << _SSE_ROUND_SHIFT;
198		__ldmxcsr(__mxcsr);
199	}
200
201	return (0);
202}
203
204int fegetenv(fenv_t *__envp);
205int feholdexcept(fenv_t *__envp);
206
207static __inline int
208fesetenv(const fenv_t *__envp)
209{
210	fenv_t __env = *__envp;
211	int __mxcsr;
212
213	__mxcsr = __get_mxcsr(__env);
214	__set_mxcsr(__env, 0xffffffff);
215	/*
216	 * XXX Using fldenvx() instead of fldenv() tells the compiler that this
217	 * instruction clobbers the i387 register stack.  This happens because
218	 * we restore the tag word from the saved environment.  Normally, this
219	 * would happen anyway and we wouldn't care, because the ABI allows
220	 * function calls to clobber the i387 regs.  However, fesetenv() is
221	 * inlined, so we need to be more careful.
222	 */
223	__fldenvx(__env);
224	if (__HAS_SSE())
225		__ldmxcsr(__mxcsr);
226	return (0);
227}
228
229int feupdateenv(const fenv_t *__envp);
230
231#if __BSD_VISIBLE
232
233int feenableexcept(int __mask);
234int fedisableexcept(int __mask);
235
236static __inline int
237fegetexcept(void)
238{
239	int __control;
240
241	/*
242	 * We assume that the masks for the x87 and the SSE unit are
243	 * the same.
244	 */
245	__fnstcw(&__control);
246	return (~__control & FE_ALL_EXCEPT);
247}
248
249#endif /* __BSD_VISIBLE */
250
251__END_DECLS
252
253#endif	/* !_FENV_H_ */
254