1# Makefile template for Configure for the m32r simulator 2# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2003, 2004, 2007 3# Free Software Foundation, Inc. 4# Contributed by Cygnus Support. 5# 6# This file is part of GDB, the GNU debugger. 7# 8# This program is free software; you can redistribute it and/or modify 9# it under the terms of the GNU General Public License as published by 10# the Free Software Foundation; either version 3 of the License, or 11# (at your option) any later version. 12# 13# This program is distributed in the hope that it will be useful, 14# but WITHOUT ANY WARRANTY; without even the implied warranty of 15# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16# GNU General Public License for more details. 17# 18# You should have received a copy of the GNU General Public License 19# along with this program. If not, see <http://www.gnu.org/licenses/>. 20 21## COMMON_PRE_CONFIG_FRAG 22 23M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o 24M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o 25M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o 26TRAPS_OBJ = @traps_obj@ 27 28CONFIG_DEVICES = dv-sockser.o 29CONFIG_DEVICES = 30 31SIM_OBJS = \ 32 $(SIM_NEW_COMMON_OBJS) \ 33 sim-cpu.o \ 34 sim-hload.o \ 35 sim-hrw.o \ 36 sim-model.o \ 37 sim-reg.o \ 38 cgen-utils.o cgen-trace.o cgen-scache.o \ 39 cgen-run.o sim-reason.o sim-engine.o sim-stop.o \ 40 sim-if.o arch.o \ 41 $(M32R_OBJS) \ 42 $(M32RX_OBJS) \ 43 $(M32R2_OBJS) \ 44 $(TRAPS_OBJ) \ 45 devices.o \ 46 $(CONFIG_DEVICES) 47 48# Extra headers included by sim-main.h. 49SIM_EXTRA_DEPS = \ 50 $(CGEN_INCLUDE_DEPS) \ 51 arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h 52 53SIM_EXTRA_CFLAGS = @sim_extra_cflags@ 54 55SIM_RUN_OBJS = nrun.o 56SIM_EXTRA_CLEAN = m32r-clean 57 58# This selects the m32r newlib/libgloss syscall definitions. 59NL_TARGET = -DNL_TARGET_m32r 60 61## COMMON_POST_CONFIG_FRAG 62 63arch = m32r 64 65sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h 66 67arch.o: arch.c $(SIM_MAIN_DEPS) 68 69traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) 70traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS) 71devices.o: devices.c $(SIM_MAIN_DEPS) 72 73# M32R objs 74 75M32RBF_INCLUDE_DEPS = \ 76 $(CGEN_MAIN_CPU_DEPS) \ 77 cpu.h decode.h eng.h 78 79m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS) 80 81# FIXME: Use of `mono' is wip. 82mloop.c eng.h: stamp-mloop 83stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile 84 $(SHELL) $(srccom)/genmloop.sh \ 85 -mono -fast -pbb -switch sem-switch.c \ 86 -cpu m32rbf -infile $(srcdir)/mloop.in 87 $(SHELL) $(srcroot)/move-if-change eng.hin eng.h 88 $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c 89 touch stamp-mloop 90mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS) 91 92cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS) 93decode.o: decode.c $(M32RBF_INCLUDE_DEPS) 94sem.o: sem.c $(M32RBF_INCLUDE_DEPS) 95model.o: model.c $(M32RBF_INCLUDE_DEPS) 96 97# M32RX objs 98 99M32RXF_INCLUDE_DEPS = \ 100 $(CGEN_MAIN_CPU_DEPS) \ 101 cpux.h decodex.h engx.h 102 103m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS) 104 105# FIXME: Use of `mono' is wip. 106mloopx.c engx.h: stamp-xmloop 107stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile 108 $(SHELL) $(srccom)/genmloop.sh \ 109 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \ 110 -cpu m32rxf -infile $(srcdir)/mloopx.in \ 111 -outfile-suffix x 112 $(SHELL) $(srcroot)/move-if-change engx.hin engx.h 113 $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c 114 touch stamp-xmloop 115mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS) 116 117cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS) 118decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS) 119semx.o: semx.c $(M32RXF_INCLUDE_DEPS) 120modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS) 121 122# M32R2 objs 123 124M32R2F_INCLUDE_DEPS = \ 125 $(CGEN_MAIN_CPU_DEPS) \ 126 cpu2.h decode2.h eng2.h 127 128m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS) 129 130# FIXME: Use of `mono' is wip. 131mloop2.c eng2.h: stamp-2mloop 132stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile 133 $(SHELL) $(srccom)/genmloop.sh \ 134 -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \ 135 -cpu m32r2f -infile $(srcdir)/mloop2.in \ 136 -outfile-suffix 2 137 $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h 138 $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c 139 touch stamp-2mloop 140 141mloop2.o: mloop2.c sem2-switch.c $(M32R2F_INCLUDE_DEPS) 142cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS) 143decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS) 144sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS) 145model2.o: model2.c $(M32R2F_INCLUDE_DEPS) 146 147m32r-clean: 148 rm -f mloop.c eng.h stamp-mloop 149 rm -f mloopx.c engx.h stamp-xmloop 150 rm -f mloop2.c eng2.h stamp-2mloop 151 rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu 152 rm -f tmp-* 153 154# cgen support, enable with --enable-cgen-maint 155CGEN_MAINT = ; @true 156# The following line is commented in or out depending upon --enable-cgen-maint. 157@CGEN_MAINT@CGEN_MAINT = 158 159stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/m32r.cpu 160 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ 161 archfile=$(CGEN_CPU_DIR)/m32r.cpu \ 162 FLAGS="with-scache with-profile=fn" 163 touch stamp-arch 164arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch 165 166stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu 167 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ 168 cpu=m32rbf mach=m32r SUFFIX= \ 169 archfile=$(CGEN_CPU_DIR)/m32r.cpu \ 170 FLAGS="with-scache with-profile=fn" \ 171 EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" 172 touch stamp-cpu 173cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu 174 175stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu 176 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ 177 cpu=m32rxf mach=m32rx SUFFIX=x \ 178 archfile=$(CGEN_CPU_DIR)/m32r.cpu \ 179 FLAGS="with-scache with-profile=fn" \ 180 EXTRAFILES="$(CGEN_CPU_SEMSW)" 181 touch stamp-xcpu 182cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu 183 184stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu 185 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ 186 cpu=m32r2f mach=m32r2 SUFFIX=2 \ 187 archfile=$(CGEN_CPU_DIR)/m32r.cpu \ 188 FLAGS="with-scache with-profile=fn" \ 189 EXTRAFILES="$(CGEN_CPU_SEMSW)" 190 touch stamp-2cpu 191cpu2.h sem2-switch.c model2.c decode2.c decode2.h: $(CGEN_MAINT) stamp-2cpu 192