1/*
2 * MLP DSP functions x86-optimized
3 * Copyright (c) 2009 Ramiro Polla
4 *
5 * This file is part of FFmpeg.
6 *
7 * FFmpeg is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * FFmpeg is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with FFmpeg; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include "libavutil/x86_cpu.h"
23#include "libavcodec/dsputil.h"
24#include "libavcodec/mlp.h"
25
26#if HAVE_7REGS && HAVE_TEN_OPERANDS
27
28extern void ff_mlp_firorder_8;
29extern void ff_mlp_firorder_7;
30extern void ff_mlp_firorder_6;
31extern void ff_mlp_firorder_5;
32extern void ff_mlp_firorder_4;
33extern void ff_mlp_firorder_3;
34extern void ff_mlp_firorder_2;
35extern void ff_mlp_firorder_1;
36extern void ff_mlp_firorder_0;
37
38extern void ff_mlp_iirorder_4;
39extern void ff_mlp_iirorder_3;
40extern void ff_mlp_iirorder_2;
41extern void ff_mlp_iirorder_1;
42extern void ff_mlp_iirorder_0;
43
44static const void *firtable[9] = { &ff_mlp_firorder_0, &ff_mlp_firorder_1,
45                                   &ff_mlp_firorder_2, &ff_mlp_firorder_3,
46                                   &ff_mlp_firorder_4, &ff_mlp_firorder_5,
47                                   &ff_mlp_firorder_6, &ff_mlp_firorder_7,
48                                   &ff_mlp_firorder_8 };
49static const void *iirtable[5] = { &ff_mlp_iirorder_0, &ff_mlp_iirorder_1,
50                                   &ff_mlp_iirorder_2, &ff_mlp_iirorder_3,
51                                   &ff_mlp_iirorder_4 };
52
53#if ARCH_X86_64
54
55#define MLPMUL(label, offset, offs, offc)   \
56    LABEL_MANGLE(label)":             \n\t" \
57    "movslq "offset"+"offs"(%0), %%rax\n\t" \
58    "movslq "offset"+"offc"(%1), %%rdx\n\t" \
59    "imul                 %%rdx, %%rax\n\t" \
60    "add                  %%rax, %%rsi\n\t"
61
62#define FIRMULREG(label, offset, firc)\
63    LABEL_MANGLE(label)":       \n\t" \
64    "movslq "#offset"(%0), %%rax\n\t" \
65    "imul        %"#firc", %%rax\n\t" \
66    "add            %%rax, %%rsi\n\t"
67
68#define CLEAR_ACCUM                   \
69    "xor            %%rsi, %%rsi\n\t"
70
71#define SHIFT_ACCUM                   \
72    "shr     %%cl,         %%rsi\n\t"
73
74#define ACCUM    "%%rdx"
75#define RESULT   "%%rsi"
76#define RESULT32 "%%esi"
77
78#else /* if ARCH_X86_32 */
79
80#define MLPMUL(label, offset, offs, offc)  \
81    LABEL_MANGLE(label)":            \n\t" \
82    "mov   "offset"+"offs"(%0), %%eax\n\t" \
83    "imull "offset"+"offc"(%1)       \n\t" \
84    "add                %%eax , %%esi\n\t" \
85    "adc                %%edx , %%ecx\n\t"
86
87#define FIRMULREG(label, offset, firc)  \
88    MLPMUL(label, #offset, "0", "0")
89
90#define CLEAR_ACCUM                  \
91    "xor           %%esi, %%esi\n\t" \
92    "xor           %%ecx, %%ecx\n\t"
93
94#define SHIFT_ACCUM                  \
95    "mov           %%ecx, %%edx\n\t" \
96    "mov           %%esi, %%eax\n\t" \
97    "movzbl        %7   , %%ecx\n\t" \
98    "shrd    %%cl, %%edx, %%eax\n\t" \
99
100#define ACCUM    "%%edx"
101#define RESULT   "%%eax"
102#define RESULT32 "%%eax"
103
104#endif /* !ARCH_X86_64 */
105
106#define BINC  AV_STRINGIFY(4* MAX_CHANNELS)
107#define IOFFS AV_STRINGIFY(4*(MAX_FIR_ORDER + MAX_BLOCKSIZE))
108#define IOFFC AV_STRINGIFY(4* MAX_FIR_ORDER)
109
110#define FIRMUL(label, offset) MLPMUL(label, #offset,   "0",   "0")
111#define IIRMUL(label, offset) MLPMUL(label, #offset, IOFFS, IOFFC)
112
113static void mlp_filter_channel_x86(int32_t *state, const int32_t *coeff,
114                                   int firorder, int iirorder,
115                                   unsigned int filter_shift, int32_t mask,
116                                   int blocksize, int32_t *sample_buffer)
117{
118    const void *firjump = firtable[firorder];
119    const void *iirjump = iirtable[iirorder];
120
121    blocksize = -blocksize;
122
123    __asm__ volatile(
124        "1:                           \n\t"
125        CLEAR_ACCUM
126        "jmp  *%5                     \n\t"
127        FIRMUL   (ff_mlp_firorder_8, 0x1c   )
128        FIRMUL   (ff_mlp_firorder_7, 0x18   )
129        FIRMUL   (ff_mlp_firorder_6, 0x14   )
130        FIRMUL   (ff_mlp_firorder_5, 0x10   )
131        FIRMUL   (ff_mlp_firorder_4, 0x0c   )
132        FIRMULREG(ff_mlp_firorder_3, 0x08,10)
133        FIRMULREG(ff_mlp_firorder_2, 0x04, 9)
134        FIRMULREG(ff_mlp_firorder_1, 0x00, 8)
135        LABEL_MANGLE(ff_mlp_firorder_0)":\n\t"
136        "jmp  *%6                     \n\t"
137        IIRMUL   (ff_mlp_iirorder_4, 0x0c   )
138        IIRMUL   (ff_mlp_iirorder_3, 0x08   )
139        IIRMUL   (ff_mlp_iirorder_2, 0x04   )
140        IIRMUL   (ff_mlp_iirorder_1, 0x00   )
141        LABEL_MANGLE(ff_mlp_iirorder_0)":\n\t"
142        SHIFT_ACCUM
143        "mov  "RESULT"  ,"ACCUM"      \n\t"
144        "add  (%2)      ,"RESULT"     \n\t"
145        "and   %4       ,"RESULT"     \n\t"
146        "sub   $4       ,  %0         \n\t"
147        "mov  "RESULT32", (%0)        \n\t"
148        "mov  "RESULT32", (%2)        \n\t"
149        "add $"BINC"    ,  %2         \n\t"
150        "sub  "ACCUM"   ,"RESULT"     \n\t"
151        "mov  "RESULT32","IOFFS"(%0)  \n\t"
152        "incl              %3         \n\t"
153        "js 1b                        \n\t"
154        : /* 0*/"+r"(state),
155          /* 1*/"+r"(coeff),
156          /* 2*/"+r"(sample_buffer),
157#if ARCH_X86_64
158          /* 3*/"+r"(blocksize)
159        : /* 4*/"r"((x86_reg)mask), /* 5*/"r"(firjump),
160          /* 6*/"r"(iirjump)      , /* 7*/"c"(filter_shift)
161        , /* 8*/"r"((int64_t)coeff[0])
162        , /* 9*/"r"((int64_t)coeff[1])
163        , /*10*/"r"((int64_t)coeff[2])
164        : "rax", "rdx", "rsi"
165#else /* ARCH_X86_32 */
166          /* 3*/"+m"(blocksize)
167        : /* 4*/"m"(         mask), /* 5*/"m"(firjump),
168          /* 6*/"m"(iirjump)      , /* 7*/"m"(filter_shift)
169        : "eax", "edx", "esi", "ecx"
170#endif /* !ARCH_X86_64 */
171    );
172}
173
174#endif /* HAVE_7REGS && HAVE_TEN_OPERANDS */
175
176void ff_mlp_init_x86(DSPContext* c, AVCodecContext *avctx)
177{
178#if HAVE_7REGS && HAVE_TEN_OPERANDS
179    c->mlp_filter_channel = mlp_filter_channel_x86;
180#endif
181}
182