1/* Generic register read/write.
2   Copyright (C) 1998, 2007 Free Software Foundation, Inc.
3   Contributed by Cygnus Solutions.
4
5This file is part of GDB, the GNU debugger.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 3 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
19
20#include "sim-main.h"
21#include "sim-assert.h"
22
23/* Generic implementation of sim_fetch_register for simulators using
24   CPU_REG_FETCH.
25   The contents of BUF are in target byte order.  */
26/* ??? Obviously the interface needs to be extended to handle multiple
27   cpus.  */
28
29int
30sim_fetch_register (SIM_DESC sd, int rn, unsigned char *buf, int length)
31{
32  SIM_CPU *cpu = STATE_CPU (sd, 0);
33
34  SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
35  return (* CPU_REG_FETCH (cpu)) (cpu, rn, buf, length);
36}
37
38/* Generic implementation of sim_store_register for simulators using
39   CPU_REG_STORE.
40   The contents of BUF are in target byte order.  */
41/* ??? Obviously the interface needs to be extended to handle multiple
42   cpus.  */
43
44int
45sim_store_register (SIM_DESC sd, int rn, unsigned char *buf, int length)
46{
47  SIM_CPU *cpu = STATE_CPU (sd, 0);
48
49  SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
50  return (* CPU_REG_STORE (cpu)) (cpu, rn, buf, length);
51}
52