1/* 2 * Copyright (c) 2009 Mans Rullgard <mans@mansr.com> 3 * 4 * This file is part of FFmpeg. 5 * 6 * FFmpeg is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * FFmpeg is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with FFmpeg; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 19 */ 20 21#ifndef AVUTIL_AVR32_INTREADWRITE_H 22#define AVUTIL_AVR32_INTREADWRITE_H 23 24#include <stdint.h> 25#include "config.h" 26#include "libavutil/bswap.h" 27 28/* 29 * AVR32 does not support unaligned memory accesses, except for the AP 30 * series which suppports unaligned 32-bit loads and stores. 16-bit 31 * and 64-bit accesses must be aligned to 16 and 32 bits, respectively. 32 * This means we cannot use the byte-swapping load/store instructions 33 * here. 34 * 35 * For 16-bit, 24-bit, and (on UC series) 32-bit loads, we instead use 36 * the LDINS.B instruction, which gcc fails to utilise with the 37 * generic code. GCC also fails to use plain LD.W and ST.W even for 38 * AP processors, so we override the generic code. The 64-bit 39 * versions are improved by using our optimised 32-bit functions. 40 */ 41 42#define AV_RL16 AV_RL16 43static av_always_inline uint16_t AV_RL16(const void *p) 44{ 45 uint16_t v; 46 __asm__ ("ld.ub %0, %1 \n\t" 47 "ldins.b %0:l, %2 \n\t" 48 : "=&r"(v) 49 : "m"(*(const uint8_t*)p), "RKs12"(*((const uint8_t*)p+1))); 50 return v; 51} 52 53#define AV_RB16 AV_RB16 54static av_always_inline uint16_t AV_RB16(const void *p) 55{ 56 uint16_t v; 57 __asm__ ("ld.ub %0, %2 \n\t" 58 "ldins.b %0:l, %1 \n\t" 59 : "=&r"(v) 60 : "RKs12"(*(const uint8_t*)p), "m"(*((const uint8_t*)p+1))); 61 return v; 62} 63 64#define AV_RB24 AV_RB24 65static av_always_inline uint32_t AV_RB24(const void *p) 66{ 67 uint32_t v; 68 __asm__ ("ld.ub %0, %3 \n\t" 69 "ldins.b %0:l, %2 \n\t" 70 "ldins.b %0:u, %1 \n\t" 71 : "=&r"(v) 72 : "RKs12"(* (const uint8_t*)p), 73 "RKs12"(*((const uint8_t*)p+1)), 74 "m" (*((const uint8_t*)p+2))); 75 return v; 76} 77 78#define AV_RL24 AV_RL24 79static av_always_inline uint32_t AV_RL24(const void *p) 80{ 81 uint32_t v; 82 __asm__ ("ld.ub %0, %1 \n\t" 83 "ldins.b %0:l, %2 \n\t" 84 "ldins.b %0:u, %3 \n\t" 85 : "=&r"(v) 86 : "m" (* (const uint8_t*)p), 87 "RKs12"(*((const uint8_t*)p+1)), 88 "RKs12"(*((const uint8_t*)p+2))); 89 return v; 90} 91 92#if ARCH_AVR32_AP 93 94#define AV_RB32 AV_RB32 95static av_always_inline uint32_t AV_RB32(const void *p) 96{ 97 uint32_t v; 98 __asm__ ("ld.w %0, %1" : "=r"(v) : "m"(*(const uint32_t*)p)); 99 return v; 100} 101 102#define AV_WB32 AV_WB32 103static av_always_inline void AV_WB32(void *p, uint32_t v) 104{ 105 __asm__ ("st.w %0, %1" : "=m"(*(uint32_t*)p) : "r"(v)); 106} 107 108/* These two would be defined by generic code, but we need them sooner. */ 109#define AV_RL32(p) bswap_32(AV_RB32(p)) 110#define AV_WL32(p, v) AV_WB32(p, bswap_32(v)) 111 112#define AV_WB64 AV_WB64 113static av_always_inline void AV_WB64(void *p, uint64_t v) 114{ 115 union { uint64_t v; uint32_t hl[2]; } vv = { v }; 116 AV_WB32(p, vv.hl[0]); 117 AV_WB32((uint32_t*)p+1, vv.hl[1]); 118} 119 120#define AV_WL64 AV_WL64 121static av_always_inline void AV_WL64(void *p, uint64_t v) 122{ 123 union { uint64_t v; uint32_t hl[2]; } vv = { v }; 124 AV_WL32(p, vv.hl[1]); 125 AV_WL32((uint32_t*)p+1, vv.hl[0]); 126} 127 128#else /* ARCH_AVR32_AP */ 129 130#define AV_RB32 AV_RB32 131static av_always_inline uint32_t AV_RB32(const void *p) 132{ 133 uint32_t v; 134 __asm__ ("ld.ub %0, %4 \n\t" 135 "ldins.b %0:l, %3 \n\t" 136 "ldins.b %0:u, %2 \n\t" 137 "ldins.b %0:t, %1 \n\t" 138 : "=&r"(v) 139 : "RKs12"(* (const uint8_t*)p), 140 "RKs12"(*((const uint8_t*)p+1)), 141 "RKs12"(*((const uint8_t*)p+2)), 142 "m" (*((const uint8_t*)p+3))); 143 return v; 144} 145 146#define AV_RL32 AV_RL32 147static av_always_inline uint32_t AV_RL32(const void *p) 148{ 149 uint32_t v; 150 __asm__ ("ld.ub %0, %1 \n\t" 151 "ldins.b %0:l, %2 \n\t" 152 "ldins.b %0:u, %3 \n\t" 153 "ldins.b %0:t, %4 \n\t" 154 : "=&r"(v) 155 : "m" (* (const uint8_t*)p), 156 "RKs12"(*((const uint8_t*)p+1)), 157 "RKs12"(*((const uint8_t*)p+2)), 158 "RKs12"(*((const uint8_t*)p+3))); 159 return v; 160} 161 162#endif /* ARCH_AVR32_AP */ 163 164#define AV_RB64 AV_RB64 165static av_always_inline uint64_t AV_RB64(const void *p) 166{ 167 union { uint64_t v; uint32_t hl[2]; } v; 168 v.hl[0] = AV_RB32(p); 169 v.hl[1] = AV_RB32((const uint32_t*)p+1); 170 return v.v; 171} 172 173#define AV_RL64 AV_RL64 174static av_always_inline uint64_t AV_RL64(const void *p) 175{ 176 union { uint64_t v; uint32_t hl[2]; } v; 177 v.hl[1] = AV_RL32(p); 178 v.hl[0] = AV_RL32((const uint32_t*)p+1); 179 return v.v; 180} 181 182#endif /* AVUTIL_AVR32_INTREADWRITE_H */ 183