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47
48<h3 class="section">4.15 <code>ld</code> and Xtensa Processors</h3>
49
50<p><a name="index-Xtensa-processors-688"></a>The default <samp><span class="command">ld</span></samp> behavior for Xtensa processors is to interpret
51<code>SECTIONS</code> commands so that lists of explicitly named sections in a
52specification with a wildcard file will be interleaved when necessary to
53keep literal pools within the range of PC-relative load offsets.  For
54example, with the command:
55
56<pre class="smallexample">     SECTIONS
57     {
58       .text : {
59         *(.literal .text)
60       }
61     }
62</pre>
63   <p class="noindent"><samp><span class="command">ld</span></samp> may interleave some of the <code>.literal</code>
64and <code>.text</code> sections from different object files to ensure that the
65literal pools are within the range of PC-relative load offsets.  A valid
66interleaving might place the <code>.literal</code> sections from an initial
67group of files followed by the <code>.text</code> sections of that group of
68files.  Then, the <code>.literal</code> sections from the rest of the files
69and the <code>.text</code> sections from the rest of the files would follow.
70
71   <p><a name="index-g_t_0040option_007b_002d_002drelax_007d-on-Xtensa-689"></a><a name="index-relaxing-on-Xtensa-690"></a>Relaxation is enabled by default for the Xtensa version of <samp><span class="command">ld</span></samp> and
72provides two important link-time optimizations.  The first optimization
73is to combine identical literal values to reduce code size.  A redundant
74literal will be removed and all the <code>L32R</code> instructions that use it
75will be changed to reference an identical literal, as long as the
76location of the replacement literal is within the offset range of all
77the <code>L32R</code> instructions.  The second optimization is to remove
78unnecessary overhead from assembler-generated &ldquo;longcall&rdquo; sequences of
79<code>L32R</code>/<code>CALLX</code><var>n</var> when the target functions are within
80range of direct <code>CALL</code><var>n</var> instructions.
81
82   <p>For each of these cases where an indirect call sequence can be optimized
83to a direct call, the linker will change the <code>CALLX</code><var>n</var>
84instruction to a <code>CALL</code><var>n</var> instruction, remove the <code>L32R</code>
85instruction, and remove the literal referenced by the <code>L32R</code>
86instruction if it is not used for anything else.  Removing the
87<code>L32R</code> instruction always reduces code size but can potentially
88hurt performance by changing the alignment of subsequent branch targets. 
89By default, the linker will always preserve alignments, either by
90switching some instructions between 24-bit encodings and the equivalent
91density instructions or by inserting a no-op in place of the <code>L32R</code>
92instruction that was removed.  If code size is more important than
93performance, the <samp><span class="option">--size-opt</span></samp> option can be used to prevent the
94linker from widening density instructions or inserting no-ops, except in
95a few cases where no-ops are required for correctness.
96
97   <p>The following Xtensa-specific command-line options can be used to
98control the linker:
99
100   <p><a name="index-Xtensa-options-691"></a>
101     <dl>
102<dt><samp><span class="option">--size-opt</span></samp><dd>When optimizing indirect calls to direct calls, optimize for code size
103more than performance.  With this option, the linker will not insert
104no-ops or widen density instructions to preserve branch target
105alignment.  There may still be some cases where no-ops are required to
106preserve the correctness of the code. 
107</dl>
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