1<html lang="en"> 2<head> 3<title>SPU Options - Using the GNU Compiler Collection (GCC)</title> 4<meta http-equiv="Content-Type" content="text/html"> 5<meta name="description" content="Using the GNU Compiler Collection (GCC)"> 6<meta name="generator" content="makeinfo 4.13"> 7<link title="Top" rel="start" href="index.html#Top"> 8<link rel="up" href="Submodel-Options.html#Submodel-Options" title="Submodel Options"> 9<link rel="prev" href="SPARC-Options.html#SPARC-Options" title="SPARC Options"> 10<link rel="next" href="System-V-Options.html#System-V-Options" title="System V Options"> 11<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage"> 12<!-- 13Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 141998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 152010 Free Software Foundation, Inc. 16 17Permission is granted to copy, distribute and/or modify this document 18under the terms of the GNU Free Documentation License, Version 1.3 or 19any later version published by the Free Software Foundation; with the 20Invariant Sections being ``Funding Free Software'', the Front-Cover 21Texts being (a) (see below), and with the Back-Cover Texts being (b) 22(see below). A copy of the license is included in the section entitled 23``GNU Free Documentation License''. 24 25(a) The FSF's Front-Cover Text is: 26 27 A GNU Manual 28 29(b) The FSF's Back-Cover Text is: 30 31 You have freedom to copy and modify this GNU Manual, like GNU 32 software. Copies published by the Free Software Foundation raise 33 funds for GNU development.--> 34<meta http-equiv="Content-Style-Type" content="text/css"> 35<style type="text/css"><!-- 36 pre.display { font-family:inherit } 37 pre.format { font-family:inherit } 38 pre.smalldisplay { font-family:inherit; font-size:smaller } 39 pre.smallformat { font-family:inherit; font-size:smaller } 40 pre.smallexample { font-size:smaller } 41 pre.smalllisp { font-size:smaller } 42 span.sc { font-variant:small-caps } 43 span.roman { font-family:serif; font-weight:normal; } 44 span.sansserif { font-family:sans-serif; font-weight:normal; } 45--></style> 46<link rel="stylesheet" type="text/css" href="../cs.css"> 47</head> 48<body> 49<div class="node"> 50<a name="SPU-Options"></a> 51<p> 52Next: <a rel="next" accesskey="n" href="System-V-Options.html#System-V-Options">System V Options</a>, 53Previous: <a rel="previous" accesskey="p" href="SPARC-Options.html#SPARC-Options">SPARC Options</a>, 54Up: <a rel="up" accesskey="u" href="Submodel-Options.html#Submodel-Options">Submodel Options</a> 55<hr> 56</div> 57 58<h4 class="subsection">3.17.40 SPU Options</h4> 59 60<p><a name="index-SPU-options-2088"></a> 61These ‘<samp><span class="samp">-m</span></samp>’ options are supported on the SPU: 62 63 <dl> 64<dt><code>-mwarn-reloc</code><dt><code>-merror-reloc</code><dd><a name="index-mwarn_002dreloc-2089"></a><a name="index-merror_002dreloc-2090"></a> 65The loader for SPU does not handle dynamic relocations. By default, GCC 66will give an error when it generates code that requires a dynamic 67relocation. <samp><span class="option">-mno-error-reloc</span></samp> disables the error, 68<samp><span class="option">-mwarn-reloc</span></samp> will generate a warning instead. 69 70 <br><dt><code>-msafe-dma</code><dt><code>-munsafe-dma</code><dd><a name="index-msafe_002ddma-2091"></a><a name="index-munsafe_002ddma-2092"></a> 71Instructions which initiate or test completion of DMA must not be 72reordered with respect to loads and stores of the memory which is being 73accessed. Users typically address this problem using the volatile 74keyword, but that can lead to inefficient code in places where the 75memory is known to not change. Rather than mark the memory as volatile 76we treat the DMA instructions as potentially effecting all memory. With 77<samp><span class="option">-munsafe-dma</span></samp> users must use the volatile keyword to protect 78memory accesses. 79 80 <br><dt><code>-mbranch-hints</code><dd><a name="index-mbranch_002dhints-2093"></a> 81By default, GCC will generate a branch hint instruction to avoid 82pipeline stalls for always taken or probably taken branches. A hint 83will not be generated closer than 8 instructions away from its branch. 84There is little reason to disable them, except for debugging purposes, 85or to make an object a little bit smaller. 86 87 <br><dt><code>-msmall-mem</code><dt><code>-mlarge-mem</code><dd><a name="index-msmall_002dmem-2094"></a><a name="index-mlarge_002dmem-2095"></a> 88By default, GCC generates code assuming that addresses are never larger 89than 18 bits. With <samp><span class="option">-mlarge-mem</span></samp> code is generated that assumes 90a full 32 bit address. 91 92 <br><dt><code>-mstdmain</code><dd><a name="index-mstdmain-2096"></a> 93By default, GCC links against startup code that assumes the SPU-style 94main function interface (which has an unconventional parameter list). 95With <samp><span class="option">-mstdmain</span></samp>, GCC will link your program against startup 96code that assumes a C99-style interface to <code>main</code>, including a 97local copy of <code>argv</code> strings. 98 99 <br><dt><code>-mfixed-range=</code><var>register-range</var><dd><a name="index-mfixed_002drange-2097"></a>Generate code treating the given register range as fixed registers. 100A fixed register is one that the register allocator can not use. This is 101useful when compiling kernel code. A register range is specified as 102two registers separated by a dash. Multiple register ranges can be 103specified separated by a comma. 104 105 <br><dt><code>-mea32</code><dt><code>-mea64</code><dd><a name="index-mea32-2098"></a><a name="index-mea64-2099"></a>Compile code assuming that pointers to the PPU address space accessed 106via the <code>__ea</code> named address space qualifier are either 32 or 64 107bits wide. The default is 32 bits. As this is an ABI changing option, 108all object code in an executable must be compiled with the same setting. 109 110 <br><dt><code>-maddress-space-conversion</code><dt><code>-mno-address-space-conversion</code><dd><a name="index-maddress_002dspace_002dconversion-2100"></a><a name="index-mno_002daddress_002dspace_002dconversion-2101"></a>Allow/disallow treating the <code>__ea</code> address space as superset 111of the generic address space. This enables explicit type casts 112between <code>__ea</code> and generic pointer as well as implicit 113conversions of generic pointers to <code>__ea</code> pointers. The 114default is to allow address space pointer conversions. 115 116 <br><dt><code>-mcache-size=</code><var>cache-size</var><dd><a name="index-mcache_002dsize-2102"></a>This option controls the version of libgcc that the compiler links to an 117executable and selects a software-managed cache for accessing variables 118in the <code>__ea</code> address space with a particular cache size. Possible 119options for <var>cache-size</var> are ‘<samp><span class="samp">8</span></samp>’, ‘<samp><span class="samp">16</span></samp>’, ‘<samp><span class="samp">32</span></samp>’, ‘<samp><span class="samp">64</span></samp>’ 120and ‘<samp><span class="samp">128</span></samp>’. The default cache size is 64KB. 121 122 <br><dt><code>-matomic-updates</code><dt><code>-mno-atomic-updates</code><dd><a name="index-matomic_002dupdates-2103"></a><a name="index-mno_002datomic_002dupdates-2104"></a>This option controls the version of libgcc that the compiler links to an 123executable and selects whether atomic updates to the software-managed 124cache of PPU-side variables are used. If you use atomic updates, changes 125to a PPU variable from SPU code using the <code>__ea</code> named address space 126qualifier will not interfere with changes to other PPU variables residing 127in the same cache line from PPU code. If you do not use atomic updates, 128such interference may occur; however, writing back cache lines will be 129more efficient. The default behavior is to use atomic updates. 130 131 <br><dt><code>-mdual-nops</code><dt><code>-mdual-nops=</code><var>n</var><dd><a name="index-mdual_002dnops-2105"></a>By default, GCC will insert nops to increase dual issue when it expects 132it to increase performance. <var>n</var> can be a value from 0 to 10. A 133smaller <var>n</var> will insert fewer nops. 10 is the default, 0 is the 134same as <samp><span class="option">-mno-dual-nops</span></samp>. Disabled with <samp><span class="option">-Os</span></samp>. 135 136 <br><dt><code>-mhint-max-nops=</code><var>n</var><dd><a name="index-mhint_002dmax_002dnops-2106"></a>Maximum number of nops to insert for a branch hint. A branch hint must 137be at least 8 instructions away from the branch it is effecting. GCC 138will insert up to <var>n</var> nops to enforce this, otherwise it will not 139generate the branch hint. 140 141 <br><dt><code>-mhint-max-distance=</code><var>n</var><dd><a name="index-mhint_002dmax_002ddistance-2107"></a>The encoding of the branch hint instruction limits the hint to be within 142256 instructions of the branch it is effecting. By default, GCC makes 143sure it is within 125. 144 145 <br><dt><code>-msafe-hints</code><dd><a name="index-msafe_002dhints-2108"></a>Work around a hardware bug which causes the SPU to stall indefinitely. 146By default, GCC will insert the <code>hbrp</code> instruction to make sure 147this stall won't happen. 148 149 </dl> 150 151 </body></html> 152 153