1<html lang="en"> 2<head> 3<title>Blackfin Options - Using the GNU Compiler Collection (GCC)</title> 4<meta http-equiv="Content-Type" content="text/html"> 5<meta name="description" content="Using the GNU Compiler Collection (GCC)"> 6<meta name="generator" content="makeinfo 4.13"> 7<link title="Top" rel="start" href="index.html#Top"> 8<link rel="up" href="Submodel-Options.html#Submodel-Options" title="Submodel Options"> 9<link rel="prev" href="AVR-Options.html#AVR-Options" title="AVR Options"> 10<link rel="next" href="CRIS-Options.html#CRIS-Options" title="CRIS Options"> 11<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage"> 12<!-- 13Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 141998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 152010 Free Software Foundation, Inc. 16 17Permission is granted to copy, distribute and/or modify this document 18under the terms of the GNU Free Documentation License, Version 1.3 or 19any later version published by the Free Software Foundation; with the 20Invariant Sections being ``Funding Free Software'', the Front-Cover 21Texts being (a) (see below), and with the Back-Cover Texts being (b) 22(see below). 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Currently, <var>cpu</var> 63can be one of ‘<samp><span class="samp">bf512</span></samp>’, ‘<samp><span class="samp">bf514</span></samp>’, ‘<samp><span class="samp">bf516</span></samp>’, ‘<samp><span class="samp">bf518</span></samp>’, 64‘<samp><span class="samp">bf522</span></samp>’, ‘<samp><span class="samp">bf523</span></samp>’, ‘<samp><span class="samp">bf524</span></samp>’, ‘<samp><span class="samp">bf525</span></samp>’, ‘<samp><span class="samp">bf526</span></samp>’, 65‘<samp><span class="samp">bf527</span></samp>’, ‘<samp><span class="samp">bf531</span></samp>’, ‘<samp><span class="samp">bf532</span></samp>’, ‘<samp><span class="samp">bf533</span></samp>’, 66‘<samp><span class="samp">bf534</span></samp>’, ‘<samp><span class="samp">bf536</span></samp>’, ‘<samp><span class="samp">bf537</span></samp>’, ‘<samp><span class="samp">bf538</span></samp>’, ‘<samp><span class="samp">bf539</span></samp>’, 67‘<samp><span class="samp">bf542</span></samp>’, ‘<samp><span class="samp">bf544</span></samp>’, ‘<samp><span class="samp">bf547</span></samp>’, ‘<samp><span class="samp">bf548</span></samp>’, ‘<samp><span class="samp">bf549</span></samp>’, 68‘<samp><span class="samp">bf542m</span></samp>’, ‘<samp><span class="samp">bf544m</span></samp>’, ‘<samp><span class="samp">bf547m</span></samp>’, ‘<samp><span class="samp">bf548m</span></samp>’, ‘<samp><span class="samp">bf549m</span></samp>’, 69‘<samp><span class="samp">bf561</span></samp>’. 70The optional <var>sirevision</var> specifies the silicon revision of the target 71Blackfin processor. Any workarounds available for the targeted silicon revision 72will be enabled. If <var>sirevision</var> is ‘<samp><span class="samp">none</span></samp>’, no workarounds are enabled. 73If <var>sirevision</var> is ‘<samp><span class="samp">any</span></samp>’, all workarounds for the targeted processor 74will be enabled. The <code>__SILICON_REVISION__</code> macro is defined to two 75hexadecimal digits representing the major and minor numbers in the silicon 76revision. If <var>sirevision</var> is ‘<samp><span class="samp">none</span></samp>’, the <code>__SILICON_REVISION__</code> 77is not defined. If <var>sirevision</var> is ‘<samp><span class="samp">any</span></samp>’, the 78<code>__SILICON_REVISION__</code> is defined to be <code>0xffff</code>. 79If this optional <var>sirevision</var> is not used, GCC assumes the latest known 80silicon revision of the targeted Blackfin processor. 81 82 <p>Support for ‘<samp><span class="samp">bf561</span></samp>’ is incomplete. For ‘<samp><span class="samp">bf561</span></samp>’, 83Only the processor macro is defined. 84Without this option, ‘<samp><span class="samp">bf532</span></samp>’ is used as the processor by default. 85The corresponding predefined processor macros for <var>cpu</var> is to 86be defined. And for ‘<samp><span class="samp">bfin-elf</span></samp>’ toolchain, this causes the hardware BSP 87provided by libgloss to be linked in if <samp><span class="option">-msim</span></samp> is not given. 88 89 <br><dt><code>-msim</code><dd><a name="index-msim-1075"></a>Specifies that the program will be run on the simulator. This causes 90the simulator BSP provided by libgloss to be linked in. This option 91has effect only for ‘<samp><span class="samp">bfin-elf</span></samp>’ toolchain. 92Certain other options, such as <samp><span class="option">-mid-shared-library</span></samp> and 93<samp><span class="option">-mfdpic</span></samp>, imply <samp><span class="option">-msim</span></samp>. 94 95 <br><dt><code>-momit-leaf-frame-pointer</code><dd><a name="index-momit_002dleaf_002dframe_002dpointer-1076"></a>Don't keep the frame pointer in a register for leaf functions. This 96avoids the instructions to save, set up and restore frame pointers and 97makes an extra register available in leaf functions. The option 98<samp><span class="option">-fomit-frame-pointer</span></samp> removes the frame pointer for all functions 99which might make debugging harder. 100 101 <br><dt><code>-mspecld-anomaly</code><dd><a name="index-mspecld_002danomaly-1077"></a>When enabled, the compiler will ensure that the generated code does not 102contain speculative loads after jump instructions. If this option is used, 103<code>__WORKAROUND_SPECULATIVE_LOADS</code> is defined. 104 105 <br><dt><code>-mno-specld-anomaly</code><dd><a name="index-mno_002dspecld_002danomaly-1078"></a>Don't generate extra code to prevent speculative loads from occurring. 106 107 <br><dt><code>-mcsync-anomaly</code><dd><a name="index-mcsync_002danomaly-1079"></a>When enabled, the compiler will ensure that the generated code does not 108contain CSYNC or SSYNC instructions too soon after conditional branches. 109If this option is used, <code>__WORKAROUND_SPECULATIVE_SYNCS</code> is defined. 110 111 <br><dt><code>-mno-csync-anomaly</code><dd><a name="index-mno_002dcsync_002danomaly-1080"></a>Don't generate extra code to prevent CSYNC or SSYNC instructions from 112occurring too soon after a conditional branch. 113 114 <br><dt><code>-mlow-64k</code><dd><a name="index-mlow_002d64k-1081"></a>When enabled, the compiler is free to take advantage of the knowledge that 115the entire program fits into the low 64k of memory. 116 117 <br><dt><code>-mno-low-64k</code><dd><a name="index-mno_002dlow_002d64k-1082"></a>Assume that the program is arbitrarily large. This is the default. 118 119 <br><dt><code>-mstack-check-l1</code><dd><a name="index-mstack_002dcheck_002dl1-1083"></a>Do stack checking using information placed into L1 scratchpad memory by the 120uClinux kernel. 121 122 <br><dt><code>-mid-shared-library</code><dd><a name="index-mid_002dshared_002dlibrary-1084"></a>Generate code that supports shared libraries via the library ID method. 123This allows for execute in place and shared libraries in an environment 124without virtual memory management. This option implies <samp><span class="option">-fPIC</span></samp>. 125With a ‘<samp><span class="samp">bfin-elf</span></samp>’ target, this option implies <samp><span class="option">-msim</span></samp>. 126 127 <br><dt><code>-mno-id-shared-library</code><dd><a name="index-mno_002did_002dshared_002dlibrary-1085"></a>Generate code that doesn't assume ID based shared libraries are being used. 128This is the default. 129 130 <br><dt><code>-mleaf-id-shared-library</code><dd><a name="index-mleaf_002did_002dshared_002dlibrary-1086"></a>Generate code that supports shared libraries via the library ID method, 131but assumes that this library or executable won't link against any other 132ID shared libraries. That allows the compiler to use faster code for jumps 133and calls. 134 135 <br><dt><code>-mno-leaf-id-shared-library</code><dd><a name="index-mno_002dleaf_002did_002dshared_002dlibrary-1087"></a>Do not assume that the code being compiled won't link against any ID shared 136libraries. Slower code will be generated for jump and call insns. 137 138 <br><dt><code>-mshared-library-id=n</code><dd><a name="index-mshared_002dlibrary_002did-1088"></a>Specified the identification number of the ID based shared library being 139compiled. Specifying a value of 0 will generate more compact code, specifying 140other values will force the allocation of that number to the current 141library but is no more space or time efficient than omitting this option. 142 143 <br><dt><code>-msep-data</code><dd><a name="index-msep_002ddata-1089"></a>Generate code that allows the data segment to be located in a different 144area of memory from the text segment. This allows for execute in place in 145an environment without virtual memory management by eliminating relocations 146against the text section. 147 148 <br><dt><code>-mno-sep-data</code><dd><a name="index-mno_002dsep_002ddata-1090"></a>Generate code that assumes that the data segment follows the text segment. 149This is the default. 150 151 <br><dt><code>-mlong-calls</code><dt><code>-mno-long-calls</code><dd><a name="index-mlong_002dcalls-1091"></a><a name="index-mno_002dlong_002dcalls-1092"></a>Tells the compiler to perform function calls by first loading the 152address of the function into a register and then performing a subroutine 153call on this register. This switch is needed if the target function 154will lie outside of the 24 bit addressing range of the offset based 155version of subroutine call instruction. 156 157 <p>This feature is not enabled by default. Specifying 158<samp><span class="option">-mno-long-calls</span></samp> will restore the default behavior. Note these 159switches have no effect on how the compiler generates code to handle 160function calls via function pointers. 161 162 <br><dt><code>-mfast-fp</code><dd><a name="index-mfast_002dfp-1093"></a>Link with the fast floating-point library. This library relaxes some of 163the IEEE floating-point standard's rules for checking inputs against 164Not-a-Number (NAN), in the interest of performance. 165 166 <br><dt><code>-minline-plt</code><dd><a name="index-minline_002dplt-1094"></a>Enable inlining of PLT entries in function calls to functions that are 167not known to bind locally. It has no effect without <samp><span class="option">-mfdpic</span></samp>. 168 169 <br><dt><code>-mmulticore</code><dd><a name="index-mmulticore-1095"></a>Build standalone application for multicore Blackfin processor. Proper 170start files and link scripts will be used to support multicore. 171This option defines <code>__BFIN_MULTICORE</code>. It can only be used with 172<samp><span class="option">-mcpu=bf561[-</span><var>sirevision</var><span class="option">]</span></samp>. It can be used with 173<samp><span class="option">-mcorea</span></samp> or <samp><span class="option">-mcoreb</span></samp>. If it's used without 174<samp><span class="option">-mcorea</span></samp> or <samp><span class="option">-mcoreb</span></samp>, single application/dual core 175programming model is used. In this model, the main function of Core B 176should be named as coreb_main. If it's used with <samp><span class="option">-mcorea</span></samp> or 177<samp><span class="option">-mcoreb</span></samp>, one application per core programming model is used. 178If this option is not used, single core application programming 179model is used. 180 181 <br><dt><code>-mcorea</code><dd><a name="index-mcorea-1096"></a>Build standalone application for Core A of BF561 when using 182one application per core programming model. Proper start files 183and link scripts will be used to support Core A. This option 184defines <code>__BFIN_COREA</code>. It must be used with <samp><span class="option">-mmulticore</span></samp>. 185 186 <br><dt><code>-mcoreb</code><dd><a name="index-mcoreb-1097"></a>Build standalone application for Core B of BF561 when using 187one application per core programming model. Proper start files 188and link scripts will be used to support Core B. This option 189defines <code>__BFIN_COREB</code>. When this option is used, coreb_main 190should be used instead of main. It must be used with 191<samp><span class="option">-mmulticore</span></samp>. 192 193 <br><dt><code>-msdram</code><dd><a name="index-msdram-1098"></a>Build standalone application for SDRAM. Proper start files and 194link scripts will be used to put the application into SDRAM. 195Loader should initialize SDRAM before loading the application 196into SDRAM. This option defines <code>__BFIN_SDRAM</code>. 197 198 <br><dt><code>-micplb</code><dd><a name="index-micplb-1099"></a>Assume that ICPLBs are enabled at runtime. This has an effect on certain 199anomaly workarounds. For Linux targets, the default is to assume ICPLBs 200are enabled; for standalone applications the default is off. 201</dl> 202 203 </body></html> 204 205