1<html lang="en"> 2<head> 3<title>Overview - Using as</title> 4<meta http-equiv="Content-Type" content="text/html"> 5<meta name="description" content="Using as"> 6<meta name="generator" content="makeinfo 4.13"> 7<link title="Top" rel="start" href="index.html#Top"> 8<link rel="prev" href="index.html#Top" title="Top"> 9<link rel="next" href="Invoking.html#Invoking" title="Invoking"> 10<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage"> 11<!-- 12This file documents the GNU Assembler "as". 13 14Copyright (C) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 152000, 2001, 2002, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, 16Inc. 17 18Permission is granted to copy, distribute and/or modify this document 19under the terms of the GNU Free Documentation License, Version 1.3 20or any later version published by the Free Software Foundation; 21with no Invariant Sections, with no Front-Cover Texts, and with no 22Back-Cover Texts. A copy of the license is included in the 23section entitled ``GNU Free Documentation License''. 24 25--> 26<meta http-equiv="Content-Style-Type" content="text/css"> 27<style type="text/css"><!-- 28 pre.display { font-family:inherit } 29 pre.format { font-family:inherit } 30 pre.smalldisplay { font-family:inherit; font-size:smaller } 31 pre.smallformat { font-family:inherit; font-size:smaller } 32 pre.smallexample { font-size:smaller } 33 pre.smalllisp { font-size:smaller } 34 span.sc { font-variant:small-caps } 35 span.roman { font-family:serif; font-weight:normal; } 36 span.sansserif { font-family:sans-serif; font-weight:normal; } 37--></style> 38<link rel="stylesheet" type="text/css" href="../cs.css"> 39</head> 40<body> 41<div class="node"> 42<a name="Overview"></a> 43<p> 44Next: <a rel="next" accesskey="n" href="Invoking.html#Invoking">Invoking</a>, 45Previous: <a rel="previous" accesskey="p" href="index.html#Top">Top</a>, 46Up: <a rel="up" accesskey="u" href="index.html#Top">Top</a> 47<hr> 48</div> 49 50<h2 class="chapter">1 Overview</h2> 51 52<p><a name="index-invocation-summary-1"></a><a name="index-option-summary-2"></a><a name="index-summary-of-options-3"></a>Here is a brief summary of how to invoke <samp><span class="command">as</span></samp>. For details, 53see <a href="Invoking.html#Invoking">Command-Line Options</a>. 54 55<!-- man title AS the portable GNU assembler. --> 56<!-- We don't use deffn and friends for the following because they seem --> 57<!-- to be limited to one line for the header. --> 58<pre class="smallexample"> <!-- man begin SYNOPSIS --> 59 as [<b>-a</b>[<b>cdghlns</b>][=<var>file</var>]] [<b>--alternate</b>] [<b>-D</b>] 60 [<b>--compress-debug-sections</b>] [<b>--nocompress-debug-sections</b>] 61 [<b>--debug-prefix-map</b> <var>old</var>=<var>new</var>] 62 [<b>--defsym</b> <var>sym</var>=<var>val</var>] [<b>-f</b>] [<b>-g</b>] [<b>--gstabs</b>] 63 [<b>--gstabs+</b>] [<b>--gdwarf-2</b>] [<b>--help</b>] [<b>-I</b> <var>dir</var>] [<b>-J</b>] 64 [<b>-K</b>] [<b>-L</b>] [<b>--listing-lhs-width</b>=<var>NUM</var>] 65 [<b>--listing-lhs-width2</b>=<var>NUM</var>] [<b>--listing-rhs-width</b>=<var>NUM</var>] 66 [<b>--listing-cont-lines</b>=<var>NUM</var>] [<b>--keep-locals</b>] [<b>-o</b> 67 <var>objfile</var>] [<b>-R</b>] [<b>--reduce-memory-overheads</b>] [<b>--statistics</b>] 68 [<b>-v</b>] [<b>-version</b>] [<b>--version</b>] [<b>-W</b>] [<b>--warn</b>] 69 [<b>--fatal-warnings</b>] [<b>-w</b>] [<b>-x</b>] [<b>-Z</b>] [<b>@</b><var>FILE</var>] 70 [<b>--size-check=[error|warning]</b>] 71 [<b>--target-help</b>] [<var>target-options</var>] 72 [<b>--</b>|<var>files</var> ...] 73 <!-- Target dependent options are listed below. Keep the list sorted. --> 74 <!-- Add an empty line for separation. --> 75 76 <em>Target Alpha options:</em> 77 [<b>-m</b><var>cpu</var>] 78 [<b>-mdebug</b> | <b>-no-mdebug</b>] 79 [<b>-replace</b> | <b>-noreplace</b>] 80 [<b>-relax</b>] [<b>-g</b>] [<b>-G</b><var>size</var>] 81 [<b>-F</b>] [<b>-32addr</b>] 82 83 <em>Target ARC options:</em> 84 [<b>-marc[5|6|7|8]</b>] 85 [<b>-EB</b>|<b>-EL</b>] 86 87 <em>Target ARM options:</em> 88 <!-- Don't document the deprecated options --> 89 [<b>-mcpu</b>=<var>processor</var>[+<var>extension</var>...]] 90 [<b>-march</b>=<var>architecture</var>[+<var>extension</var>...]] 91 [<b>-mfpu</b>=<var>floating-point-format</var>] 92 [<b>-mfloat-abi</b>=<var>abi</var>] 93 [<b>-meabi</b>=<var>ver</var>] 94 [<b>-mthumb</b>] 95 [<b>-EB</b>|<b>-EL</b>] 96 [<b>-mapcs-32</b>|<b>-mapcs-26</b>|<b>-mapcs-float</b>| 97 <b>-mapcs-reentrant</b>] 98 [<b>-mthumb-interwork</b>] [<b>-k</b>] 99 100 <em>Target Blackfin options:</em> 101 [<b>-mcpu</b>=<var>processor</var>[-<var>sirevision</var>]] 102 [<b>-mfdpic</b>] 103 [<b>-mno-fdpic</b>] 104 [<b>-mnopic</b>] 105 106 <em>Target CRIS options:</em> 107 [<b>--underscore</b> | <b>--no-underscore</b>] 108 [<b>--pic</b>] [<b>-N</b>] 109 [<b>--emulation=criself</b> | <b>--emulation=crisaout</b>] 110 [<b>--march=v0_v10</b> | <b>--march=v10</b> | <b>--march=v32</b> | <b>--march=common_v10_v32</b>] 111 <!-- Deprecated - deliberately not documented. --> 112 <!-- [@b{-h}] [@b{-H}] --> 113 114 <em>Target D10V options:</em> 115 [<b>-O</b>] 116 117 <em>Target D30V options:</em> 118 [<b>-O</b>|<b>-n</b>|<b>-N</b>] 119 120 <em>Target H8/300 options:</em> 121 [-h-tick-hex] 122 <!-- HPPA has no machine-dependent assembler options (yet). --> 123 124 <em>Target i386 options:</em> 125 [<b>--32</b>|<b>--n32</b>|<b>--64</b>] [<b>-n</b>] 126 [<b>-march</b>=<var>CPU</var>[+<var>EXTENSION</var>...]] [<b>-mtune</b>=<var>CPU</var>] 127 128 <em>Target i960 options:</em> 129 <!-- see md_parse_option in tc-i960.c --> 130 [<b>-ACA</b>|<b>-ACA_A</b>|<b>-ACB</b>|<b>-ACC</b>|<b>-AKA</b>|<b>-AKB</b>| 131 <b>-AKC</b>|<b>-AMC</b>] 132 [<b>-b</b>] [<b>-no-relax</b>] 133 134 <em>Target IA-64 options:</em> 135 [<b>-mconstant-gp</b>|<b>-mauto-pic</b>] 136 [<b>-milp32</b>|<b>-milp64</b>|<b>-mlp64</b>|<b>-mp64</b>] 137 [<b>-mle</b>|<b>mbe</b>] 138 [<b>-mtune=itanium1</b>|<b>-mtune=itanium2</b>] 139 [<b>-munwind-check=warning</b>|<b>-munwind-check=error</b>] 140 [<b>-mhint.b=ok</b>|<b>-mhint.b=warning</b>|<b>-mhint.b=error</b>] 141 [<b>-x</b>|<b>-xexplicit</b>] [<b>-xauto</b>] [<b>-xdebug</b>] 142 143 <em>Target IP2K options:</em> 144 [<b>-mip2022</b>|<b>-mip2022ext</b>] 145 146 <em>Target M32C options:</em> 147 [<b>-m32c</b>|<b>-m16c</b>] [-relax] [-h-tick-hex] 148 149 <em>Target M32R options:</em> 150 [<b>--m32rx</b>|<b>--[no-]warn-explicit-parallel-conflicts</b>| 151 <b>--W[n]p</b>] 152 153 <em>Target M680X0 options:</em> 154 [<b>-l</b>] [<b>-m68000</b>|<b>-m68010</b>|<b>-m68020</b>|...] 155 156 <em>Target M68HC11 options:</em> 157 [<b>-m68hc11</b>|<b>-m68hc12</b>|<b>-m68hcs12</b>] 158 [<b>-mshort</b>|<b>-mlong</b>] 159 [<b>-mshort-double</b>|<b>-mlong-double</b>] 160 [<b>--force-long-branches</b>] [<b>--short-branches</b>] 161 [<b>--strict-direct-mode</b>] [<b>--print-insn-syntax</b>] 162 [<b>--print-opcodes</b>] [<b>--generate-example</b>] 163 164 <em>Target MCORE options:</em> 165 [<b>-jsri2bsr</b>] [<b>-sifilter</b>] [<b>-relax</b>] 166 [<b>-mcpu=[210|340]</b>] 167 <em>Target MICROBLAZE options:</em> 168 <!-- MicroBlaze has no machine-dependent assembler options. --> 169 170 <em>Target MIPS options:</em> 171 [<b>-nocpp</b>] [<b>-EL</b>] [<b>-EB</b>] [<b>-O</b>[<var>optimization level</var>]] 172 [<b>-g</b>[<var>debug level</var>]] [<b>-G</b> <var>num</var>] [<b>-KPIC</b>] [<b>-call_shared</b>] 173 [<b>-non_shared</b>] [<b>-xgot</b> [<b>-mvxworks-pic</b>] 174 [<b>-mabi</b>=<var>ABI</var>] [<b>-32</b>] [<b>-n32</b>] [<b>-64</b>] [<b>-mfp32</b>] [<b>-mgp32</b>] 175 [<b>-march</b>=<var>CPU</var>] [<b>-mtune</b>=<var>CPU</var>] [<b>-mips1</b>] [<b>-mips2</b>] 176 [<b>-mips3</b>] [<b>-mips4</b>] [<b>-mips5</b>] [<b>-mips32</b>] [<b>-mips32r2</b>] 177 [<b>-mips64</b>] [<b>-mips64r2</b>] 178 [<b>-construct-floats</b>] [<b>-no-construct-floats</b>] 179 [<b>-trap</b>] [<b>-no-break</b>] [<b>-break</b>] [<b>-no-trap</b>] 180 [<b>-mips16</b>] [<b>-no-mips16</b>] 181 [<b>-mmicromips</b>] [<b>-mno-micromips</b>] 182 [<b>-msmartmips</b>] [<b>-mno-smartmips</b>] 183 [<b>-mips3d</b>] [<b>-no-mips3d</b>] 184 [<b>-mdmx</b>] [<b>-no-mdmx</b>] 185 [<b>-mdsp</b>] [<b>-mno-dsp</b>] 186 [<b>-mdspr2</b>] [<b>-mno-dspr2</b>] 187 [<b>-mmt</b>] [<b>-mno-mt</b>] 188 [<b>-mmcu</b>] [<b>-mno-mcu</b>] 189 [<b>-minsn32</b>] [<b>-mno-insn32</b>] 190 [<b>-mfix7000</b>] [<b>-mno-fix7000</b>] 191 [<b>-mfix-vr4120</b>] [<b>-mno-fix-vr4120</b>] 192 [<b>-mfix-vr4130</b>] [<b>-mno-fix-vr4130</b>] 193 [<b>-mdebug</b>] [<b>-no-mdebug</b>] 194 [<b>-mpdr</b>] [<b>-mno-pdr</b>] 195 196 <em>Target MMIX options:</em> 197 [<b>--fixed-special-register-names</b>] [<b>--globalize-symbols</b>] 198 [<b>--gnu-syntax</b>] [<b>--relax</b>] [<b>--no-predefined-symbols</b>] 199 [<b>--no-expand</b>] [<b>--no-merge-gregs</b>] [<b>-x</b>] 200 [<b>--linker-allocated-gregs</b>] 201 202 <em>Target PDP11 options:</em> 203 [<b>-mpic</b>|<b>-mno-pic</b>] [<b>-mall</b>] [<b>-mno-extensions</b>] 204 [<b>-m</b><var>extension</var>|<b>-mno-</b><var>extension</var>] 205 [<b>-m</b><var>cpu</var>] [<b>-m</b><var>machine</var>] 206 207 <em>Target picoJava options:</em> 208 [<b>-mb</b>|<b>-me</b>] 209 210 <em>Target PowerPC options:</em> 211 [<b>-a32</b>|<b>-a64</b>] 212 [<b>-mpwrx</b>|<b>-mpwr2</b>|<b>-mpwr</b>|<b>-m601</b>|<b>-mppc</b>|<b>-mppc32</b>|<b>-m603</b>|<b>-m604</b>|<b>-m403</b>|<b>-m405</b>| 213 <b>-m440</b>|<b>-m464</b>|<b>-m476</b>|<b>-m7400</b>|<b>-m7410</b>|<b>-m7450</b>|<b>-m7455</b>|<b>-m750cl</b>|<b>-mppc64</b>| 214 <b>-m620</b>|<b>-me500</b>|<b>-e500x2</b>|<b>-me500mc</b>|<b>-me500mc64</b>|<b>-mppc64bridge</b>|<b>-mbooke</b>| 215 <b>-mpower4</b>|<b>-mpr4</b>|<b>-mpower5</b>|<b>-mpwr5</b>|<b>-mpwr5x</b>|<b>-mpower6</b>|<b>-mpwr6</b>| 216 <b>-mpower7</b>|<b>-mpw7</b>|<b>-ma2</b>|<b>-mcell</b>|<b>-mspe</b>|<b>-mtitan</b>|<b>-me300</b>|<b>-mcom</b>] 217 [<b>-many</b>] [<b>-maltivec</b>|<b>-mvsx</b>] 218 [<b>-mregnames</b>|<b>-mno-regnames</b>] 219 [<b>-mrelocatable</b>|<b>-mrelocatable-lib</b>|<b>-K PIC</b>] [<b>-memb</b>] 220 [<b>-mlittle</b>|<b>-mlittle-endian</b>|<b>-le</b>|<b>-mbig</b>|<b>-mbig-endian</b>|<b>-be</b>] 221 [<b>-msolaris</b>|<b>-mno-solaris</b>] 222 [<b>-nops=</b><var>count</var>] 223 224 <em>Target RX options:</em> 225 [<b>-mlittle-endian</b>|<b>-mbig-endian</b>] 226 [<b>-m32bit-ints</b>|<b>-m16bit-ints</b>] 227 [<b>-m32bit-doubles</b>|<b>-m64bit-doubles</b>] 228 229 <em>Target s390 options:</em> 230 [<b>-m31</b>|<b>-m64</b>] [<b>-mesa</b>|<b>-mzarch</b>] [<b>-march</b>=<var>CPU</var>] 231 [<b>-mregnames</b>|<b>-mno-regnames</b>] 232 [<b>-mwarn-areg-zero</b>] 233 234 <em>Target SCORE options:</em> 235 [<b>-EB</b>][<b>-EL</b>][<b>-FIXDD</b>][<b>-NWARN</b>] 236 [<b>-SCORE5</b>][<b>-SCORE5U</b>][<b>-SCORE7</b>][<b>-SCORE3</b>] 237 [<b>-march=score7</b>][<b>-march=score3</b>] 238 [<b>-USE_R1</b>][<b>-KPIC</b>][<b>-O0</b>][<b>-G</b> <var>num</var>][<b>-V</b>] 239 240 <em>Target SPARC options:</em> 241 <!-- The order here is important. See c-sparc.texi. --> 242 [<b>-Av6</b>|<b>-Av7</b>|<b>-Av8</b>|<b>-Asparclet</b>|<b>-Asparclite</b> 243 <b>-Av8plus</b>|<b>-Av8plusa</b>|<b>-Av9</b>|<b>-Av9a</b>] 244 [<b>-xarch=v8plus</b>|<b>-xarch=v8plusa</b>] [<b>-bump</b>] 245 [<b>-32</b>|<b>-64</b>] 246 247 <em>Target TIC54X options:</em> 248 [<b>-mcpu=54[123589]</b>|<b>-mcpu=54[56]lp</b>] [<b>-mfar-mode</b>|<b>-mf</b>] 249 [<b>-merrors-to-file</b> <var><filename></var>|<b>-me</b> <var><filename></var>] 250 251 252 <em>Target TIC6X options:</em> 253 [<b>-march=</b><var>arch</var>] [<b>-mbig-endian</b>|<b>-mlittle-endian</b>] 254 [<b>-mdsbt</b>|<b>-mno-dsbt</b>] [<b>-mpid=no</b>|<b>-mpid=near</b>|<b>-mpid=far</b>] 255 [<b>-mpic</b>|<b>-mno-pic</b>] 256 257 <em>Target TILE-Gx options:</em> 258 [<b>-m32</b>|<b>-m64</b>] 259 <!-- TILEPro has no machine-dependent assembler options --> 260 261 262 <em>Target Xtensa options:</em> 263 [<b>--[no-]text-section-literals</b>] [<b>--[no-]absolute-literals</b>] 264 [<b>--[no-]target-align</b>] [<b>--[no-]longcalls</b>] 265 [<b>--[no-]transform</b>] 266 [<b>--rename-section</b> <var>oldname</var>=<var>newname</var>] 267 268 269 <em>Target Z80 options:</em> 270 [<b>-z80</b>] [<b>-r800</b>] 271 [<b> -ignore-undocumented-instructions</b>] [<b>-Wnud</b>] 272 [<b> -ignore-unportable-instructions</b>] [<b>-Wnup</b>] 273 [<b> -warn-undocumented-instructions</b>] [<b>-Wud</b>] 274 [<b> -warn-unportable-instructions</b>] [<b>-Wup</b>] 275 [<b> -forbid-undocumented-instructions</b>] [<b>-Fud</b>] 276 [<b> -forbid-unportable-instructions</b>] [<b>-Fup</b>] 277 278 <!-- Z8000 has no machine-dependent assembler options --> 279 280 <!-- man end --> 281</pre> 282 <!-- man begin OPTIONS --> 283 <dl> 284<!-- This file is designed to be included in manuals that use --> 285<!-- expandargv. --> 286 287 <dt><code>@</code><var>file</var><dd>Read command-line options from <var>file</var>. The options read are 288inserted in place of the original @<var>file</var> option. If <var>file</var> 289does not exist, or cannot be read, then the option will be treated 290literally, and not removed. 291 292 <p>Options in <var>file</var> are separated by whitespace. A whitespace 293character may be included in an option by surrounding the entire 294option in either single or double quotes. Any character (including a 295backslash) may be included by prefixing the character to be included 296with a backslash. The <var>file</var> may itself contain additional 297@<var>file</var> options; any such options will be processed recursively. 298 299 <br><dt><code>-a[cdghlmns]</code><dd>Turn on listings, in any of a variety of ways: 300 301 <dl> 302<dt><code>-ac</code><dd>omit false conditionals 303 304 <br><dt><code>-ad</code><dd>omit debugging directives 305 306 <br><dt><code>-ag</code><dd>include general information, like as version and options passed 307 308 <br><dt><code>-ah</code><dd>include high-level source 309 310 <br><dt><code>-al</code><dd>include assembly 311 312 <br><dt><code>-am</code><dd>include macro expansions 313 314 <br><dt><code>-an</code><dd>omit forms processing 315 316 <br><dt><code>-as</code><dd>include symbols 317 318 <br><dt><code>=file</code><dd>set the name of the listing file 319</dl> 320 321 <p>You may combine these options; for example, use ‘<samp><span class="samp">-aln</span></samp>’ for assembly 322listing without forms processing. The ‘<samp><span class="samp">=file</span></samp>’ option, if used, must be 323the last one. By itself, ‘<samp><span class="samp">-a</span></samp>’ defaults to ‘<samp><span class="samp">-ahls</span></samp>’. 324 325 <br><dt><code>--alternate</code><dd>Begin in alternate macro mode. 326See <a href="Altmacro.html#Altmacro"><code>.altmacro</code></a>. 327 328 <br><dt><code>--compress-debug-sections</code><dd>Compress DWARF debug sections using zlib. The debug sections are renamed 329to begin with ‘<samp><span class="samp">.zdebug</span></samp>’, and the resulting object file may not be 330compatible with older linkers and object file utilities. 331 332 <br><dt><code>--nocompress-debug-sections</code><dd>Do not compress DWARF debug sections. This is the default. 333 334 <br><dt><code>-D</code><dd>Ignored. This option is accepted for script compatibility with calls to 335other assemblers. 336 337 <br><dt><code>--debug-prefix-map </code><var>old</var><code>=</code><var>new</var><dd>When assembling files in directory <samp><var>old</var></samp>, record debugging 338information describing them as in <samp><var>new</var></samp> instead. 339 340 <br><dt><code>--defsym </code><var>sym</var><code>=</code><var>value</var><dd>Define the symbol <var>sym</var> to be <var>value</var> before assembling the input file. 341<var>value</var> must be an integer constant. As in C, a leading ‘<samp><span class="samp">0x</span></samp>’ 342indicates a hexadecimal value, and a leading ‘<samp><span class="samp">0</span></samp>’ indicates an octal 343value. The value of the symbol can be overridden inside a source file via the 344use of a <code>.set</code> pseudo-op. 345 346 <br><dt><code>-f</code><dd>“fast”—skip whitespace and comment preprocessing (assume source is 347compiler output). 348 349 <br><dt><code>-g</code><dt><code>--gen-debug</code><dd>Generate debugging information for each assembler source line using whichever 350debug format is preferred by the target. This currently means either STABS, 351ECOFF or DWARF2. 352 353 <br><dt><code>--gstabs</code><dd>Generate stabs debugging information for each assembler line. This 354may help debugging assembler code, if the debugger can handle it. 355 356 <br><dt><code>--gstabs+</code><dd>Generate stabs debugging information for each assembler line, with GNU 357extensions that probably only gdb can handle, and that could make other 358debuggers crash or refuse to read your program. This 359may help debugging assembler code. Currently the only GNU extension is 360the location of the current working directory at assembling time. 361 362 <br><dt><code>--gdwarf-2</code><dd>Generate DWARF2 debugging information for each assembler line. This 363may help debugging assembler code, if the debugger can handle it. Note—this 364option is only supported by some targets, not all of them. 365 366 <br><dt><code>--size-check=error</code><dt><code>--size-check=warning</code><dd>Issue an error or warning for invalid ELF .size directive. 367 368 <br><dt><code>--help</code><dd>Print a summary of the command line options and exit. 369 370 <br><dt><code>--target-help</code><dd>Print a summary of all target specific options and exit. 371 372 <br><dt><code>-I </code><var>dir</var><dd>Add directory <var>dir</var> to the search list for <code>.include</code> directives. 373 374 <br><dt><code>-J</code><dd>Don't warn about signed overflow. 375 376 <br><dt><code>-K</code><dd>Issue warnings when difference tables altered for long displacements. 377 378 <br><dt><code>-L</code><dt><code>--keep-locals</code><dd>Keep (in the symbol table) local symbols. These symbols start with 379system-specific local label prefixes, typically ‘<samp><span class="samp">.L</span></samp>’ for ELF systems 380or ‘<samp><span class="samp">L</span></samp>’ for traditional a.out systems. 381See <a href="Symbol-Names.html#Symbol-Names">Symbol Names</a>. 382 383 <br><dt><code>--listing-lhs-width=</code><var>number</var><dd>Set the maximum width, in words, of the output data column for an assembler 384listing to <var>number</var>. 385 386 <br><dt><code>--listing-lhs-width2=</code><var>number</var><dd>Set the maximum width, in words, of the output data column for continuation 387lines in an assembler listing to <var>number</var>. 388 389 <br><dt><code>--listing-rhs-width=</code><var>number</var><dd>Set the maximum width of an input source line, as displayed in a listing, to 390<var>number</var> bytes. 391 392 <br><dt><code>--listing-cont-lines=</code><var>number</var><dd>Set the maximum number of lines printed in a listing for a single line of input 393to <var>number</var> + 1. 394 395 <br><dt><code>-o </code><var>objfile</var><dd>Name the object-file output from <samp><span class="command">as</span></samp> <var>objfile</var>. 396 397 <br><dt><code>-R</code><dd>Fold the data section into the text section. 398 399 <p><a name="index-g_t_002d_002dhash_002dsize_003d_0040var_007bnumber_007d-4"></a>Set the default size of GAS's hash tables to a prime number close to 400<var>number</var>. Increasing this value can reduce the length of time it takes the 401assembler to perform its tasks, at the expense of increasing the assembler's 402memory requirements. Similarly reducing this value can reduce the memory 403requirements at the expense of speed. 404 405 <br><dt><code>--reduce-memory-overheads</code><dd>This option reduces GAS's memory requirements, at the expense of making the 406assembly processes slower. Currently this switch is a synonym for 407‘<samp><span class="samp">--hash-size=4051</span></samp>’, but in the future it may have other effects as well. 408 409 <br><dt><code>--statistics</code><dd>Print the maximum space (in bytes) and total time (in seconds) used by 410assembly. 411 412 <br><dt><code>--strip-local-absolute</code><dd>Remove local absolute symbols from the outgoing symbol table. 413 414 <br><dt><code>-v</code><dt><code>-version</code><dd>Print the <samp><span class="command">as</span></samp> version. 415 416 <br><dt><code>--version</code><dd>Print the <samp><span class="command">as</span></samp> version and exit. 417 418 <br><dt><code>-W</code><dt><code>--no-warn</code><dd>Suppress warning messages. 419 420 <br><dt><code>--fatal-warnings</code><dd>Treat warnings as errors. 421 422 <br><dt><code>--warn</code><dd>Don't suppress warning messages or treat them as errors. 423 424 <br><dt><code>-w</code><dd>Ignored. 425 426 <br><dt><code>-x</code><dd>Ignored. 427 428 <br><dt><code>-Z</code><dd>Generate an object file even after errors. 429 430 <br><dt><code>-- | </code><var>files</var><code> ...</code><dd>Standard input, or source files to assemble. 431 432 </dl> 433 <!-- man end --> 434 435 <p>See <a href="Alpha-Options.html#Alpha-Options">Alpha Options</a>, for the options available when as is configured 436for an Alpha processor. 437 438<!-- man begin OPTIONS --> 439 <p>The following options are available when as is configured for 440an ARC processor. 441 442 <dl> 443<dt><code>-marc[5|6|7|8]</code><dd>This option selects the core processor variant. 444<br><dt><code>-EB | -EL</code><dd>Select either big-endian (-EB) or little-endian (-EL) output. 445</dl> 446 447 <p>The following options are available when as is configured for the ARM 448processor family. 449 450 <dl> 451<dt><code>-mcpu=</code><var>processor</var><code>[+</code><var>extension</var><code>...]</code><dd>Specify which ARM processor variant is the target. 452<br><dt><code>-march=</code><var>architecture</var><code>[+</code><var>extension</var><code>...]</code><dd>Specify which ARM architecture variant is used by the target. 453<br><dt><code>-mfpu=</code><var>floating-point-format</var><dd>Select which Floating Point architecture is the target. 454<br><dt><code>-mfloat-abi=</code><var>abi</var><dd>Select which floating point ABI is in use. 455<br><dt><code>-mthumb</code><dd>Enable Thumb only instruction decoding. 456<br><dt><code>-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant</code><dd>Select which procedure calling convention is in use. 457<br><dt><code>-EB | -EL</code><dd>Select either big-endian (-EB) or little-endian (-EL) output. 458<br><dt><code>-mthumb-interwork</code><dd>Specify that the code has been generated with interworking between Thumb and 459ARM code in mind. 460<br><dt><code>-k</code><dd>Specify that PIC code has been generated. 461</dl> 462 <!-- man end --> 463 464 <p>See <a href="Blackfin-Options.html#Blackfin-Options">Blackfin Options</a>, for the options available when as is 465configured for the Blackfin processor family. 466 467<!-- man begin OPTIONS --> 468 <p>See the info pages for documentation of the CRIS-specific options. 469 470 <p>The following options are available when as is configured for 471a D10V processor. 472 473<a name="index-D10V-optimization-5"></a> 474<a name="index-optimization_002c-D10V-6"></a> 475<dl><dt><code>-O</code><dd>Optimize output by parallelizing instructions. 476</dl> 477 478 <p>The following options are available when as is configured for a D30V 479processor. 480 481<a name="index-D30V-optimization-7"></a> 482<a name="index-optimization_002c-D30V-8"></a> 483<dl><dt><code>-O</code><dd>Optimize output by parallelizing instructions. 484 485 <p><a name="index-D30V-nops-9"></a><br><dt><code>-n</code><dd>Warn when nops are generated. 486 487 <p><a name="index-D30V-nops-after-32_002dbit-multiply-10"></a><br><dt><code>-N</code><dd>Warn when a nop after a 32-bit multiply instruction is generated. 488</dl> 489 <!-- man end --> 490 491 <p>See <a href="i386_002dOptions.html#i386_002dOptions">i386-Options</a>, for the options available when as is 492configured for an i386 processor. 493 494<!-- man begin OPTIONS --> 495 <p>The following options are available when as is configured for the 496Intel 80960 processor. 497 498 <dl> 499<dt><code>-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC</code><dd>Specify which variant of the 960 architecture is the target. 500 501 <br><dt><code>-b</code><dd>Add code to collect statistics about branches taken. 502 503 <br><dt><code>-no-relax</code><dd>Do not alter compare-and-branch instructions for long displacements; 504error if necessary. 505 506 </dl> 507 508 <p>The following options are available when as is configured for the 509Ubicom IP2K series. 510 511 <dl> 512<dt><code>-mip2022ext</code><dd>Specifies that the extended IP2022 instructions are allowed. 513 514 <br><dt><code>-mip2022</code><dd>Restores the default behaviour, which restricts the permitted instructions to 515just the basic IP2022 ones. 516 517 </dl> 518 519 <p>The following options are available when as is configured for the 520Renesas M32C and M16C processors. 521 522 <dl> 523<dt><code>-m32c</code><dd>Assemble M32C instructions. 524 525 <br><dt><code>-m16c</code><dd>Assemble M16C instructions (the default). 526 527 <br><dt><code>-relax</code><dd>Enable support for link-time relaxations. 528 529 <br><dt><code>-h-tick-hex</code><dd>Support H'00 style hex constants in addition to 0x00 style. 530 531 </dl> 532 533 <p>The following options are available when as is configured for the 534Renesas M32R (formerly Mitsubishi M32R) series. 535 536 <dl> 537<dt><code>--m32rx</code><dd>Specify which processor in the M32R family is the target. The default 538is normally the M32R, but this option changes it to the M32RX. 539 540 <br><dt><code>--warn-explicit-parallel-conflicts or --Wp</code><dd>Produce warning messages when questionable parallel constructs are 541encountered. 542 543 <br><dt><code>--no-warn-explicit-parallel-conflicts or --Wnp</code><dd>Do not produce warning messages when questionable parallel constructs are 544encountered. 545 546 </dl> 547 548 <p>The following options are available when as is configured for the 549Motorola 68000 series. 550 551 <dl> 552<dt><code>-l</code><dd>Shorten references to undefined symbols, to one word instead of two. 553 554 <br><dt><code>-m68000 | -m68008 | -m68010 | -m68020 | -m68030</code><dt><code>| -m68040 | -m68060 | -m68302 | -m68331 | -m68332</code><dt><code>| -m68333 | -m68340 | -mcpu32 | -m5200</code><dd>Specify what processor in the 68000 family is the target. The default 555is normally the 68020, but this can be changed at configuration time. 556 557 <br><dt><code>-m68881 | -m68882 | -mno-68881 | -mno-68882</code><dd>The target machine does (or does not) have a floating-point coprocessor. 558The default is to assume a coprocessor for 68020, 68030, and cpu32. Although 559the basic 68000 is not compatible with the 68881, a combination of the 560two can be specified, since it's possible to do emulation of the 561coprocessor instructions with the main processor. 562 563 <br><dt><code>-m68851 | -mno-68851</code><dd>The target machine does (or does not) have a memory-management 564unit coprocessor. The default is to assume an MMU for 68020 and up. 565 566 </dl> 567 568 <p>For details about the PDP-11 machine dependent features options, 569see <a href="PDP_002d11_002dOptions.html#PDP_002d11_002dOptions">PDP-11-Options</a>. 570 571 <dl> 572<dt><code>-mpic | -mno-pic</code><dd>Generate position-independent (or position-dependent) code. The 573default is <samp><span class="option">-mpic</span></samp>. 574 575 <br><dt><code>-mall</code><dt><code>-mall-extensions</code><dd>Enable all instruction set extensions. This is the default. 576 577 <br><dt><code>-mno-extensions</code><dd>Disable all instruction set extensions. 578 579 <br><dt><code>-m</code><var>extension</var><code> | -mno-</code><var>extension</var><dd>Enable (or disable) a particular instruction set extension. 580 581 <br><dt><code>-m</code><var>cpu</var><dd>Enable the instruction set extensions supported by a particular CPU, and 582disable all other extensions. 583 584 <br><dt><code>-m</code><var>machine</var><dd>Enable the instruction set extensions supported by a particular machine 585model, and disable all other extensions. 586</dl> 587 588 <p>The following options are available when as is configured for 589a picoJava processor. 590 591 592<a name="index-PJ-endianness-11"></a> 593<a name="index-endianness_002c-PJ-12"></a> 594<a name="index-big-endian-output_002c-PJ-13"></a> 595<dl><dt><code>-mb</code><dd>Generate “big endian” format output. 596 597 <p><a name="index-little-endian-output_002c-PJ-14"></a><br><dt><code>-ml</code><dd>Generate “little endian” format output. 598 599 </dl> 600 601 <p>The following options are available when as is configured for the 602Motorola 68HC11 or 68HC12 series. 603 604 <dl> 605<dt><code>-m68hc11 | -m68hc12 | -m68hcs12</code><dd>Specify what processor is the target. The default is 606defined by the configuration option when building the assembler. 607 608 <br><dt><code>-mshort</code><dd>Specify to use the 16-bit integer ABI. 609 610 <br><dt><code>-mlong</code><dd>Specify to use the 32-bit integer ABI. 611 612 <br><dt><code>-mshort-double</code><dd>Specify to use the 32-bit double ABI. 613 614 <br><dt><code>-mlong-double</code><dd>Specify to use the 64-bit double ABI. 615 616 <br><dt><code>--force-long-branches</code><dd>Relative branches are turned into absolute ones. This concerns 617conditional branches, unconditional branches and branches to a 618sub routine. 619 620 <br><dt><code>-S | --short-branches</code><dd>Do not turn relative branches into absolute ones 621when the offset is out of range. 622 623 <br><dt><code>--strict-direct-mode</code><dd>Do not turn the direct addressing mode into extended addressing mode 624when the instruction does not support direct addressing mode. 625 626 <br><dt><code>--print-insn-syntax</code><dd>Print the syntax of instruction in case of error. 627 628 <br><dt><code>--print-opcodes</code><dd>print the list of instructions with syntax and then exit. 629 630 <br><dt><code>--generate-example</code><dd>print an example of instruction for each possible instruction and then exit. 631This option is only useful for testing <samp><span class="command">as</span></samp>. 632 633 </dl> 634 635 <p>The following options are available when <samp><span class="command">as</span></samp> is configured 636for the SPARC architecture: 637 638 <dl> 639<dt><code>-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite</code><dt><code>-Av8plus | -Av8plusa | -Av9 | -Av9a</code><dd>Explicitly select a variant of the SPARC architecture. 640 641 <p>‘<samp><span class="samp">-Av8plus</span></samp>’ and ‘<samp><span class="samp">-Av8plusa</span></samp>’ select a 32 bit environment. 642‘<samp><span class="samp">-Av9</span></samp>’ and ‘<samp><span class="samp">-Av9a</span></samp>’ select a 64 bit environment. 643 644 <p>‘<samp><span class="samp">-Av8plusa</span></samp>’ and ‘<samp><span class="samp">-Av9a</span></samp>’ enable the SPARC V9 instruction set with 645UltraSPARC extensions. 646 647 <br><dt><code>-xarch=v8plus | -xarch=v8plusa</code><dd>For compatibility with the Solaris v9 assembler. These options are 648equivalent to -Av8plus and -Av8plusa, respectively. 649 650 <br><dt><code>-bump</code><dd>Warn when the assembler switches to another architecture. 651</dl> 652 653 <p>The following options are available when as is configured for the 'c54x 654architecture. 655 656 <dl> 657<dt><code>-mfar-mode</code><dd>Enable extended addressing mode. All addresses and relocations will assume 658extended addressing (usually 23 bits). 659<br><dt><code>-mcpu=</code><var>CPU_VERSION</var><dd>Sets the CPU version being compiled for. 660<br><dt><code>-merrors-to-file </code><var>FILENAME</var><dd>Redirect error output to a file, for broken systems which don't support such 661behaviour in the shell. 662</dl> 663 664 <p>The following options are available when as is configured for 665a <span class="sc">mips</span> processor. 666 667 <dl> 668<dt><code>-G </code><var>num</var><dd>This option sets the largest size of an object that can be referenced 669implicitly with the <code>gp</code> register. It is only accepted for targets that 670use ECOFF format, such as a DECstation running Ultrix. The default value is 8. 671 672 <p><a name="index-MIPS-endianness-15"></a><a name="index-endianness_002c-MIPS-16"></a><a name="index-big-endian-output_002c-MIPS-17"></a><br><dt><code>-EB</code><dd>Generate “big endian” format output. 673 674 <p><a name="index-little-endian-output_002c-MIPS-18"></a><br><dt><code>-EL</code><dd>Generate “little endian” format output. 675 676 <p><a name="index-MIPS-ISA-19"></a><br><dt><code>-mips1</code><dt><code>-mips2</code><dt><code>-mips3</code><dt><code>-mips4</code><dt><code>-mips5</code><dt><code>-mips32</code><dt><code>-mips32r2</code><dt><code>-mips64</code><dt><code>-mips64r2</code><dd>Generate code for a particular <span class="sc">mips</span> Instruction Set Architecture level. 677‘<samp><span class="samp">-mips1</span></samp>’ is an alias for ‘<samp><span class="samp">-march=r3000</span></samp>’, ‘<samp><span class="samp">-mips2</span></samp>’ is an 678alias for ‘<samp><span class="samp">-march=r6000</span></samp>’, ‘<samp><span class="samp">-mips3</span></samp>’ is an alias for 679‘<samp><span class="samp">-march=r4000</span></samp>’ and ‘<samp><span class="samp">-mips4</span></samp>’ is an alias for ‘<samp><span class="samp">-march=r8000</span></samp>’. 680‘<samp><span class="samp">-mips5</span></samp>’, ‘<samp><span class="samp">-mips32</span></samp>’, ‘<samp><span class="samp">-mips32r2</span></samp>’, ‘<samp><span class="samp">-mips64</span></samp>’, and 681‘<samp><span class="samp">-mips64r2</span></samp>’ 682correspond to generic 683‘<samp><span class="samp">MIPS V</span></samp>’, ‘<samp><span class="samp">MIPS32</span></samp>’, ‘<samp><span class="samp">MIPS32 Release 2</span></samp>’, ‘<samp><span class="samp">MIPS64</span></samp>’, 684and ‘<samp><span class="samp">MIPS64 Release 2</span></samp>’ 685ISA processors, respectively. 686 687 <br><dt><code>-march=</code><var>CPU</var><dd>Generate code for a particular <span class="sc">mips</span> cpu. 688 689 <br><dt><code>-mtune=</code><var>cpu</var><dd>Schedule and tune for a particular <span class="sc">mips</span> cpu. 690 691 <br><dt><code>-mfix7000</code><dt><code>-mno-fix7000</code><dd>Cause nops to be inserted if the read of the destination register 692of an mfhi or mflo instruction occurs in the following two instructions. 693 694 <br><dt><code>-mdebug</code><dt><code>-no-mdebug</code><dd>Cause stabs-style debugging output to go into an ECOFF-style .mdebug 695section instead of the standard ELF .stabs sections. 696 697 <br><dt><code>-mpdr</code><dt><code>-mno-pdr</code><dd>Control generation of <code>.pdr</code> sections. 698 699 <br><dt><code>-mgp32</code><dt><code>-mfp32</code><dd>The register sizes are normally inferred from the ISA and ABI, but these 700flags force a certain group of registers to be treated as 32 bits wide at 701all times. ‘<samp><span class="samp">-mgp32</span></samp>’ controls the size of general-purpose registers 702and ‘<samp><span class="samp">-mfp32</span></samp>’ controls the size of floating-point registers. 703 704 <br><dt><code>-mips16</code><dt><code>-no-mips16</code><dd>Generate code for the MIPS 16 processor. This is equivalent to putting 705<code>.set mips16</code> at the start of the assembly file. ‘<samp><span class="samp">-no-mips16</span></samp>’ 706turns off this option. 707 708 <br><dt><code>-mmicromips</code><dt><code>-mno-micromips</code><dd>Generate code for the microMIPS processor. This is equivalent to putting 709<code>.set micromips</code> at the start of the assembly file. ‘<samp><span class="samp">-mno-micromips</span></samp>’ 710turns off this option. This is equivalent to putting <code>.set nomicromips</code> 711at the start of the assembly file. 712 713 <br><dt><code>-msmartmips</code><dt><code>-mno-smartmips</code><dd>Enables the SmartMIPS extension to the MIPS32 instruction set. This is 714equivalent to putting <code>.set smartmips</code> at the start of the assembly file. 715‘<samp><span class="samp">-mno-smartmips</span></samp>’ turns off this option. 716 717 <br><dt><code>-mips3d</code><dt><code>-no-mips3d</code><dd>Generate code for the MIPS-3D Application Specific Extension. 718This tells the assembler to accept MIPS-3D instructions. 719‘<samp><span class="samp">-no-mips3d</span></samp>’ turns off this option. 720 721 <br><dt><code>-mdmx</code><dt><code>-no-mdmx</code><dd>Generate code for the MDMX Application Specific Extension. 722This tells the assembler to accept MDMX instructions. 723‘<samp><span class="samp">-no-mdmx</span></samp>’ turns off this option. 724 725 <br><dt><code>-mdsp</code><dt><code>-mno-dsp</code><dd>Generate code for the DSP Release 1 Application Specific Extension. 726This tells the assembler to accept DSP Release 1 instructions. 727‘<samp><span class="samp">-mno-dsp</span></samp>’ turns off this option. 728 729 <br><dt><code>-mdspr2</code><dt><code>-mno-dspr2</code><dd>Generate code for the DSP Release 2 Application Specific Extension. 730This option implies -mdsp. 731This tells the assembler to accept DSP Release 2 instructions. 732‘<samp><span class="samp">-mno-dspr2</span></samp>’ turns off this option. 733 734 <br><dt><code>-mmt</code><dt><code>-mno-mt</code><dd>Generate code for the MT Application Specific Extension. 735This tells the assembler to accept MT instructions. 736‘<samp><span class="samp">-mno-mt</span></samp>’ turns off this option. 737 738 <br><dt><code>-mmcu</code><dt><code>-mno-mcu</code><dd>Generate code for the MCU Application Specific Extension. 739This tells the assembler to accept MCU instructions. 740‘<samp><span class="samp">-mno-mcu</span></samp>’ turns off this option. 741 742 <br><dt><code>-minsn32</code><dt><code>-mno-insn32</code><dd>Only use 32-bit instruction encodings when generating code for the 743microMIPS processor. This option inhibits the use of any 16-bit 744instructions. This is equivalent to putting <code>.set insn32</code> at 745the start of the assembly file. ‘<samp><span class="samp">-mno-insn32</span></samp>’ turns off this 746option. This is equivalent to putting <code>.set noinsn32</code> at the 747start of the assembly file. By default ‘<samp><span class="samp">-mno-insn32</span></samp>’ is 748selected, allowing all instructions to be used. 749 750 <br><dt><code>--construct-floats</code><dt><code>--no-construct-floats</code><dd>The ‘<samp><span class="samp">--no-construct-floats</span></samp>’ option disables the construction of 751double width floating point constants by loading the two halves of the 752value into the two single width floating point registers that make up 753the double width register. By default ‘<samp><span class="samp">--construct-floats</span></samp>’ is 754selected, allowing construction of these floating point constants. 755 756 <p><a name="index-emulation-20"></a><br><dt><code>--emulation=</code><var>name</var><dd>This option causes <samp><span class="command">as</span></samp> to emulate <samp><span class="command">as</span></samp> configured 757for some other target, in all respects, including output format (choosing 758between ELF and ECOFF only), handling of pseudo-opcodes which may generate 759debugging information or store symbol table information, and default 760endianness. The available configuration names are: ‘<samp><span class="samp">mipsecoff</span></samp>’, 761‘<samp><span class="samp">mipself</span></samp>’, ‘<samp><span class="samp">mipslecoff</span></samp>’, ‘<samp><span class="samp">mipsbecoff</span></samp>’, ‘<samp><span class="samp">mipslelf</span></samp>’, 762‘<samp><span class="samp">mipsbelf</span></samp>’. The first two do not alter the default endianness from that 763of the primary target for which the assembler was configured; the others change 764the default to little- or big-endian as indicated by the ‘<samp><span class="samp">b</span></samp>’ or ‘<samp><span class="samp">l</span></samp>’ 765in the name. Using ‘<samp><span class="samp">-EB</span></samp>’ or ‘<samp><span class="samp">-EL</span></samp>’ will override the endianness 766selection in any case. 767 768 <p>This option is currently supported only when the primary target 769<samp><span class="command">as</span></samp> is configured for is a <span class="sc">mips</span> ELF or ECOFF target. 770Furthermore, the primary target or others specified with 771‘<samp><span class="samp">--enable-targets=...</span></samp>’ at configuration time must include support for 772the other format, if both are to be available. For example, the Irix 5 773configuration includes support for both. 774 775 <p>Eventually, this option will support more configurations, with more 776fine-grained control over the assembler's behavior, and will be supported for 777more processors. 778 779 <br><dt><code>-nocpp</code><dd><samp><span class="command">as</span></samp> ignores this option. It is accepted for compatibility with 780the native tools. 781 782 <br><dt><code>--trap</code><dt><code>--no-trap</code><dt><code>--break</code><dt><code>--no-break</code><dd>Control how to deal with multiplication overflow and division by zero. 783‘<samp><span class="samp">--trap</span></samp>’ or ‘<samp><span class="samp">--no-break</span></samp>’ (which are synonyms) take a trap exception 784(and only work for Instruction Set Architecture level 2 and higher); 785‘<samp><span class="samp">--break</span></samp>’ or ‘<samp><span class="samp">--no-trap</span></samp>’ (also synonyms, and the default) take a 786break exception. 787 788 <br><dt><code>-n</code><dd>When this option is used, <samp><span class="command">as</span></samp> will issue a warning every 789time it generates a nop instruction from a macro. 790</dl> 791 792 <p>The following options are available when as is configured for 793an MCore processor. 794 795 <dl> 796<dt><code>-jsri2bsr</code><dt><code>-nojsri2bsr</code><dd>Enable or disable the JSRI to BSR transformation. By default this is enabled. 797The command line option ‘<samp><span class="samp">-nojsri2bsr</span></samp>’ can be used to disable it. 798 799 <br><dt><code>-sifilter</code><dt><code>-nosifilter</code><dd>Enable or disable the silicon filter behaviour. By default this is disabled. 800The default can be overridden by the ‘<samp><span class="samp">-sifilter</span></samp>’ command line option. 801 802 <br><dt><code>-relax</code><dd>Alter jump instructions for long displacements. 803 804 <br><dt><code>-mcpu=[210|340]</code><dd>Select the cpu type on the target hardware. This controls which instructions 805can be assembled. 806 807 <br><dt><code>-EB</code><dd>Assemble for a big endian target. 808 809 <br><dt><code>-EL</code><dd>Assemble for a little endian target. 810 811 </dl> 812 813 <p>See the info pages for documentation of the MMIX-specific options. 814 815<!-- man end --> 816 <p>See <a href="PowerPC_002dOpts.html#PowerPC_002dOpts">PowerPC-Opts</a>, for the options available when as is configured 817for a PowerPC processor. 818 819<!-- man begin OPTIONS --> 820 <p>See the info pages for documentation of the RX-specific options. 821 822 <p>The following options are available when as is configured for the s390 823processor family. 824 825 <dl> 826<dt><code>-m31</code><dt><code>-m64</code><dd>Select the word size, either 31/32 bits or 64 bits. 827<br><dt><code>-mesa</code><br><dt><code>-mzarch</code><dd>Select the architecture mode, either the Enterprise System 828Architecture (esa) or the z/Architecture mode (zarch). 829<br><dt><code>-march=</code><var>processor</var><dd>Specify which s390 processor variant is the target, ‘<samp><span class="samp">g6</span></samp>’, ‘<samp><span class="samp">g6</span></samp>’, 830‘<samp><span class="samp">z900</span></samp>’, ‘<samp><span class="samp">z990</span></samp>’, ‘<samp><span class="samp">z9-109</span></samp>’, ‘<samp><span class="samp">z9-ec</span></samp>’, or ‘<samp><span class="samp">z10</span></samp>’. 831<br><dt><code>-mregnames</code><dt><code>-mno-regnames</code><dd>Allow or disallow symbolic names for registers. 832<br><dt><code>-mwarn-areg-zero</code><dd>Warn whenever the operand for a base or index register has been specified 833but evaluates to zero. 834</dl> 835 <!-- man end --> 836 837 <p>See <a href="TIC6X-Options.html#TIC6X-Options">TIC6X Options</a>, for the options available when as is configured 838for a TMS320C6000 processor. 839 840 <p>See <a href="TILE_002dGx-Options.html#TILE_002dGx-Options">TILE-Gx Options</a>, for the options available when as is configured 841for a TILE-Gx processor. 842 843 <p>See <a href="Xtensa-Options.html#Xtensa-Options">Xtensa Options</a>, for the options available when as is configured 844for an Xtensa processor. 845 846<!-- man begin OPTIONS --> 847 <p>The following options are available when as is configured for 848a Z80 family processor. 849 <dl> 850<dt><code>-z80</code><dd>Assemble for Z80 processor. 851<br><dt><code>-r800</code><dd>Assemble for R800 processor. 852<br><dt><code>-ignore-undocumented-instructions</code><dt><code>-Wnud</code><dd>Assemble undocumented Z80 instructions that also work on R800 without warning. 853<br><dt><code>-ignore-unportable-instructions</code><dt><code>-Wnup</code><dd>Assemble all undocumented Z80 instructions without warning. 854<br><dt><code>-warn-undocumented-instructions</code><dt><code>-Wud</code><dd>Issue a warning for undocumented Z80 instructions that also work on R800. 855<br><dt><code>-warn-unportable-instructions</code><dt><code>-Wup</code><dd>Issue a warning for undocumented Z80 instructions that do not work on R800. 856<br><dt><code>-forbid-undocumented-instructions</code><dt><code>-Fud</code><dd>Treat all undocumented instructions as errors. 857<br><dt><code>-forbid-unportable-instructions</code><dt><code>-Fup</code><dd>Treat undocumented Z80 instructions that do not work on R800 as errors. 858</dl> 859 860<!-- man end --> 861<ul class="menu"> 862<li><a accesskey="1" href="Manual.html#Manual">Manual</a>: Structure of this Manual 863<li><a accesskey="2" href="GNU-Assembler.html#GNU-Assembler">GNU Assembler</a>: The GNU Assembler 864<li><a accesskey="3" href="Object-Formats.html#Object-Formats">Object Formats</a>: Object File Formats 865<li><a accesskey="4" href="Command-Line.html#Command-Line">Command Line</a>: Command Line 866<li><a accesskey="5" href="Input-Files.html#Input-Files">Input Files</a>: Input Files 867<li><a accesskey="6" href="Object.html#Object">Object</a>: Output (Object) File 868<li><a accesskey="7" href="Errors.html#Errors">Errors</a>: Error and Warning Messages 869</ul> 870 871 </body></html> 872 873