1#ifndef _RAETH_IOCTL_H 2#define _RAETH_IOCTL_H 3 4/* ioctl commands */ 5#define RAETH_ESW_REG_READ 0x89F1 6#define RAETH_ESW_REG_WRITE 0x89F2 7#define RAETH_MII_READ 0x89F3 8#define RAETH_MII_WRITE 0x89F4 9#define RAETH_ESW_INGRESS_RATE 0x89F5 10#define RAETH_ESW_EGRESS_RATE 0x89F6 11#define RAETH_ESW_PHY_DUMP 0x89F7 12/* ASUS Ext */ 13#define RAETH_ASUS 0x89FF 14 15/* ASUS Ext sub-command */ 16#define RAETH_ASUS_RESET 0x0 17#define RAETH_ASUS_STATS 0x1 18 19#if defined(RTN14U) || defined(RTAC52U) || defined(RTAC51U) || defined(RTN11P) || defined(RTN300) || defined(RTN54U) || defined(RTAC1200HP) || defined(RTN56UB1) || defined(RTN56UB2) || defined(RTAC54U) 20 21#define REG_ESW_WT_MAC_MFC 0x10 22#define REG_ESW_WT_MAC_ATA1 0x74 23#define REG_ESW_WT_MAC_ATA2 0x78 24#define REG_ESW_WT_MAC_ATWD 0x7C 25#define REG_ESW_WT_MAC_ATC 0x80 26 27#define REG_ESW_TABLE_TSRA1 0x84 28#define REG_ESW_TABLE_TSRA2 0x88 29#define REG_ESW_TABLE_ATRD 0x8C 30 31 32#define REG_ESW_VLAN_VTCR 0x90 33#define REG_ESW_VLAN_VAWD1 0x94 34#define REG_ESW_VLAN_VAWD2 0x98 35 36#if !(defined(RTN56UB1) || defined(RTN56UB2))//MT7621 don't use it 37#define REG_ESW_VLAN_ID_BASE 0x100 38#endif 39//#define REG_ESW_VLAN_ID_BASE 0x50 40#define REG_ESW_VLAN_MEMB_BASE 0x70 41#define REG_ESW_TABLE_SEARCH 0x24 42#define REG_ESW_TABLE_STATUS0 0x28 43#define REG_ESW_TABLE_STATUS1 0x2C 44#define REG_ESW_TABLE_STATUS2 0x30 45#define REG_ESW_WT_MAC_AD0 0x34 46#define REG_ESW_WT_MAC_AD1 0x38 47#define REG_ESW_WT_MAC_AD2 0x3C 48 49#else 50/* rt3052 embedded ethernet switch registers */ 51#define REG_ESW_VLAN_ID_BASE 0x50 52#define REG_ESW_VLAN_MEMB_BASE 0x70 53#define REG_ESW_TABLE_SEARCH 0x24 54#define REG_ESW_TABLE_STATUS0 0x28 55#define REG_ESW_TABLE_STATUS1 0x2C 56#define REG_ESW_TABLE_STATUS2 0x30 57#define REG_ESW_WT_MAC_AD0 0x34 58#define REG_ESW_WT_MAC_AD1 0x38 59#define REG_ESW_WT_MAC_AD2 0x3C 60#endif 61 62 63#if defined(CONFIG_RALINK_RT3352) 64#define REG_ESW_MAX 0x14C 65#elif defined (CONFIG_RALINK_RT5350) 66#define REG_ESW_MAX 0x16C 67#elif defined(RTN14U) || defined(RTAC52U) || defined(RTAC51U) || defined(RTN11P) || defined(RTN300) || defined(RTN54U) || defined(RTAC1200HP) || defined(RTN56UB1) || defined(RTN56UB2) || defined(RTAC54U) 68#define REG_ESW_MAX 0x7FFFF 69#else //RT305x, RT3350 70#define REG_ESW_MAX 0xFC 71#endif 72 73 74typedef struct rt3052_esw_reg { 75 unsigned int off; 76 unsigned int val; 77} esw_reg; 78 79typedef struct ralink_mii_ioctl_data { 80 __u32 phy_id; 81 __u32 reg_num; 82 __u32 val_in; 83 __u32 val_out; 84} ra_mii_ioctl_data; 85 86typedef struct rt335x_esw_reg { 87 unsigned int on_off; 88 unsigned int port; 89 unsigned int bw;/*Mbps*/ 90} esw_rate; 91 92typedef struct raeth_asus_data_s { 93 __u32 subcmd; 94 union { 95 __u32 subdata; 96 }; 97} raeth_asus_data_t; 98 99 100#endif 101