1/* frv vliw model. 2 Copyright (C) 1999, 2000, 2001, 2003, 2007 Free Software Foundation, Inc. 3 Contributed by Red Hat. 4 5This file is part of the GNU simulators. 6 7This program is free software; you can redistribute it and/or modify 8it under the terms of the GNU General Public License as published by 9the Free Software Foundation; either version 3 of the License, or 10(at your option) any later version. 11 12This program is distributed in the hope that it will be useful, 13but WITHOUT ANY WARRANTY; without even the implied warranty of 14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15GNU General Public License for more details. 16 17You should have received a copy of the GNU General Public License 18along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19 20#define WANT_CPU frvbf 21#define WANT_CPU_FRVBF 22 23#include "sim-main.h" 24 25/* Simulator specific vliw related functions. Additional vliw related 26 code used by both the simulator and the assembler is in frv.opc. */ 27 28int insns_in_slot[UNIT_NUM_UNITS] = {0}; 29 30void 31frv_vliw_setup_insn (SIM_CPU *current_cpu, const CGEN_INSN *insn) 32{ 33 FRV_VLIW *vliw; 34 int index; 35 36 /* Always clear the NE index which indicates the target register 37 of a non excepting insn. This will be reset by the insn if 38 necessary. */ 39 frv_interrupt_state.ne_index = NE_NOFLAG; 40 41 vliw = CPU_VLIW (current_cpu); 42 index = vliw->next_slot - 1; 43 if (frv_is_float_insn (insn)) 44 { 45 /* If the insn is to be added and is a floating point insn and 46 it is the first floating point insn in the vliw, then clear 47 FSR0.FTT. */ 48 int i; 49 for (i = 0; i < index; ++i) 50 if (frv_is_float_major (vliw->major[i], vliw->mach)) 51 break; /* found float insn. */ 52 if (i >= index) 53 { 54 SI fsr0 = GET_FSR (0); 55 SET_FSR_FTT (fsr0, FTT_NONE); 56 SET_FSR (0, fsr0); 57 } 58 } 59 else if (frv_is_media_insn (insn)) 60 { 61 /* Clear the appropriate MSR fields depending on which slot 62 this insn is in. */ 63 CGEN_ATTR_VALUE_ENUM_TYPE preserve_ovf; 64 SI msr0 = GET_MSR (0); 65 66 preserve_ovf = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_PRESERVE_OVF); 67 if ((*vliw->current_vliw)[index] == UNIT_FM0) 68 { 69 if (! preserve_ovf) 70 { 71 /* Clear MSR0.OVF and MSR0.SIE. */ 72 CLEAR_MSR_SIE (msr0); 73 CLEAR_MSR_OVF (msr0); 74 } 75 } 76 else 77 { 78 if (! preserve_ovf) 79 { 80 /* Clear MSR1.OVF and MSR1.SIE. */ 81 SI msr1 = GET_MSR (1); 82 CLEAR_MSR_SIE (msr1); 83 CLEAR_MSR_OVF (msr1); 84 SET_MSR (1, msr1); 85 } 86 } 87 SET_MSR (0, msr0); 88 } /* Insn is a media insns. */ 89 COUNT_INSNS_IN_SLOT ((*vliw->current_vliw)[index]); 90} 91 92