12007-07-04 Nick Clifton <nickc@redhat.com> 2 3 * cris.cpu: Update copyright notice to refer to GPLv3. 4 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu, 5 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu, 6 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu, 7 xc16x.opc: Likewise. 8 * iq2000.cpu: Fix copyright notice to refer to FSF. 9 102007-04-30 Mark Salter <msalter@sadr.localdomain> 11 12 * frv.cpu (spr-names): Support new coprocessor SPR registers. 13 142007-04-20 Nick Clifton <nickc@redhat.com> 15 16 * xc16x.cpu: Restore after accidentally overwriting this file with 17 xc16x.opc. 18 192007-03-29 DJ Delorie <dj@redhat.com> 20 21 * m32c.cpu (Imm-8-s4n): Fix print hook. 22 (Lab-24-8, Lab-32-8, Lab-40-8): Fix. 23 (arith-jnz-imm4-dst-defn): Make relaxable. 24 (arith-jnz16-imm4-dst-defn): Fix encodings. 25 262007-03-20 DJ Delorie <dj@redhat.com> 27 28 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20, 29 mem20): New. 30 (src16-16-20-An-relative-*): New. 31 (dst16-*-20-An-relative-*): New. 32 (dst16-16-16sa-*): New 33 (dst16-16-16ar-*): New 34 (dst32-16-16sa-Unprefixed-*): New 35 (jsri): Fix operands. 36 (setzx): Fix encoding. 37 382007-03-08 Alan Modra <amodra@bigpond.net.au> 39 40 * m32r.opc: Formatting. 41 422006-05-22 Nick Clifton <nickc@redhat.com> 43 44 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu. 45 462006-04-10 DJ Delorie <dj@redhat.com> 47 48 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which 49 decides if this function accepts symbolic constants or not. 50 (parse_signed_bitbase): Likewise. 51 (parse_unsigned_bitbase8): Pass the new parameter. 52 (parse_unsigned_bitbase11): Likewise. 53 (parse_unsigned_bitbase16): Likewise. 54 (parse_unsigned_bitbase19): Likewise. 55 (parse_unsigned_bitbase27): Likewise. 56 (parse_signed_bitbase8): Likewise. 57 (parse_signed_bitbase11): Likewise. 58 (parse_signed_bitbase19): Likewise. 59 602006-03-13 DJ Delorie <dj@redhat.com> 61 62 * m32c.cpu (Bit3-S): New. 63 (btst:s): New. 64 * m32c.opc (parse_bit3_S): New. 65 66 * m32c.cpu (decimal-subtraction16-insn): Add second operand. 67 (btst): Add optional :G suffix for MACH32. 68 (or.b:S): New. 69 (pop.w:G): Add optional :G suffix for MACH16. 70 (push.b.imm): Fix syntax. 71 722006-03-10 DJ Delorie <dj@redhat.com> 73 74 * m32c.cpu (mul.l): New. 75 (mulu.l): New. 76 772006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com) 78 79 * xc16x.opc (parse_hash): Return NULL if the input was parsed or 80 an error message otherwise. 81 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise. 82 Fix up comments to correctly describe the functions. 83 842006-02-24 DJ Delorie <dj@redhat.com> 85 86 * m32c.cpu (RL_TYPE): New attribute, with macros. 87 (Lab-8-24): Add RELAX. 88 (unary-insn-defn-g, binary-arith-imm-dst-defn, 89 binary-arith-imm4-dst-defn): Add 1ADDR attribute. 90 (binary-arith-src-dst-defn): Add 2ADDR attribute. 91 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a, 92 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP 93 attribute. 94 (jsri16, jsri32): Add 1ADDR attribute. 95 (jsr32.w, jsr32.a): Add JUMP attribute. 96 972006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> 98 Anil Paranjape <anilp1@kpitcummins.com> 99 Shilin Shakti <shilins@kpitcummins.com> 100 101 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU 102 description. 103 * xc16x.opc: New file containing supporting XC16C routines. 104 1052006-02-10 Nick Clifton <nickc@redhat.com> 106 107 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits. 108 1092006-01-06 DJ Delorie <dj@redhat.com> 110 111 * m32c.cpu (mov.w:q): Fix mode. 112 (push32.b.imm): Likewise, for the comment. 113 1142005-12-16 Nathan Sidwell <nathan@codesourcery.com> 115 116 Second part of ms1 to mt renaming. 117 * mt.cpu (define-arch, define-isa): Set name to mt. 118 (define-mach): Adjust. 119 * mt.opc (CGEN_ASM_HASH): Update. 120 (mt_asm_hash, mt_cgen_insn_supported): Renamed. 121 (parse_loopsize, parse_imm16): Adjust. 122 1232005-12-13 DJ Delorie <dj@redhat.com> 124 125 * m32c.cpu (jsri): Fix order so register names aren't treated as 126 symbols. 127 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw, 128 indexwd, indexws): Fix encodings. 129 1302005-12-12 Nathan Sidwell <nathan@codesourcery.com> 131 132 * mt.cpu: Rename from ms1.cpu. 133 * mt.opc: Rename from ms1.opc. 134 1352005-12-06 Hans-Peter Nilsson <hp@axis.com> 136 137 * cris.cpu (simplecris-common-writable-specregs) 138 (simplecris-common-readable-specregs): Split from 139 simplecris-common-specregs. All users changed. 140 (cris-implemented-writable-specregs-v0) 141 (cris-implemented-readable-specregs-v0): Similar from 142 cris-implemented-specregs-v0. 143 (cris-implemented-writable-specregs-v3) 144 (cris-implemented-readable-specregs-v3) 145 (cris-implemented-writable-specregs-v8) 146 (cris-implemented-readable-specregs-v8) 147 (cris-implemented-writable-specregs-v10) 148 (cris-implemented-readable-specregs-v10) 149 (cris-implemented-writable-specregs-v32) 150 (cris-implemented-readable-specregs-v32): Similar. 151 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New 152 insns and specializations. 153 1542005-11-08 Nathan Sidwell <nathan@codesourcery.com> 155 156 Add ms2 157 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and 158 model. 159 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, 160 f-cb2incr, f-rc3): New fields. 161 (LOOP): New instruction. 162 (JAL-HAZARD): New hazard. 163 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): 164 New operands. 165 (mul, muli, dbnz, iflush): Enable for ms2 166 (jal, reti): Has JAL-HAZARD. 167 (ldctxt, ldfb, stfb): Only ms1. 168 (fbcb): Only ms1,ms1-003. 169 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, 170 fbcbincrs, mfbcbincrs): Enable for ms2. 171 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. 172 * ms1.opc (parse_loopsize): New. 173 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. 174 (print_pcrel): New. 175 1762005-10-28 Dave Brolley <brolley@redhat.com> 177 178 Contribute the following change: 179 2003-09-24 Dave Brolley <brolley@redhat.com> 180 181 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of 182 CGEN_ATTR_VALUE_TYPE. 183 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE. 184 Use cgen_bitset_intersect_p. 185 1862005-10-27 DJ Delorie <dj@redhat.com> 187 188 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. 189 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, 190 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which 191 imm operand is needed. 192 (adjnz, sbjnz): Pass the right operands. 193 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, 194 unary-insn): Add -g variants for opcodes that need to support :G. 195 (not.BW:G, push.BW:G): Call it. 196 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, 197 stzx16-imm8-imm8-abs16): Fix operand typos. 198 * m32c.opc (m32c_asm_hash): Support bnCND. 199 (parse_signed4n, print_signed4n): New. 200 2012005-10-26 DJ Delorie <dj@redhat.com> 202 203 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. 204 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn, 205 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn): 206 dsp8[sp] is signed. 207 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff). 208 (mov.BW:S r0,r1): Fix typo r1l->r1. 209 (tst): Allow :G suffix. 210 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff. 211 2122005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 213 214 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. 215 2162005-10-25 DJ Delorie <dj@redhat.com> 217 218 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by 219 making one a macro of the other. 220 2212005-10-21 DJ Delorie <dj@redhat.com> 222 223 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. 224 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, 225 indexld, indexls): .w variants have `1' bit. 226 (rot32.b): QI, not SI. 227 (rot32.w): HI, not SI. 228 (xchg16): HI for .w variant. 229 2302005-10-19 Nick Clifton <nickc@redhat.com> 231 232 * m32r.opc (parse_slo16): Fix bad application of previous patch. 233 2342005-10-18 Andreas Schwab <schwab@suse.de> 235 236 * m32r.opc (parse_slo16): Better version of previous patch. 237 2382005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 239 240 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word 241 size. 242 2432005-07-25 DJ Delorie <dj@redhat.com> 244 245 * m32c.opc (parse_unsigned8): Add %dsp8(). 246 (parse_signed8): Add %hi8(). 247 (parse_unsigned16): Add %dsp16(). 248 (parse_signed16): Add %lo16() and %hi16(). 249 (parse_lab_5_3): Make valuep a bfd_vma *. 250 2512005-07-18 Nick Clifton <nickc@redhat.com> 252 253 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode 254 components. 255 (f-lab32-jmp-s): Fix insertion sequence. 256 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands. 257 (Dsp-40-s8): Make parameter be signed. 258 (Dsp-40-s16): Likewise. 259 (Dsp-48-s8): Likewise. 260 (Dsp-48-s16): Likewise. 261 (Imm-13-u3): Likewise. (Despite its name!) 262 (BitBase16-16-s8): Make the parameter be unsigned. 263 (BitBase16-8-u11-S): Likewise. 264 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s, 265 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow 266 relaxation. 267 268 * m32c.opc: Fix formatting. 269 Use safe-ctype.h instead of ctype.h 270 Move duplicated code sequences into a macro. 271 Fix compile time warnings about signedness mismatches. 272 Remove dead code. 273 (parse_lab_5_3): New parser function. 274 2752005-07-16 Jim Blandy <jimb@redhat.com> 276 277 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, 278 to represent isa sets. 279 2802005-07-15 Jim Blandy <jimb@redhat.com> 281 282 * m32c.cpu, m32c.opc: Fix copyright. 283 2842005-07-14 Jim Blandy <jimb@redhat.com> 285 286 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. 287 2882005-07-14 Alan Modra <amodra@bigpond.net.au> 289 290 * ms1.opc (print_dollarhex): Correct format string. 291 2922005-07-06 Alan Modra <amodra@bigpond.net.au> 293 294 * iq2000.cpu: Include from binutils cpu dir. 295 2962005-07-05 Nick Clifton <nickc@redhat.com> 297 298 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter 299 unsigned in order to avoid compile time warnings about sign 300 conflicts. 301 302 * ms1.opc (parse_*): Likewise. 303 (parse_imm16): Use a "void *" as it is passed both signed and 304 unsigned arguments. 305 3062005-07-01 Nick Clifton <nickc@redhat.com> 307 308 * frv.opc: Update to ISO C90 function declaration style. 309 * iq2000.opc: Likewise. 310 * m32r.opc: Likewise. 311 * sh.opc: Likewise. 312 3132005-06-15 Dave Brolley <brolley@redhat.com> 314 315 Contributed by Red Hat. 316 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox. 317 * ms1.opc: New file. Written by Stan Cox. 318 3192005-05-10 Nick Clifton <nickc@redhat.com> 320 321 * Update the address and phone number of the FSF organization in 322 the GPL notices in the following files: 323 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu, 324 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu, 325 sh64-media.cpu, simplify.inc 326 3272005-02-24 Alan Modra <amodra@bigpond.net.au> 328 329 * frv.opc (parse_A): Warning fix. 330 3312005-02-23 Nick Clifton <nickc@redhat.com> 332 333 * frv.opc: Fixed compile time warnings about differing signed'ness 334 of pointers passed to functions. 335 * m32r.opc: Likewise. 336 3372005-02-11 Nick Clifton <nickc@redhat.com> 338 339 * iq2000.opc (parse_jtargq10): Change type of valuep argument to 340 'bfd_vma *' in order avoid compile time warning message. 341 3422005-01-28 Hans-Peter Nilsson <hp@axis.com> 343 344 * cris.cpu (mstep): Add missing insn. 345 3462005-01-25 Alexandre Oliva <aoliva@redhat.com> 347 348 2004-11-10 Alexandre Oliva <aoliva@redhat.com> 349 * frv.cpu: Add support for TLS annotations in loads and calll. 350 * frv.opc (parse_symbolic_address): New. 351 (parse_ldd_annotation): New. 352 (parse_call_annotation): New. 353 (parse_ld_annotation): New. 354 (parse_ulo16, parse_uslo16): Use parse_symbolic_address. 355 Introduce TLS relocations. 356 (parse_d12, parse_s12, parse_u12): Likewise. 357 (parse_uhi16): Likewise. Fix constant checking on 64-bit host. 358 (parse_call_label, print_at): New. 359 3602004-12-21 Mikael Starvik <starvik@axis.com> 361 362 * cris.cpu (cris-set-mem): Correct integral write semantics. 363 3642004-11-29 Hans-Peter Nilsson <hp@axis.com> 365 366 * cris.cpu: New file. 367 3682004-11-15 Michael K. Lechner <mike.lechner@gmail.com> 369 370 * iq2000.cpu: Added quotes around macro arguments so that they 371 will work with newer versions of guile. 372 3732004-10-27 Nick Clifton <nickc@redhat.com> 374 375 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1, 376 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index 377 operand. 378 * iq2000.cpu (dnop index): Rename to _index to avoid complications 379 with guile. 380 3812004-08-27 Richard Sandiford <rsandifo@redhat.com> 382 383 * frv.cpu (cfmovs): Change UNIT attribute to FMALL. 384 3852004-05-15 Nick Clifton <nickc@redhat.com> 386 387 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const. 388 3892004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 390 391 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug. 392 3932004-03-01 Richard Sandiford <rsandifo@redhat.com> 394 395 * frv.cpu (define-arch frv): Add fr450 mach. 396 (define-mach fr450): New. 397 (define-model fr450): New. Add profile units to every fr450 insn. 398 (define-attr UNIT): Add MDCUTSSI. 399 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn. 400 (define-attr AUDIO): New boolean. 401 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL) 402 (f-LRA-null, f-TLBPR-null): New fields. 403 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr) 404 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs. 405 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands. 406 (LRA-null, TLBPR-null): New macros. 407 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr. 408 (load-real-address): New macro. 409 (lrai, lrad, tlbpr): New instructions. 410 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument. 411 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly. 412 (mdcutssi): Change UNIT attribute to MDCUTSSI. 413 (media-low-clear-semantics, media-scope-limit-semantics) 414 (media-quad-limit, media-quad-shift): New macros. 415 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions. 416 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major) 417 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn) 418 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450. 419 (fr450_unit_mapping): New array. 420 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry 421 for new MDCUTSSI unit. 422 (fr450_check_insn_major_constraints): New function. 423 (check_insn_major_constraints): Use it. 424 4252004-03-01 Richard Sandiford <rsandifo@redhat.com> 426 427 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. 428 (scutss): Change unit to I0. 429 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. 430 (mqsaths): Fix FR400-MAJOR categorization. 431 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) 432 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. 433 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) 434 combinations. 435 4362004-03-01 Richard Sandiford <rsandifo@redhat.com> 437 438 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete. 439 (rstb, rsth, rst, rstd, rstq): Delete. 440 (rstbf, rsthf, rstf, rstdf, rstqf): Delete. 441 4422004-02-23 Nick Clifton <nickc@redhat.com> 443 444 * Apply these patches from Renesas: 445 446 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 447 448 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when 449 disassembling codes for 0x*2 addresses. 450 451 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 452 453 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction. 454 455 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 456 457 * cpu/m32r.cpu : Add new model m32r2. 458 Add new instructions. 459 Replace occurrances of 'Mitsubishi' with 'Renesas'. 460 Changed PIPE attr of push from O to OS. 461 Care for Little-endian of M32R. 462 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn): 463 Care for Little-endian of M32R. 464 (parse_slo16): signed extension for value. 465 4662004-02-20 Andrew Cagney <cagney@redhat.com> 467 468 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick 469 Clifton, Ben Elliston, Matthew Green, and Andrew Haley. 470 471 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all 472 written by Ben Elliston. 473 4742004-01-14 Richard Sandiford <rsandifo@redhat.com> 475 476 * frv.cpu (UNIT): Add IACC. 477 (iacc-multiply-r-r): Use it. 478 * frv.opc (fr400_unit_mapping): Add entry for IACC. 479 (fr500_unit_mapping, fr550_unit_mapping): Likewise. 480 4812004-01-06 Alexandre Oliva <aoliva@redhat.com> 482 483 2003-12-19 Alexandre Oliva <aoliva@redhat.com> 484 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some 485 cut&paste errors in shifting/truncating numerical operands. 486 2003-08-08 Alexandre Oliva <aoliva@redhat.com> 487 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo. 488 (parse_uslo16): Likewise. 489 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. 490 (parse_d12): Parse gotoff12 and gotofffuncdesc12. 491 (parse_s12): Likewise. 492 2003-08-04 Alexandre Oliva <aoliva@redhat.com> 493 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo. 494 (parse_uslo16): Likewise. 495 (parse_uhi16): Parse gothi and gotfuncdeschi. 496 (parse_d12): Parse got12 and gotfuncdesc12. 497 (parse_s12): Likewise. 498 4992003-10-10 Dave Brolley <brolley@redhat.com> 500 501 * frv.cpu (dnpmop): New p-macro. 502 (GRdoublek): Use dnpmop. 503 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto. 504 (store-double-r-r): Use (.sym regtype doublek). 505 (r-store-double): Ditto. 506 (store-double-r-r-u): Ditto. 507 (conditional-store-double): Ditto. 508 (conditional-store-double-u): Ditto. 509 (store-double-r-simm): Ditto. 510 (fmovs): Assign to UNIT FMALL. 511 5122003-10-06 Dave Brolley <brolley@redhat.com> 513 514 * frv.cpu, frv.opc: Add support for fr550. 515 5162003-09-24 Dave Brolley <brolley@redhat.com> 517 518 * frv.cpu (u-commit): New modelling unit for fr500. 519 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand. 520 (commit-r): Use u-commit model for fr500. 521 (commit): Ditto. 522 (conditional-float-binary-op): Take profiling data as an argument. 523 Update callers. 524 (ne-float-binary-op): Ditto. 525 5262003-09-19 Michael Snyder <msnyder@redhat.com> 527 528 * frv.cpu (nldqi): Delete unimplemented instruction. 529 5302003-09-12 Dave Brolley <brolley@redhat.com> 531 532 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500. 533 (clear-ne-flag-r): Pass insn profiling in as an argument. Call 534 frv_ref_SI to get input register referenced for profiling. 535 (clear-ne-flag-all): Pass insn profiling in as an argument. 536 (clrgr,clrfr,clrga,clrfa): Add profiling information. 537 5382003-09-11 Michael Snyder <msnyder@redhat.com> 539 540 * frv.cpu: Typographical corrections. 541 5422003-09-09 Dave Brolley <brolley@redhat.com> 543 544 * frv.cpu (media-dual-complex): Change UNIT to FMALL. 545 (conditional-media-dual-complex, media-quad-complex): Likewise. 546 5472003-09-04 Dave Brolley <brolley@redhat.com> 548 549 * frv.cpu (register-transfer): Pass in all attributes in on argument. 550 Update all callers. 551 (conditional-register-transfer): Ditto. 552 (cache-preload): Ditto. 553 (floating-point-conversion): Ditto. 554 (floating-point-neg): Ditto. 555 (float-abs): Ditto. 556 (float-binary-op-s): Ditto. 557 (conditional-float-binary-op): Ditto. 558 (ne-float-binary-op): Ditto. 559 (float-dual-arith): Ditto. 560 (ne-float-dual-arith): Ditto. 561 5622003-09-03 Dave Brolley <brolley@redhat.com> 563 564 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers. 565 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC, 566 MCLRACC-1. 567 (A): Removed operand. 568 (A0,A1): New operands replace operand A. 569 (mnop): Now a real insn 570 (mclracc): Removed insn. 571 (mclracc-0, mclracc-1): New insns replace mclracc. 572 (all insns): Use new UNIT attributes. 573 5742003-08-21 Nick Clifton <nickc@redhat.com> 575 576 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand 577 and u-media-dual-btoh with output parameter. 578 (cmbtoh): Add profiling hack. 579 5802003-08-19 Michael Snyder <msnyder@redhat.com> 581 582 * frv.cpu: Fix typo, Frintkeven -> FRintkeven 583 5842003-06-10 Doug Evans <dje@sebabeach.org> 585 586 * frv.cpu: Add IDOC attribute. 587 5882003-06-06 Andrew Cagney <cagney@redhat.com> 589 590 Contributed by Red Hat. 591 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston, 592 Stan Cox, and Frank Ch. Eigler. 593 * iq2000.opc: New file. Written by Ben Elliston, Frank 594 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox. 595 * iq2000m.cpu: New file. Written by Jeff Johnston. 596 * iq10.cpu: New file. Written by Jeff Johnston. 597 5982003-06-05 Nick Clifton <nickc@redhat.com> 599 600 * frv.cpu (FRintieven): New operand. An even-numbered only 601 version of the FRinti operand. 602 (FRintjeven): Likewise for FRintj. 603 (FRintkeven): Likewise for FRintk. 604 (mdcutssi, media-dual-word-rotate-r-r, mqsaths, 605 media-quad-arith-sat-semantics, media-quad-arith-sat, 606 conditional-media-quad-arith-sat, mdunpackh, 607 media-quad-multiply-semantics, media-quad-multiply, 608 conditional-media-quad-multiply, media-quad-complex-i, 609 media-quad-multiply-acc-semantics, media-quad-multiply-acc, 610 conditional-media-quad-multiply-acc, munpackh, 611 media-quad-multiply-cross-acc-semantics, mdpackh, 612 media-quad-multiply-cross-acc, mbtoh-semantics, 613 media-quad-cross-multiply-cross-acc-semantics, 614 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics, 615 media-quad-cross-multiply-acc-semantics, cmbtoh, 616 media-quad-cross-multiply-acc, media-quad-complex, mhtob, 617 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd, 618 cmhtob): Use new operands. 619 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define. 620 (parse_even_register): New function. 621 6222003-06-03 Nick Clifton <nickc@redhat.com> 623 624 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit 625 immediate value not unsigned. 626 6272003-06-03 Andrew Cagney <cagney@redhat.com> 628 629 Contributed by Red Hat. 630 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore, 631 and Eric Christopher. 632 * frv.opc: New file. Written by Catherine Moore, and Dave 633 Brolley. 634 * simplify.inc: New file. Written by Doug Evans. 635 6362003-05-02 Andrew Cagney <cagney@redhat.com> 637 638 * New file. 639 640 641Local Variables: 642mode: change-log 643left-margin: 8 644fill-column: 74 645version-control: never 646End: 647